diff options
Diffstat (limited to 'drivers/spi/spi-pl022.c')
-rw-r--r-- | drivers/spi/spi-pl022.c | 48 |
1 files changed, 44 insertions, 4 deletions
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c index 5079ff14c9d4..77ffd18cff2f 100644 --- a/drivers/spi/spi-pl022.c +++ b/drivers/spi/spi-pl022.c | |||
@@ -1678,17 +1678,57 @@ static int verify_controller_parameters(struct pl022 *pl022, | |||
1678 | "Communication mode is configured incorrectly\n"); | 1678 | "Communication mode is configured incorrectly\n"); |
1679 | return -EINVAL; | 1679 | return -EINVAL; |
1680 | } | 1680 | } |
1681 | if ((chip_info->rx_lev_trig < SSP_RX_1_OR_MORE_ELEM) | 1681 | switch (chip_info->rx_lev_trig) { |
1682 | || (chip_info->rx_lev_trig > SSP_RX_32_OR_MORE_ELEM)) { | 1682 | case SSP_RX_1_OR_MORE_ELEM: |
1683 | case SSP_RX_4_OR_MORE_ELEM: | ||
1684 | case SSP_RX_8_OR_MORE_ELEM: | ||
1685 | /* These are always OK, all variants can handle this */ | ||
1686 | break; | ||
1687 | case SSP_RX_16_OR_MORE_ELEM: | ||
1688 | if (pl022->vendor->fifodepth < 16) { | ||
1689 | dev_err(&pl022->adev->dev, | ||
1690 | "RX FIFO Trigger Level is configured incorrectly\n"); | ||
1691 | return -EINVAL; | ||
1692 | } | ||
1693 | break; | ||
1694 | case SSP_RX_32_OR_MORE_ELEM: | ||
1695 | if (pl022->vendor->fifodepth < 32) { | ||
1696 | dev_err(&pl022->adev->dev, | ||
1697 | "RX FIFO Trigger Level is configured incorrectly\n"); | ||
1698 | return -EINVAL; | ||
1699 | } | ||
1700 | break; | ||
1701 | default: | ||
1683 | dev_err(&pl022->adev->dev, | 1702 | dev_err(&pl022->adev->dev, |
1684 | "RX FIFO Trigger Level is configured incorrectly\n"); | 1703 | "RX FIFO Trigger Level is configured incorrectly\n"); |
1685 | return -EINVAL; | 1704 | return -EINVAL; |
1705 | break; | ||
1686 | } | 1706 | } |
1687 | if ((chip_info->tx_lev_trig < SSP_TX_1_OR_MORE_EMPTY_LOC) | 1707 | switch (chip_info->tx_lev_trig) { |
1688 | || (chip_info->tx_lev_trig > SSP_TX_32_OR_MORE_EMPTY_LOC)) { | 1708 | case SSP_TX_1_OR_MORE_EMPTY_LOC: |
1709 | case SSP_TX_4_OR_MORE_EMPTY_LOC: | ||
1710 | case SSP_TX_8_OR_MORE_EMPTY_LOC: | ||
1711 | /* These are always OK, all variants can handle this */ | ||
1712 | break; | ||
1713 | case SSP_TX_16_OR_MORE_EMPTY_LOC: | ||
1714 | if (pl022->vendor->fifodepth < 16) { | ||
1715 | dev_err(&pl022->adev->dev, | ||
1716 | "TX FIFO Trigger Level is configured incorrectly\n"); | ||
1717 | return -EINVAL; | ||
1718 | } | ||
1719 | break; | ||
1720 | case SSP_TX_32_OR_MORE_EMPTY_LOC: | ||
1721 | if (pl022->vendor->fifodepth < 32) { | ||
1722 | dev_err(&pl022->adev->dev, | ||
1723 | "TX FIFO Trigger Level is configured incorrectly\n"); | ||
1724 | return -EINVAL; | ||
1725 | } | ||
1726 | break; | ||
1727 | default: | ||
1689 | dev_err(&pl022->adev->dev, | 1728 | dev_err(&pl022->adev->dev, |
1690 | "TX FIFO Trigger Level is configured incorrectly\n"); | 1729 | "TX FIFO Trigger Level is configured incorrectly\n"); |
1691 | return -EINVAL; | 1730 | return -EINVAL; |
1731 | break; | ||
1692 | } | 1732 | } |
1693 | if (chip_info->iface == SSP_INTERFACE_NATIONAL_MICROWIRE) { | 1733 | if (chip_info->iface == SSP_INTERFACE_NATIONAL_MICROWIRE) { |
1694 | if ((chip_info->ctrl_len < SSP_BITS_4) | 1734 | if ((chip_info->ctrl_len < SSP_BITS_4) |