diff options
Diffstat (limited to 'drivers/spi/spi-atmel.c')
-rw-r--r-- | drivers/spi/spi-atmel.c | 778 |
1 files changed, 276 insertions, 502 deletions
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 273db0beb2b8..b0842f751016 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c | |||
@@ -189,6 +189,8 @@ | |||
189 | */ | 189 | */ |
190 | #define DMA_MIN_BYTES 16 | 190 | #define DMA_MIN_BYTES 16 |
191 | 191 | ||
192 | #define SPI_DMA_TIMEOUT (msecs_to_jiffies(1000)) | ||
193 | |||
192 | struct atmel_spi_dma { | 194 | struct atmel_spi_dma { |
193 | struct dma_chan *chan_rx; | 195 | struct dma_chan *chan_rx; |
194 | struct dma_chan *chan_tx; | 196 | struct dma_chan *chan_tx; |
@@ -220,17 +222,13 @@ struct atmel_spi { | |||
220 | int irq; | 222 | int irq; |
221 | struct clk *clk; | 223 | struct clk *clk; |
222 | struct platform_device *pdev; | 224 | struct platform_device *pdev; |
223 | struct spi_device *stay; | ||
224 | 225 | ||
225 | u8 stopping; | ||
226 | struct list_head queue; | ||
227 | struct tasklet_struct tasklet; | ||
228 | struct spi_transfer *current_transfer; | 226 | struct spi_transfer *current_transfer; |
229 | unsigned long current_remaining_bytes; | 227 | unsigned long current_remaining_bytes; |
230 | struct spi_transfer *next_transfer; | ||
231 | unsigned long next_remaining_bytes; | ||
232 | int done_status; | 228 | int done_status; |
233 | 229 | ||
230 | struct completion xfer_completion; | ||
231 | |||
234 | /* scratch buffer */ | 232 | /* scratch buffer */ |
235 | void *buffer; | 233 | void *buffer; |
236 | dma_addr_t buffer_dma; | 234 | dma_addr_t buffer_dma; |
@@ -241,6 +239,9 @@ struct atmel_spi { | |||
241 | bool use_pdc; | 239 | bool use_pdc; |
242 | /* dmaengine data */ | 240 | /* dmaengine data */ |
243 | struct atmel_spi_dma dma; | 241 | struct atmel_spi_dma dma; |
242 | |||
243 | bool keep_cs; | ||
244 | bool cs_active; | ||
244 | }; | 245 | }; |
245 | 246 | ||
246 | /* Controller-specific per-slave state */ | 247 | /* Controller-specific per-slave state */ |
@@ -376,17 +377,6 @@ static inline bool atmel_spi_use_dma(struct atmel_spi *as, | |||
376 | return as->use_dma && xfer->len >= DMA_MIN_BYTES; | 377 | return as->use_dma && xfer->len >= DMA_MIN_BYTES; |
377 | } | 378 | } |
378 | 379 | ||
379 | static inline int atmel_spi_xfer_is_last(struct spi_message *msg, | ||
380 | struct spi_transfer *xfer) | ||
381 | { | ||
382 | return msg->transfers.prev == &xfer->transfer_list; | ||
383 | } | ||
384 | |||
385 | static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer) | ||
386 | { | ||
387 | return xfer->delay_usecs == 0 && !xfer->cs_change; | ||
388 | } | ||
389 | |||
390 | static int atmel_spi_dma_slave_config(struct atmel_spi *as, | 380 | static int atmel_spi_dma_slave_config(struct atmel_spi *as, |
391 | struct dma_slave_config *slave_config, | 381 | struct dma_slave_config *slave_config, |
392 | u8 bits_per_word) | 382 | u8 bits_per_word) |
@@ -513,23 +503,20 @@ static void dma_callback(void *data) | |||
513 | struct spi_master *master = data; | 503 | struct spi_master *master = data; |
514 | struct atmel_spi *as = spi_master_get_devdata(master); | 504 | struct atmel_spi *as = spi_master_get_devdata(master); |
515 | 505 | ||
516 | /* trigger SPI tasklet */ | 506 | complete(&as->xfer_completion); |
517 | tasklet_schedule(&as->tasklet); | ||
518 | } | 507 | } |
519 | 508 | ||
520 | /* | 509 | /* |
521 | * Next transfer using PIO. | 510 | * Next transfer using PIO. |
522 | * lock is held, spi tasklet is blocked | ||
523 | */ | 511 | */ |
524 | static void atmel_spi_next_xfer_pio(struct spi_master *master, | 512 | static void atmel_spi_next_xfer_pio(struct spi_master *master, |
525 | struct spi_transfer *xfer) | 513 | struct spi_transfer *xfer) |
526 | { | 514 | { |
527 | struct atmel_spi *as = spi_master_get_devdata(master); | 515 | struct atmel_spi *as = spi_master_get_devdata(master); |
516 | unsigned long xfer_pos = xfer->len - as->current_remaining_bytes; | ||
528 | 517 | ||
529 | dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_pio\n"); | 518 | dev_vdbg(master->dev.parent, "atmel_spi_next_xfer_pio\n"); |
530 | 519 | ||
531 | as->current_remaining_bytes = xfer->len; | ||
532 | |||
533 | /* Make sure data is not remaining in RDR */ | 520 | /* Make sure data is not remaining in RDR */ |
534 | spi_readl(as, RDR); | 521 | spi_readl(as, RDR); |
535 | while (spi_readl(as, SR) & SPI_BIT(RDRF)) { | 522 | while (spi_readl(as, SR) & SPI_BIT(RDRF)) { |
@@ -537,13 +524,14 @@ static void atmel_spi_next_xfer_pio(struct spi_master *master, | |||
537 | cpu_relax(); | 524 | cpu_relax(); |
538 | } | 525 | } |
539 | 526 | ||
540 | if (xfer->tx_buf) | 527 | if (xfer->tx_buf) { |
541 | if (xfer->bits_per_word > 8) | 528 | if (xfer->bits_per_word > 8) |
542 | spi_writel(as, TDR, *(u16 *)(xfer->tx_buf)); | 529 | spi_writel(as, TDR, *(u16 *)(xfer->tx_buf + xfer_pos)); |
543 | else | 530 | else |
544 | spi_writel(as, TDR, *(u8 *)(xfer->tx_buf)); | 531 | spi_writel(as, TDR, *(u8 *)(xfer->tx_buf + xfer_pos)); |
545 | else | 532 | } else { |
546 | spi_writel(as, TDR, 0); | 533 | spi_writel(as, TDR, 0); |
534 | } | ||
547 | 535 | ||
548 | dev_dbg(master->dev.parent, | 536 | dev_dbg(master->dev.parent, |
549 | " start pio xfer %p: len %u tx %p rx %p bitpw %d\n", | 537 | " start pio xfer %p: len %u tx %p rx %p bitpw %d\n", |
@@ -556,7 +544,6 @@ static void atmel_spi_next_xfer_pio(struct spi_master *master, | |||
556 | 544 | ||
557 | /* | 545 | /* |
558 | * Submit next transfer for DMA. | 546 | * Submit next transfer for DMA. |
559 | * lock is held, spi tasklet is blocked | ||
560 | */ | 547 | */ |
561 | static int atmel_spi_next_xfer_dma_submit(struct spi_master *master, | 548 | static int atmel_spi_next_xfer_dma_submit(struct spi_master *master, |
562 | struct spi_transfer *xfer, | 549 | struct spi_transfer *xfer, |
@@ -694,74 +681,90 @@ static void atmel_spi_next_xfer_data(struct spi_master *master, | |||
694 | *plen = len; | 681 | *plen = len; |
695 | } | 682 | } |
696 | 683 | ||
684 | static int atmel_spi_set_xfer_speed(struct atmel_spi *as, | ||
685 | struct spi_device *spi, | ||
686 | struct spi_transfer *xfer) | ||
687 | { | ||
688 | u32 scbr, csr; | ||
689 | unsigned long bus_hz; | ||
690 | |||
691 | /* v1 chips start out at half the peripheral bus speed. */ | ||
692 | bus_hz = clk_get_rate(as->clk); | ||
693 | if (!atmel_spi_is_v2(as)) | ||
694 | bus_hz /= 2; | ||
695 | |||
696 | /* | ||
697 | * Calculate the lowest divider that satisfies the | ||
698 | * constraint, assuming div32/fdiv/mbz == 0. | ||
699 | */ | ||
700 | if (xfer->speed_hz) | ||
701 | scbr = DIV_ROUND_UP(bus_hz, xfer->speed_hz); | ||
702 | else | ||
703 | /* | ||
704 | * This can happend if max_speed is null. | ||
705 | * In this case, we set the lowest possible speed | ||
706 | */ | ||
707 | scbr = 0xff; | ||
708 | |||
709 | /* | ||
710 | * If the resulting divider doesn't fit into the | ||
711 | * register bitfield, we can't satisfy the constraint. | ||
712 | */ | ||
713 | if (scbr >= (1 << SPI_SCBR_SIZE)) { | ||
714 | dev_err(&spi->dev, | ||
715 | "setup: %d Hz too slow, scbr %u; min %ld Hz\n", | ||
716 | xfer->speed_hz, scbr, bus_hz/255); | ||
717 | return -EINVAL; | ||
718 | } | ||
719 | if (scbr == 0) { | ||
720 | dev_err(&spi->dev, | ||
721 | "setup: %d Hz too high, scbr %u; max %ld Hz\n", | ||
722 | xfer->speed_hz, scbr, bus_hz); | ||
723 | return -EINVAL; | ||
724 | } | ||
725 | csr = spi_readl(as, CSR0 + 4 * spi->chip_select); | ||
726 | csr = SPI_BFINS(SCBR, scbr, csr); | ||
727 | spi_writel(as, CSR0 + 4 * spi->chip_select, csr); | ||
728 | |||
729 | return 0; | ||
730 | } | ||
731 | |||
697 | /* | 732 | /* |
698 | * Submit next transfer for PDC. | 733 | * Submit next transfer for PDC. |
699 | * lock is held, spi irq is blocked | 734 | * lock is held, spi irq is blocked |
700 | */ | 735 | */ |
701 | static void atmel_spi_pdc_next_xfer(struct spi_master *master, | 736 | static void atmel_spi_pdc_next_xfer(struct spi_master *master, |
702 | struct spi_message *msg) | 737 | struct spi_message *msg, |
738 | struct spi_transfer *xfer) | ||
703 | { | 739 | { |
704 | struct atmel_spi *as = spi_master_get_devdata(master); | 740 | struct atmel_spi *as = spi_master_get_devdata(master); |
705 | struct spi_transfer *xfer; | 741 | u32 len; |
706 | u32 len, remaining; | ||
707 | u32 ieval; | ||
708 | dma_addr_t tx_dma, rx_dma; | 742 | dma_addr_t tx_dma, rx_dma; |
709 | 743 | ||
710 | if (!as->current_transfer) | 744 | spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS)); |
711 | xfer = list_entry(msg->transfers.next, | ||
712 | struct spi_transfer, transfer_list); | ||
713 | else if (!as->next_transfer) | ||
714 | xfer = list_entry(as->current_transfer->transfer_list.next, | ||
715 | struct spi_transfer, transfer_list); | ||
716 | else | ||
717 | xfer = NULL; | ||
718 | |||
719 | if (xfer) { | ||
720 | spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS)); | ||
721 | |||
722 | len = xfer->len; | ||
723 | atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); | ||
724 | remaining = xfer->len - len; | ||
725 | |||
726 | spi_writel(as, RPR, rx_dma); | ||
727 | spi_writel(as, TPR, tx_dma); | ||
728 | |||
729 | if (msg->spi->bits_per_word > 8) | ||
730 | len >>= 1; | ||
731 | spi_writel(as, RCR, len); | ||
732 | spi_writel(as, TCR, len); | ||
733 | |||
734 | dev_dbg(&msg->spi->dev, | ||
735 | " start xfer %p: len %u tx %p/%08llx rx %p/%08llx\n", | ||
736 | xfer, xfer->len, xfer->tx_buf, | ||
737 | (unsigned long long)xfer->tx_dma, xfer->rx_buf, | ||
738 | (unsigned long long)xfer->rx_dma); | ||
739 | } else { | ||
740 | xfer = as->next_transfer; | ||
741 | remaining = as->next_remaining_bytes; | ||
742 | } | ||
743 | 745 | ||
744 | as->current_transfer = xfer; | 746 | len = as->current_remaining_bytes; |
745 | as->current_remaining_bytes = remaining; | 747 | atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); |
748 | as->current_remaining_bytes -= len; | ||
746 | 749 | ||
747 | if (remaining > 0) | 750 | spi_writel(as, RPR, rx_dma); |
748 | len = remaining; | 751 | spi_writel(as, TPR, tx_dma); |
749 | else if (!atmel_spi_xfer_is_last(msg, xfer) | ||
750 | && atmel_spi_xfer_can_be_chained(xfer)) { | ||
751 | xfer = list_entry(xfer->transfer_list.next, | ||
752 | struct spi_transfer, transfer_list); | ||
753 | len = xfer->len; | ||
754 | } else | ||
755 | xfer = NULL; | ||
756 | 752 | ||
757 | as->next_transfer = xfer; | 753 | if (msg->spi->bits_per_word > 8) |
754 | len >>= 1; | ||
755 | spi_writel(as, RCR, len); | ||
756 | spi_writel(as, TCR, len); | ||
758 | 757 | ||
759 | if (xfer) { | 758 | dev_dbg(&msg->spi->dev, |
760 | u32 total; | 759 | " start xfer %p: len %u tx %p/%08llx rx %p/%08llx\n", |
760 | xfer, xfer->len, xfer->tx_buf, | ||
761 | (unsigned long long)xfer->tx_dma, xfer->rx_buf, | ||
762 | (unsigned long long)xfer->rx_dma); | ||
761 | 763 | ||
762 | total = len; | 764 | if (as->current_remaining_bytes) { |
765 | len = as->current_remaining_bytes; | ||
763 | atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); | 766 | atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); |
764 | as->next_remaining_bytes = total - len; | 767 | as->current_remaining_bytes -= len; |
765 | 768 | ||
766 | spi_writel(as, RNPR, rx_dma); | 769 | spi_writel(as, RNPR, rx_dma); |
767 | spi_writel(as, TNPR, tx_dma); | 770 | spi_writel(as, TNPR, tx_dma); |
@@ -776,11 +779,6 @@ static void atmel_spi_pdc_next_xfer(struct spi_master *master, | |||
776 | xfer, xfer->len, xfer->tx_buf, | 779 | xfer, xfer->len, xfer->tx_buf, |
777 | (unsigned long long)xfer->tx_dma, xfer->rx_buf, | 780 | (unsigned long long)xfer->tx_dma, xfer->rx_buf, |
778 | (unsigned long long)xfer->rx_dma); | 781 | (unsigned long long)xfer->rx_dma); |
779 | ieval = SPI_BIT(ENDRX) | SPI_BIT(OVRES); | ||
780 | } else { | ||
781 | spi_writel(as, RNCR, 0); | ||
782 | spi_writel(as, TNCR, 0); | ||
783 | ieval = SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) | SPI_BIT(OVRES); | ||
784 | } | 782 | } |
785 | 783 | ||
786 | /* REVISIT: We're waiting for ENDRX before we start the next | 784 | /* REVISIT: We're waiting for ENDRX before we start the next |
@@ -793,83 +791,11 @@ static void atmel_spi_pdc_next_xfer(struct spi_master *master, | |||
793 | * | 791 | * |
794 | * It should be doable, though. Just not now... | 792 | * It should be doable, though. Just not now... |
795 | */ | 793 | */ |
796 | spi_writel(as, IER, ieval); | 794 | spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES)); |
797 | spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); | 795 | spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); |
798 | } | 796 | } |
799 | 797 | ||
800 | /* | 798 | /* |
801 | * Choose way to submit next transfer and start it. | ||
802 | * lock is held, spi tasklet is blocked | ||
803 | */ | ||
804 | static void atmel_spi_dma_next_xfer(struct spi_master *master, | ||
805 | struct spi_message *msg) | ||
806 | { | ||
807 | struct atmel_spi *as = spi_master_get_devdata(master); | ||
808 | struct spi_transfer *xfer; | ||
809 | u32 remaining, len; | ||
810 | |||
811 | remaining = as->current_remaining_bytes; | ||
812 | if (remaining) { | ||
813 | xfer = as->current_transfer; | ||
814 | len = remaining; | ||
815 | } else { | ||
816 | if (!as->current_transfer) | ||
817 | xfer = list_entry(msg->transfers.next, | ||
818 | struct spi_transfer, transfer_list); | ||
819 | else | ||
820 | xfer = list_entry( | ||
821 | as->current_transfer->transfer_list.next, | ||
822 | struct spi_transfer, transfer_list); | ||
823 | |||
824 | as->current_transfer = xfer; | ||
825 | len = xfer->len; | ||
826 | } | ||
827 | |||
828 | if (atmel_spi_use_dma(as, xfer)) { | ||
829 | u32 total = len; | ||
830 | if (!atmel_spi_next_xfer_dma_submit(master, xfer, &len)) { | ||
831 | as->current_remaining_bytes = total - len; | ||
832 | return; | ||
833 | } else { | ||
834 | dev_err(&msg->spi->dev, "unable to use DMA, fallback to PIO\n"); | ||
835 | } | ||
836 | } | ||
837 | |||
838 | /* use PIO if error appened using DMA */ | ||
839 | atmel_spi_next_xfer_pio(master, xfer); | ||
840 | } | ||
841 | |||
842 | static void atmel_spi_next_message(struct spi_master *master) | ||
843 | { | ||
844 | struct atmel_spi *as = spi_master_get_devdata(master); | ||
845 | struct spi_message *msg; | ||
846 | struct spi_device *spi; | ||
847 | |||
848 | BUG_ON(as->current_transfer); | ||
849 | |||
850 | msg = list_entry(as->queue.next, struct spi_message, queue); | ||
851 | spi = msg->spi; | ||
852 | |||
853 | dev_dbg(master->dev.parent, "start message %p for %s\n", | ||
854 | msg, dev_name(&spi->dev)); | ||
855 | |||
856 | /* select chip if it's not still active */ | ||
857 | if (as->stay) { | ||
858 | if (as->stay != spi) { | ||
859 | cs_deactivate(as, as->stay); | ||
860 | cs_activate(as, spi); | ||
861 | } | ||
862 | as->stay = NULL; | ||
863 | } else | ||
864 | cs_activate(as, spi); | ||
865 | |||
866 | if (as->use_pdc) | ||
867 | atmel_spi_pdc_next_xfer(master, msg); | ||
868 | else | ||
869 | atmel_spi_dma_next_xfer(master, msg); | ||
870 | } | ||
871 | |||
872 | /* | ||
873 | * For DMA, tx_buf/tx_dma have the same relationship as rx_buf/rx_dma: | 799 | * For DMA, tx_buf/tx_dma have the same relationship as rx_buf/rx_dma: |
874 | * - The buffer is either valid for CPU access, else NULL | 800 | * - The buffer is either valid for CPU access, else NULL |
875 | * - If the buffer is valid, so is its DMA address | 801 | * - If the buffer is valid, so is its DMA address |
@@ -924,41 +850,7 @@ static void atmel_spi_disable_pdc_transfer(struct atmel_spi *as) | |||
924 | spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS)); | 850 | spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS)); |
925 | } | 851 | } |
926 | 852 | ||
927 | static void | ||
928 | atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as, | ||
929 | struct spi_message *msg, int stay) | ||
930 | { | ||
931 | if (!stay || as->done_status < 0) | ||
932 | cs_deactivate(as, msg->spi); | ||
933 | else | ||
934 | as->stay = msg->spi; | ||
935 | |||
936 | list_del(&msg->queue); | ||
937 | msg->status = as->done_status; | ||
938 | |||
939 | dev_dbg(master->dev.parent, | ||
940 | "xfer complete: %u bytes transferred\n", | ||
941 | msg->actual_length); | ||
942 | |||
943 | atmel_spi_unlock(as); | ||
944 | msg->complete(msg->context); | ||
945 | atmel_spi_lock(as); | ||
946 | |||
947 | as->current_transfer = NULL; | ||
948 | as->next_transfer = NULL; | ||
949 | as->done_status = 0; | ||
950 | |||
951 | /* continue if needed */ | ||
952 | if (list_empty(&as->queue) || as->stopping) { | ||
953 | if (as->use_pdc) | ||
954 | atmel_spi_disable_pdc_transfer(as); | ||
955 | } else { | ||
956 | atmel_spi_next_message(master); | ||
957 | } | ||
958 | } | ||
959 | |||
960 | /* Called from IRQ | 853 | /* Called from IRQ |
961 | * lock is held | ||
962 | * | 854 | * |
963 | * Must update "current_remaining_bytes" to keep track of data | 855 | * Must update "current_remaining_bytes" to keep track of data |
964 | * to transfer. | 856 | * to transfer. |
@@ -966,9 +858,7 @@ atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as, | |||
966 | static void | 858 | static void |
967 | atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer) | 859 | atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer) |
968 | { | 860 | { |
969 | u8 *txp; | ||
970 | u8 *rxp; | 861 | u8 *rxp; |
971 | u16 *txp16; | ||
972 | u16 *rxp16; | 862 | u16 *rxp16; |
973 | unsigned long xfer_pos = xfer->len - as->current_remaining_bytes; | 863 | unsigned long xfer_pos = xfer->len - as->current_remaining_bytes; |
974 | 864 | ||
@@ -990,96 +880,12 @@ atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer) | |||
990 | } else { | 880 | } else { |
991 | as->current_remaining_bytes--; | 881 | as->current_remaining_bytes--; |
992 | } | 882 | } |
993 | |||
994 | if (as->current_remaining_bytes) { | ||
995 | if (xfer->tx_buf) { | ||
996 | if (xfer->bits_per_word > 8) { | ||
997 | txp16 = (u16 *)(((u8 *)xfer->tx_buf) | ||
998 | + xfer_pos + 2); | ||
999 | spi_writel(as, TDR, *txp16); | ||
1000 | } else { | ||
1001 | txp = ((u8 *)xfer->tx_buf) + xfer_pos + 1; | ||
1002 | spi_writel(as, TDR, *txp); | ||
1003 | } | ||
1004 | } else { | ||
1005 | spi_writel(as, TDR, 0); | ||
1006 | } | ||
1007 | } | ||
1008 | } | ||
1009 | |||
1010 | /* Tasklet | ||
1011 | * Called from DMA callback + pio transfer and overrun IRQ. | ||
1012 | */ | ||
1013 | static void atmel_spi_tasklet_func(unsigned long data) | ||
1014 | { | ||
1015 | struct spi_master *master = (struct spi_master *)data; | ||
1016 | struct atmel_spi *as = spi_master_get_devdata(master); | ||
1017 | struct spi_message *msg; | ||
1018 | struct spi_transfer *xfer; | ||
1019 | |||
1020 | dev_vdbg(master->dev.parent, "atmel_spi_tasklet_func\n"); | ||
1021 | |||
1022 | atmel_spi_lock(as); | ||
1023 | |||
1024 | xfer = as->current_transfer; | ||
1025 | |||
1026 | if (xfer == NULL) | ||
1027 | /* already been there */ | ||
1028 | goto tasklet_out; | ||
1029 | |||
1030 | msg = list_entry(as->queue.next, struct spi_message, queue); | ||
1031 | |||
1032 | if (as->current_remaining_bytes == 0) { | ||
1033 | if (as->done_status < 0) { | ||
1034 | /* error happened (overrun) */ | ||
1035 | if (atmel_spi_use_dma(as, xfer)) | ||
1036 | atmel_spi_stop_dma(as); | ||
1037 | } else { | ||
1038 | /* only update length if no error */ | ||
1039 | msg->actual_length += xfer->len; | ||
1040 | } | ||
1041 | |||
1042 | if (atmel_spi_use_dma(as, xfer)) | ||
1043 | if (!msg->is_dma_mapped) | ||
1044 | atmel_spi_dma_unmap_xfer(master, xfer); | ||
1045 | |||
1046 | if (xfer->delay_usecs) | ||
1047 | udelay(xfer->delay_usecs); | ||
1048 | |||
1049 | if (atmel_spi_xfer_is_last(msg, xfer) || as->done_status < 0) { | ||
1050 | /* report completed (or erroneous) message */ | ||
1051 | atmel_spi_msg_done(master, as, msg, xfer->cs_change); | ||
1052 | } else { | ||
1053 | if (xfer->cs_change) { | ||
1054 | cs_deactivate(as, msg->spi); | ||
1055 | udelay(1); | ||
1056 | cs_activate(as, msg->spi); | ||
1057 | } | ||
1058 | |||
1059 | /* | ||
1060 | * Not done yet. Submit the next transfer. | ||
1061 | * | ||
1062 | * FIXME handle protocol options for xfer | ||
1063 | */ | ||
1064 | atmel_spi_dma_next_xfer(master, msg); | ||
1065 | } | ||
1066 | } else { | ||
1067 | /* | ||
1068 | * Keep going, we still have data to send in | ||
1069 | * the current transfer. | ||
1070 | */ | ||
1071 | atmel_spi_dma_next_xfer(master, msg); | ||
1072 | } | ||
1073 | |||
1074 | tasklet_out: | ||
1075 | atmel_spi_unlock(as); | ||
1076 | } | 883 | } |
1077 | 884 | ||
1078 | /* Interrupt | 885 | /* Interrupt |
1079 | * | 886 | * |
1080 | * No need for locking in this Interrupt handler: done_status is the | 887 | * No need for locking in this Interrupt handler: done_status is the |
1081 | * only information modified. What we need is the update of this field | 888 | * only information modified. |
1082 | * before tasklet runs. This is ensured by using barrier. | ||
1083 | */ | 889 | */ |
1084 | static irqreturn_t | 890 | static irqreturn_t |
1085 | atmel_spi_pio_interrupt(int irq, void *dev_id) | 891 | atmel_spi_pio_interrupt(int irq, void *dev_id) |
@@ -1107,8 +913,6 @@ atmel_spi_pio_interrupt(int irq, void *dev_id) | |||
1107 | * | 913 | * |
1108 | * We will also not process any remaning transfers in | 914 | * We will also not process any remaning transfers in |
1109 | * the message. | 915 | * the message. |
1110 | * | ||
1111 | * All actions are done in tasklet with done_status indication | ||
1112 | */ | 916 | */ |
1113 | as->done_status = -EIO; | 917 | as->done_status = -EIO; |
1114 | smp_wmb(); | 918 | smp_wmb(); |
@@ -1116,7 +920,7 @@ atmel_spi_pio_interrupt(int irq, void *dev_id) | |||
1116 | /* Clear any overrun happening while cleaning up */ | 920 | /* Clear any overrun happening while cleaning up */ |
1117 | spi_readl(as, SR); | 921 | spi_readl(as, SR); |
1118 | 922 | ||
1119 | tasklet_schedule(&as->tasklet); | 923 | complete(&as->xfer_completion); |
1120 | 924 | ||
1121 | } else if (pending & SPI_BIT(RDRF)) { | 925 | } else if (pending & SPI_BIT(RDRF)) { |
1122 | atmel_spi_lock(as); | 926 | atmel_spi_lock(as); |
@@ -1125,11 +929,10 @@ atmel_spi_pio_interrupt(int irq, void *dev_id) | |||
1125 | ret = IRQ_HANDLED; | 929 | ret = IRQ_HANDLED; |
1126 | xfer = as->current_transfer; | 930 | xfer = as->current_transfer; |
1127 | atmel_spi_pump_pio_data(as, xfer); | 931 | atmel_spi_pump_pio_data(as, xfer); |
1128 | if (!as->current_remaining_bytes) { | 932 | if (!as->current_remaining_bytes) |
1129 | /* no more data to xfer, kick tasklet */ | ||
1130 | spi_writel(as, IDR, pending); | 933 | spi_writel(as, IDR, pending); |
1131 | tasklet_schedule(&as->tasklet); | 934 | |
1132 | } | 935 | complete(&as->xfer_completion); |
1133 | } | 936 | } |
1134 | 937 | ||
1135 | atmel_spi_unlock(as); | 938 | atmel_spi_unlock(as); |
@@ -1147,116 +950,35 @@ atmel_spi_pdc_interrupt(int irq, void *dev_id) | |||
1147 | { | 950 | { |
1148 | struct spi_master *master = dev_id; | 951 | struct spi_master *master = dev_id; |
1149 | struct atmel_spi *as = spi_master_get_devdata(master); | 952 | struct atmel_spi *as = spi_master_get_devdata(master); |
1150 | struct spi_message *msg; | ||
1151 | struct spi_transfer *xfer; | ||
1152 | u32 status, pending, imr; | 953 | u32 status, pending, imr; |
1153 | int ret = IRQ_NONE; | 954 | int ret = IRQ_NONE; |
1154 | 955 | ||
1155 | atmel_spi_lock(as); | ||
1156 | |||
1157 | xfer = as->current_transfer; | ||
1158 | msg = list_entry(as->queue.next, struct spi_message, queue); | ||
1159 | |||
1160 | imr = spi_readl(as, IMR); | 956 | imr = spi_readl(as, IMR); |
1161 | status = spi_readl(as, SR); | 957 | status = spi_readl(as, SR); |
1162 | pending = status & imr; | 958 | pending = status & imr; |
1163 | 959 | ||
1164 | if (pending & SPI_BIT(OVRES)) { | 960 | if (pending & SPI_BIT(OVRES)) { |
1165 | int timeout; | ||
1166 | 961 | ||
1167 | ret = IRQ_HANDLED; | 962 | ret = IRQ_HANDLED; |
1168 | 963 | ||
1169 | spi_writel(as, IDR, (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) | 964 | spi_writel(as, IDR, (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX) |
1170 | | SPI_BIT(OVRES))); | 965 | | SPI_BIT(OVRES))); |
1171 | 966 | ||
1172 | /* | ||
1173 | * When we get an overrun, we disregard the current | ||
1174 | * transfer. Data will not be copied back from any | ||
1175 | * bounce buffer and msg->actual_len will not be | ||
1176 | * updated with the last xfer. | ||
1177 | * | ||
1178 | * We will also not process any remaning transfers in | ||
1179 | * the message. | ||
1180 | * | ||
1181 | * First, stop the transfer and unmap the DMA buffers. | ||
1182 | */ | ||
1183 | spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS)); | ||
1184 | if (!msg->is_dma_mapped) | ||
1185 | atmel_spi_dma_unmap_xfer(master, xfer); | ||
1186 | |||
1187 | /* REVISIT: udelay in irq is unfriendly */ | ||
1188 | if (xfer->delay_usecs) | ||
1189 | udelay(xfer->delay_usecs); | ||
1190 | |||
1191 | dev_warn(master->dev.parent, "overrun (%u/%u remaining)\n", | ||
1192 | spi_readl(as, TCR), spi_readl(as, RCR)); | ||
1193 | |||
1194 | /* | ||
1195 | * Clean up DMA registers and make sure the data | ||
1196 | * registers are empty. | ||
1197 | */ | ||
1198 | spi_writel(as, RNCR, 0); | ||
1199 | spi_writel(as, TNCR, 0); | ||
1200 | spi_writel(as, RCR, 0); | ||
1201 | spi_writel(as, TCR, 0); | ||
1202 | for (timeout = 1000; timeout; timeout--) | ||
1203 | if (spi_readl(as, SR) & SPI_BIT(TXEMPTY)) | ||
1204 | break; | ||
1205 | if (!timeout) | ||
1206 | dev_warn(master->dev.parent, | ||
1207 | "timeout waiting for TXEMPTY"); | ||
1208 | while (spi_readl(as, SR) & SPI_BIT(RDRF)) | ||
1209 | spi_readl(as, RDR); | ||
1210 | |||
1211 | /* Clear any overrun happening while cleaning up */ | 967 | /* Clear any overrun happening while cleaning up */ |
1212 | spi_readl(as, SR); | 968 | spi_readl(as, SR); |
1213 | 969 | ||
1214 | as->done_status = -EIO; | 970 | as->done_status = -EIO; |
1215 | atmel_spi_msg_done(master, as, msg, 0); | 971 | |
972 | complete(&as->xfer_completion); | ||
973 | |||
1216 | } else if (pending & (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX))) { | 974 | } else if (pending & (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX))) { |
1217 | ret = IRQ_HANDLED; | 975 | ret = IRQ_HANDLED; |
1218 | 976 | ||
1219 | spi_writel(as, IDR, pending); | 977 | spi_writel(as, IDR, pending); |
1220 | 978 | ||
1221 | if (as->current_remaining_bytes == 0) { | 979 | complete(&as->xfer_completion); |
1222 | msg->actual_length += xfer->len; | ||
1223 | |||
1224 | if (!msg->is_dma_mapped) | ||
1225 | atmel_spi_dma_unmap_xfer(master, xfer); | ||
1226 | |||
1227 | /* REVISIT: udelay in irq is unfriendly */ | ||
1228 | if (xfer->delay_usecs) | ||
1229 | udelay(xfer->delay_usecs); | ||
1230 | |||
1231 | if (atmel_spi_xfer_is_last(msg, xfer)) { | ||
1232 | /* report completed message */ | ||
1233 | atmel_spi_msg_done(master, as, msg, | ||
1234 | xfer->cs_change); | ||
1235 | } else { | ||
1236 | if (xfer->cs_change) { | ||
1237 | cs_deactivate(as, msg->spi); | ||
1238 | udelay(1); | ||
1239 | cs_activate(as, msg->spi); | ||
1240 | } | ||
1241 | |||
1242 | /* | ||
1243 | * Not done yet. Submit the next transfer. | ||
1244 | * | ||
1245 | * FIXME handle protocol options for xfer | ||
1246 | */ | ||
1247 | atmel_spi_pdc_next_xfer(master, msg); | ||
1248 | } | ||
1249 | } else { | ||
1250 | /* | ||
1251 | * Keep going, we still have data to send in | ||
1252 | * the current transfer. | ||
1253 | */ | ||
1254 | atmel_spi_pdc_next_xfer(master, msg); | ||
1255 | } | ||
1256 | } | 980 | } |
1257 | 981 | ||
1258 | atmel_spi_unlock(as); | ||
1259 | |||
1260 | return ret; | 982 | return ret; |
1261 | } | 983 | } |
1262 | 984 | ||
@@ -1264,17 +986,13 @@ static int atmel_spi_setup(struct spi_device *spi) | |||
1264 | { | 986 | { |
1265 | struct atmel_spi *as; | 987 | struct atmel_spi *as; |
1266 | struct atmel_spi_device *asd; | 988 | struct atmel_spi_device *asd; |
1267 | u32 scbr, csr; | 989 | u32 csr; |
1268 | unsigned int bits = spi->bits_per_word; | 990 | unsigned int bits = spi->bits_per_word; |
1269 | unsigned long bus_hz; | ||
1270 | unsigned int npcs_pin; | 991 | unsigned int npcs_pin; |
1271 | int ret; | 992 | int ret; |
1272 | 993 | ||
1273 | as = spi_master_get_devdata(spi->master); | 994 | as = spi_master_get_devdata(spi->master); |
1274 | 995 | ||
1275 | if (as->stopping) | ||
1276 | return -ESHUTDOWN; | ||
1277 | |||
1278 | if (spi->chip_select > spi->master->num_chipselect) { | 996 | if (spi->chip_select > spi->master->num_chipselect) { |
1279 | dev_dbg(&spi->dev, | 997 | dev_dbg(&spi->dev, |
1280 | "setup: invalid chipselect %u (%u defined)\n", | 998 | "setup: invalid chipselect %u (%u defined)\n", |
@@ -1290,33 +1008,7 @@ static int atmel_spi_setup(struct spi_device *spi) | |||
1290 | return -EINVAL; | 1008 | return -EINVAL; |
1291 | } | 1009 | } |
1292 | 1010 | ||
1293 | /* v1 chips start out at half the peripheral bus speed. */ | 1011 | csr = SPI_BF(BITS, bits - 8); |
1294 | bus_hz = clk_get_rate(as->clk); | ||
1295 | if (!atmel_spi_is_v2(as)) | ||
1296 | bus_hz /= 2; | ||
1297 | |||
1298 | if (spi->max_speed_hz) { | ||
1299 | /* | ||
1300 | * Calculate the lowest divider that satisfies the | ||
1301 | * constraint, assuming div32/fdiv/mbz == 0. | ||
1302 | */ | ||
1303 | scbr = DIV_ROUND_UP(bus_hz, spi->max_speed_hz); | ||
1304 | |||
1305 | /* | ||
1306 | * If the resulting divider doesn't fit into the | ||
1307 | * register bitfield, we can't satisfy the constraint. | ||
1308 | */ | ||
1309 | if (scbr >= (1 << SPI_SCBR_SIZE)) { | ||
1310 | dev_dbg(&spi->dev, | ||
1311 | "setup: %d Hz too slow, scbr %u; min %ld Hz\n", | ||
1312 | spi->max_speed_hz, scbr, bus_hz/255); | ||
1313 | return -EINVAL; | ||
1314 | } | ||
1315 | } else | ||
1316 | /* speed zero means "as slow as possible" */ | ||
1317 | scbr = 0xff; | ||
1318 | |||
1319 | csr = SPI_BF(SCBR, scbr) | SPI_BF(BITS, bits - 8); | ||
1320 | if (spi->mode & SPI_CPOL) | 1012 | if (spi->mode & SPI_CPOL) |
1321 | csr |= SPI_BIT(CPOL); | 1013 | csr |= SPI_BIT(CPOL); |
1322 | if (!(spi->mode & SPI_CPHA)) | 1014 | if (!(spi->mode & SPI_CPHA)) |
@@ -1352,19 +1044,13 @@ static int atmel_spi_setup(struct spi_device *spi) | |||
1352 | asd->npcs_pin = npcs_pin; | 1044 | asd->npcs_pin = npcs_pin; |
1353 | spi->controller_state = asd; | 1045 | spi->controller_state = asd; |
1354 | gpio_direction_output(npcs_pin, !(spi->mode & SPI_CS_HIGH)); | 1046 | gpio_direction_output(npcs_pin, !(spi->mode & SPI_CS_HIGH)); |
1355 | } else { | ||
1356 | atmel_spi_lock(as); | ||
1357 | if (as->stay == spi) | ||
1358 | as->stay = NULL; | ||
1359 | cs_deactivate(as, spi); | ||
1360 | atmel_spi_unlock(as); | ||
1361 | } | 1047 | } |
1362 | 1048 | ||
1363 | asd->csr = csr; | 1049 | asd->csr = csr; |
1364 | 1050 | ||
1365 | dev_dbg(&spi->dev, | 1051 | dev_dbg(&spi->dev, |
1366 | "setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n", | 1052 | "setup: bpw %u mode 0x%x -> csr%d %08x\n", |
1367 | bus_hz / scbr, bits, spi->mode, spi->chip_select, csr); | 1053 | bits, spi->mode, spi->chip_select, csr); |
1368 | 1054 | ||
1369 | if (!atmel_spi_is_v2(as)) | 1055 | if (!atmel_spi_is_v2(as)) |
1370 | spi_writel(as, CSR0 + 4 * spi->chip_select, csr); | 1056 | spi_writel(as, CSR0 + 4 * spi->chip_select, csr); |
@@ -1372,103 +1058,218 @@ static int atmel_spi_setup(struct spi_device *spi) | |||
1372 | return 0; | 1058 | return 0; |
1373 | } | 1059 | } |
1374 | 1060 | ||
1375 | static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg) | 1061 | static int atmel_spi_one_transfer(struct spi_master *master, |
1062 | struct spi_message *msg, | ||
1063 | struct spi_transfer *xfer) | ||
1376 | { | 1064 | { |
1377 | struct atmel_spi *as; | 1065 | struct atmel_spi *as; |
1378 | struct spi_transfer *xfer; | 1066 | struct spi_device *spi = msg->spi; |
1379 | struct device *controller = spi->master->dev.parent; | ||
1380 | u8 bits; | 1067 | u8 bits; |
1068 | u32 len; | ||
1381 | struct atmel_spi_device *asd; | 1069 | struct atmel_spi_device *asd; |
1070 | int timeout; | ||
1071 | int ret; | ||
1382 | 1072 | ||
1383 | as = spi_master_get_devdata(spi->master); | 1073 | as = spi_master_get_devdata(master); |
1384 | |||
1385 | dev_dbg(controller, "new message %p submitted for %s\n", | ||
1386 | msg, dev_name(&spi->dev)); | ||
1387 | 1074 | ||
1388 | if (unlikely(list_empty(&msg->transfers))) | 1075 | if (!(xfer->tx_buf || xfer->rx_buf) && xfer->len) { |
1076 | dev_dbg(&spi->dev, "missing rx or tx buf\n"); | ||
1389 | return -EINVAL; | 1077 | return -EINVAL; |
1078 | } | ||
1390 | 1079 | ||
1391 | if (as->stopping) | 1080 | if (xfer->bits_per_word) { |
1392 | return -ESHUTDOWN; | 1081 | asd = spi->controller_state; |
1082 | bits = (asd->csr >> 4) & 0xf; | ||
1083 | if (bits != xfer->bits_per_word - 8) { | ||
1084 | dev_dbg(&spi->dev, | ||
1085 | "you can't yet change bits_per_word in transfers\n"); | ||
1086 | return -ENOPROTOOPT; | ||
1087 | } | ||
1088 | } | ||
1393 | 1089 | ||
1394 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | 1090 | if (xfer->bits_per_word > 8) { |
1395 | if (!(xfer->tx_buf || xfer->rx_buf) && xfer->len) { | 1091 | if (xfer->len % 2) { |
1396 | dev_dbg(&spi->dev, "missing rx or tx buf\n"); | 1092 | dev_dbg(&spi->dev, |
1093 | "buffer len should be 16 bits aligned\n"); | ||
1397 | return -EINVAL; | 1094 | return -EINVAL; |
1398 | } | 1095 | } |
1096 | } | ||
1399 | 1097 | ||
1400 | if (xfer->bits_per_word) { | 1098 | /* |
1401 | asd = spi->controller_state; | 1099 | * DMA map early, for performance (empties dcache ASAP) and |
1402 | bits = (asd->csr >> 4) & 0xf; | 1100 | * better fault reporting. |
1403 | if (bits != xfer->bits_per_word - 8) { | 1101 | */ |
1404 | dev_dbg(&spi->dev, | 1102 | if ((!msg->is_dma_mapped) |
1405 | "you can't yet change bits_per_word in transfers\n"); | 1103 | && (atmel_spi_use_dma(as, xfer) || as->use_pdc)) { |
1406 | return -ENOPROTOOPT; | 1104 | if (atmel_spi_dma_map_xfer(as, xfer) < 0) |
1105 | return -ENOMEM; | ||
1106 | } | ||
1107 | |||
1108 | atmel_spi_set_xfer_speed(as, msg->spi, xfer); | ||
1109 | |||
1110 | as->done_status = 0; | ||
1111 | as->current_transfer = xfer; | ||
1112 | as->current_remaining_bytes = xfer->len; | ||
1113 | while (as->current_remaining_bytes) { | ||
1114 | reinit_completion(&as->xfer_completion); | ||
1115 | |||
1116 | if (as->use_pdc) { | ||
1117 | atmel_spi_pdc_next_xfer(master, msg, xfer); | ||
1118 | } else if (atmel_spi_use_dma(as, xfer)) { | ||
1119 | len = as->current_remaining_bytes; | ||
1120 | ret = atmel_spi_next_xfer_dma_submit(master, | ||
1121 | xfer, &len); | ||
1122 | if (ret) { | ||
1123 | dev_err(&spi->dev, | ||
1124 | "unable to use DMA, fallback to PIO\n"); | ||
1125 | atmel_spi_next_xfer_pio(master, xfer); | ||
1126 | } else { | ||
1127 | as->current_remaining_bytes -= len; | ||
1407 | } | 1128 | } |
1129 | } else { | ||
1130 | atmel_spi_next_xfer_pio(master, xfer); | ||
1408 | } | 1131 | } |
1409 | 1132 | ||
1410 | if (xfer->bits_per_word > 8) { | 1133 | ret = wait_for_completion_timeout(&as->xfer_completion, |
1411 | if (xfer->len % 2) { | 1134 | SPI_DMA_TIMEOUT); |
1412 | dev_dbg(&spi->dev, "buffer len should be 16 bits aligned\n"); | 1135 | if (WARN_ON(ret == 0)) { |
1413 | return -EINVAL; | 1136 | dev_err(&spi->dev, |
1414 | } | 1137 | "spi trasfer timeout, err %d\n", ret); |
1138 | as->done_status = -EIO; | ||
1139 | } else { | ||
1140 | ret = 0; | ||
1415 | } | 1141 | } |
1416 | 1142 | ||
1417 | /* FIXME implement these protocol options!! */ | 1143 | if (as->done_status) |
1418 | if (xfer->speed_hz < spi->max_speed_hz) { | 1144 | break; |
1419 | dev_dbg(&spi->dev, "can't change speed in transfer\n"); | 1145 | } |
1420 | return -ENOPROTOOPT; | 1146 | |
1147 | if (as->done_status) { | ||
1148 | if (as->use_pdc) { | ||
1149 | dev_warn(master->dev.parent, | ||
1150 | "overrun (%u/%u remaining)\n", | ||
1151 | spi_readl(as, TCR), spi_readl(as, RCR)); | ||
1152 | |||
1153 | /* | ||
1154 | * Clean up DMA registers and make sure the data | ||
1155 | * registers are empty. | ||
1156 | */ | ||
1157 | spi_writel(as, RNCR, 0); | ||
1158 | spi_writel(as, TNCR, 0); | ||
1159 | spi_writel(as, RCR, 0); | ||
1160 | spi_writel(as, TCR, 0); | ||
1161 | for (timeout = 1000; timeout; timeout--) | ||
1162 | if (spi_readl(as, SR) & SPI_BIT(TXEMPTY)) | ||
1163 | break; | ||
1164 | if (!timeout) | ||
1165 | dev_warn(master->dev.parent, | ||
1166 | "timeout waiting for TXEMPTY"); | ||
1167 | while (spi_readl(as, SR) & SPI_BIT(RDRF)) | ||
1168 | spi_readl(as, RDR); | ||
1169 | |||
1170 | /* Clear any overrun happening while cleaning up */ | ||
1171 | spi_readl(as, SR); | ||
1172 | |||
1173 | } else if (atmel_spi_use_dma(as, xfer)) { | ||
1174 | atmel_spi_stop_dma(as); | ||
1421 | } | 1175 | } |
1422 | 1176 | ||
1423 | /* | 1177 | if (!msg->is_dma_mapped |
1424 | * DMA map early, for performance (empties dcache ASAP) and | 1178 | && (atmel_spi_use_dma(as, xfer) || as->use_pdc)) |
1425 | * better fault reporting. | 1179 | atmel_spi_dma_unmap_xfer(master, xfer); |
1426 | */ | 1180 | |
1427 | if ((!msg->is_dma_mapped) && (atmel_spi_use_dma(as, xfer) | 1181 | return 0; |
1428 | || as->use_pdc)) { | 1182 | |
1429 | if (atmel_spi_dma_map_xfer(as, xfer) < 0) | 1183 | } else { |
1430 | return -ENOMEM; | 1184 | /* only update length if no error */ |
1185 | msg->actual_length += xfer->len; | ||
1186 | } | ||
1187 | |||
1188 | if (!msg->is_dma_mapped | ||
1189 | && (atmel_spi_use_dma(as, xfer) || as->use_pdc)) | ||
1190 | atmel_spi_dma_unmap_xfer(master, xfer); | ||
1191 | |||
1192 | if (xfer->delay_usecs) | ||
1193 | udelay(xfer->delay_usecs); | ||
1194 | |||
1195 | if (xfer->cs_change) { | ||
1196 | if (list_is_last(&xfer->transfer_list, | ||
1197 | &msg->transfers)) { | ||
1198 | as->keep_cs = true; | ||
1199 | } else { | ||
1200 | as->cs_active = !as->cs_active; | ||
1201 | if (as->cs_active) | ||
1202 | cs_activate(as, msg->spi); | ||
1203 | else | ||
1204 | cs_deactivate(as, msg->spi); | ||
1431 | } | 1205 | } |
1432 | } | 1206 | } |
1433 | 1207 | ||
1434 | #ifdef VERBOSE | 1208 | return 0; |
1209 | } | ||
1210 | |||
1211 | static int atmel_spi_transfer_one_message(struct spi_master *master, | ||
1212 | struct spi_message *msg) | ||
1213 | { | ||
1214 | struct atmel_spi *as; | ||
1215 | struct spi_transfer *xfer; | ||
1216 | struct spi_device *spi = msg->spi; | ||
1217 | int ret = 0; | ||
1218 | |||
1219 | as = spi_master_get_devdata(master); | ||
1220 | |||
1221 | dev_dbg(&spi->dev, "new message %p submitted for %s\n", | ||
1222 | msg, dev_name(&spi->dev)); | ||
1223 | |||
1224 | if (unlikely(list_empty(&msg->transfers))) | ||
1225 | return -EINVAL; | ||
1226 | |||
1227 | atmel_spi_lock(as); | ||
1228 | cs_activate(as, spi); | ||
1229 | |||
1230 | as->cs_active = true; | ||
1231 | as->keep_cs = false; | ||
1232 | |||
1233 | msg->status = 0; | ||
1234 | msg->actual_length = 0; | ||
1235 | |||
1435 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | 1236 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { |
1436 | dev_dbg(controller, | 1237 | ret = atmel_spi_one_transfer(master, msg, xfer); |
1238 | if (ret) | ||
1239 | goto msg_done; | ||
1240 | } | ||
1241 | |||
1242 | if (as->use_pdc) | ||
1243 | atmel_spi_disable_pdc_transfer(as); | ||
1244 | |||
1245 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
1246 | dev_dbg(&spi->dev, | ||
1437 | " xfer %p: len %u tx %p/%08x rx %p/%08x\n", | 1247 | " xfer %p: len %u tx %p/%08x rx %p/%08x\n", |
1438 | xfer, xfer->len, | 1248 | xfer, xfer->len, |
1439 | xfer->tx_buf, xfer->tx_dma, | 1249 | xfer->tx_buf, xfer->tx_dma, |
1440 | xfer->rx_buf, xfer->rx_dma); | 1250 | xfer->rx_buf, xfer->rx_dma); |
1441 | } | 1251 | } |
1442 | #endif | ||
1443 | 1252 | ||
1444 | msg->status = -EINPROGRESS; | 1253 | msg_done: |
1445 | msg->actual_length = 0; | 1254 | if (!as->keep_cs) |
1255 | cs_deactivate(as, msg->spi); | ||
1446 | 1256 | ||
1447 | atmel_spi_lock(as); | ||
1448 | list_add_tail(&msg->queue, &as->queue); | ||
1449 | if (!as->current_transfer) | ||
1450 | atmel_spi_next_message(spi->master); | ||
1451 | atmel_spi_unlock(as); | 1257 | atmel_spi_unlock(as); |
1452 | 1258 | ||
1453 | return 0; | 1259 | msg->status = as->done_status; |
1260 | spi_finalize_current_message(spi->master); | ||
1261 | |||
1262 | return ret; | ||
1454 | } | 1263 | } |
1455 | 1264 | ||
1456 | static void atmel_spi_cleanup(struct spi_device *spi) | 1265 | static void atmel_spi_cleanup(struct spi_device *spi) |
1457 | { | 1266 | { |
1458 | struct atmel_spi *as = spi_master_get_devdata(spi->master); | ||
1459 | struct atmel_spi_device *asd = spi->controller_state; | 1267 | struct atmel_spi_device *asd = spi->controller_state; |
1460 | unsigned gpio = (unsigned) spi->controller_data; | 1268 | unsigned gpio = (unsigned) spi->controller_data; |
1461 | 1269 | ||
1462 | if (!asd) | 1270 | if (!asd) |
1463 | return; | 1271 | return; |
1464 | 1272 | ||
1465 | atmel_spi_lock(as); | ||
1466 | if (as->stay == spi) { | ||
1467 | as->stay = NULL; | ||
1468 | cs_deactivate(as, spi); | ||
1469 | } | ||
1470 | atmel_spi_unlock(as); | ||
1471 | |||
1472 | spi->controller_state = NULL; | 1273 | spi->controller_state = NULL; |
1473 | gpio_free(gpio); | 1274 | gpio_free(gpio); |
1474 | kfree(asd); | 1275 | kfree(asd); |
@@ -1510,7 +1311,7 @@ static int atmel_spi_probe(struct platform_device *pdev) | |||
1510 | if (irq < 0) | 1311 | if (irq < 0) |
1511 | return irq; | 1312 | return irq; |
1512 | 1313 | ||
1513 | clk = clk_get(&pdev->dev, "spi_clk"); | 1314 | clk = devm_clk_get(&pdev->dev, "spi_clk"); |
1514 | if (IS_ERR(clk)) | 1315 | if (IS_ERR(clk)) |
1515 | return PTR_ERR(clk); | 1316 | return PTR_ERR(clk); |
1516 | 1317 | ||
@@ -1527,7 +1328,7 @@ static int atmel_spi_probe(struct platform_device *pdev) | |||
1527 | master->bus_num = pdev->id; | 1328 | master->bus_num = pdev->id; |
1528 | master->num_chipselect = master->dev.of_node ? 0 : 4; | 1329 | master->num_chipselect = master->dev.of_node ? 0 : 4; |
1529 | master->setup = atmel_spi_setup; | 1330 | master->setup = atmel_spi_setup; |
1530 | master->transfer = atmel_spi_transfer; | 1331 | master->transfer_one_message = atmel_spi_transfer_one_message; |
1531 | master->cleanup = atmel_spi_cleanup; | 1332 | master->cleanup = atmel_spi_cleanup; |
1532 | platform_set_drvdata(pdev, master); | 1333 | platform_set_drvdata(pdev, master); |
1533 | 1334 | ||
@@ -1543,7 +1344,6 @@ static int atmel_spi_probe(struct platform_device *pdev) | |||
1543 | goto out_free; | 1344 | goto out_free; |
1544 | 1345 | ||
1545 | spin_lock_init(&as->lock); | 1346 | spin_lock_init(&as->lock); |
1546 | INIT_LIST_HEAD(&as->queue); | ||
1547 | 1347 | ||
1548 | as->pdev = pdev; | 1348 | as->pdev = pdev; |
1549 | as->regs = devm_ioremap_resource(&pdev->dev, regs); | 1349 | as->regs = devm_ioremap_resource(&pdev->dev, regs); |
@@ -1555,6 +1355,8 @@ static int atmel_spi_probe(struct platform_device *pdev) | |||
1555 | as->irq = irq; | 1355 | as->irq = irq; |
1556 | as->clk = clk; | 1356 | as->clk = clk; |
1557 | 1357 | ||
1358 | init_completion(&as->xfer_completion); | ||
1359 | |||
1558 | atmel_get_caps(as); | 1360 | atmel_get_caps(as); |
1559 | 1361 | ||
1560 | as->use_dma = false; | 1362 | as->use_dma = false; |
@@ -1570,14 +1372,11 @@ static int atmel_spi_probe(struct platform_device *pdev) | |||
1570 | dev_info(&pdev->dev, "Atmel SPI Controller using PIO only\n"); | 1372 | dev_info(&pdev->dev, "Atmel SPI Controller using PIO only\n"); |
1571 | 1373 | ||
1572 | if (as->use_pdc) { | 1374 | if (as->use_pdc) { |
1573 | ret = request_irq(irq, atmel_spi_pdc_interrupt, 0, | 1375 | ret = devm_request_irq(&pdev->dev, irq, atmel_spi_pdc_interrupt, |
1574 | dev_name(&pdev->dev), master); | 1376 | 0, dev_name(&pdev->dev), master); |
1575 | } else { | 1377 | } else { |
1576 | tasklet_init(&as->tasklet, atmel_spi_tasklet_func, | 1378 | ret = devm_request_irq(&pdev->dev, irq, atmel_spi_pio_interrupt, |
1577 | (unsigned long)master); | 1379 | 0, dev_name(&pdev->dev), master); |
1578 | |||
1579 | ret = request_irq(irq, atmel_spi_pio_interrupt, 0, | ||
1580 | dev_name(&pdev->dev), master); | ||
1581 | } | 1380 | } |
1582 | if (ret) | 1381 | if (ret) |
1583 | goto out_unmap_regs; | 1382 | goto out_unmap_regs; |
@@ -1603,7 +1402,7 @@ static int atmel_spi_probe(struct platform_device *pdev) | |||
1603 | dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n", | 1402 | dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n", |
1604 | (unsigned long)regs->start, irq); | 1403 | (unsigned long)regs->start, irq); |
1605 | 1404 | ||
1606 | ret = spi_register_master(master); | 1405 | ret = devm_spi_register_master(&pdev->dev, master); |
1607 | if (ret) | 1406 | if (ret) |
1608 | goto out_free_dma; | 1407 | goto out_free_dma; |
1609 | 1408 | ||
@@ -1617,15 +1416,11 @@ out_free_dma: | |||
1617 | spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ | 1416 | spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ |
1618 | clk_disable_unprepare(clk); | 1417 | clk_disable_unprepare(clk); |
1619 | out_free_irq: | 1418 | out_free_irq: |
1620 | free_irq(irq, master); | ||
1621 | out_unmap_regs: | 1419 | out_unmap_regs: |
1622 | out_free_buffer: | 1420 | out_free_buffer: |
1623 | if (!as->use_pdc) | ||
1624 | tasklet_kill(&as->tasklet); | ||
1625 | dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer, | 1421 | dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer, |
1626 | as->buffer_dma); | 1422 | as->buffer_dma); |
1627 | out_free: | 1423 | out_free: |
1628 | clk_put(clk); | ||
1629 | spi_master_put(master); | 1424 | spi_master_put(master); |
1630 | return ret; | 1425 | return ret; |
1631 | } | 1426 | } |
@@ -1634,12 +1429,9 @@ static int atmel_spi_remove(struct platform_device *pdev) | |||
1634 | { | 1429 | { |
1635 | struct spi_master *master = platform_get_drvdata(pdev); | 1430 | struct spi_master *master = platform_get_drvdata(pdev); |
1636 | struct atmel_spi *as = spi_master_get_devdata(master); | 1431 | struct atmel_spi *as = spi_master_get_devdata(master); |
1637 | struct spi_message *msg; | ||
1638 | struct spi_transfer *xfer; | ||
1639 | 1432 | ||
1640 | /* reset the hardware and block queue progress */ | 1433 | /* reset the hardware and block queue progress */ |
1641 | spin_lock_irq(&as->lock); | 1434 | spin_lock_irq(&as->lock); |
1642 | as->stopping = 1; | ||
1643 | if (as->use_dma) { | 1435 | if (as->use_dma) { |
1644 | atmel_spi_stop_dma(as); | 1436 | atmel_spi_stop_dma(as); |
1645 | atmel_spi_release_dma(as); | 1437 | atmel_spi_release_dma(as); |
@@ -1650,28 +1442,10 @@ static int atmel_spi_remove(struct platform_device *pdev) | |||
1650 | spi_readl(as, SR); | 1442 | spi_readl(as, SR); |
1651 | spin_unlock_irq(&as->lock); | 1443 | spin_unlock_irq(&as->lock); |
1652 | 1444 | ||
1653 | /* Terminate remaining queued transfers */ | ||
1654 | list_for_each_entry(msg, &as->queue, queue) { | ||
1655 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
1656 | if (!msg->is_dma_mapped | ||
1657 | && (atmel_spi_use_dma(as, xfer) | ||
1658 | || as->use_pdc)) | ||
1659 | atmel_spi_dma_unmap_xfer(master, xfer); | ||
1660 | } | ||
1661 | msg->status = -ESHUTDOWN; | ||
1662 | msg->complete(msg->context); | ||
1663 | } | ||
1664 | |||
1665 | if (!as->use_pdc) | ||
1666 | tasklet_kill(&as->tasklet); | ||
1667 | dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer, | 1445 | dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer, |
1668 | as->buffer_dma); | 1446 | as->buffer_dma); |
1669 | 1447 | ||
1670 | clk_disable_unprepare(as->clk); | 1448 | clk_disable_unprepare(as->clk); |
1671 | clk_put(as->clk); | ||
1672 | free_irq(as->irq, master); | ||
1673 | |||
1674 | spi_unregister_master(master); | ||
1675 | 1449 | ||
1676 | return 0; | 1450 | return 0; |
1677 | } | 1451 | } |