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path: root/drivers/spi/pxa2xx_spi.c
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Diffstat (limited to 'drivers/spi/pxa2xx_spi.c')
-rw-r--r--drivers/spi/pxa2xx_spi.c98
1 files changed, 80 insertions, 18 deletions
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index 33fcef3150d4..c1688c71f052 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -28,6 +28,7 @@
28#include <linux/workqueue.h> 28#include <linux/workqueue.h>
29#include <linux/delay.h> 29#include <linux/delay.h>
30#include <linux/clk.h> 30#include <linux/clk.h>
31#include <linux/gpio.h>
31 32
32#include <asm/io.h> 33#include <asm/io.h>
33#include <asm/irq.h> 34#include <asm/irq.h>
@@ -53,6 +54,7 @@ MODULE_ALIAS("platform:pxa2xx-spi");
53#define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK) 54#define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK)
54#define IS_DMA_ALIGNED(x) ((((u32)(x)) & 0x07) == 0) 55#define IS_DMA_ALIGNED(x) ((((u32)(x)) & 0x07) == 0)
55#define MAX_DMA_LEN 8191 56#define MAX_DMA_LEN 8191
57#define DMA_ALIGNMENT 8
56 58
57/* 59/*
58 * for testing SSCR1 changes that require SSP restart, basically 60 * for testing SSCR1 changes that require SSP restart, basically
@@ -166,6 +168,8 @@ struct chip_data {
166 u8 enable_dma; 168 u8 enable_dma;
167 u8 bits_per_word; 169 u8 bits_per_word;
168 u32 speed_hz; 170 u32 speed_hz;
171 int gpio_cs;
172 int gpio_cs_inverted;
169 int (*write)(struct driver_data *drv_data); 173 int (*write)(struct driver_data *drv_data);
170 int (*read)(struct driver_data *drv_data); 174 int (*read)(struct driver_data *drv_data);
171 void (*cs_control)(u32 command); 175 void (*cs_control)(u32 command);
@@ -173,6 +177,32 @@ struct chip_data {
173 177
174static void pump_messages(struct work_struct *work); 178static void pump_messages(struct work_struct *work);
175 179
180static void cs_assert(struct driver_data *drv_data)
181{
182 struct chip_data *chip = drv_data->cur_chip;
183
184 if (chip->cs_control) {
185 chip->cs_control(PXA2XX_CS_ASSERT);
186 return;
187 }
188
189 if (gpio_is_valid(chip->gpio_cs))
190 gpio_set_value(chip->gpio_cs, chip->gpio_cs_inverted);
191}
192
193static void cs_deassert(struct driver_data *drv_data)
194{
195 struct chip_data *chip = drv_data->cur_chip;
196
197 if (chip->cs_control) {
198 chip->cs_control(PXA2XX_CS_ASSERT);
199 return;
200 }
201
202 if (gpio_is_valid(chip->gpio_cs))
203 gpio_set_value(chip->gpio_cs, !chip->gpio_cs_inverted);
204}
205
176static int flush(struct driver_data *drv_data) 206static int flush(struct driver_data *drv_data)
177{ 207{
178 unsigned long limit = loops_per_jiffy << 1; 208 unsigned long limit = loops_per_jiffy << 1;
@@ -189,10 +219,6 @@ static int flush(struct driver_data *drv_data)
189 return limit; 219 return limit;
190} 220}
191 221
192static void null_cs_control(u32 command)
193{
194}
195
196static int null_writer(struct driver_data *drv_data) 222static int null_writer(struct driver_data *drv_data)
197{ 223{
198 void __iomem *reg = drv_data->ioaddr; 224 void __iomem *reg = drv_data->ioaddr;
@@ -400,7 +426,6 @@ static void giveback(struct driver_data *drv_data)
400 msg = drv_data->cur_msg; 426 msg = drv_data->cur_msg;
401 drv_data->cur_msg = NULL; 427 drv_data->cur_msg = NULL;
402 drv_data->cur_transfer = NULL; 428 drv_data->cur_transfer = NULL;
403 drv_data->cur_chip = NULL;
404 queue_work(drv_data->workqueue, &drv_data->pump_messages); 429 queue_work(drv_data->workqueue, &drv_data->pump_messages);
405 spin_unlock_irqrestore(&drv_data->lock, flags); 430 spin_unlock_irqrestore(&drv_data->lock, flags);
406 431
@@ -416,7 +441,7 @@ static void giveback(struct driver_data *drv_data)
416 * a message with an error, or next message is for another chip 441 * a message with an error, or next message is for another chip
417 */ 442 */
418 if (!last_transfer->cs_change) 443 if (!last_transfer->cs_change)
419 drv_data->cs_control(PXA2XX_CS_DEASSERT); 444 cs_deassert(drv_data);
420 else { 445 else {
421 struct spi_message *next_msg; 446 struct spi_message *next_msg;
422 447
@@ -445,12 +470,14 @@ static void giveback(struct driver_data *drv_data)
445 if (next_msg && next_msg->spi != msg->spi) 470 if (next_msg && next_msg->spi != msg->spi)
446 next_msg = NULL; 471 next_msg = NULL;
447 if (!next_msg || msg->state == ERROR_STATE) 472 if (!next_msg || msg->state == ERROR_STATE)
448 drv_data->cs_control(PXA2XX_CS_DEASSERT); 473 cs_deassert(drv_data);
449 } 474 }
450 475
451 msg->state = NULL; 476 msg->state = NULL;
452 if (msg->complete) 477 if (msg->complete)
453 msg->complete(msg->context); 478 msg->complete(msg->context);
479
480 drv_data->cur_chip = NULL;
454} 481}
455 482
456static int wait_ssp_rx_stall(void const __iomem *ioaddr) 483static int wait_ssp_rx_stall(void const __iomem *ioaddr)
@@ -887,7 +914,7 @@ static void pump_transfers(unsigned long data)
887 914
888 /* Drop chip select only if cs_change is requested */ 915 /* Drop chip select only if cs_change is requested */
889 if (previous->cs_change) 916 if (previous->cs_change)
890 drv_data->cs_control(PXA2XX_CS_DEASSERT); 917 cs_deassert(drv_data);
891 } 918 }
892 919
893 /* Check for transfers that need multiple DMA segments */ 920 /* Check for transfers that need multiple DMA segments */
@@ -922,7 +949,6 @@ static void pump_transfers(unsigned long data)
922 } 949 }
923 drv_data->n_bytes = chip->n_bytes; 950 drv_data->n_bytes = chip->n_bytes;
924 drv_data->dma_width = chip->dma_width; 951 drv_data->dma_width = chip->dma_width;
925 drv_data->cs_control = chip->cs_control;
926 drv_data->tx = (void *)transfer->tx_buf; 952 drv_data->tx = (void *)transfer->tx_buf;
927 drv_data->tx_end = drv_data->tx + transfer->len; 953 drv_data->tx_end = drv_data->tx + transfer->len;
928 drv_data->rx = transfer->rx_buf; 954 drv_data->rx = transfer->rx_buf;
@@ -1084,11 +1110,7 @@ static void pump_transfers(unsigned long data)
1084 write_SSTO(chip->timeout, reg); 1110 write_SSTO(chip->timeout, reg);
1085 } 1111 }
1086 1112
1087 /* FIXME, need to handle cs polarity, 1113 cs_assert(drv_data);
1088 * this driver uses struct pxa2xx_spi_chip.cs_control to
1089 * specify a CS handling function, and it ignores most
1090 * struct spi_device.mode[s], including SPI_CS_HIGH */
1091 drv_data->cs_control(PXA2XX_CS_ASSERT);
1092 1114
1093 /* after chip select, release the data by enabling service 1115 /* after chip select, release the data by enabling service
1094 * requests and interrupts, without changing any mode bits */ 1116 * requests and interrupts, without changing any mode bits */
@@ -1166,6 +1188,44 @@ static int transfer(struct spi_device *spi, struct spi_message *msg)
1166/* the spi->mode bits understood by this driver: */ 1188/* the spi->mode bits understood by this driver: */
1167#define MODEBITS (SPI_CPOL | SPI_CPHA) 1189#define MODEBITS (SPI_CPOL | SPI_CPHA)
1168 1190
1191static int setup_cs(struct spi_device *spi, struct chip_data *chip,
1192 struct pxa2xx_spi_chip *chip_info)
1193{
1194 int err = 0;
1195
1196 if (chip == NULL || chip_info == NULL)
1197 return 0;
1198
1199 /* NOTE: setup() can be called multiple times, possibly with
1200 * different chip_info, release previously requested GPIO
1201 */
1202 if (gpio_is_valid(chip->gpio_cs))
1203 gpio_free(chip->gpio_cs);
1204
1205 /* If (*cs_control) is provided, ignore GPIO chip select */
1206 if (chip_info->cs_control) {
1207 chip->cs_control = chip_info->cs_control;
1208 return 0;
1209 }
1210
1211 if (gpio_is_valid(chip_info->gpio_cs)) {
1212 err = gpio_request(chip_info->gpio_cs, "SPI_CS");
1213 if (err) {
1214 dev_err(&spi->dev, "failed to request chip select "
1215 "GPIO%d\n", chip_info->gpio_cs);
1216 return err;
1217 }
1218
1219 chip->gpio_cs = chip_info->gpio_cs;
1220 chip->gpio_cs_inverted = spi->mode & SPI_CS_HIGH;
1221
1222 err = gpio_direction_output(chip->gpio_cs,
1223 !chip->gpio_cs_inverted);
1224 }
1225
1226 return err;
1227}
1228
1169static int setup(struct spi_device *spi) 1229static int setup(struct spi_device *spi)
1170{ 1230{
1171 struct pxa2xx_spi_chip *chip_info = NULL; 1231 struct pxa2xx_spi_chip *chip_info = NULL;
@@ -1211,7 +1271,7 @@ static int setup(struct spi_device *spi)
1211 return -ENOMEM; 1271 return -ENOMEM;
1212 } 1272 }
1213 1273
1214 chip->cs_control = null_cs_control; 1274 chip->gpio_cs = -1;
1215 chip->enable_dma = 0; 1275 chip->enable_dma = 0;
1216 chip->timeout = TIMOUT_DFLT; 1276 chip->timeout = TIMOUT_DFLT;
1217 chip->dma_burst_size = drv_data->master_info->enable_dma ? 1277 chip->dma_burst_size = drv_data->master_info->enable_dma ?
@@ -1225,8 +1285,6 @@ static int setup(struct spi_device *spi)
1225 /* chip_info isn't always needed */ 1285 /* chip_info isn't always needed */
1226 chip->cr1 = 0; 1286 chip->cr1 = 0;
1227 if (chip_info) { 1287 if (chip_info) {
1228 if (chip_info->cs_control)
1229 chip->cs_control = chip_info->cs_control;
1230 if (chip_info->timeout) 1288 if (chip_info->timeout)
1231 chip->timeout = chip_info->timeout; 1289 chip->timeout = chip_info->timeout;
1232 if (chip_info->tx_threshold) 1290 if (chip_info->tx_threshold)
@@ -1308,13 +1366,16 @@ static int setup(struct spi_device *spi)
1308 1366
1309 spi_set_ctldata(spi, chip); 1367 spi_set_ctldata(spi, chip);
1310 1368
1311 return 0; 1369 return setup_cs(spi, chip, chip_info);
1312} 1370}
1313 1371
1314static void cleanup(struct spi_device *spi) 1372static void cleanup(struct spi_device *spi)
1315{ 1373{
1316 struct chip_data *chip = spi_get_ctldata(spi); 1374 struct chip_data *chip = spi_get_ctldata(spi);
1317 1375
1376 if (gpio_is_valid(chip->gpio_cs))
1377 gpio_free(chip->gpio_cs);
1378
1318 kfree(chip); 1379 kfree(chip);
1319} 1380}
1320 1381
@@ -1438,6 +1499,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
1438 1499
1439 master->bus_num = pdev->id; 1500 master->bus_num = pdev->id;
1440 master->num_chipselect = platform_info->num_chipselect; 1501 master->num_chipselect = platform_info->num_chipselect;
1502 master->dma_alignment = DMA_ALIGNMENT;
1441 master->cleanup = cleanup; 1503 master->cleanup = cleanup;
1442 master->setup = setup; 1504 master->setup = setup;
1443 master->transfer = transfer; 1505 master->transfer = transfer;