diff options
Diffstat (limited to 'drivers/spi/pxa2xx_spi.c')
-rw-r--r-- | drivers/spi/pxa2xx_spi.c | 46 |
1 files changed, 27 insertions, 19 deletions
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c index 59ae3ed16658..dae87b1a4c6e 100644 --- a/drivers/spi/pxa2xx_spi.c +++ b/drivers/spi/pxa2xx_spi.c | |||
@@ -47,6 +47,10 @@ MODULE_ALIAS("platform:pxa2xx-spi"); | |||
47 | 47 | ||
48 | #define MAX_BUSES 3 | 48 | #define MAX_BUSES 3 |
49 | 49 | ||
50 | #define RX_THRESH_DFLT 8 | ||
51 | #define TX_THRESH_DFLT 8 | ||
52 | #define TIMOUT_DFLT 1000 | ||
53 | |||
50 | #define DMA_INT_MASK (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR) | 54 | #define DMA_INT_MASK (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR) |
51 | #define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK) | 55 | #define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK) |
52 | #define IS_DMA_ALIGNED(x) ((((u32)(x)) & 0x07) == 0) | 56 | #define IS_DMA_ALIGNED(x) ((((u32)(x)) & 0x07) == 0) |
@@ -1171,6 +1175,8 @@ static int setup(struct spi_device *spi) | |||
1171 | struct driver_data *drv_data = spi_master_get_devdata(spi->master); | 1175 | struct driver_data *drv_data = spi_master_get_devdata(spi->master); |
1172 | struct ssp_device *ssp = drv_data->ssp; | 1176 | struct ssp_device *ssp = drv_data->ssp; |
1173 | unsigned int clk_div; | 1177 | unsigned int clk_div; |
1178 | uint tx_thres = TX_THRESH_DFLT; | ||
1179 | uint rx_thres = RX_THRESH_DFLT; | ||
1174 | 1180 | ||
1175 | if (!spi->bits_per_word) | 1181 | if (!spi->bits_per_word) |
1176 | spi->bits_per_word = 8; | 1182 | spi->bits_per_word = 8; |
@@ -1209,8 +1215,7 @@ static int setup(struct spi_device *spi) | |||
1209 | 1215 | ||
1210 | chip->cs_control = null_cs_control; | 1216 | chip->cs_control = null_cs_control; |
1211 | chip->enable_dma = 0; | 1217 | chip->enable_dma = 0; |
1212 | chip->timeout = 1000; | 1218 | chip->timeout = TIMOUT_DFLT; |
1213 | chip->threshold = SSCR1_RxTresh(1) | SSCR1_TxTresh(1); | ||
1214 | chip->dma_burst_size = drv_data->master_info->enable_dma ? | 1219 | chip->dma_burst_size = drv_data->master_info->enable_dma ? |
1215 | DCMD_BURST8 : 0; | 1220 | DCMD_BURST8 : 0; |
1216 | } | 1221 | } |
@@ -1224,22 +1229,21 @@ static int setup(struct spi_device *spi) | |||
1224 | if (chip_info) { | 1229 | if (chip_info) { |
1225 | if (chip_info->cs_control) | 1230 | if (chip_info->cs_control) |
1226 | chip->cs_control = chip_info->cs_control; | 1231 | chip->cs_control = chip_info->cs_control; |
1227 | 1232 | if (chip_info->timeout) | |
1228 | chip->timeout = chip_info->timeout; | 1233 | chip->timeout = chip_info->timeout; |
1229 | 1234 | if (chip_info->tx_threshold) | |
1230 | chip->threshold = (SSCR1_RxTresh(chip_info->rx_threshold) & | 1235 | tx_thres = chip_info->tx_threshold; |
1231 | SSCR1_RFT) | | 1236 | if (chip_info->rx_threshold) |
1232 | (SSCR1_TxTresh(chip_info->tx_threshold) & | 1237 | rx_thres = chip_info->rx_threshold; |
1233 | SSCR1_TFT); | 1238 | chip->enable_dma = drv_data->master_info->enable_dma; |
1234 | |||
1235 | chip->enable_dma = chip_info->dma_burst_size != 0 | ||
1236 | && drv_data->master_info->enable_dma; | ||
1237 | chip->dma_threshold = 0; | 1239 | chip->dma_threshold = 0; |
1238 | |||
1239 | if (chip_info->enable_loopback) | 1240 | if (chip_info->enable_loopback) |
1240 | chip->cr1 = SSCR1_LBM; | 1241 | chip->cr1 = SSCR1_LBM; |
1241 | } | 1242 | } |
1242 | 1243 | ||
1244 | chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) | | ||
1245 | (SSCR1_TxTresh(tx_thres) & SSCR1_TFT); | ||
1246 | |||
1243 | /* set dma burst and threshold outside of chip_info path so that if | 1247 | /* set dma burst and threshold outside of chip_info path so that if |
1244 | * chip_info goes away after setting chip->enable_dma, the | 1248 | * chip_info goes away after setting chip->enable_dma, the |
1245 | * burst and threshold can still respond to changes in bits_per_word */ | 1249 | * burst and threshold can still respond to changes in bits_per_word */ |
@@ -1268,17 +1272,19 @@ static int setup(struct spi_device *spi) | |||
1268 | 1272 | ||
1269 | /* NOTE: PXA25x_SSP _could_ use external clocking ... */ | 1273 | /* NOTE: PXA25x_SSP _could_ use external clocking ... */ |
1270 | if (drv_data->ssp_type != PXA25x_SSP) | 1274 | if (drv_data->ssp_type != PXA25x_SSP) |
1271 | dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n", | 1275 | dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d, %s\n", |
1272 | spi->bits_per_word, | 1276 | spi->bits_per_word, |
1273 | clk_get_rate(ssp->clk) | 1277 | clk_get_rate(ssp->clk) |
1274 | / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)), | 1278 | / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)), |
1275 | spi->mode & 0x3); | 1279 | spi->mode & 0x3, |
1280 | chip->enable_dma ? "DMA" : "PIO"); | ||
1276 | else | 1281 | else |
1277 | dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n", | 1282 | dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d, %s\n", |
1278 | spi->bits_per_word, | 1283 | spi->bits_per_word, |
1279 | clk_get_rate(ssp->clk) | 1284 | clk_get_rate(ssp->clk) / 2 |
1280 | / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)), | 1285 | / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)), |
1281 | spi->mode & 0x3); | 1286 | spi->mode & 0x3, |
1287 | chip->enable_dma ? "DMA" : "PIO"); | ||
1282 | 1288 | ||
1283 | if (spi->bits_per_word <= 8) { | 1289 | if (spi->bits_per_word <= 8) { |
1284 | chip->n_bytes = 1; | 1290 | chip->n_bytes = 1; |
@@ -1498,7 +1504,9 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev) | |||
1498 | 1504 | ||
1499 | /* Load default SSP configuration */ | 1505 | /* Load default SSP configuration */ |
1500 | write_SSCR0(0, drv_data->ioaddr); | 1506 | write_SSCR0(0, drv_data->ioaddr); |
1501 | write_SSCR1(SSCR1_RxTresh(4) | SSCR1_TxTresh(12), drv_data->ioaddr); | 1507 | write_SSCR1(SSCR1_RxTresh(RX_THRESH_DFLT) | |
1508 | SSCR1_TxTresh(TX_THRESH_DFLT), | ||
1509 | drv_data->ioaddr); | ||
1502 | write_SSCR0(SSCR0_SerClkDiv(2) | 1510 | write_SSCR0(SSCR0_SerClkDiv(2) |
1503 | | SSCR0_Motorola | 1511 | | SSCR0_Motorola |
1504 | | SSCR0_DataSize(8), | 1512 | | SSCR0_DataSize(8), |