diff options
Diffstat (limited to 'drivers/spi/omap2_mcspi.c')
-rw-r--r-- | drivers/spi/omap2_mcspi.c | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c index eee4b6e0af2c..9b80ad36dbba 100644 --- a/drivers/spi/omap2_mcspi.c +++ b/drivers/spi/omap2_mcspi.c | |||
@@ -59,6 +59,8 @@ | |||
59 | 59 | ||
60 | /* per-register bitmasks: */ | 60 | /* per-register bitmasks: */ |
61 | 61 | ||
62 | #define OMAP2_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) | ||
63 | #define OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP (1 << 2) | ||
62 | #define OMAP2_MCSPI_SYSCONFIG_AUTOIDLE (1 << 0) | 64 | #define OMAP2_MCSPI_SYSCONFIG_AUTOIDLE (1 << 0) |
63 | #define OMAP2_MCSPI_SYSCONFIG_SOFTRESET (1 << 1) | 65 | #define OMAP2_MCSPI_SYSCONFIG_SOFTRESET (1 << 1) |
64 | 66 | ||
@@ -90,6 +92,7 @@ | |||
90 | 92 | ||
91 | #define OMAP2_MCSPI_CHCTRL_EN (1 << 0) | 93 | #define OMAP2_MCSPI_CHCTRL_EN (1 << 0) |
92 | 94 | ||
95 | #define OMAP2_MCSPI_WAKEUPENABLE_WKEN (1 << 0) | ||
93 | 96 | ||
94 | /* We have 2 DMA channels per CS, one for RX and one for TX */ | 97 | /* We have 2 DMA channels per CS, one for RX and one for TX */ |
95 | struct omap2_mcspi_dma { | 98 | struct omap2_mcspi_dma { |
@@ -269,7 +272,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) | |||
269 | 272 | ||
270 | if (rx != NULL) { | 273 | if (rx != NULL) { |
271 | omap_set_dma_transfer_params(mcspi_dma->dma_rx_channel, | 274 | omap_set_dma_transfer_params(mcspi_dma->dma_rx_channel, |
272 | data_type, element_count, 1, | 275 | data_type, element_count - 1, 1, |
273 | OMAP_DMA_SYNC_ELEMENT, | 276 | OMAP_DMA_SYNC_ELEMENT, |
274 | mcspi_dma->dma_rx_sync_dev, 1); | 277 | mcspi_dma->dma_rx_sync_dev, 1); |
275 | 278 | ||
@@ -300,6 +303,25 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) | |||
300 | if (rx != NULL) { | 303 | if (rx != NULL) { |
301 | wait_for_completion(&mcspi_dma->dma_rx_completion); | 304 | wait_for_completion(&mcspi_dma->dma_rx_completion); |
302 | dma_unmap_single(NULL, xfer->rx_dma, count, DMA_FROM_DEVICE); | 305 | dma_unmap_single(NULL, xfer->rx_dma, count, DMA_FROM_DEVICE); |
306 | omap2_mcspi_set_enable(spi, 0); | ||
307 | if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0) | ||
308 | & OMAP2_MCSPI_CHSTAT_RXS)) { | ||
309 | u32 w; | ||
310 | |||
311 | w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0); | ||
312 | if (word_len <= 8) | ||
313 | ((u8 *)xfer->rx_buf)[element_count - 1] = w; | ||
314 | else if (word_len <= 16) | ||
315 | ((u16 *)xfer->rx_buf)[element_count - 1] = w; | ||
316 | else /* word_len <= 32 */ | ||
317 | ((u32 *)xfer->rx_buf)[element_count - 1] = w; | ||
318 | } else { | ||
319 | dev_err(&spi->dev, "DMA RX last word empty"); | ||
320 | count -= (word_len <= 8) ? 1 : | ||
321 | (word_len <= 16) ? 2 : | ||
322 | /* word_len <= 32 */ 4; | ||
323 | } | ||
324 | omap2_mcspi_set_enable(spi, 1); | ||
303 | } | 325 | } |
304 | return count; | 326 | return count; |
305 | } | 327 | } |
@@ -873,8 +895,12 @@ static int __init omap2_mcspi_reset(struct omap2_mcspi *mcspi) | |||
873 | } while (!(tmp & OMAP2_MCSPI_SYSSTATUS_RESETDONE)); | 895 | } while (!(tmp & OMAP2_MCSPI_SYSSTATUS_RESETDONE)); |
874 | 896 | ||
875 | mcspi_write_reg(master, OMAP2_MCSPI_SYSCONFIG, | 897 | mcspi_write_reg(master, OMAP2_MCSPI_SYSCONFIG, |
876 | /* (3 << 8) | (2 << 3) | */ | 898 | OMAP2_MCSPI_SYSCONFIG_AUTOIDLE | |
877 | OMAP2_MCSPI_SYSCONFIG_AUTOIDLE); | 899 | OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP | |
900 | OMAP2_MCSPI_SYSCONFIG_SMARTIDLE); | ||
901 | |||
902 | mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE, | ||
903 | OMAP2_MCSPI_WAKEUPENABLE_WKEN); | ||
878 | 904 | ||
879 | omap2_mcspi_set_master_mode(master); | 905 | omap2_mcspi_set_master_mode(master); |
880 | 906 | ||