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-rw-r--r--drivers/sh/clk/cpg.c42
1 files changed, 17 insertions, 25 deletions
diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c
index 06537f2b2fb8..eeaec796a395 100644
--- a/drivers/sh/clk/cpg.c
+++ b/drivers/sh/clk/cpg.c
@@ -148,6 +148,20 @@ static void sh_clk_div_disable(struct clk *clk)
148 sh_clk_write(val, clk); 148 sh_clk_write(val, clk);
149} 149}
150 150
151static struct sh_clk_ops sh_clk_div_clk_ops = {
152 .recalc = sh_clk_div_recalc,
153 .set_rate = sh_clk_div_set_rate,
154 .round_rate = sh_clk_div_round_rate,
155};
156
157static struct sh_clk_ops sh_clk_div_enable_clk_ops = {
158 .recalc = sh_clk_div_recalc,
159 .set_rate = sh_clk_div_set_rate,
160 .round_rate = sh_clk_div_round_rate,
161 .enable = sh_clk_div_enable,
162 .disable = sh_clk_div_disable,
163};
164
151/* 165/*
152 * div6 support 166 * div6 support
153 */ 167 */
@@ -200,14 +214,6 @@ static int sh_clk_div6_set_parent(struct clk *clk, struct clk *parent)
200 return 0; 214 return 0;
201} 215}
202 216
203static struct sh_clk_ops sh_clk_div6_clk_ops = {
204 .recalc = sh_clk_div_recalc,
205 .round_rate = sh_clk_div_round_rate,
206 .set_rate = sh_clk_div_set_rate,
207 .enable = sh_clk_div_enable,
208 .disable = sh_clk_div_disable,
209};
210
211static struct sh_clk_ops sh_clk_div6_reparent_clk_ops = { 217static struct sh_clk_ops sh_clk_div6_reparent_clk_ops = {
212 .recalc = sh_clk_div_recalc, 218 .recalc = sh_clk_div_recalc,
213 .round_rate = sh_clk_div_round_rate, 219 .round_rate = sh_clk_div_round_rate,
@@ -286,7 +292,7 @@ static int __init sh_clk_div6_register_ops(struct clk *clks, int nr,
286 292
287int __init sh_clk_div6_register(struct clk *clks, int nr) 293int __init sh_clk_div6_register(struct clk *clks, int nr)
288{ 294{
289 return sh_clk_div6_register_ops(clks, nr, &sh_clk_div6_clk_ops); 295 return sh_clk_div6_register_ops(clks, nr, &sh_clk_div_enable_clk_ops);
290} 296}
291 297
292int __init sh_clk_div6_reparent_register(struct clk *clks, int nr) 298int __init sh_clk_div6_reparent_register(struct clk *clks, int nr)
@@ -327,20 +333,6 @@ static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)
327 return 0; 333 return 0;
328} 334}
329 335
330static struct sh_clk_ops sh_clk_div4_clk_ops = {
331 .recalc = sh_clk_div_recalc,
332 .set_rate = sh_clk_div_set_rate,
333 .round_rate = sh_clk_div_round_rate,
334};
335
336static struct sh_clk_ops sh_clk_div4_enable_clk_ops = {
337 .recalc = sh_clk_div_recalc,
338 .set_rate = sh_clk_div_set_rate,
339 .round_rate = sh_clk_div_round_rate,
340 .enable = sh_clk_div_enable,
341 .disable = sh_clk_div_disable,
342};
343
344static struct sh_clk_ops sh_clk_div4_reparent_clk_ops = { 336static struct sh_clk_ops sh_clk_div4_reparent_clk_ops = {
345 .recalc = sh_clk_div_recalc, 337 .recalc = sh_clk_div_recalc,
346 .set_rate = sh_clk_div_set_rate, 338 .set_rate = sh_clk_div_set_rate,
@@ -385,14 +377,14 @@ static int __init sh_clk_div4_register_ops(struct clk *clks, int nr,
385int __init sh_clk_div4_register(struct clk *clks, int nr, 377int __init sh_clk_div4_register(struct clk *clks, int nr,
386 struct clk_div4_table *table) 378 struct clk_div4_table *table)
387{ 379{
388 return sh_clk_div4_register_ops(clks, nr, table, &sh_clk_div4_clk_ops); 380 return sh_clk_div4_register_ops(clks, nr, table, &sh_clk_div_clk_ops);
389} 381}
390 382
391int __init sh_clk_div4_enable_register(struct clk *clks, int nr, 383int __init sh_clk_div4_enable_register(struct clk *clks, int nr,
392 struct clk_div4_table *table) 384 struct clk_div4_table *table)
393{ 385{
394 return sh_clk_div4_register_ops(clks, nr, table, 386 return sh_clk_div4_register_ops(clks, nr, table,
395 &sh_clk_div4_enable_clk_ops); 387 &sh_clk_div_enable_clk_ops);
396} 388}
397 389
398int __init sh_clk_div4_reparent_register(struct clk *clks, int nr, 390int __init sh_clk_div4_reparent_register(struct clk *clks, int nr,