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-rw-r--r--drivers/sh/intc/chip.c53
-rw-r--r--drivers/sh/intc/core.c45
-rw-r--r--drivers/sh/intc/dynamic.c91
-rw-r--r--drivers/sh/intc/internals.h2
-rw-r--r--drivers/sh/intc/virq.c14
-rw-r--r--drivers/sh/maple/maple.c20
6 files changed, 88 insertions, 137 deletions
diff --git a/drivers/sh/intc/chip.c b/drivers/sh/intc/chip.c
index 35c03706cc21..de885a0f917a 100644
--- a/drivers/sh/intc/chip.c
+++ b/drivers/sh/intc/chip.c
@@ -12,15 +12,16 @@
12#include <linux/io.h> 12#include <linux/io.h>
13#include "internals.h" 13#include "internals.h"
14 14
15void _intc_enable(unsigned int irq, unsigned long handle) 15void _intc_enable(struct irq_data *data, unsigned long handle)
16{ 16{
17 unsigned int irq = data->irq;
17 struct intc_desc_int *d = get_intc_desc(irq); 18 struct intc_desc_int *d = get_intc_desc(irq);
18 unsigned long addr; 19 unsigned long addr;
19 unsigned int cpu; 20 unsigned int cpu;
20 21
21 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) { 22 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) {
22#ifdef CONFIG_SMP 23#ifdef CONFIG_SMP
23 if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity)) 24 if (!cpumask_test_cpu(cpu, data->affinity))
24 continue; 25 continue;
25#endif 26#endif
26 addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu); 27 addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu);
@@ -31,15 +32,16 @@ void _intc_enable(unsigned int irq, unsigned long handle)
31 intc_balancing_enable(irq); 32 intc_balancing_enable(irq);
32} 33}
33 34
34static void intc_enable(unsigned int irq) 35static void intc_enable(struct irq_data *data)
35{ 36{
36 _intc_enable(irq, (unsigned long)get_irq_chip_data(irq)); 37 _intc_enable(data, (unsigned long)irq_data_get_irq_chip_data(data));
37} 38}
38 39
39static void intc_disable(unsigned int irq) 40static void intc_disable(struct irq_data *data)
40{ 41{
42 unsigned int irq = data->irq;
41 struct intc_desc_int *d = get_intc_desc(irq); 43 struct intc_desc_int *d = get_intc_desc(irq);
42 unsigned long handle = (unsigned long)get_irq_chip_data(irq); 44 unsigned long handle = (unsigned long)irq_data_get_irq_chip_data(data);
43 unsigned long addr; 45 unsigned long addr;
44 unsigned int cpu; 46 unsigned int cpu;
45 47
@@ -47,7 +49,7 @@ static void intc_disable(unsigned int irq)
47 49
48 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) { 50 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
49#ifdef CONFIG_SMP 51#ifdef CONFIG_SMP
50 if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity)) 52 if (!cpumask_test_cpu(cpu, data->affinity))
51 continue; 53 continue;
52#endif 54#endif
53 addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu); 55 addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu);
@@ -56,7 +58,7 @@ static void intc_disable(unsigned int irq)
56 } 58 }
57} 59}
58 60
59static int intc_set_wake(unsigned int irq, unsigned int on) 61static int intc_set_wake(struct irq_data *data, unsigned int on)
60{ 62{
61 return 0; /* allow wakeup, but setup hardware in intc_suspend() */ 63 return 0; /* allow wakeup, but setup hardware in intc_suspend() */
62} 64}
@@ -67,24 +69,27 @@ static int intc_set_wake(unsigned int irq, unsigned int on)
67 * additional locking here at the intc desc level. The affinity mask is 69 * additional locking here at the intc desc level. The affinity mask is
68 * later tested in the enable/disable paths. 70 * later tested in the enable/disable paths.
69 */ 71 */
70static int intc_set_affinity(unsigned int irq, const struct cpumask *cpumask) 72static int intc_set_affinity(struct irq_data *data,
73 const struct cpumask *cpumask,
74 bool force)
71{ 75{
72 if (!cpumask_intersects(cpumask, cpu_online_mask)) 76 if (!cpumask_intersects(cpumask, cpu_online_mask))
73 return -1; 77 return -1;
74 78
75 cpumask_copy(irq_to_desc(irq)->affinity, cpumask); 79 cpumask_copy(data->affinity, cpumask);
76 80
77 return 0; 81 return 0;
78} 82}
79#endif 83#endif
80 84
81static void intc_mask_ack(unsigned int irq) 85static void intc_mask_ack(struct irq_data *data)
82{ 86{
87 unsigned int irq = data->irq;
83 struct intc_desc_int *d = get_intc_desc(irq); 88 struct intc_desc_int *d = get_intc_desc(irq);
84 unsigned long handle = intc_get_ack_handle(irq); 89 unsigned long handle = intc_get_ack_handle(irq);
85 unsigned long addr; 90 unsigned long addr;
86 91
87 intc_disable(irq); 92 intc_disable(data);
88 93
89 /* read register and write zero only to the associated bit */ 94 /* read register and write zero only to the associated bit */
90 if (handle) { 95 if (handle) {
@@ -144,6 +149,7 @@ static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
144int intc_set_priority(unsigned int irq, unsigned int prio) 149int intc_set_priority(unsigned int irq, unsigned int prio)
145{ 150{
146 struct intc_desc_int *d = get_intc_desc(irq); 151 struct intc_desc_int *d = get_intc_desc(irq);
152 struct irq_data *data = irq_get_irq_data(irq);
147 struct intc_handle_int *ihp; 153 struct intc_handle_int *ihp;
148 154
149 if (!intc_get_prio_level(irq) || prio <= 1) 155 if (!intc_get_prio_level(irq) || prio <= 1)
@@ -162,7 +168,7 @@ int intc_set_priority(unsigned int irq, unsigned int prio)
162 * priority level will be set during next enable() 168 * priority level will be set during next enable()
163 */ 169 */
164 if (_INTC_FN(ihp->handle) != REG_FN_ERR) 170 if (_INTC_FN(ihp->handle) != REG_FN_ERR)
165 _intc_enable(irq, ihp->handle); 171 _intc_enable(data, ihp->handle);
166 } 172 }
167 return 0; 173 return 0;
168} 174}
@@ -181,8 +187,9 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
181#endif 187#endif
182}; 188};
183 189
184static int intc_set_type(unsigned int irq, unsigned int type) 190static int intc_set_type(struct irq_data *data, unsigned int type)
185{ 191{
192 unsigned int irq = data->irq;
186 struct intc_desc_int *d = get_intc_desc(irq); 193 struct intc_desc_int *d = get_intc_desc(irq);
187 unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK]; 194 unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK];
188 struct intc_handle_int *ihp; 195 struct intc_handle_int *ihp;
@@ -201,15 +208,15 @@ static int intc_set_type(unsigned int irq, unsigned int type)
201} 208}
202 209
203struct irq_chip intc_irq_chip = { 210struct irq_chip intc_irq_chip = {
204 .mask = intc_disable, 211 .irq_mask = intc_disable,
205 .unmask = intc_enable, 212 .irq_unmask = intc_enable,
206 .mask_ack = intc_mask_ack, 213 .irq_mask_ack = intc_mask_ack,
207 .enable = intc_enable, 214 .irq_enable = intc_enable,
208 .disable = intc_disable, 215 .irq_disable = intc_disable,
209 .shutdown = intc_disable, 216 .irq_shutdown = intc_disable,
210 .set_type = intc_set_type, 217 .irq_set_type = intc_set_type,
211 .set_wake = intc_set_wake, 218 .irq_set_wake = intc_set_wake,
212#ifdef CONFIG_SMP 219#ifdef CONFIG_SMP
213 .set_affinity = intc_set_affinity, 220 .irq_set_affinity = intc_set_affinity,
214#endif 221#endif
215}; 222};
diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
index 306ed287077a..873a99ff8f64 100644
--- a/drivers/sh/intc/core.c
+++ b/drivers/sh/intc/core.c
@@ -71,6 +71,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
71 unsigned int irq) 71 unsigned int irq)
72{ 72{
73 struct intc_handle_int *hp; 73 struct intc_handle_int *hp;
74 struct irq_data *irq_data;
74 unsigned int data[2], primary; 75 unsigned int data[2], primary;
75 unsigned long flags; 76 unsigned long flags;
76 77
@@ -78,7 +79,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
78 * Register the IRQ position with the global IRQ map, then insert 79 * Register the IRQ position with the global IRQ map, then insert
79 * it in to the radix tree. 80 * it in to the radix tree.
80 */ 81 */
81 reserve_irq_vector(irq); 82 irq_reserve_irqs(irq, 1);
82 83
83 raw_spin_lock_irqsave(&intc_big_lock, flags); 84 raw_spin_lock_irqsave(&intc_big_lock, flags);
84 radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq)); 85 radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq));
@@ -111,6 +112,8 @@ static void __init intc_register_irq(struct intc_desc *desc,
111 112
112 BUG_ON(!data[primary]); /* must have primary masking method */ 113 BUG_ON(!data[primary]); /* must have primary masking method */
113 114
115 irq_data = irq_get_irq_data(irq);
116
114 disable_irq_nosync(irq); 117 disable_irq_nosync(irq);
115 set_irq_chip_and_handler_name(irq, &d->chip, 118 set_irq_chip_and_handler_name(irq, &d->chip,
116 handle_level_irq, "level"); 119 handle_level_irq, "level");
@@ -123,7 +126,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
123 126
124 /* enable secondary masking method if present */ 127 /* enable secondary masking method if present */
125 if (data[!primary]) 128 if (data[!primary])
126 _intc_enable(irq, data[!primary]); 129 _intc_enable(irq_data, data[!primary]);
127 130
128 /* add irq to d->prio list if priority is available */ 131 /* add irq to d->prio list if priority is available */
129 if (data[1]) { 132 if (data[1]) {
@@ -151,7 +154,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
151 } 154 }
152 155
153 /* irq should be disabled by default */ 156 /* irq should be disabled by default */
154 d->chip.mask(irq); 157 d->chip.irq_mask(irq_data);
155 158
156 intc_set_ack_handle(irq, desc, d, enum_id); 159 intc_set_ack_handle(irq, desc, d, enum_id);
157 intc_set_dist_handle(irq, desc, d, enum_id); 160 intc_set_dist_handle(irq, desc, d, enum_id);
@@ -284,7 +287,7 @@ int __init register_intc_controller(struct intc_desc *desc)
284 for (i = 0; i < hw->nr_ack_regs; i++) 287 for (i = 0; i < hw->nr_ack_regs; i++)
285 k += save_reg(d, k, hw->ack_regs[i].set_reg, 0); 288 k += save_reg(d, k, hw->ack_regs[i].set_reg, 0);
286 else 289 else
287 d->chip.mask_ack = d->chip.disable; 290 d->chip.irq_mask_ack = d->chip.irq_disable;
288 291
289 /* disable bits matching force_disable before registering irqs */ 292 /* disable bits matching force_disable before registering irqs */
290 if (desc->force_disable) 293 if (desc->force_disable)
@@ -300,13 +303,13 @@ int __init register_intc_controller(struct intc_desc *desc)
300 for (i = 0; i < hw->nr_vectors; i++) { 303 for (i = 0; i < hw->nr_vectors; i++) {
301 struct intc_vect *vect = hw->vectors + i; 304 struct intc_vect *vect = hw->vectors + i;
302 unsigned int irq = evt2irq(vect->vect); 305 unsigned int irq = evt2irq(vect->vect);
303 struct irq_desc *irq_desc; 306 int res;
304 307
305 if (!vect->enum_id) 308 if (!vect->enum_id)
306 continue; 309 continue;
307 310
308 irq_desc = irq_to_desc_alloc_node(irq, numa_node_id()); 311 res = irq_alloc_desc_at(irq, numa_node_id());
309 if (unlikely(!irq_desc)) { 312 if (res != irq && res != -EEXIST) {
310 pr_err("can't get irq_desc for %d\n", irq); 313 pr_err("can't get irq_desc for %d\n", irq);
311 continue; 314 continue;
312 } 315 }
@@ -326,8 +329,8 @@ int __init register_intc_controller(struct intc_desc *desc)
326 * IRQ support, each vector still needs to have 329 * IRQ support, each vector still needs to have
327 * its own backing irq_desc. 330 * its own backing irq_desc.
328 */ 331 */
329 irq_desc = irq_to_desc_alloc_node(irq2, numa_node_id()); 332 res = irq_alloc_desc_at(irq2, numa_node_id());
330 if (unlikely(!irq_desc)) { 333 if (res != irq2 && res != -EEXIST) {
331 pr_err("can't get irq_desc for %d\n", irq2); 334 pr_err("can't get irq_desc for %d\n", irq2);
332 continue; 335 continue;
333 } 336 }
@@ -387,7 +390,9 @@ static SYSDEV_ATTR(name, S_IRUGO, show_intc_name, NULL);
387static int intc_suspend(struct sys_device *dev, pm_message_t state) 390static int intc_suspend(struct sys_device *dev, pm_message_t state)
388{ 391{
389 struct intc_desc_int *d; 392 struct intc_desc_int *d;
393 struct irq_data *data;
390 struct irq_desc *desc; 394 struct irq_desc *desc;
395 struct irq_chip *chip;
391 int irq; 396 int irq;
392 397
393 /* get intc controller associated with this sysdev */ 398 /* get intc controller associated with this sysdev */
@@ -398,17 +403,21 @@ static int intc_suspend(struct sys_device *dev, pm_message_t state)
398 if (d->state.event != PM_EVENT_FREEZE) 403 if (d->state.event != PM_EVENT_FREEZE)
399 break; 404 break;
400 405
401 for_each_irq_desc(irq, desc) { 406 for_each_active_irq(irq) {
407 desc = irq_to_desc(irq);
408 data = irq_get_irq_data(irq);
409 chip = irq_data_get_irq_chip(data);
410
402 /* 411 /*
403 * This will catch the redirect and VIRQ cases 412 * This will catch the redirect and VIRQ cases
404 * due to the dummy_irq_chip being inserted. 413 * due to the dummy_irq_chip being inserted.
405 */ 414 */
406 if (desc->chip != &d->chip) 415 if (chip != &d->chip)
407 continue; 416 continue;
408 if (desc->status & IRQ_DISABLED) 417 if (desc->status & IRQ_DISABLED)
409 desc->chip->disable(irq); 418 chip->irq_disable(data);
410 else 419 else
411 desc->chip->enable(irq); 420 chip->irq_enable(data);
412 } 421 }
413 break; 422 break;
414 case PM_EVENT_FREEZE: 423 case PM_EVENT_FREEZE:
@@ -416,11 +425,15 @@ static int intc_suspend(struct sys_device *dev, pm_message_t state)
416 break; 425 break;
417 case PM_EVENT_SUSPEND: 426 case PM_EVENT_SUSPEND:
418 /* enable wakeup irqs belonging to this intc controller */ 427 /* enable wakeup irqs belonging to this intc controller */
419 for_each_irq_desc(irq, desc) { 428 for_each_active_irq(irq) {
420 if (desc->chip != &d->chip) 429 desc = irq_to_desc(irq);
430 data = irq_get_irq_data(irq);
431 chip = irq_data_get_irq_chip(data);
432
433 if (chip != &d->chip)
421 continue; 434 continue;
422 if ((desc->status & IRQ_WAKEUP)) 435 if ((desc->status & IRQ_WAKEUP))
423 desc->chip->enable(irq); 436 chip->irq_enable(data);
424 } 437 }
425 break; 438 break;
426 } 439 }
diff --git a/drivers/sh/intc/dynamic.c b/drivers/sh/intc/dynamic.c
index 6caecdffe201..4187cce20ffd 100644
--- a/drivers/sh/intc/dynamic.c
+++ b/drivers/sh/intc/dynamic.c
@@ -17,7 +17,7 @@
17#include "internals.h" /* only for activate_irq() damage.. */ 17#include "internals.h" /* only for activate_irq() damage.. */
18 18
19/* 19/*
20 * The intc_irq_map provides a global map of bound IRQ vectors for a 20 * The IRQ bitmap provides a global map of bound IRQ vectors for a
21 * given platform. Allocation of IRQs are either static through the CPU 21 * given platform. Allocation of IRQs are either static through the CPU
22 * vector map, or dynamic in the case of board mux vectors or MSI. 22 * vector map, or dynamic in the case of board mux vectors or MSI.
23 * 23 *
@@ -27,109 +27,38 @@
27 * when dynamically creating IRQs, as well as tying in to otherwise 27 * when dynamically creating IRQs, as well as tying in to otherwise
28 * unused irq_desc positions in the sparse array. 28 * unused irq_desc positions in the sparse array.
29 */ 29 */
30static DECLARE_BITMAP(intc_irq_map, NR_IRQS);
31static DEFINE_RAW_SPINLOCK(vector_lock);
32 30
33/* 31/*
34 * Dynamic IRQ allocation and deallocation 32 * Dynamic IRQ allocation and deallocation
35 */ 33 */
36unsigned int create_irq_nr(unsigned int irq_want, int node) 34unsigned int create_irq_nr(unsigned int irq_want, int node)
37{ 35{
38 unsigned int irq = 0, new; 36 int irq = irq_alloc_desc_at(irq_want, node);
39 unsigned long flags; 37 if (irq < 0)
40 struct irq_desc *desc; 38 return 0;
41
42 raw_spin_lock_irqsave(&vector_lock, flags);
43
44 /*
45 * First try the wanted IRQ
46 */
47 if (test_and_set_bit(irq_want, intc_irq_map) == 0) {
48 new = irq_want;
49 } else {
50 /* .. then fall back to scanning. */
51 new = find_first_zero_bit(intc_irq_map, nr_irqs);
52 if (unlikely(new == nr_irqs))
53 goto out_unlock;
54
55 __set_bit(new, intc_irq_map);
56 }
57
58 desc = irq_to_desc_alloc_node(new, node);
59 if (unlikely(!desc)) {
60 pr_err("can't get irq_desc for %d\n", new);
61 goto out_unlock;
62 }
63
64 desc = move_irq_desc(desc, node);
65 irq = new;
66
67out_unlock:
68 raw_spin_unlock_irqrestore(&vector_lock, flags);
69
70 if (irq > 0) {
71 dynamic_irq_init(irq);
72 activate_irq(irq);
73 }
74 39
40 activate_irq(irq);
75 return irq; 41 return irq;
76} 42}
77 43
78int create_irq(void) 44int create_irq(void)
79{ 45{
80 int nid = cpu_to_node(smp_processor_id()); 46 int irq = irq_alloc_desc(numa_node_id());
81 int irq; 47 if (irq >= 0)
82 48 activate_irq(irq);
83 irq = create_irq_nr(NR_IRQS_LEGACY, nid);
84 if (irq == 0)
85 irq = -1;
86 49
87 return irq; 50 return irq;
88} 51}
89 52
90void destroy_irq(unsigned int irq) 53void destroy_irq(unsigned int irq)
91{ 54{
92 unsigned long flags; 55 irq_free_desc(irq);
93
94 dynamic_irq_cleanup(irq);
95
96 raw_spin_lock_irqsave(&vector_lock, flags);
97 __clear_bit(irq, intc_irq_map);
98 raw_spin_unlock_irqrestore(&vector_lock, flags);
99}
100
101int reserve_irq_vector(unsigned int irq)
102{
103 unsigned long flags;
104 int ret = 0;
105
106 raw_spin_lock_irqsave(&vector_lock, flags);
107 if (test_and_set_bit(irq, intc_irq_map))
108 ret = -EBUSY;
109 raw_spin_unlock_irqrestore(&vector_lock, flags);
110
111 return ret;
112} 56}
113 57
114void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs) 58void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs)
115{ 59{
116 unsigned long flags;
117 int i; 60 int i;
118 61
119 raw_spin_lock_irqsave(&vector_lock, flags);
120 for (i = 0; i < nr_vecs; i++) 62 for (i = 0; i < nr_vecs; i++)
121 __set_bit(evt2irq(vectors[i].vect), intc_irq_map); 63 irq_reserve_irqs(evt2irq(vectors[i].vect), 1);
122 raw_spin_unlock_irqrestore(&vector_lock, flags);
123}
124
125void reserve_irq_legacy(void)
126{
127 unsigned long flags;
128 int i, j;
129
130 raw_spin_lock_irqsave(&vector_lock, flags);
131 j = find_first_bit(intc_irq_map, nr_irqs);
132 for (i = 0; i < j; i++)
133 __set_bit(i, intc_irq_map);
134 raw_spin_unlock_irqrestore(&vector_lock, flags);
135} 64}
diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
index d49482c623fa..0cf8260971d4 100644
--- a/drivers/sh/intc/internals.h
+++ b/drivers/sh/intc/internals.h
@@ -152,7 +152,7 @@ intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
152 152
153/* chip.c */ 153/* chip.c */
154extern struct irq_chip intc_irq_chip; 154extern struct irq_chip intc_irq_chip;
155void _intc_enable(unsigned int irq, unsigned long handle); 155void _intc_enable(struct irq_data *data, unsigned long handle);
156 156
157/* core.c */ 157/* core.c */
158extern struct list_head intc_list; 158extern struct list_head intc_list;
diff --git a/drivers/sh/intc/virq.c b/drivers/sh/intc/virq.c
index 643dfd4d2057..e5bf5d3c698e 100644
--- a/drivers/sh/intc/virq.c
+++ b/drivers/sh/intc/virq.c
@@ -83,11 +83,11 @@ EXPORT_SYMBOL_GPL(intc_irq_lookup);
83static int add_virq_to_pirq(unsigned int irq, unsigned int virq) 83static int add_virq_to_pirq(unsigned int irq, unsigned int virq)
84{ 84{
85 struct intc_virq_list **last, *entry; 85 struct intc_virq_list **last, *entry;
86 struct irq_desc *desc = irq_to_desc(irq); 86 struct irq_data *data = irq_get_irq_data(irq);
87 87
88 /* scan for duplicates */ 88 /* scan for duplicates */
89 last = (struct intc_virq_list **)&desc->handler_data; 89 last = (struct intc_virq_list **)&data->handler_data;
90 for_each_virq(entry, desc->handler_data) { 90 for_each_virq(entry, data->handler_data) {
91 if (entry->irq == virq) 91 if (entry->irq == virq)
92 return 0; 92 return 0;
93 last = &entry->next; 93 last = &entry->next;
@@ -108,10 +108,12 @@ static int add_virq_to_pirq(unsigned int irq, unsigned int virq)
108 108
109static void intc_virq_handler(unsigned int irq, struct irq_desc *desc) 109static void intc_virq_handler(unsigned int irq, struct irq_desc *desc)
110{ 110{
111 struct intc_virq_list *entry, *vlist = get_irq_data(irq); 111 struct irq_data *data = irq_get_irq_data(irq);
112 struct irq_chip *chip = irq_data_get_irq_chip(data);
113 struct intc_virq_list *entry, *vlist = irq_data_get_irq_data(data);
112 struct intc_desc_int *d = get_intc_desc(irq); 114 struct intc_desc_int *d = get_intc_desc(irq);
113 115
114 desc->chip->mask_ack(irq); 116 chip->irq_mask_ack(data);
115 117
116 for_each_virq(entry, vlist) { 118 for_each_virq(entry, vlist) {
117 unsigned long addr, handle; 119 unsigned long addr, handle;
@@ -123,7 +125,7 @@ static void intc_virq_handler(unsigned int irq, struct irq_desc *desc)
123 generic_handle_irq(entry->irq); 125 generic_handle_irq(entry->irq);
124 } 126 }
125 127
126 desc->chip->unmask(irq); 128 chip->irq_unmask(data);
127} 129}
128 130
129static unsigned long __init intc_subgroup_data(struct intc_subgroup *subgroup, 131static unsigned long __init intc_subgroup_data(struct intc_subgroup *subgroup,
diff --git a/drivers/sh/maple/maple.c b/drivers/sh/maple/maple.c
index 4e8f57d4131f..1e20604257af 100644
--- a/drivers/sh/maple/maple.c
+++ b/drivers/sh/maple/maple.c
@@ -94,9 +94,9 @@ EXPORT_SYMBOL_GPL(maple_driver_unregister);
94/* set hardware registers to enable next round of dma */ 94/* set hardware registers to enable next round of dma */
95static void maple_dma_reset(void) 95static void maple_dma_reset(void)
96{ 96{
97 ctrl_outl(MAPLE_MAGIC, MAPLE_RESET); 97 __raw_writel(MAPLE_MAGIC, MAPLE_RESET);
98 /* set trig type to 0 for software trigger, 1 for hardware (VBLANK) */ 98 /* set trig type to 0 for software trigger, 1 for hardware (VBLANK) */
99 ctrl_outl(1, MAPLE_TRIGTYPE); 99 __raw_writel(1, MAPLE_TRIGTYPE);
100 /* 100 /*
101 * Maple system register 101 * Maple system register
102 * bits 31 - 16 timeout in units of 20nsec 102 * bits 31 - 16 timeout in units of 20nsec
@@ -105,9 +105,9 @@ static void maple_dma_reset(void)
105 * bits 3 - 0 delay (in 1.3ms) between VBLANK and start of DMA 105 * bits 3 - 0 delay (in 1.3ms) between VBLANK and start of DMA
106 * max delay is 11 106 * max delay is 11
107 */ 107 */
108 ctrl_outl(MAPLE_2MBPS | MAPLE_TIMEOUT(0xFFFF), MAPLE_SPEED); 108 __raw_writel(MAPLE_2MBPS | MAPLE_TIMEOUT(0xFFFF), MAPLE_SPEED);
109 ctrl_outl(virt_to_phys(maple_sendbuf), MAPLE_DMAADDR); 109 __raw_writel(virt_to_phys(maple_sendbuf), MAPLE_DMAADDR);
110 ctrl_outl(1, MAPLE_ENABLE); 110 __raw_writel(1, MAPLE_ENABLE);
111} 111}
112 112
113/** 113/**
@@ -130,7 +130,7 @@ EXPORT_SYMBOL_GPL(maple_getcond_callback);
130 130
131static int maple_dma_done(void) 131static int maple_dma_done(void)
132{ 132{
133 return (ctrl_inl(MAPLE_STATE) & 1) == 0; 133 return (__raw_readl(MAPLE_STATE) & 1) == 0;
134} 134}
135 135
136static void maple_release_device(struct device *dev) 136static void maple_release_device(struct device *dev)
@@ -275,7 +275,7 @@ static void maple_send(void)
275 return; 275 return;
276 276
277 /* disable DMA */ 277 /* disable DMA */
278 ctrl_outl(0, MAPLE_ENABLE); 278 __raw_writel(0, MAPLE_ENABLE);
279 279
280 if (!list_empty(&maple_sentq)) 280 if (!list_empty(&maple_sentq))
281 goto finish; 281 goto finish;
@@ -450,7 +450,7 @@ static void maple_vblank_handler(struct work_struct *work)
450 if (!maple_dma_done()) 450 if (!maple_dma_done())
451 return; 451 return;
452 452
453 ctrl_outl(0, MAPLE_ENABLE); 453 __raw_writel(0, MAPLE_ENABLE);
454 454
455 if (!list_empty(&maple_sentq)) 455 if (!list_empty(&maple_sentq))
456 goto finish; 456 goto finish;
@@ -636,7 +636,7 @@ static void maple_dma_handler(struct work_struct *work)
636 636
637 if (!maple_dma_done()) 637 if (!maple_dma_done())
638 return; 638 return;
639 ctrl_outl(0, MAPLE_ENABLE); 639 __raw_writel(0, MAPLE_ENABLE);
640 if (!list_empty(&maple_sentq)) { 640 if (!list_empty(&maple_sentq)) {
641 list_for_each_entry_safe(mq, nmq, &maple_sentq, list) { 641 list_for_each_entry_safe(mq, nmq, &maple_sentq, list) {
642 mdev = mq->dev; 642 mdev = mq->dev;
@@ -796,7 +796,7 @@ static int __init maple_bus_init(void)
796 int retval, i; 796 int retval, i;
797 struct maple_device *mdev[MAPLE_PORTS]; 797 struct maple_device *mdev[MAPLE_PORTS];
798 798
799 ctrl_outl(0, MAPLE_ENABLE); 799 __raw_writel(0, MAPLE_ENABLE);
800 800
801 retval = device_register(&maple_bus); 801 retval = device_register(&maple_bus);
802 if (retval) 802 if (retval)
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-08 14:23:02 -0500