diff options
Diffstat (limited to 'drivers/sh')
-rw-r--r-- | drivers/sh/intc.c | 151 |
1 files changed, 132 insertions, 19 deletions
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c index 5ec0fffa7db4..ccee18945d91 100644 --- a/drivers/sh/intc.c +++ b/drivers/sh/intc.c | |||
@@ -259,6 +259,43 @@ static void intc_disable(unsigned int irq) | |||
259 | } | 259 | } |
260 | } | 260 | } |
261 | 261 | ||
262 | static void (*intc_enable_noprio_fns[])(unsigned long addr, | ||
263 | unsigned long handle, | ||
264 | void (*fn)(unsigned long, | ||
265 | unsigned long, | ||
266 | unsigned long), | ||
267 | unsigned int irq) = { | ||
268 | [MODE_ENABLE_REG] = intc_mode_field, | ||
269 | [MODE_MASK_REG] = intc_mode_zero, | ||
270 | [MODE_DUAL_REG] = intc_mode_field, | ||
271 | [MODE_PRIO_REG] = intc_mode_field, | ||
272 | [MODE_PCLR_REG] = intc_mode_field, | ||
273 | }; | ||
274 | |||
275 | static void intc_enable_disable(struct intc_desc_int *d, | ||
276 | unsigned long handle, int do_enable) | ||
277 | { | ||
278 | unsigned long addr; | ||
279 | unsigned int cpu; | ||
280 | void (*fn)(unsigned long, unsigned long, | ||
281 | void (*)(unsigned long, unsigned long, unsigned long), | ||
282 | unsigned int); | ||
283 | |||
284 | if (do_enable) { | ||
285 | for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) { | ||
286 | addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu); | ||
287 | fn = intc_enable_noprio_fns[_INTC_MODE(handle)]; | ||
288 | fn(addr, handle, intc_reg_fns[_INTC_FN(handle)], 0); | ||
289 | } | ||
290 | } else { | ||
291 | for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) { | ||
292 | addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu); | ||
293 | fn = intc_disable_fns[_INTC_MODE(handle)]; | ||
294 | fn(addr, handle, intc_reg_fns[_INTC_FN(handle)], 0); | ||
295 | } | ||
296 | } | ||
297 | } | ||
298 | |||
262 | static int intc_set_wake(unsigned int irq, unsigned int on) | 299 | static int intc_set_wake(unsigned int irq, unsigned int on) |
263 | { | 300 | { |
264 | return 0; /* allow wakeup, but setup hardware in intc_suspend() */ | 301 | return 0; /* allow wakeup, but setup hardware in intc_suspend() */ |
@@ -417,19 +454,21 @@ static intc_enum __init intc_grp_id(struct intc_desc *desc, | |||
417 | return 0; | 454 | return 0; |
418 | } | 455 | } |
419 | 456 | ||
420 | static unsigned int __init intc_mask_data(struct intc_desc *desc, | 457 | static unsigned int __init _intc_mask_data(struct intc_desc *desc, |
421 | struct intc_desc_int *d, | 458 | struct intc_desc_int *d, |
422 | intc_enum enum_id, int do_grps) | 459 | intc_enum enum_id, |
460 | unsigned int *reg_idx, | ||
461 | unsigned int *fld_idx) | ||
423 | { | 462 | { |
424 | struct intc_mask_reg *mr = desc->hw.mask_regs; | 463 | struct intc_mask_reg *mr = desc->hw.mask_regs; |
425 | unsigned int i, j, fn, mode; | 464 | unsigned int fn, mode; |
426 | unsigned long reg_e, reg_d; | 465 | unsigned long reg_e, reg_d; |
427 | 466 | ||
428 | for (i = 0; mr && enum_id && i < desc->hw.nr_mask_regs; i++) { | 467 | while (mr && enum_id && *reg_idx < desc->hw.nr_mask_regs) { |
429 | mr = desc->hw.mask_regs + i; | 468 | mr = desc->hw.mask_regs + *reg_idx; |
430 | 469 | ||
431 | for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) { | 470 | for (; *fld_idx < ARRAY_SIZE(mr->enum_ids); (*fld_idx)++) { |
432 | if (mr->enum_ids[j] != enum_id) | 471 | if (mr->enum_ids[*fld_idx] != enum_id) |
433 | continue; | 472 | continue; |
434 | 473 | ||
435 | if (mr->set_reg && mr->clr_reg) { | 474 | if (mr->set_reg && mr->clr_reg) { |
@@ -455,29 +494,49 @@ static unsigned int __init intc_mask_data(struct intc_desc *desc, | |||
455 | intc_get_reg(d, reg_e), | 494 | intc_get_reg(d, reg_e), |
456 | intc_get_reg(d, reg_d), | 495 | intc_get_reg(d, reg_d), |
457 | 1, | 496 | 1, |
458 | (mr->reg_width - 1) - j); | 497 | (mr->reg_width - 1) - *fld_idx); |
459 | } | 498 | } |
499 | |||
500 | *fld_idx = 0; | ||
501 | (*reg_idx)++; | ||
460 | } | 502 | } |
461 | 503 | ||
504 | return 0; | ||
505 | } | ||
506 | |||
507 | static unsigned int __init intc_mask_data(struct intc_desc *desc, | ||
508 | struct intc_desc_int *d, | ||
509 | intc_enum enum_id, int do_grps) | ||
510 | { | ||
511 | unsigned int i = 0; | ||
512 | unsigned int j = 0; | ||
513 | unsigned int ret; | ||
514 | |||
515 | ret = _intc_mask_data(desc, d, enum_id, &i, &j); | ||
516 | if (ret) | ||
517 | return ret; | ||
518 | |||
462 | if (do_grps) | 519 | if (do_grps) |
463 | return intc_mask_data(desc, d, intc_grp_id(desc, enum_id), 0); | 520 | return intc_mask_data(desc, d, intc_grp_id(desc, enum_id), 0); |
464 | 521 | ||
465 | return 0; | 522 | return 0; |
466 | } | 523 | } |
467 | 524 | ||
468 | static unsigned int __init intc_prio_data(struct intc_desc *desc, | 525 | static unsigned int __init _intc_prio_data(struct intc_desc *desc, |
469 | struct intc_desc_int *d, | 526 | struct intc_desc_int *d, |
470 | intc_enum enum_id, int do_grps) | 527 | intc_enum enum_id, |
528 | unsigned int *reg_idx, | ||
529 | unsigned int *fld_idx) | ||
471 | { | 530 | { |
472 | struct intc_prio_reg *pr = desc->hw.prio_regs; | 531 | struct intc_prio_reg *pr = desc->hw.prio_regs; |
473 | unsigned int i, j, fn, mode, bit; | 532 | unsigned int fn, n, mode, bit; |
474 | unsigned long reg_e, reg_d; | 533 | unsigned long reg_e, reg_d; |
475 | 534 | ||
476 | for (i = 0; pr && enum_id && i < desc->hw.nr_prio_regs; i++) { | 535 | while (pr && enum_id && *reg_idx < desc->hw.nr_prio_regs) { |
477 | pr = desc->hw.prio_regs + i; | 536 | pr = desc->hw.prio_regs + *reg_idx; |
478 | 537 | ||
479 | for (j = 0; j < ARRAY_SIZE(pr->enum_ids); j++) { | 538 | for (; *fld_idx < ARRAY_SIZE(pr->enum_ids); (*fld_idx)++) { |
480 | if (pr->enum_ids[j] != enum_id) | 539 | if (pr->enum_ids[*fld_idx] != enum_id) |
481 | continue; | 540 | continue; |
482 | 541 | ||
483 | if (pr->set_reg && pr->clr_reg) { | 542 | if (pr->set_reg && pr->clr_reg) { |
@@ -495,24 +554,69 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc, | |||
495 | } | 554 | } |
496 | 555 | ||
497 | fn += (pr->reg_width >> 3) - 1; | 556 | fn += (pr->reg_width >> 3) - 1; |
557 | n = *fld_idx + 1; | ||
498 | 558 | ||
499 | BUG_ON((j + 1) * pr->field_width > pr->reg_width); | 559 | BUG_ON(n * pr->field_width > pr->reg_width); |
500 | 560 | ||
501 | bit = pr->reg_width - ((j + 1) * pr->field_width); | 561 | bit = pr->reg_width - (n * pr->field_width); |
502 | 562 | ||
503 | return _INTC_MK(fn, mode, | 563 | return _INTC_MK(fn, mode, |
504 | intc_get_reg(d, reg_e), | 564 | intc_get_reg(d, reg_e), |
505 | intc_get_reg(d, reg_d), | 565 | intc_get_reg(d, reg_d), |
506 | pr->field_width, bit); | 566 | pr->field_width, bit); |
507 | } | 567 | } |
568 | |||
569 | *fld_idx = 0; | ||
570 | (*reg_idx)++; | ||
508 | } | 571 | } |
509 | 572 | ||
573 | return 0; | ||
574 | } | ||
575 | |||
576 | static unsigned int __init intc_prio_data(struct intc_desc *desc, | ||
577 | struct intc_desc_int *d, | ||
578 | intc_enum enum_id, int do_grps) | ||
579 | { | ||
580 | unsigned int i = 0; | ||
581 | unsigned int j = 0; | ||
582 | unsigned int ret; | ||
583 | |||
584 | ret = _intc_prio_data(desc, d, enum_id, &i, &j); | ||
585 | if (ret) | ||
586 | return ret; | ||
587 | |||
510 | if (do_grps) | 588 | if (do_grps) |
511 | return intc_prio_data(desc, d, intc_grp_id(desc, enum_id), 0); | 589 | return intc_prio_data(desc, d, intc_grp_id(desc, enum_id), 0); |
512 | 590 | ||
513 | return 0; | 591 | return 0; |
514 | } | 592 | } |
515 | 593 | ||
594 | static void __init intc_enable_disable_enum(struct intc_desc *desc, | ||
595 | struct intc_desc_int *d, | ||
596 | intc_enum enum_id, int enable) | ||
597 | { | ||
598 | unsigned int i, j, data; | ||
599 | |||
600 | /* go through and enable/disable all mask bits */ | ||
601 | i = j = 0; | ||
602 | do { | ||
603 | data = _intc_mask_data(desc, d, enum_id, &i, &j); | ||
604 | if (data) | ||
605 | intc_enable_disable(d, data, enable); | ||
606 | j++; | ||
607 | } while (data); | ||
608 | |||
609 | /* go through and enable/disable all priority fields */ | ||
610 | i = j = 0; | ||
611 | do { | ||
612 | data = _intc_prio_data(desc, d, enum_id, &i, &j); | ||
613 | if (data) | ||
614 | intc_enable_disable(d, data, enable); | ||
615 | |||
616 | j++; | ||
617 | } while (data); | ||
618 | } | ||
619 | |||
516 | static unsigned int __init intc_ack_data(struct intc_desc *desc, | 620 | static unsigned int __init intc_ack_data(struct intc_desc *desc, |
517 | struct intc_desc_int *d, | 621 | struct intc_desc_int *d, |
518 | intc_enum enum_id) | 622 | intc_enum enum_id) |
@@ -747,6 +851,11 @@ void __init register_intc_controller(struct intc_desc *desc) | |||
747 | d->chip.mask_ack = intc_mask_ack; | 851 | d->chip.mask_ack = intc_mask_ack; |
748 | } | 852 | } |
749 | 853 | ||
854 | |||
855 | /* disable bits matching force_enable before registering irqs */ | ||
856 | if (desc->force_enable) | ||
857 | intc_enable_disable_enum(desc, d, desc->force_enable, 0); | ||
858 | |||
750 | BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */ | 859 | BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */ |
751 | 860 | ||
752 | /* register the vectors one by one */ | 861 | /* register the vectors one by one */ |
@@ -792,6 +901,10 @@ void __init register_intc_controller(struct intc_desc *desc) | |||
792 | set_irq_data(irq2, (void *)irq); | 901 | set_irq_data(irq2, (void *)irq); |
793 | } | 902 | } |
794 | } | 903 | } |
904 | |||
905 | /* enable bits matching force_enable after registering irqs */ | ||
906 | if (desc->force_enable) | ||
907 | intc_enable_disable_enum(desc, d, desc->force_enable, 1); | ||
795 | } | 908 | } |
796 | 909 | ||
797 | static int intc_suspend(struct sys_device *dev, pm_message_t state) | 910 | static int intc_suspend(struct sys_device *dev, pm_message_t state) |