diff options
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/68360serial.c | 6 | ||||
| -rw-r--r-- | drivers/serial/8250.c | 13 | ||||
| -rw-r--r-- | drivers/serial/Kconfig | 8 | ||||
| -rw-r--r-- | drivers/serial/amba-pl010.c | 2 | ||||
| -rw-r--r-- | drivers/serial/amba-pl011.c | 90 | ||||
| -rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_core.c | 2 | ||||
| -rw-r--r-- | drivers/serial/kgdboc.c | 18 | ||||
| -rw-r--r-- | drivers/serial/mpc52xx_uart.c | 145 | ||||
| -rw-r--r-- | drivers/serial/nwpserial.c | 2 | ||||
| -rw-r--r-- | drivers/serial/sn_console.c | 6 | ||||
| -rw-r--r-- | drivers/serial/sunhv.c | 8 | ||||
| -rw-r--r-- | drivers/serial/sunsab.c | 6 | ||||
| -rw-r--r-- | drivers/serial/sunsu.c | 4 | ||||
| -rw-r--r-- | drivers/serial/sunzilog.c | 16 | ||||
| -rw-r--r-- | drivers/serial/uartlite.c | 1 |
15 files changed, 240 insertions, 87 deletions
diff --git a/drivers/serial/68360serial.c b/drivers/serial/68360serial.c index 24661cd5e4fb..768612f8e41e 100644 --- a/drivers/serial/68360serial.c +++ b/drivers/serial/68360serial.c | |||
| @@ -2649,7 +2649,7 @@ static int __init rs_360_init(void) | |||
| 2649 | sup->tfcr = SMC_EB; | 2649 | sup->tfcr = SMC_EB; |
| 2650 | 2650 | ||
| 2651 | /* Set this to 1 for now, so we get single | 2651 | /* Set this to 1 for now, so we get single |
| 2652 | * character interrupts. Using idle charater | 2652 | * character interrupts. Using idle character |
| 2653 | * time requires some additional tuning. | 2653 | * time requires some additional tuning. |
| 2654 | */ | 2654 | */ |
| 2655 | sup->mrblr = 1; | 2655 | sup->mrblr = 1; |
| @@ -2728,7 +2728,7 @@ static int __init rs_360_init(void) | |||
| 2728 | up->tfcr = SMC_EB; | 2728 | up->tfcr = SMC_EB; |
| 2729 | 2729 | ||
| 2730 | /* Set this to 1 for now, so we get single | 2730 | /* Set this to 1 for now, so we get single |
| 2731 | * character interrupts. Using idle charater | 2731 | * character interrupts. Using idle character |
| 2732 | * time requires some additional tuning. | 2732 | * time requires some additional tuning. |
| 2733 | */ | 2733 | */ |
| 2734 | up->mrblr = 1; | 2734 | up->mrblr = 1; |
| @@ -2886,7 +2886,7 @@ int serial_console_setup( struct console *co, char *options) | |||
| 2886 | sup->tfcr = SMC_EB; | 2886 | sup->tfcr = SMC_EB; |
| 2887 | 2887 | ||
| 2888 | /* Set this to 1 for now, so we get single | 2888 | /* Set this to 1 for now, so we get single |
| 2889 | * character interrupts. Using idle charater | 2889 | * character interrupts. Using idle character |
| 2890 | * time requires some additional tuning. | 2890 | * time requires some additional tuning. |
| 2891 | */ | 2891 | */ |
| 2892 | sup->mrblr = 1; | 2892 | sup->mrblr = 1; |
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index 891e1dd65f24..09ef57034c9c 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c | |||
| @@ -302,7 +302,7 @@ static const struct serial8250_config uart_config[] = { | |||
| 302 | }, | 302 | }, |
| 303 | }; | 303 | }; |
| 304 | 304 | ||
| 305 | #if defined (CONFIG_SERIAL_8250_AU1X00) | 305 | #if defined(CONFIG_MIPS_ALCHEMY) |
| 306 | 306 | ||
| 307 | /* Au1x00 UART hardware has a weird register layout */ | 307 | /* Au1x00 UART hardware has a weird register layout */ |
| 308 | static const u8 au_io_in_map[] = { | 308 | static const u8 au_io_in_map[] = { |
| @@ -422,7 +422,6 @@ static unsigned int mem32_serial_in(struct uart_port *p, int offset) | |||
| 422 | return readl(p->membase + offset); | 422 | return readl(p->membase + offset); |
| 423 | } | 423 | } |
| 424 | 424 | ||
| 425 | #ifdef CONFIG_SERIAL_8250_AU1X00 | ||
| 426 | static unsigned int au_serial_in(struct uart_port *p, int offset) | 425 | static unsigned int au_serial_in(struct uart_port *p, int offset) |
| 427 | { | 426 | { |
| 428 | offset = map_8250_in_reg(p, offset) << p->regshift; | 427 | offset = map_8250_in_reg(p, offset) << p->regshift; |
| @@ -434,7 +433,6 @@ static void au_serial_out(struct uart_port *p, int offset, int value) | |||
| 434 | offset = map_8250_out_reg(p, offset) << p->regshift; | 433 | offset = map_8250_out_reg(p, offset) << p->regshift; |
| 435 | __raw_writel(value, p->membase + offset); | 434 | __raw_writel(value, p->membase + offset); |
| 436 | } | 435 | } |
| 437 | #endif | ||
| 438 | 436 | ||
| 439 | static unsigned int tsi_serial_in(struct uart_port *p, int offset) | 437 | static unsigned int tsi_serial_in(struct uart_port *p, int offset) |
| 440 | { | 438 | { |
| @@ -503,12 +501,11 @@ static void set_io_from_upio(struct uart_port *p) | |||
| 503 | p->serial_out = mem32_serial_out; | 501 | p->serial_out = mem32_serial_out; |
| 504 | break; | 502 | break; |
| 505 | 503 | ||
| 506 | #ifdef CONFIG_SERIAL_8250_AU1X00 | ||
| 507 | case UPIO_AU: | 504 | case UPIO_AU: |
| 508 | p->serial_in = au_serial_in; | 505 | p->serial_in = au_serial_in; |
| 509 | p->serial_out = au_serial_out; | 506 | p->serial_out = au_serial_out; |
| 510 | break; | 507 | break; |
| 511 | #endif | 508 | |
| 512 | case UPIO_TSI: | 509 | case UPIO_TSI: |
| 513 | p->serial_in = tsi_serial_in; | 510 | p->serial_in = tsi_serial_in; |
| 514 | p->serial_out = tsi_serial_out; | 511 | p->serial_out = tsi_serial_out; |
| @@ -535,9 +532,7 @@ serial_out_sync(struct uart_8250_port *up, int offset, int value) | |||
| 535 | switch (p->iotype) { | 532 | switch (p->iotype) { |
| 536 | case UPIO_MEM: | 533 | case UPIO_MEM: |
| 537 | case UPIO_MEM32: | 534 | case UPIO_MEM32: |
| 538 | #ifdef CONFIG_SERIAL_8250_AU1X00 | ||
| 539 | case UPIO_AU: | 535 | case UPIO_AU: |
| 540 | #endif | ||
| 541 | case UPIO_DWAPB: | 536 | case UPIO_DWAPB: |
| 542 | p->serial_out(p, offset, value); | 537 | p->serial_out(p, offset, value); |
| 543 | p->serial_in(p, UART_LCR); /* safe, no side-effects */ | 538 | p->serial_in(p, UART_LCR); /* safe, no side-effects */ |
| @@ -573,7 +568,7 @@ static inline void _serial_dl_write(struct uart_8250_port *up, int value) | |||
| 573 | serial_outp(up, UART_DLM, value >> 8 & 0xff); | 568 | serial_outp(up, UART_DLM, value >> 8 & 0xff); |
| 574 | } | 569 | } |
| 575 | 570 | ||
| 576 | #if defined(CONFIG_SERIAL_8250_AU1X00) | 571 | #if defined(CONFIG_MIPS_ALCHEMY) |
| 577 | /* Au1x00 haven't got a standard divisor latch */ | 572 | /* Au1x00 haven't got a standard divisor latch */ |
| 578 | static int serial_dl_read(struct uart_8250_port *up) | 573 | static int serial_dl_read(struct uart_8250_port *up) |
| 579 | { | 574 | { |
| @@ -2596,11 +2591,9 @@ static void serial8250_config_port(struct uart_port *port, int flags) | |||
| 2596 | if (flags & UART_CONFIG_TYPE) | 2591 | if (flags & UART_CONFIG_TYPE) |
| 2597 | autoconfig(up, probeflags); | 2592 | autoconfig(up, probeflags); |
| 2598 | 2593 | ||
| 2599 | #ifdef CONFIG_SERIAL_8250_AU1X00 | ||
| 2600 | /* if access method is AU, it is a 16550 with a quirk */ | 2594 | /* if access method is AU, it is a 16550 with a quirk */ |
| 2601 | if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU) | 2595 | if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU) |
| 2602 | up->bugs |= UART_BUG_NOMSR; | 2596 | up->bugs |= UART_BUG_NOMSR; |
| 2603 | #endif | ||
| 2604 | 2597 | ||
| 2605 | if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) | 2598 | if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) |
| 2606 | autoconfig_irq(up); | 2599 | autoconfig_irq(up); |
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 8b23165bc5dc..e437ce8c1748 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
| @@ -258,14 +258,6 @@ config SERIAL_8250_ACORN | |||
| 258 | system, say Y to this option. The driver can handle 1, 2, or 3 port | 258 | system, say Y to this option. The driver can handle 1, 2, or 3 port |
| 259 | cards. If unsure, say N. | 259 | cards. If unsure, say N. |
| 260 | 260 | ||
| 261 | config SERIAL_8250_AU1X00 | ||
| 262 | bool "Au1x00 serial port support" | ||
| 263 | depends on SERIAL_8250 != n && SOC_AU1X00 | ||
| 264 | help | ||
| 265 | If you have an Au1x00 SOC based board and want to use the serial port, | ||
| 266 | say Y to this option. The driver can handle up to 4 serial ports, | ||
| 267 | depending on the SOC. If unsure, say N. | ||
| 268 | |||
| 269 | config SERIAL_8250_RM9K | 261 | config SERIAL_8250_RM9K |
| 270 | bool "Support for MIPS RM9xxx integrated serial port" | 262 | bool "Support for MIPS RM9xxx integrated serial port" |
| 271 | depends on SERIAL_8250 != n && SERIAL_RM9000 | 263 | depends on SERIAL_8250 != n && SERIAL_RM9000 |
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index b09a638d051f..50441ffe8e38 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c | |||
| @@ -782,7 +782,7 @@ static int pl010_resume(struct amba_device *dev) | |||
| 782 | return 0; | 782 | return 0; |
| 783 | } | 783 | } |
| 784 | 784 | ||
| 785 | static struct amba_id pl010_ids[] __initdata = { | 785 | static struct amba_id pl010_ids[] = { |
| 786 | { | 786 | { |
| 787 | .id = 0x00041010, | 787 | .id = 0x00041010, |
| 788 | .mask = 0x000fffff, | 788 | .mask = 0x000fffff, |
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index eb4cb480b93e..6ca7a44f29c2 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c | |||
| @@ -69,9 +69,12 @@ | |||
| 69 | struct uart_amba_port { | 69 | struct uart_amba_port { |
| 70 | struct uart_port port; | 70 | struct uart_port port; |
| 71 | struct clk *clk; | 71 | struct clk *clk; |
| 72 | unsigned int im; /* interrupt mask */ | 72 | unsigned int im; /* interrupt mask */ |
| 73 | unsigned int old_status; | 73 | unsigned int old_status; |
| 74 | unsigned int ifls; /* vendor-specific */ | 74 | unsigned int ifls; /* vendor-specific */ |
| 75 | unsigned int lcrh_tx; /* vendor-specific */ | ||
| 76 | unsigned int lcrh_rx; /* vendor-specific */ | ||
| 77 | bool oversampling; /* vendor-specific */ | ||
| 75 | bool autorts; | 78 | bool autorts; |
| 76 | }; | 79 | }; |
| 77 | 80 | ||
| @@ -79,16 +82,25 @@ struct uart_amba_port { | |||
| 79 | struct vendor_data { | 82 | struct vendor_data { |
| 80 | unsigned int ifls; | 83 | unsigned int ifls; |
| 81 | unsigned int fifosize; | 84 | unsigned int fifosize; |
| 85 | unsigned int lcrh_tx; | ||
| 86 | unsigned int lcrh_rx; | ||
| 87 | bool oversampling; | ||
| 82 | }; | 88 | }; |
| 83 | 89 | ||
| 84 | static struct vendor_data vendor_arm = { | 90 | static struct vendor_data vendor_arm = { |
| 85 | .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, | 91 | .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, |
| 86 | .fifosize = 16, | 92 | .fifosize = 16, |
| 93 | .lcrh_tx = UART011_LCRH, | ||
| 94 | .lcrh_rx = UART011_LCRH, | ||
| 95 | .oversampling = false, | ||
| 87 | }; | 96 | }; |
| 88 | 97 | ||
| 89 | static struct vendor_data vendor_st = { | 98 | static struct vendor_data vendor_st = { |
| 90 | .ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF, | 99 | .ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF, |
| 91 | .fifosize = 64, | 100 | .fifosize = 64, |
| 101 | .lcrh_tx = ST_UART011_LCRH_TX, | ||
| 102 | .lcrh_rx = ST_UART011_LCRH_RX, | ||
| 103 | .oversampling = true, | ||
| 92 | }; | 104 | }; |
| 93 | 105 | ||
| 94 | static void pl011_stop_tx(struct uart_port *port) | 106 | static void pl011_stop_tx(struct uart_port *port) |
| @@ -327,12 +339,12 @@ static void pl011_break_ctl(struct uart_port *port, int break_state) | |||
| 327 | unsigned int lcr_h; | 339 | unsigned int lcr_h; |
| 328 | 340 | ||
| 329 | spin_lock_irqsave(&uap->port.lock, flags); | 341 | spin_lock_irqsave(&uap->port.lock, flags); |
| 330 | lcr_h = readw(uap->port.membase + UART011_LCRH); | 342 | lcr_h = readw(uap->port.membase + uap->lcrh_tx); |
| 331 | if (break_state == -1) | 343 | if (break_state == -1) |
| 332 | lcr_h |= UART01x_LCRH_BRK; | 344 | lcr_h |= UART01x_LCRH_BRK; |
| 333 | else | 345 | else |
| 334 | lcr_h &= ~UART01x_LCRH_BRK; | 346 | lcr_h &= ~UART01x_LCRH_BRK; |
| 335 | writew(lcr_h, uap->port.membase + UART011_LCRH); | 347 | writew(lcr_h, uap->port.membase + uap->lcrh_tx); |
| 336 | spin_unlock_irqrestore(&uap->port.lock, flags); | 348 | spin_unlock_irqrestore(&uap->port.lock, flags); |
| 337 | } | 349 | } |
| 338 | 350 | ||
| @@ -393,7 +405,17 @@ static int pl011_startup(struct uart_port *port) | |||
| 393 | writew(cr, uap->port.membase + UART011_CR); | 405 | writew(cr, uap->port.membase + UART011_CR); |
| 394 | writew(0, uap->port.membase + UART011_FBRD); | 406 | writew(0, uap->port.membase + UART011_FBRD); |
| 395 | writew(1, uap->port.membase + UART011_IBRD); | 407 | writew(1, uap->port.membase + UART011_IBRD); |
| 396 | writew(0, uap->port.membase + UART011_LCRH); | 408 | writew(0, uap->port.membase + uap->lcrh_rx); |
| 409 | if (uap->lcrh_tx != uap->lcrh_rx) { | ||
| 410 | int i; | ||
| 411 | /* | ||
| 412 | * Wait 10 PCLKs before writing LCRH_TX register, | ||
| 413 | * to get this delay write read only register 10 times | ||
| 414 | */ | ||
| 415 | for (i = 0; i < 10; ++i) | ||
| 416 | writew(0xff, uap->port.membase + UART011_MIS); | ||
| 417 | writew(0, uap->port.membase + uap->lcrh_tx); | ||
| 418 | } | ||
| 397 | writew(0, uap->port.membase + UART01x_DR); | 419 | writew(0, uap->port.membase + UART01x_DR); |
| 398 | while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) | 420 | while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) |
| 399 | barrier(); | 421 | barrier(); |
| @@ -422,10 +444,19 @@ static int pl011_startup(struct uart_port *port) | |||
| 422 | return retval; | 444 | return retval; |
| 423 | } | 445 | } |
| 424 | 446 | ||
| 447 | static void pl011_shutdown_channel(struct uart_amba_port *uap, | ||
| 448 | unsigned int lcrh) | ||
| 449 | { | ||
| 450 | unsigned long val; | ||
| 451 | |||
| 452 | val = readw(uap->port.membase + lcrh); | ||
| 453 | val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN); | ||
| 454 | writew(val, uap->port.membase + lcrh); | ||
| 455 | } | ||
| 456 | |||
| 425 | static void pl011_shutdown(struct uart_port *port) | 457 | static void pl011_shutdown(struct uart_port *port) |
| 426 | { | 458 | { |
| 427 | struct uart_amba_port *uap = (struct uart_amba_port *)port; | 459 | struct uart_amba_port *uap = (struct uart_amba_port *)port; |
| 428 | unsigned long val; | ||
| 429 | 460 | ||
| 430 | /* | 461 | /* |
| 431 | * disable all interrupts | 462 | * disable all interrupts |
| @@ -450,9 +481,9 @@ static void pl011_shutdown(struct uart_port *port) | |||
| 450 | /* | 481 | /* |
| 451 | * disable break condition and fifos | 482 | * disable break condition and fifos |
| 452 | */ | 483 | */ |
| 453 | val = readw(uap->port.membase + UART011_LCRH); | 484 | pl011_shutdown_channel(uap, uap->lcrh_rx); |
| 454 | val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN); | 485 | if (uap->lcrh_rx != uap->lcrh_tx) |
| 455 | writew(val, uap->port.membase + UART011_LCRH); | 486 | pl011_shutdown_channel(uap, uap->lcrh_tx); |
| 456 | 487 | ||
| 457 | /* | 488 | /* |
| 458 | * Shut down the clock producer | 489 | * Shut down the clock producer |
| @@ -472,8 +503,13 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 472 | /* | 503 | /* |
| 473 | * Ask the core to calculate the divisor for us. | 504 | * Ask the core to calculate the divisor for us. |
| 474 | */ | 505 | */ |
| 475 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | 506 | baud = uart_get_baud_rate(port, termios, old, 0, |
| 476 | quot = port->uartclk * 4 / baud; | 507 | port->uartclk/(uap->oversampling ? 8 : 16)); |
| 508 | |||
| 509 | if (baud > port->uartclk/16) | ||
| 510 | quot = DIV_ROUND_CLOSEST(port->uartclk * 8, baud); | ||
| 511 | else | ||
| 512 | quot = DIV_ROUND_CLOSEST(port->uartclk * 4, baud); | ||
| 477 | 513 | ||
| 478 | switch (termios->c_cflag & CSIZE) { | 514 | switch (termios->c_cflag & CSIZE) { |
| 479 | case CS5: | 515 | case CS5: |
| @@ -552,6 +588,13 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 552 | uap->autorts = false; | 588 | uap->autorts = false; |
| 553 | } | 589 | } |
| 554 | 590 | ||
| 591 | if (uap->oversampling) { | ||
| 592 | if (baud > port->uartclk/16) | ||
| 593 | old_cr |= ST_UART011_CR_OVSFACT; | ||
| 594 | else | ||
| 595 | old_cr &= ~ST_UART011_CR_OVSFACT; | ||
| 596 | } | ||
| 597 | |||
| 555 | /* Set baud rate */ | 598 | /* Set baud rate */ |
| 556 | writew(quot & 0x3f, port->membase + UART011_FBRD); | 599 | writew(quot & 0x3f, port->membase + UART011_FBRD); |
| 557 | writew(quot >> 6, port->membase + UART011_IBRD); | 600 | writew(quot >> 6, port->membase + UART011_IBRD); |
| @@ -561,7 +604,17 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 561 | * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L | 604 | * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L |
| 562 | * ----------^----------^----------^----------^----- | 605 | * ----------^----------^----------^----------^----- |
| 563 | */ | 606 | */ |
| 564 | writew(lcr_h, port->membase + UART011_LCRH); | 607 | writew(lcr_h, port->membase + uap->lcrh_rx); |
| 608 | if (uap->lcrh_rx != uap->lcrh_tx) { | ||
| 609 | int i; | ||
| 610 | /* | ||
| 611 | * Wait 10 PCLKs before writing LCRH_TX register, | ||
| 612 | * to get this delay write read only register 10 times | ||
| 613 | */ | ||
| 614 | for (i = 0; i < 10; ++i) | ||
| 615 | writew(0xff, uap->port.membase + UART011_MIS); | ||
| 616 | writew(lcr_h, port->membase + uap->lcrh_tx); | ||
| 617 | } | ||
| 565 | writew(old_cr, port->membase + UART011_CR); | 618 | writew(old_cr, port->membase + UART011_CR); |
| 566 | 619 | ||
| 567 | spin_unlock_irqrestore(&port->lock, flags); | 620 | spin_unlock_irqrestore(&port->lock, flags); |
| @@ -688,7 +741,7 @@ pl011_console_get_options(struct uart_amba_port *uap, int *baud, | |||
| 688 | if (readw(uap->port.membase + UART011_CR) & UART01x_CR_UARTEN) { | 741 | if (readw(uap->port.membase + UART011_CR) & UART01x_CR_UARTEN) { |
| 689 | unsigned int lcr_h, ibrd, fbrd; | 742 | unsigned int lcr_h, ibrd, fbrd; |
| 690 | 743 | ||
| 691 | lcr_h = readw(uap->port.membase + UART011_LCRH); | 744 | lcr_h = readw(uap->port.membase + uap->lcrh_tx); |
| 692 | 745 | ||
| 693 | *parity = 'n'; | 746 | *parity = 'n'; |
| 694 | if (lcr_h & UART01x_LCRH_PEN) { | 747 | if (lcr_h & UART01x_LCRH_PEN) { |
| @@ -707,6 +760,12 @@ pl011_console_get_options(struct uart_amba_port *uap, int *baud, | |||
| 707 | fbrd = readw(uap->port.membase + UART011_FBRD); | 760 | fbrd = readw(uap->port.membase + UART011_FBRD); |
| 708 | 761 | ||
| 709 | *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); | 762 | *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); |
| 763 | |||
| 764 | if (uap->oversampling) { | ||
| 765 | if (readw(uap->port.membase + UART011_CR) | ||
| 766 | & ST_UART011_CR_OVSFACT) | ||
| 767 | *baud *= 2; | ||
| 768 | } | ||
| 710 | } | 769 | } |
| 711 | } | 770 | } |
| 712 | 771 | ||
| @@ -800,6 +859,9 @@ static int pl011_probe(struct amba_device *dev, struct amba_id *id) | |||
| 800 | } | 859 | } |
| 801 | 860 | ||
| 802 | uap->ifls = vendor->ifls; | 861 | uap->ifls = vendor->ifls; |
| 862 | uap->lcrh_rx = vendor->lcrh_rx; | ||
| 863 | uap->lcrh_tx = vendor->lcrh_tx; | ||
| 864 | uap->oversampling = vendor->oversampling; | ||
| 803 | uap->port.dev = &dev->dev; | 865 | uap->port.dev = &dev->dev; |
| 804 | uap->port.mapbase = dev->res.start; | 866 | uap->port.mapbase = dev->res.start; |
| 805 | uap->port.membase = base; | 867 | uap->port.membase = base; |
| @@ -868,7 +930,7 @@ static int pl011_resume(struct amba_device *dev) | |||
| 868 | } | 930 | } |
| 869 | #endif | 931 | #endif |
| 870 | 932 | ||
| 871 | static struct amba_id pl011_ids[] __initdata = { | 933 | static struct amba_id pl011_ids[] = { |
| 872 | { | 934 | { |
| 873 | .id = 0x00041011, | 935 | .id = 0x00041011, |
| 874 | .mask = 0x000fffff, | 936 | .mask = 0x000fffff, |
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index cd6cf575902e..6016179db533 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c | |||
| @@ -852,7 +852,7 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) | |||
| 852 | */ | 852 | */ |
| 853 | cpm_set_smc_fcr(up); | 853 | cpm_set_smc_fcr(up); |
| 854 | 854 | ||
| 855 | /* Using idle charater time requires some additional tuning. */ | 855 | /* Using idle character time requires some additional tuning. */ |
| 856 | out_be16(&up->smc_mrblr, pinfo->rx_fifosize); | 856 | out_be16(&up->smc_mrblr, pinfo->rx_fifosize); |
| 857 | out_be16(&up->smc_maxidl, pinfo->rx_fifosize); | 857 | out_be16(&up->smc_maxidl, pinfo->rx_fifosize); |
| 858 | out_be16(&up->smc_brklen, 0); | 858 | out_be16(&up->smc_brklen, 0); |
diff --git a/drivers/serial/kgdboc.c b/drivers/serial/kgdboc.c index a9a94ae72349..39f9a1adaa75 100644 --- a/drivers/serial/kgdboc.c +++ b/drivers/serial/kgdboc.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/kdb.h> | 17 | #include <linux/kdb.h> |
| 18 | #include <linux/tty.h> | 18 | #include <linux/tty.h> |
| 19 | #include <linux/console.h> | 19 | #include <linux/console.h> |
| 20 | #include <linux/vt_kern.h> | ||
| 20 | 21 | ||
| 21 | #define MAX_CONFIG_LEN 40 | 22 | #define MAX_CONFIG_LEN 40 |
| 22 | 23 | ||
| @@ -31,6 +32,7 @@ static struct kparam_string kps = { | |||
| 31 | .maxlen = MAX_CONFIG_LEN, | 32 | .maxlen = MAX_CONFIG_LEN, |
| 32 | }; | 33 | }; |
| 33 | 34 | ||
| 35 | static int kgdboc_use_kms; /* 1 if we use kernel mode switching */ | ||
| 34 | static struct tty_driver *kgdb_tty_driver; | 36 | static struct tty_driver *kgdb_tty_driver; |
| 35 | static int kgdb_tty_line; | 37 | static int kgdb_tty_line; |
| 36 | 38 | ||
| @@ -104,6 +106,12 @@ static int configure_kgdboc(void) | |||
| 104 | kgdboc_io_ops.is_console = 0; | 106 | kgdboc_io_ops.is_console = 0; |
| 105 | kgdb_tty_driver = NULL; | 107 | kgdb_tty_driver = NULL; |
| 106 | 108 | ||
| 109 | kgdboc_use_kms = 0; | ||
| 110 | if (strncmp(cptr, "kms,", 4) == 0) { | ||
| 111 | cptr += 4; | ||
| 112 | kgdboc_use_kms = 1; | ||
| 113 | } | ||
| 114 | |||
| 107 | if (kgdboc_register_kbd(&cptr)) | 115 | if (kgdboc_register_kbd(&cptr)) |
| 108 | goto do_register; | 116 | goto do_register; |
| 109 | 117 | ||
| @@ -201,8 +209,14 @@ static int param_set_kgdboc_var(const char *kmessage, struct kernel_param *kp) | |||
| 201 | return configure_kgdboc(); | 209 | return configure_kgdboc(); |
| 202 | } | 210 | } |
| 203 | 211 | ||
| 212 | static int dbg_restore_graphics; | ||
| 213 | |||
| 204 | static void kgdboc_pre_exp_handler(void) | 214 | static void kgdboc_pre_exp_handler(void) |
| 205 | { | 215 | { |
| 216 | if (!dbg_restore_graphics && kgdboc_use_kms) { | ||
| 217 | dbg_restore_graphics = 1; | ||
| 218 | con_debug_enter(vc_cons[fg_console].d); | ||
| 219 | } | ||
| 206 | /* Increment the module count when the debugger is active */ | 220 | /* Increment the module count when the debugger is active */ |
| 207 | if (!kgdb_connected) | 221 | if (!kgdb_connected) |
| 208 | try_module_get(THIS_MODULE); | 222 | try_module_get(THIS_MODULE); |
| @@ -213,6 +227,10 @@ static void kgdboc_post_exp_handler(void) | |||
| 213 | /* decrement the module count when the debugger detaches */ | 227 | /* decrement the module count when the debugger detaches */ |
| 214 | if (!kgdb_connected) | 228 | if (!kgdb_connected) |
| 215 | module_put(THIS_MODULE); | 229 | module_put(THIS_MODULE); |
| 230 | if (kgdboc_use_kms && dbg_restore_graphics) { | ||
| 231 | dbg_restore_graphics = 0; | ||
| 232 | con_debug_leave(); | ||
| 233 | } | ||
| 216 | } | 234 | } |
| 217 | 235 | ||
| 218 | static struct kgdb_io kgdboc_io_ops = { | 236 | static struct kgdb_io kgdboc_io_ops = { |
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index 84a35f699016..1a88b363005c 100644 --- a/drivers/serial/mpc52xx_uart.c +++ b/drivers/serial/mpc52xx_uart.c | |||
| @@ -113,7 +113,9 @@ struct psc_ops { | |||
| 113 | unsigned char (*read_char)(struct uart_port *port); | 113 | unsigned char (*read_char)(struct uart_port *port); |
| 114 | void (*cw_disable_ints)(struct uart_port *port); | 114 | void (*cw_disable_ints)(struct uart_port *port); |
| 115 | void (*cw_restore_ints)(struct uart_port *port); | 115 | void (*cw_restore_ints)(struct uart_port *port); |
| 116 | unsigned long (*getuartclk)(void *p); | 116 | unsigned int (*set_baudrate)(struct uart_port *port, |
| 117 | struct ktermios *new, | ||
| 118 | struct ktermios *old); | ||
| 117 | int (*clock)(struct uart_port *port, int enable); | 119 | int (*clock)(struct uart_port *port, int enable); |
| 118 | int (*fifoc_init)(void); | 120 | int (*fifoc_init)(void); |
| 119 | void (*fifoc_uninit)(void); | 121 | void (*fifoc_uninit)(void); |
| @@ -121,6 +123,16 @@ struct psc_ops { | |||
| 121 | irqreturn_t (*handle_irq)(struct uart_port *port); | 123 | irqreturn_t (*handle_irq)(struct uart_port *port); |
| 122 | }; | 124 | }; |
| 123 | 125 | ||
| 126 | /* setting the prescaler and divisor reg is common for all chips */ | ||
| 127 | static inline void mpc52xx_set_divisor(struct mpc52xx_psc __iomem *psc, | ||
| 128 | u16 prescaler, unsigned int divisor) | ||
| 129 | { | ||
| 130 | /* select prescaler */ | ||
| 131 | out_be16(&psc->mpc52xx_psc_clock_select, prescaler); | ||
| 132 | out_8(&psc->ctur, divisor >> 8); | ||
| 133 | out_8(&psc->ctlr, divisor & 0xff); | ||
| 134 | } | ||
| 135 | |||
| 124 | #ifdef CONFIG_PPC_MPC52xx | 136 | #ifdef CONFIG_PPC_MPC52xx |
| 125 | #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1)) | 137 | #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1)) |
| 126 | static void mpc52xx_psc_fifo_init(struct uart_port *port) | 138 | static void mpc52xx_psc_fifo_init(struct uart_port *port) |
| @@ -128,9 +140,6 @@ static void mpc52xx_psc_fifo_init(struct uart_port *port) | |||
| 128 | struct mpc52xx_psc __iomem *psc = PSC(port); | 140 | struct mpc52xx_psc __iomem *psc = PSC(port); |
| 129 | struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port); | 141 | struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port); |
| 130 | 142 | ||
| 131 | /* /32 prescaler */ | ||
| 132 | out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); | ||
| 133 | |||
| 134 | out_8(&fifo->rfcntl, 0x00); | 143 | out_8(&fifo->rfcntl, 0x00); |
| 135 | out_be16(&fifo->rfalarm, 0x1ff); | 144 | out_be16(&fifo->rfalarm, 0x1ff); |
| 136 | out_8(&fifo->tfcntl, 0x07); | 145 | out_8(&fifo->tfcntl, 0x07); |
| @@ -219,15 +228,47 @@ static void mpc52xx_psc_cw_restore_ints(struct uart_port *port) | |||
| 219 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); | 228 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); |
| 220 | } | 229 | } |
| 221 | 230 | ||
| 222 | /* Search for bus-frequency property in this node or a parent */ | 231 | static unsigned int mpc5200_psc_set_baudrate(struct uart_port *port, |
| 223 | static unsigned long mpc52xx_getuartclk(void *p) | 232 | struct ktermios *new, |
| 233 | struct ktermios *old) | ||
| 224 | { | 234 | { |
| 225 | /* | 235 | unsigned int baud; |
| 226 | * 5200 UARTs have a / 32 prescaler | 236 | unsigned int divisor; |
| 227 | * but the generic serial code assumes 16 | 237 | |
| 228 | * so return ipb freq / 2 | 238 | /* The 5200 has a fixed /32 prescaler, uartclk contains the ipb freq */ |
| 229 | */ | 239 | baud = uart_get_baud_rate(port, new, old, |
| 230 | return mpc5xxx_get_bus_frequency(p) / 2; | 240 | port->uartclk / (32 * 0xffff) + 1, |
| 241 | port->uartclk / 32); | ||
| 242 | divisor = (port->uartclk + 16 * baud) / (32 * baud); | ||
| 243 | |||
| 244 | /* enable the /32 prescaler and set the divisor */ | ||
| 245 | mpc52xx_set_divisor(PSC(port), 0xdd00, divisor); | ||
| 246 | return baud; | ||
| 247 | } | ||
| 248 | |||
| 249 | static unsigned int mpc5200b_psc_set_baudrate(struct uart_port *port, | ||
| 250 | struct ktermios *new, | ||
| 251 | struct ktermios *old) | ||
| 252 | { | ||
| 253 | unsigned int baud; | ||
| 254 | unsigned int divisor; | ||
| 255 | u16 prescaler; | ||
| 256 | |||
| 257 | /* The 5200B has a selectable /4 or /32 prescaler, uartclk contains the | ||
| 258 | * ipb freq */ | ||
| 259 | baud = uart_get_baud_rate(port, new, old, | ||
| 260 | port->uartclk / (32 * 0xffff) + 1, | ||
| 261 | port->uartclk / 4); | ||
| 262 | divisor = (port->uartclk + 2 * baud) / (4 * baud); | ||
| 263 | |||
| 264 | /* select the proper prescaler and set the divisor */ | ||
| 265 | if (divisor > 0xffff) { | ||
| 266 | divisor = (divisor + 4) / 8; | ||
| 267 | prescaler = 0xdd00; /* /32 */ | ||
| 268 | } else | ||
| 269 | prescaler = 0xff00; /* /4 */ | ||
| 270 | mpc52xx_set_divisor(PSC(port), prescaler, divisor); | ||
| 271 | return baud; | ||
| 231 | } | 272 | } |
| 232 | 273 | ||
| 233 | static void mpc52xx_psc_get_irq(struct uart_port *port, struct device_node *np) | 274 | static void mpc52xx_psc_get_irq(struct uart_port *port, struct device_node *np) |
| @@ -258,7 +299,28 @@ static struct psc_ops mpc52xx_psc_ops = { | |||
| 258 | .read_char = mpc52xx_psc_read_char, | 299 | .read_char = mpc52xx_psc_read_char, |
| 259 | .cw_disable_ints = mpc52xx_psc_cw_disable_ints, | 300 | .cw_disable_ints = mpc52xx_psc_cw_disable_ints, |
| 260 | .cw_restore_ints = mpc52xx_psc_cw_restore_ints, | 301 | .cw_restore_ints = mpc52xx_psc_cw_restore_ints, |
| 261 | .getuartclk = mpc52xx_getuartclk, | 302 | .set_baudrate = mpc5200_psc_set_baudrate, |
| 303 | .get_irq = mpc52xx_psc_get_irq, | ||
| 304 | .handle_irq = mpc52xx_psc_handle_irq, | ||
| 305 | }; | ||
| 306 | |||
| 307 | static struct psc_ops mpc5200b_psc_ops = { | ||
| 308 | .fifo_init = mpc52xx_psc_fifo_init, | ||
| 309 | .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy, | ||
| 310 | .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy, | ||
| 311 | .rx_rdy = mpc52xx_psc_rx_rdy, | ||
| 312 | .tx_rdy = mpc52xx_psc_tx_rdy, | ||
| 313 | .tx_empty = mpc52xx_psc_tx_empty, | ||
| 314 | .stop_rx = mpc52xx_psc_stop_rx, | ||
| 315 | .start_tx = mpc52xx_psc_start_tx, | ||
| 316 | .stop_tx = mpc52xx_psc_stop_tx, | ||
| 317 | .rx_clr_irq = mpc52xx_psc_rx_clr_irq, | ||
| 318 | .tx_clr_irq = mpc52xx_psc_tx_clr_irq, | ||
| 319 | .write_char = mpc52xx_psc_write_char, | ||
| 320 | .read_char = mpc52xx_psc_read_char, | ||
| 321 | .cw_disable_ints = mpc52xx_psc_cw_disable_ints, | ||
| 322 | .cw_restore_ints = mpc52xx_psc_cw_restore_ints, | ||
| 323 | .set_baudrate = mpc5200b_psc_set_baudrate, | ||
| 262 | .get_irq = mpc52xx_psc_get_irq, | 324 | .get_irq = mpc52xx_psc_get_irq, |
| 263 | .handle_irq = mpc52xx_psc_handle_irq, | 325 | .handle_irq = mpc52xx_psc_handle_irq, |
| 264 | }; | 326 | }; |
| @@ -392,9 +454,35 @@ static void mpc512x_psc_cw_restore_ints(struct uart_port *port) | |||
| 392 | out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f); | 454 | out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f); |
| 393 | } | 455 | } |
| 394 | 456 | ||
| 395 | static unsigned long mpc512x_getuartclk(void *p) | 457 | static unsigned int mpc512x_psc_set_baudrate(struct uart_port *port, |
| 458 | struct ktermios *new, | ||
| 459 | struct ktermios *old) | ||
| 396 | { | 460 | { |
| 397 | return mpc5xxx_get_bus_frequency(p); | 461 | unsigned int baud; |
| 462 | unsigned int divisor; | ||
| 463 | |||
| 464 | /* | ||
| 465 | * The "MPC5121e Microcontroller Reference Manual, Rev. 3" says on | ||
| 466 | * pg. 30-10 that the chip supports a /32 and a /10 prescaler. | ||
| 467 | * Furthermore, it states that "After reset, the prescaler by 10 | ||
| 468 | * for the UART mode is selected", but the reset register value is | ||
| 469 | * 0x0000 which means a /32 prescaler. This is wrong. | ||
| 470 | * | ||
| 471 | * In reality using /32 prescaler doesn't work, as it is not supported! | ||
| 472 | * Use /16 or /10 prescaler, see "MPC5121e Hardware Design Guide", | ||
| 473 | * Chapter 4.1 PSC in UART Mode. | ||
| 474 | * Calculate with a /16 prescaler here. | ||
| 475 | */ | ||
| 476 | |||
| 477 | /* uartclk contains the ips freq */ | ||
| 478 | baud = uart_get_baud_rate(port, new, old, | ||
| 479 | port->uartclk / (16 * 0xffff) + 1, | ||
| 480 | port->uartclk / 16); | ||
| 481 | divisor = (port->uartclk + 8 * baud) / (16 * baud); | ||
| 482 | |||
| 483 | /* enable the /16 prescaler and set the divisor */ | ||
| 484 | mpc52xx_set_divisor(PSC(port), 0xdd00, divisor); | ||
| 485 | return baud; | ||
| 398 | } | 486 | } |
| 399 | 487 | ||
| 400 | /* Init PSC FIFO Controller */ | 488 | /* Init PSC FIFO Controller */ |
| @@ -498,7 +586,7 @@ static struct psc_ops mpc512x_psc_ops = { | |||
| 498 | .read_char = mpc512x_psc_read_char, | 586 | .read_char = mpc512x_psc_read_char, |
| 499 | .cw_disable_ints = mpc512x_psc_cw_disable_ints, | 587 | .cw_disable_ints = mpc512x_psc_cw_disable_ints, |
| 500 | .cw_restore_ints = mpc512x_psc_cw_restore_ints, | 588 | .cw_restore_ints = mpc512x_psc_cw_restore_ints, |
| 501 | .getuartclk = mpc512x_getuartclk, | 589 | .set_baudrate = mpc512x_psc_set_baudrate, |
| 502 | .clock = mpc512x_psc_clock, | 590 | .clock = mpc512x_psc_clock, |
| 503 | .fifoc_init = mpc512x_psc_fifoc_init, | 591 | .fifoc_init = mpc512x_psc_fifoc_init, |
| 504 | .fifoc_uninit = mpc512x_psc_fifoc_uninit, | 592 | .fifoc_uninit = mpc512x_psc_fifoc_uninit, |
| @@ -666,8 +754,8 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new, | |||
| 666 | struct mpc52xx_psc __iomem *psc = PSC(port); | 754 | struct mpc52xx_psc __iomem *psc = PSC(port); |
| 667 | unsigned long flags; | 755 | unsigned long flags; |
| 668 | unsigned char mr1, mr2; | 756 | unsigned char mr1, mr2; |
| 669 | unsigned short ctr; | 757 | unsigned int j; |
| 670 | unsigned int j, baud, quot; | 758 | unsigned int baud; |
| 671 | 759 | ||
| 672 | /* Prepare what we're gonna write */ | 760 | /* Prepare what we're gonna write */ |
| 673 | mr1 = 0; | 761 | mr1 = 0; |
| @@ -704,16 +792,9 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new, | |||
| 704 | mr2 |= MPC52xx_PSC_MODE_TXCTS; | 792 | mr2 |= MPC52xx_PSC_MODE_TXCTS; |
| 705 | } | 793 | } |
| 706 | 794 | ||
| 707 | baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16); | ||
| 708 | quot = uart_get_divisor(port, baud); | ||
| 709 | ctr = quot & 0xffff; | ||
| 710 | |||
| 711 | /* Get the lock */ | 795 | /* Get the lock */ |
| 712 | spin_lock_irqsave(&port->lock, flags); | 796 | spin_lock_irqsave(&port->lock, flags); |
| 713 | 797 | ||
| 714 | /* Update the per-port timeout */ | ||
| 715 | uart_update_timeout(port, new->c_cflag, baud); | ||
| 716 | |||
| 717 | /* Do our best to flush TX & RX, so we don't lose anything */ | 798 | /* Do our best to flush TX & RX, so we don't lose anything */ |
| 718 | /* But we don't wait indefinitely ! */ | 799 | /* But we don't wait indefinitely ! */ |
| 719 | j = 5000000; /* Maximum wait */ | 800 | j = 5000000; /* Maximum wait */ |
| @@ -737,8 +818,10 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new, | |||
| 737 | out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); | 818 | out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); |
| 738 | out_8(&psc->mode, mr1); | 819 | out_8(&psc->mode, mr1); |
| 739 | out_8(&psc->mode, mr2); | 820 | out_8(&psc->mode, mr2); |
| 740 | out_8(&psc->ctur, ctr >> 8); | 821 | baud = psc_ops->set_baudrate(port, new, old); |
| 741 | out_8(&psc->ctlr, ctr & 0xff); | 822 | |
| 823 | /* Update the per-port timeout */ | ||
| 824 | uart_update_timeout(port, new->c_cflag, baud); | ||
| 742 | 825 | ||
| 743 | if (UART_ENABLE_MS(port, new->c_cflag)) | 826 | if (UART_ENABLE_MS(port, new->c_cflag)) |
| 744 | mpc52xx_uart_enable_ms(port); | 827 | mpc52xx_uart_enable_ms(port); |
| @@ -1118,7 +1201,7 @@ mpc52xx_console_setup(struct console *co, char *options) | |||
| 1118 | return ret; | 1201 | return ret; |
| 1119 | } | 1202 | } |
| 1120 | 1203 | ||
| 1121 | uartclk = psc_ops->getuartclk(np); | 1204 | uartclk = mpc5xxx_get_bus_frequency(np); |
| 1122 | if (uartclk == 0) { | 1205 | if (uartclk == 0) { |
| 1123 | pr_debug("Could not find uart clock frequency!\n"); | 1206 | pr_debug("Could not find uart clock frequency!\n"); |
| 1124 | return -EINVAL; | 1207 | return -EINVAL; |
| @@ -1201,6 +1284,7 @@ static struct uart_driver mpc52xx_uart_driver = { | |||
| 1201 | 1284 | ||
| 1202 | static struct of_device_id mpc52xx_uart_of_match[] = { | 1285 | static struct of_device_id mpc52xx_uart_of_match[] = { |
| 1203 | #ifdef CONFIG_PPC_MPC52xx | 1286 | #ifdef CONFIG_PPC_MPC52xx |
| 1287 | { .compatible = "fsl,mpc5200b-psc-uart", .data = &mpc5200b_psc_ops, }, | ||
| 1204 | { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, }, | 1288 | { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, }, |
| 1205 | /* binding used by old lite5200 device trees: */ | 1289 | /* binding used by old lite5200 device trees: */ |
| 1206 | { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, }, | 1290 | { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, }, |
| @@ -1233,7 +1317,10 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match) | |||
| 1233 | pr_debug("Found %s assigned to ttyPSC%x\n", | 1317 | pr_debug("Found %s assigned to ttyPSC%x\n", |
| 1234 | mpc52xx_uart_nodes[idx]->full_name, idx); | 1318 | mpc52xx_uart_nodes[idx]->full_name, idx); |
| 1235 | 1319 | ||
| 1236 | uartclk = psc_ops->getuartclk(op->dev.of_node); | 1320 | /* set the uart clock to the input clock of the psc, the different |
| 1321 | * prescalers are taken into account in the set_baudrate() methods | ||
| 1322 | * of the respective chip */ | ||
| 1323 | uartclk = mpc5xxx_get_bus_frequency(op->dev.of_node); | ||
| 1237 | if (uartclk == 0) { | 1324 | if (uartclk == 0) { |
| 1238 | dev_dbg(&op->dev, "Could not find uart clock frequency!\n"); | 1325 | dev_dbg(&op->dev, "Could not find uart clock frequency!\n"); |
| 1239 | return -EINVAL; | 1326 | return -EINVAL; |
diff --git a/drivers/serial/nwpserial.c b/drivers/serial/nwpserial.c index 3c02fa96f282..e65b0d9202a5 100644 --- a/drivers/serial/nwpserial.c +++ b/drivers/serial/nwpserial.c | |||
| @@ -81,7 +81,7 @@ nwpserial_console_write(struct console *co, const char *s, unsigned int count) | |||
| 81 | 81 | ||
| 82 | uart_console_write(&up->port, s, count, nwpserial_console_putchar); | 82 | uart_console_write(&up->port, s, count, nwpserial_console_putchar); |
| 83 | 83 | ||
| 84 | /* wait for transmitter to become emtpy */ | 84 | /* wait for transmitter to become empty */ |
| 85 | while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0) | 85 | while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0) |
| 86 | cpu_relax(); | 86 | cpu_relax(); |
| 87 | 87 | ||
diff --git a/drivers/serial/sn_console.c b/drivers/serial/sn_console.c index 9794e0cd3dcc..7e5e5efea4e2 100644 --- a/drivers/serial/sn_console.c +++ b/drivers/serial/sn_console.c | |||
| @@ -470,7 +470,7 @@ sn_receive_chars(struct sn_cons_port *port, unsigned long flags) | |||
| 470 | } | 470 | } |
| 471 | 471 | ||
| 472 | if (port->sc_port.state) { | 472 | if (port->sc_port.state) { |
| 473 | /* The serial_core stuffs are initilized, use them */ | 473 | /* The serial_core stuffs are initialized, use them */ |
| 474 | tty = port->sc_port.state->port.tty; | 474 | tty = port->sc_port.state->port.tty; |
| 475 | } | 475 | } |
| 476 | else { | 476 | else { |
| @@ -551,11 +551,11 @@ static void sn_transmit_chars(struct sn_cons_port *port, int raw) | |||
| 551 | BUG_ON(!port->sc_is_asynch); | 551 | BUG_ON(!port->sc_is_asynch); |
| 552 | 552 | ||
| 553 | if (port->sc_port.state) { | 553 | if (port->sc_port.state) { |
| 554 | /* We're initilized, using serial core infrastructure */ | 554 | /* We're initialized, using serial core infrastructure */ |
| 555 | xmit = &port->sc_port.state->xmit; | 555 | xmit = &port->sc_port.state->xmit; |
| 556 | } else { | 556 | } else { |
| 557 | /* Probably sn_sal_switch_to_asynch has been run but serial core isn't | 557 | /* Probably sn_sal_switch_to_asynch has been run but serial core isn't |
| 558 | * initilized yet. Just return. Writes are going through | 558 | * initialized yet. Just return. Writes are going through |
| 559 | * sn_sal_console_write (due to register_console) at this time. | 559 | * sn_sal_console_write (due to register_console) at this time. |
| 560 | */ | 560 | */ |
| 561 | return; | 561 | return; |
diff --git a/drivers/serial/sunhv.c b/drivers/serial/sunhv.c index 890f91742962..a779e22d213e 100644 --- a/drivers/serial/sunhv.c +++ b/drivers/serial/sunhv.c | |||
| @@ -525,7 +525,7 @@ static int __devinit hv_probe(struct of_device *op, const struct of_device_id *m | |||
| 525 | unsigned long minor; | 525 | unsigned long minor; |
| 526 | int err; | 526 | int err; |
| 527 | 527 | ||
| 528 | if (op->irqs[0] == 0xffffffff) | 528 | if (op->archdata.irqs[0] == 0xffffffff) |
| 529 | return -ENODEV; | 529 | return -ENODEV; |
| 530 | 530 | ||
| 531 | port = kzalloc(sizeof(struct uart_port), GFP_KERNEL); | 531 | port = kzalloc(sizeof(struct uart_port), GFP_KERNEL); |
| @@ -557,7 +557,7 @@ static int __devinit hv_probe(struct of_device *op, const struct of_device_id *m | |||
| 557 | 557 | ||
| 558 | port->membase = (unsigned char __iomem *) __pa(port); | 558 | port->membase = (unsigned char __iomem *) __pa(port); |
| 559 | 559 | ||
| 560 | port->irq = op->irqs[0]; | 560 | port->irq = op->archdata.irqs[0]; |
| 561 | 561 | ||
| 562 | port->dev = &op->dev; | 562 | port->dev = &op->dev; |
| 563 | 563 | ||
| @@ -644,12 +644,12 @@ static int __init sunhv_init(void) | |||
| 644 | if (tlb_type != hypervisor) | 644 | if (tlb_type != hypervisor) |
| 645 | return -ENODEV; | 645 | return -ENODEV; |
| 646 | 646 | ||
| 647 | return of_register_driver(&hv_driver, &of_bus_type); | 647 | return of_register_platform_driver(&hv_driver); |
| 648 | } | 648 | } |
| 649 | 649 | ||
| 650 | static void __exit sunhv_exit(void) | 650 | static void __exit sunhv_exit(void) |
| 651 | { | 651 | { |
| 652 | of_unregister_driver(&hv_driver); | 652 | of_unregister_platform_driver(&hv_driver); |
| 653 | } | 653 | } |
| 654 | 654 | ||
| 655 | module_init(sunhv_init); | 655 | module_init(sunhv_init); |
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c index 5e81bc6b48b0..9845fb1cfb1f 100644 --- a/drivers/serial/sunsab.c +++ b/drivers/serial/sunsab.c | |||
| @@ -969,7 +969,7 @@ static int __devinit sunsab_init_one(struct uart_sunsab_port *up, | |||
| 969 | return -ENOMEM; | 969 | return -ENOMEM; |
| 970 | up->regs = (union sab82532_async_regs __iomem *) up->port.membase; | 970 | up->regs = (union sab82532_async_regs __iomem *) up->port.membase; |
| 971 | 971 | ||
| 972 | up->port.irq = op->irqs[0]; | 972 | up->port.irq = op->archdata.irqs[0]; |
| 973 | 973 | ||
| 974 | up->port.fifosize = SAB82532_XMIT_FIFO_SIZE; | 974 | up->port.fifosize = SAB82532_XMIT_FIFO_SIZE; |
| 975 | up->port.iotype = UPIO_MEM; | 975 | up->port.iotype = UPIO_MEM; |
| @@ -1130,12 +1130,12 @@ static int __init sunsab_init(void) | |||
| 1130 | } | 1130 | } |
| 1131 | } | 1131 | } |
| 1132 | 1132 | ||
| 1133 | return of_register_driver(&sab_driver, &of_bus_type); | 1133 | return of_register_platform_driver(&sab_driver); |
| 1134 | } | 1134 | } |
| 1135 | 1135 | ||
| 1136 | static void __exit sunsab_exit(void) | 1136 | static void __exit sunsab_exit(void) |
| 1137 | { | 1137 | { |
| 1138 | of_unregister_driver(&sab_driver); | 1138 | of_unregister_platform_driver(&sab_driver); |
| 1139 | if (sunsab_reg.nr) { | 1139 | if (sunsab_reg.nr) { |
| 1140 | sunserial_unregister_minors(&sunsab_reg, sunsab_reg.nr); | 1140 | sunserial_unregister_minors(&sunsab_reg, sunsab_reg.nr); |
| 1141 | } | 1141 | } |
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c index ffbf4553f665..3cdf74822db5 100644 --- a/drivers/serial/sunsu.c +++ b/drivers/serial/sunsu.c | |||
| @@ -1443,7 +1443,7 @@ static int __devinit su_probe(struct of_device *op, const struct of_device_id *m | |||
| 1443 | return -ENOMEM; | 1443 | return -ENOMEM; |
| 1444 | } | 1444 | } |
| 1445 | 1445 | ||
| 1446 | up->port.irq = op->irqs[0]; | 1446 | up->port.irq = op->archdata.irqs[0]; |
| 1447 | 1447 | ||
| 1448 | up->port.dev = &op->dev; | 1448 | up->port.dev = &op->dev; |
| 1449 | 1449 | ||
| @@ -1586,7 +1586,7 @@ static int __init sunsu_init(void) | |||
| 1586 | return err; | 1586 | return err; |
| 1587 | } | 1587 | } |
| 1588 | 1588 | ||
| 1589 | err = of_register_driver(&su_driver, &of_bus_type); | 1589 | err = of_register_platform_driver(&su_driver); |
| 1590 | if (err && num_uart) | 1590 | if (err && num_uart) |
| 1591 | sunserial_unregister_minors(&sunsu_reg, num_uart); | 1591 | sunserial_unregister_minors(&sunsu_reg, num_uart); |
| 1592 | 1592 | ||
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c index f9a24f4ebb34..d1e6bcb59546 100644 --- a/drivers/serial/sunzilog.c +++ b/drivers/serial/sunzilog.c | |||
| @@ -1426,7 +1426,7 @@ static int __devinit zs_probe(struct of_device *op, const struct of_device_id *m | |||
| 1426 | rp = sunzilog_chip_regs[inst]; | 1426 | rp = sunzilog_chip_regs[inst]; |
| 1427 | 1427 | ||
| 1428 | if (zilog_irq == -1) | 1428 | if (zilog_irq == -1) |
| 1429 | zilog_irq = op->irqs[0]; | 1429 | zilog_irq = op->archdata.irqs[0]; |
| 1430 | 1430 | ||
| 1431 | up = &sunzilog_port_table[inst * 2]; | 1431 | up = &sunzilog_port_table[inst * 2]; |
| 1432 | 1432 | ||
| @@ -1434,7 +1434,7 @@ static int __devinit zs_probe(struct of_device *op, const struct of_device_id *m | |||
| 1434 | up[0].port.mapbase = op->resource[0].start + 0x00; | 1434 | up[0].port.mapbase = op->resource[0].start + 0x00; |
| 1435 | up[0].port.membase = (void __iomem *) &rp->channelA; | 1435 | up[0].port.membase = (void __iomem *) &rp->channelA; |
| 1436 | up[0].port.iotype = UPIO_MEM; | 1436 | up[0].port.iotype = UPIO_MEM; |
| 1437 | up[0].port.irq = op->irqs[0]; | 1437 | up[0].port.irq = op->archdata.irqs[0]; |
| 1438 | up[0].port.uartclk = ZS_CLOCK; | 1438 | up[0].port.uartclk = ZS_CLOCK; |
| 1439 | up[0].port.fifosize = 1; | 1439 | up[0].port.fifosize = 1; |
| 1440 | up[0].port.ops = &sunzilog_pops; | 1440 | up[0].port.ops = &sunzilog_pops; |
| @@ -1451,7 +1451,7 @@ static int __devinit zs_probe(struct of_device *op, const struct of_device_id *m | |||
| 1451 | up[1].port.mapbase = op->resource[0].start + 0x04; | 1451 | up[1].port.mapbase = op->resource[0].start + 0x04; |
| 1452 | up[1].port.membase = (void __iomem *) &rp->channelB; | 1452 | up[1].port.membase = (void __iomem *) &rp->channelB; |
| 1453 | up[1].port.iotype = UPIO_MEM; | 1453 | up[1].port.iotype = UPIO_MEM; |
| 1454 | up[1].port.irq = op->irqs[0]; | 1454 | up[1].port.irq = op->archdata.irqs[0]; |
| 1455 | up[1].port.uartclk = ZS_CLOCK; | 1455 | up[1].port.uartclk = ZS_CLOCK; |
| 1456 | up[1].port.fifosize = 1; | 1456 | up[1].port.fifosize = 1; |
| 1457 | up[1].port.ops = &sunzilog_pops; | 1457 | up[1].port.ops = &sunzilog_pops; |
| @@ -1492,12 +1492,12 @@ static int __devinit zs_probe(struct of_device *op, const struct of_device_id *m | |||
| 1492 | "is a %s\n", | 1492 | "is a %s\n", |
| 1493 | dev_name(&op->dev), | 1493 | dev_name(&op->dev), |
| 1494 | (unsigned long long) up[0].port.mapbase, | 1494 | (unsigned long long) up[0].port.mapbase, |
| 1495 | op->irqs[0], sunzilog_type(&up[0].port)); | 1495 | op->archdata.irqs[0], sunzilog_type(&up[0].port)); |
| 1496 | printk(KERN_INFO "%s: Mouse at MMIO 0x%llx (irq = %d) " | 1496 | printk(KERN_INFO "%s: Mouse at MMIO 0x%llx (irq = %d) " |
| 1497 | "is a %s\n", | 1497 | "is a %s\n", |
| 1498 | dev_name(&op->dev), | 1498 | dev_name(&op->dev), |
| 1499 | (unsigned long long) up[1].port.mapbase, | 1499 | (unsigned long long) up[1].port.mapbase, |
| 1500 | op->irqs[0], sunzilog_type(&up[1].port)); | 1500 | op->archdata.irqs[0], sunzilog_type(&up[1].port)); |
| 1501 | kbm_inst++; | 1501 | kbm_inst++; |
| 1502 | } | 1502 | } |
| 1503 | 1503 | ||
| @@ -1576,7 +1576,7 @@ static int __init sunzilog_init(void) | |||
| 1576 | goto out_free_tables; | 1576 | goto out_free_tables; |
| 1577 | } | 1577 | } |
| 1578 | 1578 | ||
| 1579 | err = of_register_driver(&zs_driver, &of_bus_type); | 1579 | err = of_register_platform_driver(&zs_driver); |
| 1580 | if (err) | 1580 | if (err) |
| 1581 | goto out_unregister_uart; | 1581 | goto out_unregister_uart; |
| 1582 | 1582 | ||
| @@ -1604,7 +1604,7 @@ out: | |||
| 1604 | return err; | 1604 | return err; |
| 1605 | 1605 | ||
| 1606 | out_unregister_driver: | 1606 | out_unregister_driver: |
| 1607 | of_unregister_driver(&zs_driver); | 1607 | of_unregister_platform_driver(&zs_driver); |
| 1608 | 1608 | ||
| 1609 | out_unregister_uart: | 1609 | out_unregister_uart: |
| 1610 | if (num_sunzilog) { | 1610 | if (num_sunzilog) { |
| @@ -1619,7 +1619,7 @@ out_free_tables: | |||
| 1619 | 1619 | ||
| 1620 | static void __exit sunzilog_exit(void) | 1620 | static void __exit sunzilog_exit(void) |
| 1621 | { | 1621 | { |
| 1622 | of_unregister_driver(&zs_driver); | 1622 | of_unregister_platform_driver(&zs_driver); |
| 1623 | 1623 | ||
| 1624 | if (zilog_irq != -1) { | 1624 | if (zilog_irq != -1) { |
| 1625 | struct uart_sunzilog_port *up = sunzilog_irq_chain; | 1625 | struct uart_sunzilog_port *up = sunzilog_irq_chain; |
diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c index 8acccd564378..caf085d3a76a 100644 --- a/drivers/serial/uartlite.c +++ b/drivers/serial/uartlite.c | |||
| @@ -21,6 +21,7 @@ | |||
| 21 | #include <asm/io.h> | 21 | #include <asm/io.h> |
| 22 | #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE)) | 22 | #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE)) |
| 23 | #include <linux/of.h> | 23 | #include <linux/of.h> |
| 24 | #include <linux/of_address.h> | ||
| 24 | #include <linux/of_device.h> | 25 | #include <linux/of_device.h> |
| 25 | #include <linux/of_platform.h> | 26 | #include <linux/of_platform.h> |
| 26 | 27 | ||
