1 files changed, 9 insertions, 4 deletions

diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c
index aa521b8e0d4e..776d4ff06084 100644
--- a/drivers/serial/serial_lh7a40x.c
+++ b/drivers/serial/serial_lh7a40x.c
@@ -145,14 +145,15 @@ lh7a40xuart_rx_chars (struct uart_port* port)
 {
         struct tty_struct* tty = port->info->tty;
         int cbRxMax = 256;      /* (Gross) limit on receive */
-        unsigned int data, flag;/* Received data and status */
+        unsigned int data;      /* Received data and status */
+        unsigned int flag;
 
         while (!(UR (port, UART_R_STATUS) & nRxRdy) && --cbRxMax) {
                 data = UR (port, UART_R_DATA);
                 flag = TTY_NORMAL;
                 ++port->icount.rx;
 
-                if (unlikely(data & RxError)) { /* Quick check, short-circuit */
+                if (unlikely(data & RxError)) {
                         if (data & RxBreak) {
                                 data &= ~(RxFramingError | RxParityError);
                                 ++port->icount.brk;
@@ -303,7 +304,7 @@ static void lh7a40xuart_set_mctrl (struct uart_port* port, unsigned int mctrl)
         /* Note, kernel appears to be setting DTR and RTS on console. */
 
         /* *** FIXME: this deserves more work.  There's some work in
-               tracing all of the IO pins. */
+               tracing all of the IO pins. */
 #if 0
         if( port->mapbase == UART1_PHYS) {
                 gpioRegs_t *gpio = (gpioRegs_t *)IO_ADDRESS(GPIO_PHYS);
@@ -662,9 +663,13 @@ static int __init lh7a40xuart_init(void)
         if (ret == 0) {
                 int i;
 
-                for (i = 0; i < DEV_NR; i++)
+                for (i = 0; i < DEV_NR; i++) {
+                        /* UART3, when used, requires GPIO pin reallocation */
+                        if (lh7a40x_ports[i].port.mapbase == UART3_PHYS)
+                                GPIO_PINMUX |= 1<<3;
                         uart_add_one_port (&lh7a40x_reg,
                                            &lh7a40x_ports[i].port);
+                }
         }
         return ret;
 }