3 files changed, 17 insertions, 9 deletions

diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index b3feb6198d57..abbd146c50d9 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -76,7 +76,6 @@
 #include <linux/of_platform.h>
 
 #include <asm/mpc52xx.h>
-#include <asm/mpc512x.h>
 #include <asm/mpc52xx_psc.h>
 
 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
@@ -254,7 +253,7 @@ static unsigned long mpc52xx_getuartclk(void *p)
          * but the generic serial code assumes 16
          * so return ipb freq / 2
          */
-        return mpc52xx_find_ipb_freq(p) / 2;
+        return mpc5xxx_get_bus_frequency(p) / 2;
 }
 
 static struct psc_ops mpc52xx_psc_ops = {
@@ -391,7 +390,7 @@ static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
 
 static unsigned long mpc512x_getuartclk(void *p)
 {
-        return mpc512x_find_ips_freq(p);
+        return mpc5xxx_get_bus_frequency(p);
 }
 
 static struct psc_ops mpc512x_psc_ops = {
diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c
index 54483cd3529e..02406ba6da1c 100644
--- a/drivers/serial/of_serial.c
+++ b/drivers/serial/of_serial.c
@@ -67,7 +67,7 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev,
         port->type = type;
         port->uartclk = *clk;
         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
-                | UPF_FIXED_PORT;
+                | UPF_FIXED_PORT | UPF_FIXED_TYPE;
         port->dev = &ofdev->dev;
         /* If current-speed was set, then try not to change it. */
         if (spd)
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c
index 7de66c06b05d..e945e780b5c9 100644
--- a/drivers/serial/ucc_uart.c
+++ b/drivers/serial/ucc_uart.c
@@ -681,22 +681,27 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port)
         out_be16(&uccup->rccm, 0xc0ff);
 
         /* Configure the GUMR registers for UART */
-        if (soft_uart)
+        if (soft_uart) {
                 /* Soft-UART requires a 1X multiplier for TX */
                 clrsetbits_be32(&uccp->gumr_l,
                         UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK |
                         UCC_SLOW_GUMR_L_RDCR_MASK,
                         UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_1 |
                         UCC_SLOW_GUMR_L_RDCR_16);
-        else
+
+                clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW,
+                        UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX);
+        } else {
                 clrsetbits_be32(&uccp->gumr_l,
                         UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK |
                         UCC_SLOW_GUMR_L_RDCR_MASK,
                         UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_16 |
                         UCC_SLOW_GUMR_L_RDCR_16);
 
-        clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW,
-                UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX);
+                clrsetbits_be32(&uccp->gumr_h,
+                        UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX,
+                        UCC_SLOW_GUMR_H_RFW);
+        }
 
 #ifdef LOOPBACK
         clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_DIAG_MASK,
@@ -706,7 +711,7 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port)
                 UCC_SLOW_GUMR_H_CDS);
 #endif
 
-        /* Enable rx interrupts  and clear all pending events.  */
+        /* Disable rx interrupts  and clear all pending events.  */
         out_be16(&uccp->uccm, 0);
         out_be16(&uccp->ucce, 0xffff);
         out_be16(&uccp->udsr, 0x7e7e);
@@ -765,6 +770,10 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port)
                 cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num);
                 qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock,
                         QE_CR_PROTOCOL_UNSPECIFIED, 0);
+        } else {
+                cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num);
+                qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock,
+                        QE_CR_PROTOCOL_UART, 0);
         }
 }