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-rw-r--r--drivers/serial/8250_pci.c412
-rw-r--r--drivers/serial/8250_pnp.c7
-rw-r--r--drivers/serial/Kconfig2
-rw-r--r--drivers/serial/bfin_5xx.c15
-rw-r--r--drivers/serial/icom.c14
-rw-r--r--drivers/serial/jsm/jsm_driver.c9
-rw-r--r--drivers/serial/jsm/jsm_tty.c4
-rw-r--r--drivers/serial/ucc_uart.c1
8 files changed, 437 insertions, 27 deletions
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 533f82025adf..7ddff3f55087 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -306,6 +306,63 @@ static void __devexit pci_plx9050_exit(struct pci_dev *dev)
306 } 306 }
307} 307}
308 308
309#define NI8420_INT_ENABLE_REG 0x38
310#define NI8420_INT_ENABLE_BIT 0x2000
311
312static void __devexit pci_ni8420_exit(struct pci_dev *dev)
313{
314 void __iomem *p;
315 unsigned long base, len;
316 unsigned int bar = 0;
317
318 if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) {
319 moan_device("no memory in bar", dev);
320 return;
321 }
322
323 base = pci_resource_start(dev, bar);
324 len = pci_resource_len(dev, bar);
325 p = ioremap_nocache(base, len);
326 if (p == NULL)
327 return;
328
329 /* Disable the CPU Interrupt */
330 writel(readl(p + NI8420_INT_ENABLE_REG) & ~(NI8420_INT_ENABLE_BIT),
331 p + NI8420_INT_ENABLE_REG);
332 iounmap(p);
333}
334
335
336/* MITE registers */
337#define MITE_IOWBSR1 0xc4
338#define MITE_IOWCR1 0xf4
339#define MITE_LCIMR1 0x08
340#define MITE_LCIMR2 0x10
341
342#define MITE_LCIMR2_CLR_CPU_IE (1 << 30)
343
344static void __devexit pci_ni8430_exit(struct pci_dev *dev)
345{
346 void __iomem *p;
347 unsigned long base, len;
348 unsigned int bar = 0;
349
350 if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) {
351 moan_device("no memory in bar", dev);
352 return;
353 }
354
355 base = pci_resource_start(dev, bar);
356 len = pci_resource_len(dev, bar);
357 p = ioremap_nocache(base, len);
358 if (p == NULL)
359 return;
360
361 /* Disable the CPU Interrupt */
362 writel(MITE_LCIMR2_CLR_CPU_IE, p + MITE_LCIMR2);
363 iounmap(p);
364}
365
309/* SBS Technologies Inc. PMC-OCTPRO and P-OCTAL cards */ 366/* SBS Technologies Inc. PMC-OCTPRO and P-OCTAL cards */
310static int 367static int
311sbs_setup(struct serial_private *priv, const struct pciserial_board *board, 368sbs_setup(struct serial_private *priv, const struct pciserial_board *board,
@@ -597,6 +654,108 @@ static int pci_xircom_init(struct pci_dev *dev)
597 return 0; 654 return 0;
598} 655}
599 656
657static int pci_ni8420_init(struct pci_dev *dev)
658{
659 void __iomem *p;
660 unsigned long base, len;
661 unsigned int bar = 0;
662
663 if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) {
664 moan_device("no memory in bar", dev);
665 return 0;
666 }
667
668 base = pci_resource_start(dev, bar);
669 len = pci_resource_len(dev, bar);
670 p = ioremap_nocache(base, len);
671 if (p == NULL)
672 return -ENOMEM;
673
674 /* Enable CPU Interrupt */
675 writel(readl(p + NI8420_INT_ENABLE_REG) | NI8420_INT_ENABLE_BIT,
676 p + NI8420_INT_ENABLE_REG);
677
678 iounmap(p);
679 return 0;
680}
681
682#define MITE_IOWBSR1_WSIZE 0xa
683#define MITE_IOWBSR1_WIN_OFFSET 0x800
684#define MITE_IOWBSR1_WENAB (1 << 7)
685#define MITE_LCIMR1_IO_IE_0 (1 << 24)
686#define MITE_LCIMR2_SET_CPU_IE (1 << 31)
687#define MITE_IOWCR1_RAMSEL_MASK 0xfffffffe
688
689static int pci_ni8430_init(struct pci_dev *dev)
690{
691 void __iomem *p;
692 unsigned long base, len;
693 u32 device_window;
694 unsigned int bar = 0;
695
696 if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM) == 0) {
697 moan_device("no memory in bar", dev);
698 return 0;
699 }
700
701 base = pci_resource_start(dev, bar);
702 len = pci_resource_len(dev, bar);
703 p = ioremap_nocache(base, len);
704 if (p == NULL)
705 return -ENOMEM;
706
707 /* Set device window address and size in BAR0 */
708 device_window = ((base + MITE_IOWBSR1_WIN_OFFSET) & 0xffffff00)
709 | MITE_IOWBSR1_WENAB | MITE_IOWBSR1_WSIZE;
710 writel(device_window, p + MITE_IOWBSR1);
711
712 /* Set window access to go to RAMSEL IO address space */
713 writel((readl(p + MITE_IOWCR1) & MITE_IOWCR1_RAMSEL_MASK),
714 p + MITE_IOWCR1);
715
716 /* Enable IO Bus Interrupt 0 */
717 writel(MITE_LCIMR1_IO_IE_0, p + MITE_LCIMR1);
718
719 /* Enable CPU Interrupt */
720 writel(MITE_LCIMR2_SET_CPU_IE, p + MITE_LCIMR2);
721
722 iounmap(p);
723 return 0;
724}
725
726/* UART Port Control Register */
727#define NI8430_PORTCON 0x0f
728#define NI8430_PORTCON_TXVR_ENABLE (1 << 3)
729
730static int
731pci_ni8430_setup(struct serial_private *priv,
732 const struct pciserial_board *board,
733 struct uart_port *port, int idx)
734{
735 void __iomem *p;
736 unsigned long base, len;
737 unsigned int bar, offset = board->first_offset;
738
739 if (idx >= board->num_ports)
740 return 1;
741
742 bar = FL_GET_BASE(board->flags);
743 offset += idx * board->uart_offset;
744
745 base = pci_resource_start(priv->dev, bar);
746 len = pci_resource_len(priv->dev, bar);
747 p = ioremap_nocache(base, len);
748
749 /* enable the transciever */
750 writeb(readb(p + offset + NI8430_PORTCON) | NI8430_PORTCON_TXVR_ENABLE,
751 p + offset + NI8430_PORTCON);
752
753 iounmap(p);
754
755 return setup_port(priv, port, bar, offset, board->reg_shift);
756}
757
758
600static int pci_netmos_init(struct pci_dev *dev) 759static int pci_netmos_init(struct pci_dev *dev)
601{ 760{
602 /* subdevice 0x00PS means <P> parallel, <S> serial */ 761 /* subdevice 0x00PS means <P> parallel, <S> serial */
@@ -913,6 +1072,126 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
913 .exit = __devexit_p(pci_ite887x_exit), 1072 .exit = __devexit_p(pci_ite887x_exit),
914 }, 1073 },
915 /* 1074 /*
1075 * National Instruments
1076 */
1077 {
1078 .vendor = PCI_VENDOR_ID_NI,
1079 .device = PCI_DEVICE_ID_NI_PCI23216,
1080 .subvendor = PCI_ANY_ID,
1081 .subdevice = PCI_ANY_ID,
1082 .init = pci_ni8420_init,
1083 .setup = pci_default_setup,
1084 .exit = __devexit_p(pci_ni8420_exit),
1085 },
1086 {
1087 .vendor = PCI_VENDOR_ID_NI,
1088 .device = PCI_DEVICE_ID_NI_PCI2328,
1089 .subvendor = PCI_ANY_ID,
1090 .subdevice = PCI_ANY_ID,
1091 .init = pci_ni8420_init,
1092 .setup = pci_default_setup,
1093 .exit = __devexit_p(pci_ni8420_exit),
1094 },
1095 {
1096 .vendor = PCI_VENDOR_ID_NI,
1097 .device = PCI_DEVICE_ID_NI_PCI2324,
1098 .subvendor = PCI_ANY_ID,
1099 .subdevice = PCI_ANY_ID,
1100 .init = pci_ni8420_init,
1101 .setup = pci_default_setup,
1102 .exit = __devexit_p(pci_ni8420_exit),
1103 },
1104 {
1105 .vendor = PCI_VENDOR_ID_NI,
1106 .device = PCI_DEVICE_ID_NI_PCI2322,
1107 .subvendor = PCI_ANY_ID,
1108 .subdevice = PCI_ANY_ID,
1109 .init = pci_ni8420_init,
1110 .setup = pci_default_setup,
1111 .exit = __devexit_p(pci_ni8420_exit),
1112 },
1113 {
1114 .vendor = PCI_VENDOR_ID_NI,
1115 .device = PCI_DEVICE_ID_NI_PCI2324I,
1116 .subvendor = PCI_ANY_ID,
1117 .subdevice = PCI_ANY_ID,
1118 .init = pci_ni8420_init,
1119 .setup = pci_default_setup,
1120 .exit = __devexit_p(pci_ni8420_exit),
1121 },
1122 {
1123 .vendor = PCI_VENDOR_ID_NI,
1124 .device = PCI_DEVICE_ID_NI_PCI2322I,
1125 .subvendor = PCI_ANY_ID,
1126 .subdevice = PCI_ANY_ID,
1127 .init = pci_ni8420_init,
1128 .setup = pci_default_setup,
1129 .exit = __devexit_p(pci_ni8420_exit),
1130 },
1131 {
1132 .vendor = PCI_VENDOR_ID_NI,
1133 .device = PCI_DEVICE_ID_NI_PXI8420_23216,
1134 .subvendor = PCI_ANY_ID,
1135 .subdevice = PCI_ANY_ID,
1136 .init = pci_ni8420_init,
1137 .setup = pci_default_setup,
1138 .exit = __devexit_p(pci_ni8420_exit),
1139 },
1140 {
1141 .vendor = PCI_VENDOR_ID_NI,
1142 .device = PCI_DEVICE_ID_NI_PXI8420_2328,
1143 .subvendor = PCI_ANY_ID,
1144 .subdevice = PCI_ANY_ID,
1145 .init = pci_ni8420_init,
1146 .setup = pci_default_setup,
1147 .exit = __devexit_p(pci_ni8420_exit),
1148 },
1149 {
1150 .vendor = PCI_VENDOR_ID_NI,
1151 .device = PCI_DEVICE_ID_NI_PXI8420_2324,
1152 .subvendor = PCI_ANY_ID,
1153 .subdevice = PCI_ANY_ID,
1154 .init = pci_ni8420_init,
1155 .setup = pci_default_setup,
1156 .exit = __devexit_p(pci_ni8420_exit),
1157 },
1158 {
1159 .vendor = PCI_VENDOR_ID_NI,
1160 .device = PCI_DEVICE_ID_NI_PXI8420_2322,
1161 .subvendor = PCI_ANY_ID,
1162 .subdevice = PCI_ANY_ID,
1163 .init = pci_ni8420_init,
1164 .setup = pci_default_setup,
1165 .exit = __devexit_p(pci_ni8420_exit),
1166 },
1167 {
1168 .vendor = PCI_VENDOR_ID_NI,
1169 .device = PCI_DEVICE_ID_NI_PXI8422_2324,
1170 .subvendor = PCI_ANY_ID,
1171 .subdevice = PCI_ANY_ID,
1172 .init = pci_ni8420_init,
1173 .setup = pci_default_setup,
1174 .exit = __devexit_p(pci_ni8420_exit),
1175 },
1176 {
1177 .vendor = PCI_VENDOR_ID_NI,
1178 .device = PCI_DEVICE_ID_NI_PXI8422_2322,
1179 .subvendor = PCI_ANY_ID,
1180 .subdevice = PCI_ANY_ID,
1181 .init = pci_ni8420_init,
1182 .setup = pci_default_setup,
1183 .exit = __devexit_p(pci_ni8420_exit),
1184 },
1185 {
1186 .vendor = PCI_VENDOR_ID_NI,
1187 .device = PCI_ANY_ID,
1188 .subvendor = PCI_ANY_ID,
1189 .subdevice = PCI_ANY_ID,
1190 .init = pci_ni8430_init,
1191 .setup = pci_ni8430_setup,
1192 .exit = __devexit_p(pci_ni8430_exit),
1193 },
1194 /*
916 * Panacom 1195 * Panacom
917 */ 1196 */
918 { 1197 {
@@ -1216,6 +1495,7 @@ enum pci_board_num_t {
1216 pbn_b1_2_115200, 1495 pbn_b1_2_115200,
1217 pbn_b1_4_115200, 1496 pbn_b1_4_115200,
1218 pbn_b1_8_115200, 1497 pbn_b1_8_115200,
1498 pbn_b1_16_115200,
1219 1499
1220 pbn_b1_1_921600, 1500 pbn_b1_1_921600,
1221 pbn_b1_2_921600, 1501 pbn_b1_2_921600,
@@ -1225,6 +1505,9 @@ enum pci_board_num_t {
1225 pbn_b1_2_1250000, 1505 pbn_b1_2_1250000,
1226 1506
1227 pbn_b1_bt_1_115200, 1507 pbn_b1_bt_1_115200,
1508 pbn_b1_bt_2_115200,
1509 pbn_b1_bt_4_115200,
1510
1228 pbn_b1_bt_2_921600, 1511 pbn_b1_bt_2_921600,
1229 1512
1230 pbn_b1_1_1382400, 1513 pbn_b1_1_1382400,
@@ -1280,6 +1563,10 @@ enum pci_board_num_t {
1280 pbn_exar_XR17C154, 1563 pbn_exar_XR17C154,
1281 pbn_exar_XR17C158, 1564 pbn_exar_XR17C158,
1282 pbn_pasemi_1682M, 1565 pbn_pasemi_1682M,
1566 pbn_ni8430_2,
1567 pbn_ni8430_4,
1568 pbn_ni8430_8,
1569 pbn_ni8430_16,
1283}; 1570};
1284 1571
1285/* 1572/*
@@ -1487,6 +1774,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1487 .base_baud = 115200, 1774 .base_baud = 115200,
1488 .uart_offset = 8, 1775 .uart_offset = 8,
1489 }, 1776 },
1777 [pbn_b1_16_115200] = {
1778 .flags = FL_BASE1,
1779 .num_ports = 16,
1780 .base_baud = 115200,
1781 .uart_offset = 8,
1782 },
1490 1783
1491 [pbn_b1_1_921600] = { 1784 [pbn_b1_1_921600] = {
1492 .flags = FL_BASE1, 1785 .flags = FL_BASE1,
@@ -1525,6 +1818,18 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1525 .base_baud = 115200, 1818 .base_baud = 115200,
1526 .uart_offset = 8, 1819 .uart_offset = 8,
1527 }, 1820 },
1821 [pbn_b1_bt_2_115200] = {
1822 .flags = FL_BASE1|FL_BASE_BARS,
1823 .num_ports = 2,
1824 .base_baud = 115200,
1825 .uart_offset = 8,
1826 },
1827 [pbn_b1_bt_4_115200] = {
1828 .flags = FL_BASE1|FL_BASE_BARS,
1829 .num_ports = 4,
1830 .base_baud = 115200,
1831 .uart_offset = 8,
1832 },
1528 1833
1529 [pbn_b1_bt_2_921600] = { 1834 [pbn_b1_bt_2_921600] = {
1530 .flags = FL_BASE1|FL_BASE_BARS, 1835 .flags = FL_BASE1|FL_BASE_BARS,
@@ -1850,6 +2155,37 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1850 .num_ports = 1, 2155 .num_ports = 1,
1851 .base_baud = 8333333, 2156 .base_baud = 8333333,
1852 }, 2157 },
2158 /*
2159 * National Instruments 843x
2160 */
2161 [pbn_ni8430_16] = {
2162 .flags = FL_BASE0,
2163 .num_ports = 16,
2164 .base_baud = 3686400,
2165 .uart_offset = 0x10,
2166 .first_offset = 0x800,
2167 },
2168 [pbn_ni8430_8] = {
2169 .flags = FL_BASE0,
2170 .num_ports = 8,
2171 .base_baud = 3686400,
2172 .uart_offset = 0x10,
2173 .first_offset = 0x800,
2174 },
2175 [pbn_ni8430_4] = {
2176 .flags = FL_BASE0,
2177 .num_ports = 4,
2178 .base_baud = 3686400,
2179 .uart_offset = 0x10,
2180 .first_offset = 0x800,
2181 },
2182 [pbn_ni8430_2] = {
2183 .flags = FL_BASE0,
2184 .num_ports = 2,
2185 .base_baud = 3686400,
2186 .uart_offset = 0x10,
2187 .first_offset = 0x800,
2188 },
1853}; 2189};
1854 2190
1855static const struct pci_device_id softmodem_blacklist[] = { 2191static const struct pci_device_id softmodem_blacklist[] = {
@@ -3052,6 +3388,82 @@ static struct pci_device_id serial_pci_tbl[] = {
3052 pbn_pasemi_1682M }, 3388 pbn_pasemi_1682M },
3053 3389
3054 /* 3390 /*
3391 * National Instruments
3392 */
3393 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI23216,
3394 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3395 pbn_b1_16_115200 },
3396 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI2328,
3397 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3398 pbn_b1_8_115200 },
3399 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI2324,
3400 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3401 pbn_b1_bt_4_115200 },
3402 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI2322,
3403 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3404 pbn_b1_bt_2_115200 },
3405 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI2324I,
3406 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3407 pbn_b1_bt_4_115200 },
3408 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI2322I,
3409 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3410 pbn_b1_bt_2_115200 },
3411 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8420_23216,
3412 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3413 pbn_b1_16_115200 },
3414 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8420_2328,
3415 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3416 pbn_b1_8_115200 },
3417 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8420_2324,
3418 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3419 pbn_b1_bt_4_115200 },
3420 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8420_2322,
3421 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3422 pbn_b1_bt_2_115200 },
3423 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8422_2324,
3424 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3425 pbn_b1_bt_4_115200 },
3426 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8422_2322,
3427 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3428 pbn_b1_bt_2_115200 },
3429 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8430_2322,
3430 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3431 pbn_ni8430_2 },
3432 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI8430_2322,
3433 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3434 pbn_ni8430_2 },
3435 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8430_2324,
3436 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3437 pbn_ni8430_4 },
3438 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI8430_2324,
3439 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3440 pbn_ni8430_4 },
3441 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8430_2328,
3442 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3443 pbn_ni8430_8 },
3444 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI8430_2328,
3445 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3446 pbn_ni8430_8 },
3447 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8430_23216,
3448 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3449 pbn_ni8430_16 },
3450 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI8430_23216,
3451 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3452 pbn_ni8430_16 },
3453 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8432_2322,
3454 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3455 pbn_ni8430_2 },
3456 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI8432_2322,
3457 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3458 pbn_ni8430_2 },
3459 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8432_2324,
3460 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3461 pbn_ni8430_4 },
3462 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI8432_2324,
3463 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3464 pbn_ni8430_4 },
3465
3466 /*
3055 * ADDI-DATA GmbH communication cards <info@addi-data.com> 3467 * ADDI-DATA GmbH communication cards <info@addi-data.com>
3056 */ 3468 */
3057 { PCI_VENDOR_ID_ADDIDATA, 3469 { PCI_VENDOR_ID_ADDIDATA,
diff --git a/drivers/serial/8250_pnp.c b/drivers/serial/8250_pnp.c
index bbcfc26a3b6d..d71dfe398940 100644
--- a/drivers/serial/8250_pnp.c
+++ b/drivers/serial/8250_pnp.c
@@ -333,6 +333,10 @@ static const struct pnp_device_id pnp_dev_table[] = {
333 { "WACF006", 0 }, 333 { "WACF006", 0 },
334 { "WACF007", 0 }, 334 { "WACF007", 0 },
335 { "WACF008", 0 }, 335 { "WACF008", 0 },
336 { "WACF009", 0 },
337 { "WACF00A", 0 },
338 { "WACF00B", 0 },
339 { "WACF00C", 0 },
336 /* Compaq touchscreen */ 340 /* Compaq touchscreen */
337 { "FPI2002", 0 }, 341 { "FPI2002", 0 },
338 /* Fujitsu Stylistic touchscreens */ 342 /* Fujitsu Stylistic touchscreens */
@@ -346,8 +350,9 @@ static const struct pnp_device_id pnp_dev_table[] = {
346 { "FUJ02B8", 0 }, 350 { "FUJ02B8", 0 },
347 { "FUJ02B9", 0 }, 351 { "FUJ02B9", 0 },
348 { "FUJ02BC", 0 }, 352 { "FUJ02BC", 0 },
349 /* Fujitsu Wacom Tablet PC devices */ 353 /* Fujitsu Wacom Tablet PC device */
350 { "FUJ02E5", 0 }, 354 { "FUJ02E5", 0 },
355 /* Fujitsu P-series tablet PC device */
351 { "FUJ02E6", 0 }, 356 { "FUJ02E6", 0 },
352 /* 357 /*
353 * LG C1 EXPRESS DUAL (C1-PB11A3) touch screen (actually a FUJ02E6 in 358 * LG C1 EXPRESS DUAL (C1-PB11A3) touch screen (actually a FUJ02E6 in
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index aa9d3a4c2d50..07c03b9eb126 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -770,7 +770,7 @@ config UART1_RTS_PIN
770 770
771config SERIAL_BFIN_UART2 771config SERIAL_BFIN_UART2
772 bool "Enable UART2" 772 bool "Enable UART2"
773 depends on SERIAL_BFIN && (BF54x) 773 depends on SERIAL_BFIN && (BF54x || BF538 || BF539)
774 help 774 help
775 Enable UART2 775 Enable UART2
776 776
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index 318d69dce8e1..f9b5a72e261a 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -174,10 +174,10 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
174 return; 174 return;
175 } 175 }
176 176
177 if (!uart->port.info || !uart->port.info->tty) 177 if (!uart->port.info || !uart->port.info->port.tty)
178 return; 178 return;
179#endif 179#endif
180 tty = uart->port.info->tty; 180 tty = uart->port.info->port.tty;
181 181
182 if (ANOMALY_05000363) { 182 if (ANOMALY_05000363) {
183 /* The BF533 (and BF561) family of processors have a nice anomaly 183 /* The BF533 (and BF561) family of processors have a nice anomaly
@@ -401,9 +401,11 @@ static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
401 else 401 else
402 flg = TTY_NORMAL; 402 flg = TTY_NORMAL;
403 403
404 for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) { 404 for (i = uart->rx_dma_buf.tail; ; i++) {
405 if (i >= UART_XMIT_SIZE) 405 if (i >= UART_XMIT_SIZE)
406 i = 0; 406 i = 0;
407 if (i == uart->rx_dma_buf.head)
408 break;
407 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i])) 409 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
408 uart_insert_char(&uart->port, status, OE, 410 uart_insert_char(&uart->port, status, OE,
409 uart->rx_dma_buf.buf[i], flg); 411 uart->rx_dma_buf.buf[i], flg);
@@ -415,7 +417,8 @@ static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
415 417
416void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart) 418void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
417{ 419{
418 int x_pos, pos, flags; 420 int x_pos, pos;
421 unsigned long flags;
419 422
420 spin_lock_irqsave(&uart->port.lock, flags); 423 spin_lock_irqsave(&uart->port.lock, flags);
421 424
@@ -757,7 +760,7 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
757 } 760 }
758 761
759 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 762 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
760 quot = uart_get_divisor(port, baud); 763 quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
761 spin_lock_irqsave(&uart->port.lock, flags); 764 spin_lock_irqsave(&uart->port.lock, flags);
762 765
763 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15); 766 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
@@ -1088,7 +1091,7 @@ static void
1088bfin_serial_console_write(struct console *co, const char *s, unsigned int count) 1091bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1089{ 1092{
1090 struct bfin_serial_port *uart = &bfin_serial_ports[co->index]; 1093 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1091 int flags = 0; 1094 unsigned long flags;
1092 1095
1093 spin_lock_irqsave(&uart->port.lock, flags); 1096 spin_lock_irqsave(&uart->port.lock, flags);
1094 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar); 1097 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
diff --git a/drivers/serial/icom.c b/drivers/serial/icom.c
index 2b7531d9f6ab..6579e2be1dd1 100644
--- a/drivers/serial/icom.c
+++ b/drivers/serial/icom.c
@@ -1098,7 +1098,6 @@ static void icom_set_termios(struct uart_port *port,
1098{ 1098{
1099 int baud; 1099 int baud;
1100 unsigned cflag, iflag; 1100 unsigned cflag, iflag;
1101 int bits;
1102 char new_config2; 1101 char new_config2;
1103 char new_config3 = 0; 1102 char new_config3 = 0;
1104 char tmp_byte; 1103 char tmp_byte;
@@ -1119,34 +1118,27 @@ static void icom_set_termios(struct uart_port *port,
1119 switch (cflag & CSIZE) { 1118 switch (cflag & CSIZE) {
1120 case CS5: /* 5 bits/char */ 1119 case CS5: /* 5 bits/char */
1121 new_config2 |= ICOM_ACFG_5BPC; 1120 new_config2 |= ICOM_ACFG_5BPC;
1122 bits = 7;
1123 break; 1121 break;
1124 case CS6: /* 6 bits/char */ 1122 case CS6: /* 6 bits/char */
1125 new_config2 |= ICOM_ACFG_6BPC; 1123 new_config2 |= ICOM_ACFG_6BPC;
1126 bits = 8;
1127 break; 1124 break;
1128 case CS7: /* 7 bits/char */ 1125 case CS7: /* 7 bits/char */
1129 new_config2 |= ICOM_ACFG_7BPC; 1126 new_config2 |= ICOM_ACFG_7BPC;
1130 bits = 9;
1131 break; 1127 break;
1132 case CS8: /* 8 bits/char */ 1128 case CS8: /* 8 bits/char */
1133 new_config2 |= ICOM_ACFG_8BPC; 1129 new_config2 |= ICOM_ACFG_8BPC;
1134 bits = 10;
1135 break; 1130 break;
1136 default: 1131 default:
1137 bits = 10;
1138 break; 1132 break;
1139 } 1133 }
1140 if (cflag & CSTOPB) { 1134 if (cflag & CSTOPB) {
1141 /* 2 stop bits */ 1135 /* 2 stop bits */
1142 new_config2 |= ICOM_ACFG_2STOP_BIT; 1136 new_config2 |= ICOM_ACFG_2STOP_BIT;
1143 bits++;
1144 } 1137 }
1145 if (cflag & PARENB) { 1138 if (cflag & PARENB) {
1146 /* parity bit enabled */ 1139 /* parity bit enabled */
1147 new_config2 |= ICOM_ACFG_PARITY_ENAB; 1140 new_config2 |= ICOM_ACFG_PARITY_ENAB;
1148 trace(ICOM_PORT, "PARENB", 0); 1141 trace(ICOM_PORT, "PARENB", 0);
1149 bits++;
1150 } 1142 }
1151 if (cflag & PARODD) { 1143 if (cflag & PARODD) {
1152 /* odd parity */ 1144 /* odd parity */
@@ -1322,7 +1314,6 @@ static struct uart_driver icom_uart_driver = {
1322static int __devinit icom_init_ports(struct icom_adapter *icom_adapter) 1314static int __devinit icom_init_ports(struct icom_adapter *icom_adapter)
1323{ 1315{
1324 u32 subsystem_id = icom_adapter->subsystem_id; 1316 u32 subsystem_id = icom_adapter->subsystem_id;
1325 int retval = 0;
1326 int i; 1317 int i;
1327 struct icom_port *icom_port; 1318 struct icom_port *icom_port;
1328 1319
@@ -1368,7 +1359,7 @@ static int __devinit icom_init_ports(struct icom_adapter *icom_adapter)
1368 } 1359 }
1369 } 1360 }
1370 1361
1371 return retval; 1362 return 0;
1372} 1363}
1373 1364
1374static void icom_port_active(struct icom_port *icom_port, struct icom_adapter *icom_adapter, int port_num) 1365static void icom_port_active(struct icom_port *icom_port, struct icom_adapter *icom_adapter, int port_num)
@@ -1391,7 +1382,6 @@ static int __devinit icom_load_ports(struct icom_adapter *icom_adapter)
1391{ 1382{
1392 struct icom_port *icom_port; 1383 struct icom_port *icom_port;
1393 int port_num; 1384 int port_num;
1394 int retval;
1395 1385
1396 for (port_num = 0; port_num < icom_adapter->numb_ports; port_num++) { 1386 for (port_num = 0; port_num < icom_adapter->numb_ports; port_num++) {
1397 1387
@@ -1405,7 +1395,7 @@ static int __devinit icom_load_ports(struct icom_adapter *icom_adapter)
1405 icom_port->adapter = icom_adapter; 1395 icom_port->adapter = icom_adapter;
1406 1396
1407 /* get port memory */ 1397 /* get port memory */
1408 if ((retval = get_port_memory(icom_port)) != 0) { 1398 if (get_port_memory(icom_port) != 0) {
1409 dev_err(&icom_port->adapter->pci_dev->dev, 1399 dev_err(&icom_port->adapter->pci_dev->dev,
1410 "Memory allocation for port FAILED\n"); 1400 "Memory allocation for port FAILED\n");
1411 } 1401 }
diff --git a/drivers/serial/jsm/jsm_driver.c b/drivers/serial/jsm/jsm_driver.c
index ac79cbe4c2cf..d2d32a198629 100644
--- a/drivers/serial/jsm/jsm_driver.c
+++ b/drivers/serial/jsm/jsm_driver.c
@@ -52,12 +52,11 @@ int jsm_debug;
52module_param(jsm_debug, int, 0); 52module_param(jsm_debug, int, 0);
53MODULE_PARM_DESC(jsm_debug, "Driver debugging level"); 53MODULE_PARM_DESC(jsm_debug, "Driver debugging level");
54 54
55static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) 55static int __devinit jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
56{ 56{
57 int rc = 0; 57 int rc = 0;
58 struct jsm_board *brd; 58 struct jsm_board *brd;
59 static int adapter_count = 0; 59 static int adapter_count = 0;
60 int retval;
61 60
62 rc = pci_enable_device(pdev); 61 rc = pci_enable_device(pdev);
63 if (rc) { 62 if (rc) {
@@ -134,7 +133,7 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
134 rc = jsm_tty_init(brd); 133 rc = jsm_tty_init(brd);
135 if (rc < 0) { 134 if (rc < 0) {
136 dev_err(&pdev->dev, "Can't init tty devices (%d)\n", rc); 135 dev_err(&pdev->dev, "Can't init tty devices (%d)\n", rc);
137 retval = -ENXIO; 136 rc = -ENXIO;
138 goto out_free_irq; 137 goto out_free_irq;
139 } 138 }
140 139
@@ -142,7 +141,7 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
142 if (rc < 0) { 141 if (rc < 0) {
143 /* XXX: leaking all resources from jsm_tty_init here! */ 142 /* XXX: leaking all resources from jsm_tty_init here! */
144 dev_err(&pdev->dev, "Can't init uart port (%d)\n", rc); 143 dev_err(&pdev->dev, "Can't init uart port (%d)\n", rc);
145 retval = -ENXIO; 144 rc = -ENXIO;
146 goto out_free_irq; 145 goto out_free_irq;
147 } 146 }
148 147
@@ -161,7 +160,7 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
161 /* XXX: leaking all resources from jsm_tty_init and 160 /* XXX: leaking all resources from jsm_tty_init and
162 jsm_uart_port_init here! */ 161 jsm_uart_port_init here! */
163 dev_err(&pdev->dev, "memory allocation for flipbuf failed\n"); 162 dev_err(&pdev->dev, "memory allocation for flipbuf failed\n");
164 retval = -ENOMEM; 163 rc = -ENOMEM;
165 goto out_free_irq; 164 goto out_free_irq;
166 } 165 }
167 166
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c
index 324c74d2f666..330696309f76 100644
--- a/drivers/serial/jsm/jsm_tty.c
+++ b/drivers/serial/jsm/jsm_tty.c
@@ -367,7 +367,7 @@ static struct uart_ops jsm_ops = {
367 * Init the tty subsystem. Called once per board after board has been 367 * Init the tty subsystem. Called once per board after board has been
368 * downloaded and init'ed. 368 * downloaded and init'ed.
369 */ 369 */
370int jsm_tty_init(struct jsm_board *brd) 370int __devinit jsm_tty_init(struct jsm_board *brd)
371{ 371{
372 int i; 372 int i;
373 void __iomem *vaddr; 373 void __iomem *vaddr;
@@ -431,7 +431,7 @@ int jsm_tty_init(struct jsm_board *brd)
431 return 0; 431 return 0;
432} 432}
433 433
434int jsm_uart_port_init(struct jsm_board *brd) 434int __devinit jsm_uart_port_init(struct jsm_board *brd)
435{ 435{
436 int i; 436 int i;
437 struct jsm_channel *ch; 437 struct jsm_channel *ch;
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c
index 315a9333ca3c..7de66c06b05d 100644
--- a/drivers/serial/ucc_uart.c
+++ b/drivers/serial/ucc_uart.c
@@ -1274,6 +1274,7 @@ static int ucc_uart_probe(struct of_device *ofdev,
1274 if (!iprop) { 1274 if (!iprop) {
1275 iprop = of_get_property(np, "device-id", NULL); 1275 iprop = of_get_property(np, "device-id", NULL);
1276 if (!iprop) { 1276 if (!iprop) {
1277 kfree(qe_port);
1277 dev_err(&ofdev->dev, "UCC is unspecified in " 1278 dev_err(&ofdev->dev, "UCC is unspecified in "
1278 "device tree\n"); 1279 "device tree\n");
1279 return -EINVAL; 1280 return -EINVAL;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 01:18:31 -0500