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-rw-r--r--drivers/serial/sh-sci.c43
-rw-r--r--drivers/serial/sh-sci.h4
2 files changed, 16 insertions, 31 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index f5aebc9f27e7..5bb571548558 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -78,7 +78,7 @@ struct sci_port {
78 struct timer_list break_timer; 78 struct timer_list break_timer;
79 int break_flag; 79 int break_flag;
80 80
81#ifdef CONFIG_SUPERH 81#ifdef CONFIG_HAVE_CLK
82 /* Port clock */ 82 /* Port clock */
83 struct clk *clk; 83 struct clk *clk;
84#endif 84#endif
@@ -831,7 +831,7 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
831 return IRQ_HANDLED; 831 return IRQ_HANDLED;
832} 832}
833 833
834#ifdef CONFIG_CPU_FREQ 834#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
835/* 835/*
836 * Here we define a transistion notifier so that we can update all of our 836 * Here we define a transistion notifier so that we can update all of our
837 * ports' baud rate when the peripheral clock changes. 837 * ports' baud rate when the peripheral clock changes.
@@ -860,7 +860,7 @@ static int sci_notifier(struct notifier_block *self,
860 * Clean this up later.. 860 * Clean this up later..
861 */ 861 */
862 clk = clk_get(NULL, "module_clk"); 862 clk = clk_get(NULL, "module_clk");
863 port->uartclk = clk_get_rate(clk) * 16; 863 port->uartclk = clk_get_rate(clk);
864 clk_put(clk); 864 clk_put(clk);
865 } 865 }
866 866
@@ -873,7 +873,7 @@ static int sci_notifier(struct notifier_block *self,
873} 873}
874 874
875static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 }; 875static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
876#endif /* CONFIG_CPU_FREQ */ 876#endif /* CONFIG_CPU_FREQ && CONFIG_HAVE_CLK */
877 877
878static int sci_request_irq(struct sci_port *port) 878static int sci_request_irq(struct sci_port *port)
879{ 879{
@@ -1008,7 +1008,7 @@ static int sci_startup(struct uart_port *port)
1008 if (s->enable) 1008 if (s->enable)
1009 s->enable(port); 1009 s->enable(port);
1010 1010
1011#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) 1011#ifdef CONFIG_HAVE_CLK
1012 s->clk = clk_get(NULL, "module_clk"); 1012 s->clk = clk_get(NULL, "module_clk");
1013#endif 1013#endif
1014 1014
@@ -1030,7 +1030,7 @@ static void sci_shutdown(struct uart_port *port)
1030 if (s->disable) 1030 if (s->disable)
1031 s->disable(port); 1031 s->disable(port);
1032 1032
1033#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) 1033#ifdef CONFIG_HAVE_CLK
1034 clk_put(s->clk); 1034 clk_put(s->clk);
1035 s->clk = NULL; 1035 s->clk = NULL;
1036#endif 1036#endif
@@ -1041,24 +1041,11 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1041{ 1041{
1042 struct sci_port *s = &sci_ports[port->line]; 1042 struct sci_port *s = &sci_ports[port->line];
1043 unsigned int status, baud, smr_val; 1043 unsigned int status, baud, smr_val;
1044 int t; 1044 int t = -1;
1045 1045
1046 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 1046 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1047 1047 if (likely(baud))
1048 switch (baud) { 1048 t = SCBRR_VALUE(baud, port->uartclk);
1049 case 0:
1050 t = -1;
1051 break;
1052 default:
1053 {
1054#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1055 t = SCBRR_VALUE(baud, clk_get_rate(s->clk));
1056#else
1057 t = SCBRR_VALUE(baud);
1058#endif
1059 break;
1060 }
1061 }
1062 1049
1063 do { 1050 do {
1064 status = sci_in(port, SCxSR); 1051 status = sci_in(port, SCxSR);
@@ -1207,17 +1194,17 @@ static void __init sci_init_ports(void)
1207 sci_ports[i].disable = h8300_sci_disable; 1194 sci_ports[i].disable = h8300_sci_disable;
1208#endif 1195#endif
1209 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK; 1196 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1210#elif defined(CONFIG_SUPERH64) 1197#elif defined(CONFIG_HAVE_CLK)
1211 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1212#else
1213 /* 1198 /*
1214 * XXX: We should use a proper SCI/SCIF clock 1199 * XXX: We should use a proper SCI/SCIF clock
1215 */ 1200 */
1216 { 1201 {
1217 struct clk *clk = clk_get(NULL, "module_clk"); 1202 struct clk *clk = clk_get(NULL, "module_clk");
1218 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16; 1203 sci_ports[i].port.uartclk = clk_get_rate(clk);
1219 clk_put(clk); 1204 clk_put(clk);
1220 } 1205 }
1206#else
1207#error "Need a valid uartclk"
1221#endif 1208#endif
1222 1209
1223 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i]; 1210 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
@@ -1285,7 +1272,7 @@ static int __init serial_console_setup(struct console *co, char *options)
1285 1272
1286 port->type = serial_console_port->type; 1273 port->type = serial_console_port->type;
1287 1274
1288#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) 1275#ifdef CONFIG_HAVE_CLK
1289 if (!serial_console_port->clk) 1276 if (!serial_console_port->clk)
1290 serial_console_port->clk = clk_get(NULL, "module_clk"); 1277 serial_console_port->clk = clk_get(NULL, "module_clk");
1291#endif 1278#endif
@@ -1479,7 +1466,7 @@ static int __devinit sci_probe(struct platform_device *dev)
1479 kgdb_putchar = kgdb_sci_putchar; 1466 kgdb_putchar = kgdb_sci_putchar;
1480#endif 1467#endif
1481 1468
1482#ifdef CONFIG_CPU_FREQ 1469#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
1483 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER); 1470 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1484 dev_info(&dev->dev, "CPU frequency notifier registered\n"); 1471 dev_info(&dev->dev, "CPU frequency notifier registered\n");
1485#endif 1472#endif
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 8a0749e34ca3..b3d906bfbd87 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -793,9 +793,7 @@ static inline int sci_rxd_in(struct uart_port *port)
793#elif defined(CONFIG_CPU_SUBTYPE_SH7723) 793#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
794#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(16*bps)-1) 794#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(16*bps)-1)
795#elif defined(__H8300H__) || defined(__H8300S__) 795#elif defined(__H8300H__) || defined(__H8300S__)
796#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1) 796#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
797#elif defined(CONFIG_SUPERH64)
798#define SCBRR_VALUE(bps) ((current_cpu_data.module_clock+16*bps)/(32*bps)-1)
799#else /* Generic SH */ 797#else /* Generic SH */
800#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) 798#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
801#endif 799#endif