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-rw-r--r--drivers/serial/8250_exar_st16c554.c52
-rw-r--r--drivers/serial/8250_pnp.c29
-rw-r--r--drivers/serial/Kconfig30
-rw-r--r--drivers/serial/Makefile2
-rw-r--r--drivers/serial/amba-pl010.c2
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm2.c2
-rw-r--r--drivers/serial/dz.c371
-rw-r--r--drivers/serial/dz.h32
-rw-r--r--drivers/serial/mcfserial.c54
-rw-r--r--drivers/serial/mpc52xx_uart.c469
-rw-r--r--drivers/serial/mpsc.c22
-rw-r--r--drivers/serial/serial_cs.c67
-rw-r--r--drivers/serial/sh-sci.c6
-rw-r--r--drivers/serial/sh-sci.h37
-rw-r--r--drivers/serial/uartlite.c505
15 files changed, 1364 insertions, 316 deletions
diff --git a/drivers/serial/8250_exar_st16c554.c b/drivers/serial/8250_exar_st16c554.c
new file mode 100644
index 000000000000..567143ace159
--- /dev/null
+++ b/drivers/serial/8250_exar_st16c554.c
@@ -0,0 +1,52 @@
1/*
2 * linux/drivers/serial/8250_exar.c
3 *
4 * Written by Paul B Schroeder < pschroeder "at" uplogix "dot" com >
5 * Based on 8250_boca.
6 *
7 * Copyright (C) 2005 Russell King.
8 * Data taken from include/asm-i386/serial.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/serial_8250.h>
17
18#define PORT(_base,_irq) \
19 { \
20 .iobase = _base, \
21 .irq = _irq, \
22 .uartclk = 1843200, \
23 .iotype = UPIO_PORT, \
24 .flags = UPF_BOOT_AUTOCONF, \
25 }
26
27static struct plat_serial8250_port exar_data[] = {
28 PORT(0x100, 5),
29 PORT(0x108, 5),
30 PORT(0x110, 5),
31 PORT(0x118, 5),
32 { },
33};
34
35static struct platform_device exar_device = {
36 .name = "serial8250",
37 .id = PLAT8250_DEV_EXAR_ST16C554,
38 .dev = {
39 .platform_data = exar_data,
40 },
41};
42
43static int __init exar_init(void)
44{
45 return platform_device_register(&exar_device);
46}
47
48module_init(exar_init);
49
50MODULE_AUTHOR("Paul B Schroeder");
51MODULE_DESCRIPTION("8250 serial probe module for Exar cards");
52MODULE_LICENSE("GPL");
diff --git a/drivers/serial/8250_pnp.c b/drivers/serial/8250_pnp.c
index 71d907c8288b..d3d6b82706b5 100644
--- a/drivers/serial/8250_pnp.c
+++ b/drivers/serial/8250_pnp.c
@@ -464,11 +464,38 @@ static void __devexit serial_pnp_remove(struct pnp_dev *dev)
464 serial8250_unregister_port(line - 1); 464 serial8250_unregister_port(line - 1);
465} 465}
466 466
467#ifdef CONFIG_PM
468static int serial_pnp_suspend(struct pnp_dev *dev, pm_message_t state)
469{
470 long line = (long)pnp_get_drvdata(dev);
471
472 if (!line)
473 return -ENODEV;
474 serial8250_suspend_port(line - 1);
475 return 0;
476}
477
478static int serial_pnp_resume(struct pnp_dev *dev)
479{
480 long line = (long)pnp_get_drvdata(dev);
481
482 if (!line)
483 return -ENODEV;
484 serial8250_resume_port(line - 1);
485 return 0;
486}
487#else
488#define serial_pnp_suspend NULL
489#define serial_pnp_resume NULL
490#endif /* CONFIG_PM */
491
467static struct pnp_driver serial_pnp_driver = { 492static struct pnp_driver serial_pnp_driver = {
468 .name = "serial", 493 .name = "serial",
469 .id_table = pnp_dev_table,
470 .probe = serial_pnp_probe, 494 .probe = serial_pnp_probe,
471 .remove = __devexit_p(serial_pnp_remove), 495 .remove = __devexit_p(serial_pnp_remove),
496 .suspend = serial_pnp_suspend,
497 .resume = serial_pnp_resume,
498 .id_table = pnp_dev_table,
472}; 499};
473 500
474static int __init serial8250_pnp_init(void) 501static int __init serial8250_pnp_init(void)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 0b71e7d18903..fc12d5df10e2 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -210,6 +210,17 @@ config SERIAL_8250_BOCA
210 To compile this driver as a module, choose M here: the module 210 To compile this driver as a module, choose M here: the module
211 will be called 8250_boca. 211 will be called 8250_boca.
212 212
213config SERIAL_8250_EXAR_ST16C554
214 tristate "Support Exar ST16C554/554D Quad UART"
215 depends on SERIAL_8250 != n && ISA && SERIAL_8250_MANY_PORTS
216 help
217 The Uplogix Envoy TU301 uses this Exar Quad UART. If you are
218 tinkering with your Envoy TU301, or have a machine with this UART,
219 say Y here.
220
221 To compile this driver as a module, choose M here: the module
222 will be called 8250_exar_st16c554.
223
213config SERIAL_8250_HUB6 224config SERIAL_8250_HUB6
214 tristate "Support Hub6 cards" 225 tristate "Support Hub6 cards"
215 depends on SERIAL_8250 != n && ISA && SERIAL_8250_MANY_PORTS 226 depends on SERIAL_8250 != n && ISA && SERIAL_8250_MANY_PORTS
@@ -511,6 +522,25 @@ config SERIAL_IMX_CONSOLE
511 your boot loader (lilo or loadlin) about how to pass options to the 522 your boot loader (lilo or loadlin) about how to pass options to the
512 kernel at boot time.) 523 kernel at boot time.)
513 524
525config SERIAL_UARTLITE
526 tristate "Xilinx uartlite serial port support"
527 depends on PPC32
528 select SERIAL_CORE
529 help
530 Say Y here if you want to use the Xilinx uartlite serial controller.
531
532 To compile this driver as a module, choose M here: the
533 module will be called uartlite.ko.
534
535config SERIAL_UARTLITE_CONSOLE
536 bool "Support for console on Xilinx uartlite serial port"
537 depends on SERIAL_UARTLITE=y
538 select SERIAL_CORE_CONSOLE
539 help
540 Say Y here if you wish to use a Xilinx uartlite as the system
541 console (the system console is the device which receives all kernel
542 messages and warnings and which allows logins in single user mode).
543
514config SERIAL_SUNCORE 544config SERIAL_SUNCORE
515 bool 545 bool
516 depends on SPARC 546 depends on SPARC
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index b4d8a7c182e3..df3632cd7df9 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_SERIAL_8250_CONSOLE) += 8250_early.o
17obj-$(CONFIG_SERIAL_8250_FOURPORT) += 8250_fourport.o 17obj-$(CONFIG_SERIAL_8250_FOURPORT) += 8250_fourport.o
18obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o 18obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o
19obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o 19obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o
20obj-$(CONFIG_SERIAL_8250_EXAR_ST16C554) += 8250_exar_st16c554.o
20obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o 21obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o
21obj-$(CONFIG_SERIAL_8250_MCA) += 8250_mca.o 22obj-$(CONFIG_SERIAL_8250_MCA) += 8250_mca.o
22obj-$(CONFIG_SERIAL_8250_AU1X00) += 8250_au1x00.o 23obj-$(CONFIG_SERIAL_8250_AU1X00) += 8250_au1x00.o
@@ -55,4 +56,5 @@ obj-$(CONFIG_SERIAL_VR41XX) += vr41xx_siu.o
55obj-$(CONFIG_SERIAL_SGI_IOC4) += ioc4_serial.o 56obj-$(CONFIG_SERIAL_SGI_IOC4) += ioc4_serial.o
56obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o 57obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o
57obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o 58obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
59obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
58obj-$(CONFIG_SERIAL_NETX) += netx-serial.o 60obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 4213fabc62bf..4d3626ef4643 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -129,6 +129,8 @@ static void pl010_rx_chars(struct uart_port *port)
129 */ 129 */
130 rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX; 130 rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
131 if (unlikely(rsr & UART01x_RSR_ANY)) { 131 if (unlikely(rsr & UART01x_RSR_ANY)) {
132 writel(0, port->membase + UART01x_ECR);
133
132 if (rsr & UART01x_RSR_BE) { 134 if (rsr & UART01x_RSR_BE) {
133 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); 135 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
134 port->icount.brk++; 136 port->icount.brk++;
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index b691d3e14754..787a8f134677 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -282,7 +282,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
282} 282}
283 283
284/* Setup any dynamic params in the uart desc */ 284/* Setup any dynamic params in the uart desc */
285int cpm_uart_init_portdesc(void) 285int __init cpm_uart_init_portdesc(void)
286{ 286{
287#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2) 287#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2)
288 u32 addr; 288 u32 addr;
diff --git a/drivers/serial/dz.c b/drivers/serial/dz.c
index 53662b33b841..af1544f3356f 100644
--- a/drivers/serial/dz.c
+++ b/drivers/serial/dz.c
@@ -1,11 +1,13 @@
1/* 1/*
2 * dz.c: Serial port driver for DECStations equiped 2 * dz.c: Serial port driver for DECstations equipped
3 * with the DZ chipset. 3 * with the DZ chipset.
4 * 4 *
5 * Copyright (C) 1998 Olivier A. D. Lebaillif 5 * Copyright (C) 1998 Olivier A. D. Lebaillif
6 * 6 *
7 * Email: olivier.lebaillif@ifrsys.com 7 * Email: olivier.lebaillif@ifrsys.com
8 * 8 *
9 * Copyright (C) 2004, 2006 Maciej W. Rozycki
10 *
9 * [31-AUG-98] triemer 11 * [31-AUG-98] triemer
10 * Changed IRQ to use Harald's dec internals interrupts.h 12 * Changed IRQ to use Harald's dec internals interrupts.h
11 * removed base_addr code - moving address assignment to setup.c 13 * removed base_addr code - moving address assignment to setup.c
@@ -26,10 +28,16 @@
26 28
27#undef DEBUG_DZ 29#undef DEBUG_DZ
28 30
31#if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
32#define SUPPORT_SYSRQ
33#endif
34
35#include <linux/delay.h>
29#include <linux/module.h> 36#include <linux/module.h>
30#include <linux/interrupt.h> 37#include <linux/interrupt.h>
31#include <linux/init.h> 38#include <linux/init.h>
32#include <linux/console.h> 39#include <linux/console.h>
40#include <linux/sysrq.h>
33#include <linux/tty.h> 41#include <linux/tty.h>
34#include <linux/tty_flip.h> 42#include <linux/tty_flip.h>
35#include <linux/serial_core.h> 43#include <linux/serial_core.h>
@@ -45,14 +53,10 @@
45#include <asm/system.h> 53#include <asm/system.h>
46#include <asm/uaccess.h> 54#include <asm/uaccess.h>
47 55
48#define CONSOLE_LINE (3) /* for definition of struct console */
49
50#include "dz.h" 56#include "dz.h"
51 57
52#define DZ_INTR_DEBUG 1
53
54static char *dz_name = "DECstation DZ serial driver version "; 58static char *dz_name = "DECstation DZ serial driver version ";
55static char *dz_version = "1.02"; 59static char *dz_version = "1.03";
56 60
57struct dz_port { 61struct dz_port {
58 struct uart_port port; 62 struct uart_port port;
@@ -61,22 +65,6 @@ struct dz_port {
61 65
62static struct dz_port dz_ports[DZ_NB_PORT]; 66static struct dz_port dz_ports[DZ_NB_PORT];
63 67
64#ifdef DEBUG_DZ
65/*
66 * debugging code to send out chars via prom
67 */
68static void debug_console(const char *s, int count)
69{
70 unsigned i;
71
72 for (i = 0; i < count; i++) {
73 if (*s == 10)
74 prom_printf("%c", 13);
75 prom_printf("%c", *s++);
76 }
77}
78#endif
79
80/* 68/*
81 * ------------------------------------------------------------ 69 * ------------------------------------------------------------
82 * dz_in () and dz_out () 70 * dz_in () and dz_out ()
@@ -90,6 +78,7 @@ static inline unsigned short dz_in(struct dz_port *dport, unsigned offset)
90{ 78{
91 volatile unsigned short *addr = 79 volatile unsigned short *addr =
92 (volatile unsigned short *) (dport->port.membase + offset); 80 (volatile unsigned short *) (dport->port.membase + offset);
81
93 return *addr; 82 return *addr;
94} 83}
95 84
@@ -98,6 +87,7 @@ static inline void dz_out(struct dz_port *dport, unsigned offset,
98{ 87{
99 volatile unsigned short *addr = 88 volatile unsigned short *addr =
100 (volatile unsigned short *) (dport->port.membase + offset); 89 (volatile unsigned short *) (dport->port.membase + offset);
90
101 *addr = value; 91 *addr = value;
102} 92}
103 93
@@ -144,7 +134,7 @@ static void dz_stop_rx(struct uart_port *uport)
144 134
145 spin_lock_irqsave(&dport->port.lock, flags); 135 spin_lock_irqsave(&dport->port.lock, flags);
146 dport->cflag &= ~DZ_CREAD; 136 dport->cflag &= ~DZ_CREAD;
147 dz_out(dport, DZ_LPR, dport->cflag); 137 dz_out(dport, DZ_LPR, dport->cflag | dport->port.line);
148 spin_unlock_irqrestore(&dport->port.lock, flags); 138 spin_unlock_irqrestore(&dport->port.lock, flags);
149} 139}
150 140
@@ -155,14 +145,14 @@ static void dz_enable_ms(struct uart_port *port)
155 145
156/* 146/*
157 * ------------------------------------------------------------ 147 * ------------------------------------------------------------
158 * Here starts the interrupt handling routines. All of the
159 * following subroutines are declared as inline and are folded
160 * into dz_interrupt. They were separated out for readability's
161 * sake.
162 * 148 *
163 * Note: rs_interrupt() is a "fast" interrupt, which means that it 149 * Here start the interrupt handling routines. All of the following
150 * subroutines are declared as inline and are folded into
151 * dz_interrupt. They were separated out for readability's sake.
152 *
153 * Note: dz_interrupt() is a "fast" interrupt, which means that it
164 * runs with interrupts turned off. People who may want to modify 154 * runs with interrupts turned off. People who may want to modify
165 * rs_interrupt() should try to keep the interrupt handler as fast as 155 * dz_interrupt() should try to keep the interrupt handler as fast as
166 * possible. After you are done making modifications, it is not a bad 156 * possible. After you are done making modifications, it is not a bad
167 * idea to do: 157 * idea to do:
168 * 158 *
@@ -180,92 +170,74 @@ static void dz_enable_ms(struct uart_port *port)
180 * This routine deals with inputs from any lines. 170 * This routine deals with inputs from any lines.
181 * ------------------------------------------------------------ 171 * ------------------------------------------------------------
182 */ 172 */
183static inline void dz_receive_chars(struct dz_port *dport) 173static inline void dz_receive_chars(struct dz_port *dport_in,
174 struct pt_regs *regs)
184{ 175{
176 struct dz_port *dport;
185 struct tty_struct *tty = NULL; 177 struct tty_struct *tty = NULL;
186 struct uart_icount *icount; 178 struct uart_icount *icount;
187 int ignore = 0; 179 int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
188 unsigned short status, tmp; 180 unsigned short status;
189 unsigned char ch, flag; 181 unsigned char ch, flag;
182 int i;
190 183
191 /* this code is going to be a problem... 184 while ((status = dz_in(dport_in, DZ_RBUF)) & DZ_DVAL) {
192 the call to tty_flip_buffer is going to need 185 dport = &dz_ports[LINE(status)];
193 to be rethought... 186 tty = dport->port.info->tty; /* point to the proper dev */
194 */
195 do {
196 status = dz_in(dport, DZ_RBUF);
197
198 /* punt so we don't get duplicate characters */
199 if (!(status & DZ_DVAL))
200 goto ignore_char;
201
202
203 ch = UCHAR(status); /* grab the char */
204 flag = TTY_NORMAL;
205 187
206#if 0 188 ch = UCHAR(status); /* grab the char */
207 if (info->is_console) {
208 if (ch == 0)
209 return; /* it's a break ... */
210 }
211#endif
212 189
213 tty = dport->port.info->tty;/* now tty points to the proper dev */
214 icount = &dport->port.icount; 190 icount = &dport->port.icount;
215
216 if (!tty)
217 break;
218
219 icount->rx++; 191 icount->rx++;
220 192
221 /* keep track of the statistics */ 193 flag = TTY_NORMAL;
222 if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) { 194 if (status & DZ_FERR) { /* frame error */
223 if (status & DZ_PERR) /* parity error */ 195 /*
224 icount->parity++; 196 * There is no separate BREAK status bit, so
225 else if (status & DZ_FERR) /* frame error */ 197 * treat framing errors as BREAKs for Magic SysRq
226 icount->frame++; 198 * and SAK; normally, otherwise.
227 if (status & DZ_OERR) /* overrun error */
228 icount->overrun++;
229
230 /* check to see if we should ignore the character
231 and mask off conditions that should be ignored
232 */ 199 */
233 200 if (uart_handle_break(&dport->port))
234 if (status & dport->port.ignore_status_mask) { 201 continue;
235 if (++ignore > 100) 202 if (dport->port.flags & UPF_SAK)
236 break; 203 flag = TTY_BREAK;
237 goto ignore_char; 204 else
238 }
239 /* mask off the error conditions we want to ignore */
240 tmp = status & dport->port.read_status_mask;
241
242 if (tmp & DZ_PERR) {
243 flag = TTY_PARITY;
244#ifdef DEBUG_DZ
245 debug_console("PERR\n", 5);
246#endif
247 } else if (tmp & DZ_FERR) {
248 flag = TTY_FRAME; 205 flag = TTY_FRAME;
249#ifdef DEBUG_DZ 206 } else if (status & DZ_OERR) /* overrun error */
250 debug_console("FERR\n", 5); 207 flag = TTY_OVERRUN;
251#endif 208 else if (status & DZ_PERR) /* parity error */
252 } 209 flag = TTY_PARITY;
253 if (tmp & DZ_OERR) { 210
254#ifdef DEBUG_DZ 211 /* keep track of the statistics */
255 debug_console("OERR\n", 5); 212 switch (flag) {
256#endif 213 case TTY_FRAME:
257 tty_insert_flip_char(tty, ch, flag); 214 icount->frame++;
258 ch = 0; 215 break;
259 flag = TTY_OVERRUN; 216 case TTY_PARITY:
260 } 217 icount->parity++;
218 break;
219 case TTY_OVERRUN:
220 icount->overrun++;
221 break;
222 case TTY_BREAK:
223 icount->brk++;
224 break;
225 default:
226 break;
261 } 227 }
262 tty_insert_flip_char(tty, ch, flag);
263 ignore_char:
264 ;
265 } while (status & DZ_DVAL);
266 228
267 if (tty) 229 if (uart_handle_sysrq_char(&dport->port, ch, regs))
268 tty_flip_buffer_push(tty); 230 continue;
231
232 if ((status & dport->port.ignore_status_mask) == 0) {
233 uart_insert_char(&dport->port,
234 status, DZ_OERR, ch, flag);
235 lines_rx[LINE(status)] = 1;
236 }
237 }
238 for (i = 0; i < DZ_NB_PORT; i++)
239 if (lines_rx[i])
240 tty_flip_buffer_push(dz_ports[i].port.info->tty);
269} 241}
270 242
271/* 243/*
@@ -275,26 +247,32 @@ static inline void dz_receive_chars(struct dz_port *dport)
275 * This routine deals with outputs to any lines. 247 * This routine deals with outputs to any lines.
276 * ------------------------------------------------------------ 248 * ------------------------------------------------------------
277 */ 249 */
278static inline void dz_transmit_chars(struct dz_port *dport) 250static inline void dz_transmit_chars(struct dz_port *dport_in)
279{ 251{
280 struct circ_buf *xmit = &dport->port.info->xmit; 252 struct dz_port *dport;
253 struct circ_buf *xmit;
254 unsigned short status;
281 unsigned char tmp; 255 unsigned char tmp;
282 256
283 if (dport->port.x_char) { /* XON/XOFF chars */ 257 status = dz_in(dport_in, DZ_CSR);
258 dport = &dz_ports[LINE(status)];
259 xmit = &dport->port.info->xmit;
260
261 if (dport->port.x_char) { /* XON/XOFF chars */
284 dz_out(dport, DZ_TDR, dport->port.x_char); 262 dz_out(dport, DZ_TDR, dport->port.x_char);
285 dport->port.icount.tx++; 263 dport->port.icount.tx++;
286 dport->port.x_char = 0; 264 dport->port.x_char = 0;
287 return; 265 return;
288 } 266 }
289 /* if nothing to do or stopped or hardware stopped */ 267 /* If nothing to do or stopped or hardware stopped. */
290 if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) { 268 if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
291 dz_stop_tx(&dport->port); 269 dz_stop_tx(&dport->port);
292 return; 270 return;
293 } 271 }
294 272
295 /* 273 /*
296 * if something to do ... (rember the dz has no output fifo so we go 274 * If something to do... (remember the dz has no output fifo,
297 * one char at a time :-< 275 * so we go one char at a time) :-<
298 */ 276 */
299 tmp = xmit->buf[xmit->tail]; 277 tmp = xmit->buf[xmit->tail];
300 xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1); 278 xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
@@ -304,23 +282,29 @@ static inline void dz_transmit_chars(struct dz_port *dport)
304 if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS) 282 if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
305 uart_write_wakeup(&dport->port); 283 uart_write_wakeup(&dport->port);
306 284
307 /* Are we done */ 285 /* Are we are done. */
308 if (uart_circ_empty(xmit)) 286 if (uart_circ_empty(xmit))
309 dz_stop_tx(&dport->port); 287 dz_stop_tx(&dport->port);
310} 288}
311 289
312/* 290/*
313 * ------------------------------------------------------------ 291 * ------------------------------------------------------------
314 * check_modem_status () 292 * check_modem_status()
315 * 293 *
316 * Only valid for the MODEM line duh ! 294 * DS 3100 & 5100: Only valid for the MODEM line, duh!
295 * DS 5000/200: Valid for the MODEM and PRINTER line.
317 * ------------------------------------------------------------ 296 * ------------------------------------------------------------
318 */ 297 */
319static inline void check_modem_status(struct dz_port *dport) 298static inline void check_modem_status(struct dz_port *dport)
320{ 299{
300 /*
301 * FIXME:
302 * 1. No status change interrupt; use a timer.
303 * 2. Handle the 3100/5000 as appropriate. --macro
304 */
321 unsigned short status; 305 unsigned short status;
322 306
323 /* if not ne modem line just return */ 307 /* If not the modem line just return. */
324 if (dport->port.line != DZ_MODEM) 308 if (dport->port.line != DZ_MODEM)
325 return; 309 return;
326 310
@@ -341,21 +325,18 @@ static inline void check_modem_status(struct dz_port *dport)
341 */ 325 */
342static irqreturn_t dz_interrupt(int irq, void *dev) 326static irqreturn_t dz_interrupt(int irq, void *dev)
343{ 327{
344 struct dz_port *dport; 328 struct dz_port *dport = (struct dz_port *)dev;
345 unsigned short status; 329 unsigned short status;
346 330
347 /* get the reason why we just got an irq */ 331 /* get the reason why we just got an irq */
348 status = dz_in((struct dz_port *)dev, DZ_CSR); 332 status = dz_in(dport, DZ_CSR);
349 dport = &dz_ports[LINE(status)];
350 333
351 if (status & DZ_RDONE) 334 if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
352 dz_receive_chars(dport); 335 dz_receive_chars(dport, regs);
353 336
354 if (status & DZ_TRDY) 337 if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
355 dz_transmit_chars(dport); 338 dz_transmit_chars(dport);
356 339
357 /* FIXME: what about check modem status??? --rmk */
358
359 return IRQ_HANDLED; 340 return IRQ_HANDLED;
360} 341}
361 342
@@ -367,13 +348,13 @@ static irqreturn_t dz_interrupt(int irq, void *dev)
367 348
368static unsigned int dz_get_mctrl(struct uart_port *uport) 349static unsigned int dz_get_mctrl(struct uart_port *uport)
369{ 350{
351 /*
352 * FIXME: Handle the 3100/5000 as appropriate. --macro
353 */
370 struct dz_port *dport = (struct dz_port *)uport; 354 struct dz_port *dport = (struct dz_port *)uport;
371 unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; 355 unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
372 356
373 if (dport->port.line == DZ_MODEM) { 357 if (dport->port.line == DZ_MODEM) {
374 /*
375 * CHECKME: This is a guess from the other code... --rmk
376 */
377 if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR) 358 if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
378 mctrl &= ~TIOCM_DSR; 359 mctrl &= ~TIOCM_DSR;
379 } 360 }
@@ -383,6 +364,9 @@ static unsigned int dz_get_mctrl(struct uart_port *uport)
383 364
384static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl) 365static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
385{ 366{
367 /*
368 * FIXME: Handle the 3100/5000 as appropriate. --macro
369 */
386 struct dz_port *dport = (struct dz_port *)uport; 370 struct dz_port *dport = (struct dz_port *)uport;
387 unsigned short tmp; 371 unsigned short tmp;
388 372
@@ -409,13 +393,6 @@ static int dz_startup(struct uart_port *uport)
409 unsigned long flags; 393 unsigned long flags;
410 unsigned short tmp; 394 unsigned short tmp;
411 395
412 /* The dz lines for the mouse/keyboard must be
413 * opened using their respective drivers.
414 */
415 if ((dport->port.line == DZ_KEYBOARD) ||
416 (dport->port.line == DZ_MOUSE))
417 return -ENODEV;
418
419 spin_lock_irqsave(&dport->port.lock, flags); 396 spin_lock_irqsave(&dport->port.lock, flags);
420 397
421 /* enable the interrupt and the scanning */ 398 /* enable the interrupt and the scanning */
@@ -442,7 +419,8 @@ static void dz_shutdown(struct uart_port *uport)
442} 419}
443 420
444/* 421/*
445 * get_lsr_info - get line status register info 422 * -------------------------------------------------------------------
423 * dz_tx_empty() -- get the transmitter empty status
446 * 424 *
447 * Purpose: Let user call ioctl() to get info when the UART physically 425 * Purpose: Let user call ioctl() to get info when the UART physically
448 * is emptied. On bus types like RS485, the transmitter must 426 * is emptied. On bus types like RS485, the transmitter must
@@ -450,21 +428,28 @@ static void dz_shutdown(struct uart_port *uport)
450 * the transmit shift register is empty, not be done when the 428 * the transmit shift register is empty, not be done when the
451 * transmit holding register is empty. This functionality 429 * transmit holding register is empty. This functionality
452 * allows an RS485 driver to be written in user space. 430 * allows an RS485 driver to be written in user space.
431 * -------------------------------------------------------------------
453 */ 432 */
454static unsigned int dz_tx_empty(struct uart_port *uport) 433static unsigned int dz_tx_empty(struct uart_port *uport)
455{ 434{
456 struct dz_port *dport = (struct dz_port *)uport; 435 struct dz_port *dport = (struct dz_port *)uport;
457 unsigned short status = dz_in(dport, DZ_LPR); 436 unsigned short tmp, mask = 1 << dport->port.line;
458 437
459 /* FIXME: this appears to be obviously broken --rmk. */ 438 tmp = dz_in(dport, DZ_TCR);
460 return status ? TIOCSER_TEMT : 0; 439 tmp &= mask;
440
441 return tmp ? 0 : TIOCSER_TEMT;
461} 442}
462 443
463static void dz_break_ctl(struct uart_port *uport, int break_state) 444static void dz_break_ctl(struct uart_port *uport, int break_state)
464{ 445{
446 /*
447 * FIXME: Can't access BREAK bits in TDR easily;
448 * reuse the code for polled TX. --macro
449 */
465 struct dz_port *dport = (struct dz_port *)uport; 450 struct dz_port *dport = (struct dz_port *)uport;
466 unsigned long flags; 451 unsigned long flags;
467 unsigned short tmp, mask = 1 << uport->line; 452 unsigned short tmp, mask = 1 << dport->port.line;
468 453
469 spin_lock_irqsave(&uport->lock, flags); 454 spin_lock_irqsave(&uport->lock, flags);
470 tmp = dz_in(dport, DZ_TCR); 455 tmp = dz_in(dport, DZ_TCR);
@@ -561,7 +546,7 @@ static void dz_set_termios(struct uart_port *uport, struct termios *termios,
561 546
562 spin_lock_irqsave(&dport->port.lock, flags); 547 spin_lock_irqsave(&dport->port.lock, flags);
563 548
564 dz_out(dport, DZ_LPR, cflag); 549 dz_out(dport, DZ_LPR, cflag | dport->port.line);
565 dport->cflag = cflag; 550 dport->cflag = cflag;
566 551
567 /* setup accept flag */ 552 /* setup accept flag */
@@ -650,7 +635,7 @@ static void __init dz_init_ports(void)
650 for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) { 635 for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
651 spin_lock_init(&dport->port.lock); 636 spin_lock_init(&dport->port.lock);
652 dport->port.membase = (char *) base; 637 dport->port.membase = (char *) base;
653 dport->port.iotype = UPIO_PORT; 638 dport->port.iotype = UPIO_MEM;
654 dport->port.irq = dec_interrupt[DEC_IRQ_DZ11]; 639 dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
655 dport->port.line = i; 640 dport->port.line = i;
656 dport->port.fifosize = 1; 641 dport->port.fifosize = 1;
@@ -662,10 +647,7 @@ static void __init dz_init_ports(void)
662static void dz_reset(struct dz_port *dport) 647static void dz_reset(struct dz_port *dport)
663{ 648{
664 dz_out(dport, DZ_CSR, DZ_CLR); 649 dz_out(dport, DZ_CSR, DZ_CLR);
665
666 while (dz_in(dport, DZ_CSR) & DZ_CLR); 650 while (dz_in(dport, DZ_CSR) & DZ_CLR);
667 /* FIXME: cpu_relax? */
668
669 iob(); 651 iob();
670 652
671 /* enable scanning */ 653 /* enable scanning */
@@ -673,26 +655,55 @@ static void dz_reset(struct dz_port *dport)
673} 655}
674 656
675#ifdef CONFIG_SERIAL_DZ_CONSOLE 657#ifdef CONFIG_SERIAL_DZ_CONSOLE
658/*
659 * -------------------------------------------------------------------
660 * dz_console_putchar() -- transmit a character
661 *
662 * Polled transmission. This is tricky. We need to mask transmit
663 * interrupts so that they do not interfere, enable the transmitter
664 * for the line requested and then wait till the transmit scanner
665 * requests data for this line. But it may request data for another
666 * line first, in which case we have to disable its transmitter and
667 * repeat waiting till our line pops up. Only then the character may
668 * be transmitted. Finally, the state of the transmitter mask is
669 * restored. Welcome to the world of PDP-11!
670 * -------------------------------------------------------------------
671 */
676static void dz_console_putchar(struct uart_port *uport, int ch) 672static void dz_console_putchar(struct uart_port *uport, int ch)
677{ 673{
678 struct dz_port *dport = (struct dz_port *)uport; 674 struct dz_port *dport = (struct dz_port *)uport;
679 unsigned long flags; 675 unsigned long flags;
680 int loops = 2500; 676 unsigned short csr, tcr, trdy, mask;
681 unsigned short tmp = (unsigned char)ch; 677 int loops = 10000;
682 /* this code sends stuff out to serial device - spinning its
683 wheels and waiting. */
684 678
685 spin_lock_irqsave(&dport->port.lock, flags); 679 spin_lock_irqsave(&dport->port.lock, flags);
680 csr = dz_in(dport, DZ_CSR);
681 dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
682 tcr = dz_in(dport, DZ_TCR);
683 tcr |= 1 << dport->port.line;
684 mask = tcr;
685 dz_out(dport, DZ_TCR, mask);
686 iob();
687 spin_unlock_irqrestore(&dport->port.lock, flags);
686 688
687 /* spin our wheels */ 689 while (loops--) {
688 while (((dz_in(dport, DZ_CSR) & DZ_TRDY) != DZ_TRDY) && loops--) 690 trdy = dz_in(dport, DZ_CSR);
689 /* FIXME: cpu_relax, udelay? --rmk */ 691 if (!(trdy & DZ_TRDY))
690 ; 692 continue;
693 trdy = (trdy & DZ_TLINE) >> 8;
694 if (trdy == dport->port.line)
695 break;
696 mask &= ~(1 << trdy);
697 dz_out(dport, DZ_TCR, mask);
698 iob();
699 udelay(2);
700 }
691 701
692 /* Actually transmit the character. */ 702 if (loops) /* Cannot send otherwise. */
693 dz_out(dport, DZ_TDR, tmp); 703 dz_out(dport, DZ_TDR, ch);
694 704
695 spin_unlock_irqrestore(&dport->port.lock, flags); 705 dz_out(dport, DZ_TCR, tcr);
706 dz_out(dport, DZ_CSR, csr);
696} 707}
697 708
698/* 709/*
@@ -703,11 +714,11 @@ static void dz_console_putchar(struct uart_port *uport, int ch)
703 * The console must be locked when we get here. 714 * The console must be locked when we get here.
704 * ------------------------------------------------------------------- 715 * -------------------------------------------------------------------
705 */ 716 */
706static void dz_console_print(struct console *cons, 717static void dz_console_print(struct console *co,
707 const char *str, 718 const char *str,
708 unsigned int count) 719 unsigned int count)
709{ 720{
710 struct dz_port *dport = &dz_ports[CONSOLE_LINE]; 721 struct dz_port *dport = &dz_ports[co->index];
711#ifdef DEBUG_DZ 722#ifdef DEBUG_DZ
712 prom_printf((char *) str); 723 prom_printf((char *) str);
713#endif 724#endif
@@ -716,49 +727,43 @@ static void dz_console_print(struct console *cons,
716 727
717static int __init dz_console_setup(struct console *co, char *options) 728static int __init dz_console_setup(struct console *co, char *options)
718{ 729{
719 struct dz_port *dport = &dz_ports[CONSOLE_LINE]; 730 struct dz_port *dport = &dz_ports[co->index];
720 int baud = 9600; 731 int baud = 9600;
721 int bits = 8; 732 int bits = 8;
722 int parity = 'n'; 733 int parity = 'n';
723 int flow = 'n'; 734 int flow = 'n';
724 int ret;
725 unsigned short mask, tmp;
726 735
727 if (options) 736 if (options)
728 uart_parse_options(options, &baud, &parity, &bits, &flow); 737 uart_parse_options(options, &baud, &parity, &bits, &flow);
729 738
730 dz_reset(dport); 739 dz_reset(dport);
731 740
732 ret = uart_set_options(&dport->port, co, baud, parity, bits, flow); 741 return uart_set_options(&dport->port, co, baud, parity, bits, flow);
733 if (ret == 0) {
734 mask = 1 << dport->port.line;
735 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
736 if (!(tmp & mask)) {
737 tmp |= mask; /* set the TX flag */
738 dz_out(dport, DZ_TCR, tmp);
739 }
740 }
741
742 return ret;
743} 742}
744 743
745static struct console dz_sercons = 744static struct uart_driver dz_reg;
746{ 745static struct console dz_sercons = {
747 .name = "ttyS", 746 .name = "ttyS",
748 .write = dz_console_print, 747 .write = dz_console_print,
749 .device = uart_console_device, 748 .device = uart_console_device,
750 .setup = dz_console_setup, 749 .setup = dz_console_setup,
751 .flags = CON_CONSDEV | CON_PRINTBUFFER, 750 .flags = CON_PRINTBUFFER,
752 .index = CONSOLE_LINE, 751 .index = -1,
752 .data = &dz_reg,
753}; 753};
754 754
755void __init dz_serial_console_init(void) 755static int __init dz_serial_console_init(void)
756{ 756{
757 dz_init_ports(); 757 if (!IOASIC) {
758 758 dz_init_ports();
759 register_console(&dz_sercons); 759 register_console(&dz_sercons);
760 return 0;
761 } else
762 return -ENXIO;
760} 763}
761 764
765console_initcall(dz_serial_console_init);
766
762#define SERIAL_DZ_CONSOLE &dz_sercons 767#define SERIAL_DZ_CONSOLE &dz_sercons
763#else 768#else
764#define SERIAL_DZ_CONSOLE NULL 769#define SERIAL_DZ_CONSOLE NULL
@@ -767,35 +772,29 @@ void __init dz_serial_console_init(void)
767static struct uart_driver dz_reg = { 772static struct uart_driver dz_reg = {
768 .owner = THIS_MODULE, 773 .owner = THIS_MODULE,
769 .driver_name = "serial", 774 .driver_name = "serial",
770 .dev_name = "ttyS%d", 775 .dev_name = "ttyS",
771 .major = TTY_MAJOR, 776 .major = TTY_MAJOR,
772 .minor = 64, 777 .minor = 64,
773 .nr = DZ_NB_PORT, 778 .nr = DZ_NB_PORT,
774 .cons = SERIAL_DZ_CONSOLE, 779 .cons = SERIAL_DZ_CONSOLE,
775}; 780};
776 781
777int __init dz_init(void) 782static int __init dz_init(void)
778{ 783{
779 unsigned long flags;
780 int ret, i; 784 int ret, i;
781 785
786 if (IOASIC)
787 return -ENXIO;
788
782 printk("%s%s\n", dz_name, dz_version); 789 printk("%s%s\n", dz_name, dz_version);
783 790
784 dz_init_ports(); 791 dz_init_ports();
785 792
786 save_flags(flags);
787 cli();
788
789#ifndef CONFIG_SERIAL_DZ_CONSOLE 793#ifndef CONFIG_SERIAL_DZ_CONSOLE
790 /* reset the chip */ 794 /* reset the chip */
791 dz_reset(&dz_ports[0]); 795 dz_reset(&dz_ports[0]);
792#endif 796#endif
793 797
794 /* order matters here... the trick is that flags
795 is updated... in request_irq - to immediatedly obliterate
796 it is unwise. */
797 restore_flags(flags);
798
799 if (request_irq(dz_ports[0].port.irq, dz_interrupt, 798 if (request_irq(dz_ports[0].port.irq, dz_interrupt,
800 IRQF_DISABLED, "DZ", &dz_ports[0])) 799 IRQF_DISABLED, "DZ", &dz_ports[0]))
801 panic("Unable to register DZ interrupt"); 800 panic("Unable to register DZ interrupt");
@@ -810,5 +809,7 @@ int __init dz_init(void)
810 return ret; 809 return ret;
811} 810}
812 811
812module_init(dz_init);
813
813MODULE_DESCRIPTION("DECstation DZ serial driver"); 814MODULE_DESCRIPTION("DECstation DZ serial driver");
814MODULE_LICENSE("GPL"); 815MODULE_LICENSE("GPL");
diff --git a/drivers/serial/dz.h b/drivers/serial/dz.h
index 86ef417382bb..9674d4e49872 100644
--- a/drivers/serial/dz.h
+++ b/drivers/serial/dz.h
@@ -1,20 +1,22 @@
1/* 1/*
2 * dz.h: Serial port driver for DECStations equiped 2 * dz.h: Serial port driver for DECstations equipped
3 * with the DZ chipset. 3 * with the DZ chipset.
4 * 4 *
5 * Copyright (C) 1998 Olivier A. D. Lebaillif 5 * Copyright (C) 1998 Olivier A. D. Lebaillif
6 * 6 *
7 * Email: olivier.lebaillif@ifrsys.com 7 * Email: olivier.lebaillif@ifrsys.com
8 * 8 *
9 * Copyright (C) 2004, 2006 Maciej W. Rozycki
9 */ 10 */
10#ifndef DZ_SERIAL_H 11#ifndef DZ_SERIAL_H
11#define DZ_SERIAL_H 12#define DZ_SERIAL_H
12 13
13/* 14/*
14 * Definitions for the Control and Status Received. 15 * Definitions for the Control and Status Register.
15 */ 16 */
16#define DZ_TRDY 0x8000 /* Transmitter empty */ 17#define DZ_TRDY 0x8000 /* Transmitter empty */
17#define DZ_TIE 0x4000 /* Transmitter Interrupt Enable */ 18#define DZ_TIE 0x4000 /* Transmitter Interrupt Enbl */
19#define DZ_TLINE 0x0300 /* Transmitter Line Number */
18#define DZ_RDONE 0x0080 /* Receiver data ready */ 20#define DZ_RDONE 0x0080 /* Receiver data ready */
19#define DZ_RIE 0x0040 /* Receive Interrupt Enable */ 21#define DZ_RIE 0x0040 /* Receive Interrupt Enable */
20#define DZ_MSE 0x0020 /* Master Scan Enable */ 22#define DZ_MSE 0x0020 /* Master Scan Enable */
@@ -22,32 +24,44 @@
22#define DZ_MAINT 0x0008 /* Loop Back Mode */ 24#define DZ_MAINT 0x0008 /* Loop Back Mode */
23 25
24/* 26/*
25 * Definitions for the Received buffer. 27 * Definitions for the Receiver Buffer Register.
26 */ 28 */
27#define DZ_RBUF_MASK 0x00FF /* Data Mask in the Receive Buffer */ 29#define DZ_RBUF_MASK 0x00FF /* Data Mask */
28#define DZ_LINE_MASK 0x0300 /* Line Mask in the Receive Buffer */ 30#define DZ_LINE_MASK 0x0300 /* Line Mask */
29#define DZ_DVAL 0x8000 /* Valid Data indicator */ 31#define DZ_DVAL 0x8000 /* Valid Data indicator */
30#define DZ_OERR 0x4000 /* Overrun error indicator */ 32#define DZ_OERR 0x4000 /* Overrun error indicator */
31#define DZ_FERR 0x2000 /* Frame error indicator */ 33#define DZ_FERR 0x2000 /* Frame error indicator */
32#define DZ_PERR 0x1000 /* Parity error indicator */ 34#define DZ_PERR 0x1000 /* Parity error indicator */
33 35
34#define LINE(x) (x & DZ_LINE_MASK) >> 8 /* Get the line number from the input buffer */ 36#define LINE(x) ((x & DZ_LINE_MASK) >> 8) /* Get the line number
35#define UCHAR(x) (unsigned char)(x & DZ_RBUF_MASK) 37 from the input buffer */
38#define UCHAR(x) ((unsigned char)(x & DZ_RBUF_MASK))
36 39
37/* 40/*
38 * Definitions for the Transmit Register. 41 * Definitions for the Transmit Control Register.
39 */ 42 */
40#define DZ_LINE_KEYBOARD 0x0001 43#define DZ_LINE_KEYBOARD 0x0001
41#define DZ_LINE_MOUSE 0x0002 44#define DZ_LINE_MOUSE 0x0002
42#define DZ_LINE_MODEM 0x0004 45#define DZ_LINE_MODEM 0x0004
43#define DZ_LINE_PRINTER 0x0008 46#define DZ_LINE_PRINTER 0x0008
44 47
48#define DZ_MODEM_RTS 0x0800 /* RTS for the modem line (2) */
45#define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */ 49#define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */
50#define DZ_PRINT_RTS 0x0200 /* RTS for the prntr line (3) */
51#define DZ_PRINT_DTR 0x0100 /* DTR for the prntr line (3) */
52#define DZ_LNENB 0x000f /* Transmitter Line Enable */
46 53
47/* 54/*
48 * Definitions for the Modem Status Register. 55 * Definitions for the Modem Status Register.
49 */ 56 */
57#define DZ_MODEM_RI 0x0800 /* RI for the modem line (2) */
58#define DZ_MODEM_CD 0x0400 /* CD for the modem line (2) */
50#define DZ_MODEM_DSR 0x0200 /* DSR for the modem line (2) */ 59#define DZ_MODEM_DSR 0x0200 /* DSR for the modem line (2) */
60#define DZ_MODEM_CTS 0x0100 /* CTS for the modem line (2) */
61#define DZ_PRINT_RI 0x0008 /* RI for the printer line (3) */
62#define DZ_PRINT_CD 0x0004 /* CD for the printer line (3) */
63#define DZ_PRINT_DSR 0x0002 /* DSR for the prntr line (3) */
64#define DZ_PRINT_CTS 0x0001 /* CTS for the prntr line (3) */
51 65
52/* 66/*
53 * Definitions for the Transmit Data Register. 67 * Definitions for the Transmit Data Register.
diff --git a/drivers/serial/mcfserial.c b/drivers/serial/mcfserial.c
index aee1b31f1a1c..3db206d29b33 100644
--- a/drivers/serial/mcfserial.c
+++ b/drivers/serial/mcfserial.c
@@ -60,7 +60,8 @@ struct timer_list mcfrs_timer_struct;
60#if defined(CONFIG_HW_FEITH) 60#if defined(CONFIG_HW_FEITH)
61#define CONSOLE_BAUD_RATE 38400 61#define CONSOLE_BAUD_RATE 38400
62#define DEFAULT_CBAUD B38400 62#define DEFAULT_CBAUD B38400
63#elif defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB) || defined(CONFIG_M5329EVB) 63#elif defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB) || \
64 defined(CONFIG_M5329EVB) || defined(CONFIG_GILBARCO)
64#define CONSOLE_BAUD_RATE 115200 65#define CONSOLE_BAUD_RATE 115200
65#define DEFAULT_CBAUD B115200 66#define DEFAULT_CBAUD B115200
66#elif defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \ 67#elif defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \
@@ -109,12 +110,30 @@ static struct mcf_serial mcfrs_table[] = {
109 .irq = IRQBASE, 110 .irq = IRQBASE,
110 .flags = ASYNC_BOOT_AUTOCONF, 111 .flags = ASYNC_BOOT_AUTOCONF,
111 }, 112 },
113#ifdef MCFUART_BASE2
112 { /* ttyS1 */ 114 { /* ttyS1 */
113 .magic = 0, 115 .magic = 0,
114 .addr = (volatile unsigned char *) (MCF_MBAR+MCFUART_BASE2), 116 .addr = (volatile unsigned char *) (MCF_MBAR+MCFUART_BASE2),
115 .irq = IRQBASE+1, 117 .irq = IRQBASE+1,
116 .flags = ASYNC_BOOT_AUTOCONF, 118 .flags = ASYNC_BOOT_AUTOCONF,
117 }, 119 },
120#endif
121#ifdef MCFUART_BASE3
122 { /* ttyS2 */
123 .magic = 0,
124 .addr = (volatile unsigned char *) (MCF_MBAR+MCFUART_BASE3),
125 .irq = IRQBASE+2,
126 .flags = ASYNC_BOOT_AUTOCONF,
127 },
128#endif
129#ifdef MCFUART_BASE4
130 { /* ttyS3 */
131 .magic = 0,
132 .addr = (volatile unsigned char *) (MCF_MBAR+MCFUART_BASE4),
133 .irq = IRQBASE+3,
134 .flags = ASYNC_BOOT_AUTOCONF,
135 },
136#endif
118}; 137};
119 138
120 139
@@ -1516,6 +1535,22 @@ static void mcfrs_irqinit(struct mcf_serial *info)
1516 imrp = (volatile unsigned long *) (MCF_MBAR + MCFICM_INTC0 + 1535 imrp = (volatile unsigned long *) (MCF_MBAR + MCFICM_INTC0 +
1517 MCFINTC_IMRL); 1536 MCFINTC_IMRL);
1518 *imrp &= ~((1 << (info->irq - MCFINT_VECBASE)) | 1); 1537 *imrp &= ~((1 << (info->irq - MCFINT_VECBASE)) | 1);
1538#if defined(CONFIG_M527x)
1539 {
1540 /*
1541 * External Pin Mask Setting & Enable External Pin for Interface
1542 * mrcbis@aliceposta.it
1543 */
1544 unsigned short *serpin_enable_mask;
1545 serpin_enable_mask = (MCF_IPSBAR + MCF_GPIO_PAR_UART);
1546 if (info->line == 0)
1547 *serpin_enable_mask |= UART0_ENABLE_MASK;
1548 else if (info->line == 1)
1549 *serpin_enable_mask |= UART1_ENABLE_MASK;
1550 else if (info->line == 2)
1551 *serpin_enable_mask |= UART2_ENABLE_MASK;
1552 }
1553#endif
1519#elif defined(CONFIG_M520x) 1554#elif defined(CONFIG_M520x)
1520 volatile unsigned char *icrp, *uartp; 1555 volatile unsigned char *icrp, *uartp;
1521 volatile unsigned long *imrp; 1556 volatile unsigned long *imrp;
@@ -1713,7 +1748,7 @@ mcfrs_init(void)
1713 /* Initialize the tty_driver structure */ 1748 /* Initialize the tty_driver structure */
1714 mcfrs_serial_driver->owner = THIS_MODULE; 1749 mcfrs_serial_driver->owner = THIS_MODULE;
1715 mcfrs_serial_driver->name = "ttyS"; 1750 mcfrs_serial_driver->name = "ttyS";
1716 mcfrs_serial_driver->driver_name = "serial"; 1751 mcfrs_serial_driver->driver_name = "mcfserial";
1717 mcfrs_serial_driver->major = TTY_MAJOR; 1752 mcfrs_serial_driver->major = TTY_MAJOR;
1718 mcfrs_serial_driver->minor_start = 64; 1753 mcfrs_serial_driver->minor_start = 64;
1719 mcfrs_serial_driver->type = TTY_DRIVER_TYPE_SERIAL; 1754 mcfrs_serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
@@ -1797,10 +1832,23 @@ void mcfrs_init_console(void)
1797 uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8; 1832 uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8;
1798 uartp[MCFUART_UMR] = MCFUART_MR2_STOP1; 1833 uartp[MCFUART_UMR] = MCFUART_MR2_STOP1;
1799 1834
1835#ifdef CONFIG_M5272
1836{
1837 /*
1838 * For the MCF5272, also compute the baudrate fraction.
1839 */
1840 int fraction = MCF_BUSCLK - (clk * 32 * mcfrs_console_baud);
1841 fraction *= 16;
1842 fraction /= (32 * mcfrs_console_baud);
1843 uartp[MCFUART_UFPD] = (fraction & 0xf); /* set fraction */
1844 clk = (MCF_BUSCLK / mcfrs_console_baud) / 32;
1845}
1846#else
1800 clk = ((MCF_BUSCLK / mcfrs_console_baud) + 16) / 32; /* set baud */ 1847 clk = ((MCF_BUSCLK / mcfrs_console_baud) + 16) / 32; /* set baud */
1848#endif
1849
1801 uartp[MCFUART_UBG1] = (clk & 0xff00) >> 8; /* set msb baud */ 1850 uartp[MCFUART_UBG1] = (clk & 0xff00) >> 8; /* set msb baud */
1802 uartp[MCFUART_UBG2] = (clk & 0xff); /* set lsb baud */ 1851 uartp[MCFUART_UBG2] = (clk & 0xff); /* set lsb baud */
1803
1804 uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER; 1852 uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER;
1805 uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE; 1853 uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE;
1806 1854
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 4f80c5b4a753..6dd579ed9777 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * drivers/serial/mpc52xx_uart.c
3 *
4 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs. 2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
5 * 3 *
6 * FIXME According to the usermanual the status bits in the status register 4 * FIXME According to the usermanual the status bits in the status register
@@ -14,18 +12,20 @@
14 * 12 *
15 * 13 *
16 * Maintainer : Sylvain Munaut <tnt@246tNt.com> 14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
17 * 15 *
18 * Some of the code has been inspired/copied from the 2.4 code written 16 * Some of the code has been inspired/copied from the 2.4 code written
19 * by Dale Farnsworth <dfarnsworth@mvista.com>. 17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
20 * 18 *
21 * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com> 19 * Copyright (C) 2006 Secret Lab Technologies Ltd.
20 * Grant Likely <grant.likely@secretlab.ca>
21 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
22 * Copyright (C) 2003 MontaVista, Software, Inc. 22 * Copyright (C) 2003 MontaVista, Software, Inc.
23 * 23 *
24 * This file is licensed under the terms of the GNU General Public License 24 * This file is licensed under the terms of the GNU General Public License
25 * version 2. This program is licensed "as is" without any warranty of any 25 * version 2. This program is licensed "as is" without any warranty of any
26 * kind, whether express or implied. 26 * kind, whether express or implied.
27 */ 27 */
28 28
29/* Platform device Usage : 29/* Platform device Usage :
30 * 30 *
31 * Since PSCs can have multiple function, the correct driver for each one 31 * Since PSCs can have multiple function, the correct driver for each one
@@ -44,7 +44,24 @@
44 * will be mapped to. 44 * will be mapped to.
45 */ 45 */
46 46
47#include <linux/platform_device.h> 47/* OF Platform device Usage :
48 *
49 * This driver is only used for PSCs configured in uart mode. The device
50 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
51 * and "mpc52xx-psc-uart" in the compatible string
52 *
53 * By default, PSC devices are enumerated in the order they are found. However
54 * a particular PSC number can be forces by adding 'device_no = <port#>'
55 * to the device node.
56 *
57 * The driver init all necessary registers to place the PSC in uart mode without
58 * DCD. However, the pin multiplexing aren't changed and should be set either
59 * by the bootloader or in the platform init code.
60 */
61
62#undef DEBUG
63
64#include <linux/device.h>
48#include <linux/module.h> 65#include <linux/module.h>
49#include <linux/tty.h> 66#include <linux/tty.h>
50#include <linux/serial.h> 67#include <linux/serial.h>
@@ -54,6 +71,12 @@
54#include <asm/delay.h> 71#include <asm/delay.h>
55#include <asm/io.h> 72#include <asm/io.h>
56 73
74#if defined(CONFIG_PPC_MERGE)
75#include <asm/of_platform.h>
76#else
77#include <linux/platform_device.h>
78#endif
79
57#include <asm/mpc52xx.h> 80#include <asm/mpc52xx.h>
58#include <asm/mpc52xx_psc.h> 81#include <asm/mpc52xx_psc.h>
59 82
@@ -80,6 +103,12 @@ static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
80 * it's cleared, then a memset(...,0,...) should be added to 103 * it's cleared, then a memset(...,0,...) should be added to
81 * the console_init 104 * the console_init
82 */ 105 */
106#if defined(CONFIG_PPC_MERGE)
107/* lookup table for matching device nodes to index numbers */
108static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
109
110static void mpc52xx_uart_of_enumerate(void);
111#endif
83 112
84#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase)) 113#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
85 114
@@ -96,32 +125,40 @@ static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id);
96#define uart_console(port) (0) 125#define uart_console(port) (0)
97#endif 126#endif
98 127
128#if defined(CONFIG_PPC_MERGE)
129static struct of_device_id mpc52xx_uart_of_match[] = {
130 { .type = "serial", .compatible = "mpc52xx-psc-uart", },
131 { .type = "serial", .compatible = "mpc5200-psc", }, /* Efika only! */
132 {},
133};
134#endif
135
99 136
100/* ======================================================================== */ 137/* ======================================================================== */
101/* UART operations */ 138/* UART operations */
102/* ======================================================================== */ 139/* ======================================================================== */
103 140
104static unsigned int 141static unsigned int
105mpc52xx_uart_tx_empty(struct uart_port *port) 142mpc52xx_uart_tx_empty(struct uart_port *port)
106{ 143{
107 int status = in_be16(&PSC(port)->mpc52xx_psc_status); 144 int status = in_be16(&PSC(port)->mpc52xx_psc_status);
108 return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0; 145 return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
109} 146}
110 147
111static void 148static void
112mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) 149mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
113{ 150{
114 /* Not implemented */ 151 /* Not implemented */
115} 152}
116 153
117static unsigned int 154static unsigned int
118mpc52xx_uart_get_mctrl(struct uart_port *port) 155mpc52xx_uart_get_mctrl(struct uart_port *port)
119{ 156{
120 /* Not implemented */ 157 /* Not implemented */
121 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 158 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
122} 159}
123 160
124static void 161static void
125mpc52xx_uart_stop_tx(struct uart_port *port) 162mpc52xx_uart_stop_tx(struct uart_port *port)
126{ 163{
127 /* port->lock taken by caller */ 164 /* port->lock taken by caller */
@@ -129,7 +166,7 @@ mpc52xx_uart_stop_tx(struct uart_port *port)
129 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask); 166 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
130} 167}
131 168
132static void 169static void
133mpc52xx_uart_start_tx(struct uart_port *port) 170mpc52xx_uart_start_tx(struct uart_port *port)
134{ 171{
135 /* port->lock taken by caller */ 172 /* port->lock taken by caller */
@@ -137,12 +174,12 @@ mpc52xx_uart_start_tx(struct uart_port *port)
137 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask); 174 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
138} 175}
139 176
140static void 177static void
141mpc52xx_uart_send_xchar(struct uart_port *port, char ch) 178mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
142{ 179{
143 unsigned long flags; 180 unsigned long flags;
144 spin_lock_irqsave(&port->lock, flags); 181 spin_lock_irqsave(&port->lock, flags);
145 182
146 port->x_char = ch; 183 port->x_char = ch;
147 if (ch) { 184 if (ch) {
148 /* Make sure tx interrupts are on */ 185 /* Make sure tx interrupts are on */
@@ -150,7 +187,7 @@ mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
150 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; 187 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
151 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask); 188 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
152 } 189 }
153 190
154 spin_unlock_irqrestore(&port->lock, flags); 191 spin_unlock_irqrestore(&port->lock, flags);
155} 192}
156 193
@@ -178,7 +215,7 @@ mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
178 out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK); 215 out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
179 else 216 else
180 out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK); 217 out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
181 218
182 spin_unlock_irqrestore(&port->lock, flags); 219 spin_unlock_irqrestore(&port->lock, flags);
183} 220}
184 221
@@ -197,11 +234,11 @@ mpc52xx_uart_startup(struct uart_port *port)
197 /* Reset/activate the port, clear and enable interrupts */ 234 /* Reset/activate the port, clear and enable interrupts */
198 out_8(&psc->command,MPC52xx_PSC_RST_RX); 235 out_8(&psc->command,MPC52xx_PSC_RST_RX);
199 out_8(&psc->command,MPC52xx_PSC_RST_TX); 236 out_8(&psc->command,MPC52xx_PSC_RST_TX);
200 237
201 out_be32(&psc->sicr,0); /* UART mode DCD ignored */ 238 out_be32(&psc->sicr,0); /* UART mode DCD ignored */
202 239
203 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */ 240 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
204 241
205 out_8(&psc->rfcntl, 0x00); 242 out_8(&psc->rfcntl, 0x00);
206 out_be16(&psc->rfalarm, 0x1ff); 243 out_be16(&psc->rfalarm, 0x1ff);
207 out_8(&psc->tfcntl, 0x07); 244 out_8(&psc->tfcntl, 0x07);
@@ -209,10 +246,10 @@ mpc52xx_uart_startup(struct uart_port *port)
209 246
210 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY; 247 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
211 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask); 248 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
212 249
213 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE); 250 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
214 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE); 251 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
215 252
216 return 0; 253 return 0;
217} 254}
218 255
@@ -220,19 +257,19 @@ static void
220mpc52xx_uart_shutdown(struct uart_port *port) 257mpc52xx_uart_shutdown(struct uart_port *port)
221{ 258{
222 struct mpc52xx_psc __iomem *psc = PSC(port); 259 struct mpc52xx_psc __iomem *psc = PSC(port);
223 260
224 /* Shut down the port, interrupt and all */ 261 /* Shut down the port, interrupt and all */
225 out_8(&psc->command,MPC52xx_PSC_RST_RX); 262 out_8(&psc->command,MPC52xx_PSC_RST_RX);
226 out_8(&psc->command,MPC52xx_PSC_RST_TX); 263 out_8(&psc->command,MPC52xx_PSC_RST_TX);
227 264
228 port->read_status_mask = 0; 265 port->read_status_mask = 0;
229 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask); 266 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
230 267
231 /* Release interrupt */ 268 /* Release interrupt */
232 free_irq(port->irq, port); 269 free_irq(port->irq, port);
233} 270}
234 271
235static void 272static void
236mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new, 273mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
237 struct termios *old) 274 struct termios *old)
238{ 275{
@@ -241,10 +278,10 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
241 unsigned char mr1, mr2; 278 unsigned char mr1, mr2;
242 unsigned short ctr; 279 unsigned short ctr;
243 unsigned int j, baud, quot; 280 unsigned int j, baud, quot;
244 281
245 /* Prepare what we're gonna write */ 282 /* Prepare what we're gonna write */
246 mr1 = 0; 283 mr1 = 0;
247 284
248 switch (new->c_cflag & CSIZE) { 285 switch (new->c_cflag & CSIZE) {
249 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS; 286 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
250 break; 287 break;
@@ -261,8 +298,8 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
261 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN; 298 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
262 } else 299 } else
263 mr1 |= MPC52xx_PSC_MODE_PARNONE; 300 mr1 |= MPC52xx_PSC_MODE_PARNONE;
264 301
265 302
266 mr2 = 0; 303 mr2 = 0;
267 304
268 if (new->c_cflag & CSTOPB) 305 if (new->c_cflag & CSTOPB)
@@ -276,7 +313,7 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
276 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16); 313 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
277 quot = uart_get_divisor(port, baud); 314 quot = uart_get_divisor(port, baud);
278 ctr = quot & 0xffff; 315 ctr = quot & 0xffff;
279 316
280 /* Get the lock */ 317 /* Get the lock */
281 spin_lock_irqsave(&port->lock, flags); 318 spin_lock_irqsave(&port->lock, flags);
282 319
@@ -290,14 +327,14 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
290 * boot for the console, all stuff is not yet ready to receive at that 327 * boot for the console, all stuff is not yet ready to receive at that
291 * time and that just makes the kernel oops */ 328 * time and that just makes the kernel oops */
292 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */ 329 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
293 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && 330 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
294 --j) 331 --j)
295 udelay(1); 332 udelay(1);
296 333
297 if (!j) 334 if (!j)
298 printk( KERN_ERR "mpc52xx_uart.c: " 335 printk( KERN_ERR "mpc52xx_uart.c: "
299 "Unable to flush RX & TX fifos in-time in set_termios." 336 "Unable to flush RX & TX fifos in-time in set_termios."
300 "Some chars may have been lost.\n" ); 337 "Some chars may have been lost.\n" );
301 338
302 /* Reset the TX & RX */ 339 /* Reset the TX & RX */
303 out_8(&psc->command,MPC52xx_PSC_RST_RX); 340 out_8(&psc->command,MPC52xx_PSC_RST_RX);
@@ -309,7 +346,7 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
309 out_8(&psc->mode,mr2); 346 out_8(&psc->mode,mr2);
310 out_8(&psc->ctur,ctr >> 8); 347 out_8(&psc->ctur,ctr >> 8);
311 out_8(&psc->ctlr,ctr & 0xff); 348 out_8(&psc->ctlr,ctr & 0xff);
312 349
313 /* Reenable TX & RX */ 350 /* Reenable TX & RX */
314 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE); 351 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
315 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE); 352 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
@@ -332,7 +369,7 @@ mpc52xx_uart_release_port(struct uart_port *port)
332 port->membase = NULL; 369 port->membase = NULL;
333 } 370 }
334 371
335 release_mem_region(port->mapbase, MPC52xx_PSC_SIZE); 372 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
336} 373}
337 374
338static int 375static int
@@ -341,12 +378,13 @@ mpc52xx_uart_request_port(struct uart_port *port)
341 int err; 378 int err;
342 379
343 if (port->flags & UPF_IOREMAP) /* Need to remap ? */ 380 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
344 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE); 381 port->membase = ioremap(port->mapbase,
382 sizeof(struct mpc52xx_psc));
345 383
346 if (!port->membase) 384 if (!port->membase)
347 return -EINVAL; 385 return -EINVAL;
348 386
349 err = request_mem_region(port->mapbase, MPC52xx_PSC_SIZE, 387 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
350 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY; 388 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
351 389
352 if (err && (port->flags & UPF_IOREMAP)) { 390 if (err && (port->flags & UPF_IOREMAP)) {
@@ -373,7 +411,7 @@ mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
373 411
374 if ( (ser->irq != port->irq) || 412 if ( (ser->irq != port->irq) ||
375 (ser->io_type != SERIAL_IO_MEM) || 413 (ser->io_type != SERIAL_IO_MEM) ||
376 (ser->baud_base != port->uartclk) || 414 (ser->baud_base != port->uartclk) ||
377 (ser->iomem_base != (void*)port->mapbase) || 415 (ser->iomem_base != (void*)port->mapbase) ||
378 (ser->hub6 != 0 ) ) 416 (ser->hub6 != 0 ) )
379 return -EINVAL; 417 return -EINVAL;
@@ -404,11 +442,11 @@ static struct uart_ops mpc52xx_uart_ops = {
404 .verify_port = mpc52xx_uart_verify_port 442 .verify_port = mpc52xx_uart_verify_port
405}; 443};
406 444
407 445
408/* ======================================================================== */ 446/* ======================================================================== */
409/* Interrupt handling */ 447/* Interrupt handling */
410/* ======================================================================== */ 448/* ======================================================================== */
411 449
412static inline int 450static inline int
413mpc52xx_uart_int_rx_chars(struct uart_port *port) 451mpc52xx_uart_int_rx_chars(struct uart_port *port)
414{ 452{
@@ -435,11 +473,11 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
435 473
436 flag = TTY_NORMAL; 474 flag = TTY_NORMAL;
437 port->icount.rx++; 475 port->icount.rx++;
438 476
439 if ( status & (MPC52xx_PSC_SR_PE | 477 if ( status & (MPC52xx_PSC_SR_PE |
440 MPC52xx_PSC_SR_FE | 478 MPC52xx_PSC_SR_FE |
441 MPC52xx_PSC_SR_RB) ) { 479 MPC52xx_PSC_SR_RB) ) {
442 480
443 if (status & MPC52xx_PSC_SR_RB) { 481 if (status & MPC52xx_PSC_SR_RB) {
444 flag = TTY_BREAK; 482 flag = TTY_BREAK;
445 uart_handle_break(port); 483 uart_handle_break(port);
@@ -464,7 +502,7 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
464 } 502 }
465 503
466 tty_flip_buffer_push(tty); 504 tty_flip_buffer_push(tty);
467 505
468 return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY; 506 return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
469} 507}
470 508
@@ -509,25 +547,25 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port)
509 return 1; 547 return 1;
510} 548}
511 549
512static irqreturn_t 550static irqreturn_t
513mpc52xx_uart_int(int irq, void *dev_id) 551mpc52xx_uart_int(int irq, void *dev_id)
514{ 552{
515 struct uart_port *port = dev_id; 553 struct uart_port *port = dev_id;
516 unsigned long pass = ISR_PASS_LIMIT; 554 unsigned long pass = ISR_PASS_LIMIT;
517 unsigned int keepgoing; 555 unsigned int keepgoing;
518 unsigned short status; 556 unsigned short status;
519 557
520 spin_lock(&port->lock); 558 spin_lock(&port->lock);
521 559
522 /* While we have stuff to do, we continue */ 560 /* While we have stuff to do, we continue */
523 do { 561 do {
524 /* If we don't find anything to do, we stop */ 562 /* If we don't find anything to do, we stop */
525 keepgoing = 0; 563 keepgoing = 0;
526 564
527 /* Read status */ 565 /* Read status */
528 status = in_be16(&PSC(port)->mpc52xx_psc_isr); 566 status = in_be16(&PSC(port)->mpc52xx_psc_isr);
529 status &= port->read_status_mask; 567 status &= port->read_status_mask;
530 568
531 /* Do we need to receive chars ? */ 569 /* Do we need to receive chars ? */
532 /* For this RX interrupts must be on and some chars waiting */ 570 /* For this RX interrupts must be on and some chars waiting */
533 if ( status & MPC52xx_PSC_IMR_RXRDY ) 571 if ( status & MPC52xx_PSC_IMR_RXRDY )
@@ -537,15 +575,15 @@ mpc52xx_uart_int(int irq, void *dev_id)
537 /* For this, TX must be ready and TX interrupt enabled */ 575 /* For this, TX must be ready and TX interrupt enabled */
538 if ( status & MPC52xx_PSC_IMR_TXRDY ) 576 if ( status & MPC52xx_PSC_IMR_TXRDY )
539 keepgoing |= mpc52xx_uart_int_tx_chars(port); 577 keepgoing |= mpc52xx_uart_int_tx_chars(port);
540 578
541 /* Limit number of iteration */ 579 /* Limit number of iteration */
542 if ( !(--pass) ) 580 if ( !(--pass) )
543 keepgoing = 0; 581 keepgoing = 0;
544 582
545 } while (keepgoing); 583 } while (keepgoing);
546 584
547 spin_unlock(&port->lock); 585 spin_unlock(&port->lock);
548 586
549 return IRQ_HANDLED; 587 return IRQ_HANDLED;
550} 588}
551 589
@@ -563,13 +601,18 @@ mpc52xx_console_get_options(struct uart_port *port,
563 struct mpc52xx_psc __iomem *psc = PSC(port); 601 struct mpc52xx_psc __iomem *psc = PSC(port);
564 unsigned char mr1; 602 unsigned char mr1;
565 603
604 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
605
566 /* Read the mode registers */ 606 /* Read the mode registers */
567 out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1); 607 out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
568 mr1 = in_8(&psc->mode); 608 mr1 = in_8(&psc->mode);
569 609
570 /* CT{U,L}R are write-only ! */ 610 /* CT{U,L}R are write-only ! */
571 *baud = __res.bi_baudrate ? 611 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
572 __res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; 612#if !defined(CONFIG_PPC_MERGE)
613 if (__res.bi_baudrate)
614 *baud = __res.bi_baudrate;
615#endif
573 616
574 /* Parse them */ 617 /* Parse them */
575 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) { 618 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
@@ -579,26 +622,26 @@ mpc52xx_console_get_options(struct uart_port *port,
579 case MPC52xx_PSC_MODE_8_BITS: 622 case MPC52xx_PSC_MODE_8_BITS:
580 default: *bits = 8; 623 default: *bits = 8;
581 } 624 }
582 625
583 if (mr1 & MPC52xx_PSC_MODE_PARNONE) 626 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
584 *parity = 'n'; 627 *parity = 'n';
585 else 628 else
586 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e'; 629 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
587} 630}
588 631
589static void 632static void
590mpc52xx_console_write(struct console *co, const char *s, unsigned int count) 633mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
591{ 634{
592 struct uart_port *port = &mpc52xx_uart_ports[co->index]; 635 struct uart_port *port = &mpc52xx_uart_ports[co->index];
593 struct mpc52xx_psc __iomem *psc = PSC(port); 636 struct mpc52xx_psc __iomem *psc = PSC(port);
594 unsigned int i, j; 637 unsigned int i, j;
595 638
596 /* Disable interrupts */ 639 /* Disable interrupts */
597 out_be16(&psc->mpc52xx_psc_imr, 0); 640 out_be16(&psc->mpc52xx_psc_imr, 0);
598 641
599 /* Wait the TX buffer to be empty */ 642 /* Wait the TX buffer to be empty */
600 j = 5000000; /* Maximum wait */ 643 j = 5000000; /* Maximum wait */
601 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && 644 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
602 --j) 645 --j)
603 udelay(1); 646 udelay(1);
604 647
@@ -607,13 +650,13 @@ mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
607 /* Line return handling */ 650 /* Line return handling */
608 if (*s == '\n') 651 if (*s == '\n')
609 out_8(&psc->mpc52xx_psc_buffer_8, '\r'); 652 out_8(&psc->mpc52xx_psc_buffer_8, '\r');
610 653
611 /* Send the char */ 654 /* Send the char */
612 out_8(&psc->mpc52xx_psc_buffer_8, *s); 655 out_8(&psc->mpc52xx_psc_buffer_8, *s);
613 656
614 /* Wait the TX buffer to be empty */ 657 /* Wait the TX buffer to be empty */
615 j = 20000; /* Maximum wait */ 658 j = 20000; /* Maximum wait */
616 while (!(in_be16(&psc->mpc52xx_psc_status) & 659 while (!(in_be16(&psc->mpc52xx_psc_status) &
617 MPC52xx_PSC_SR_TXEMP) && --j) 660 MPC52xx_PSC_SR_TXEMP) && --j)
618 udelay(1); 661 udelay(1);
619 } 662 }
@@ -622,6 +665,7 @@ mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
622 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); 665 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
623} 666}
624 667
668#if !defined(CONFIG_PPC_MERGE)
625static int __init 669static int __init
626mpc52xx_console_setup(struct console *co, char *options) 670mpc52xx_console_setup(struct console *co, char *options)
627{ 671{
@@ -634,7 +678,7 @@ mpc52xx_console_setup(struct console *co, char *options)
634 678
635 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM) 679 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
636 return -EINVAL; 680 return -EINVAL;
637 681
638 /* Basic port init. Needed since we use some uart_??? func before 682 /* Basic port init. Needed since we use some uart_??? func before
639 * real init for early access */ 683 * real init for early access */
640 spin_lock_init(&port->lock); 684 spin_lock_init(&port->lock);
@@ -656,6 +700,78 @@ mpc52xx_console_setup(struct console *co, char *options)
656 return uart_set_options(port, co, baud, parity, bits, flow); 700 return uart_set_options(port, co, baud, parity, bits, flow);
657} 701}
658 702
703#else
704
705static int __init
706mpc52xx_console_setup(struct console *co, char *options)
707{
708 struct uart_port *port = &mpc52xx_uart_ports[co->index];
709 struct device_node *np = mpc52xx_uart_nodes[co->index];
710 unsigned int ipb_freq;
711 struct resource res;
712 int ret;
713
714 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
715 int bits = 8;
716 int parity = 'n';
717 int flow = 'n';
718
719 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
720 co, co->index, options);
721
722 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
723 pr_debug("PSC%x out of range\n", co->index);
724 return -EINVAL;
725 }
726
727 if (!np) {
728 pr_debug("PSC%x not found in device tree\n", co->index);
729 return -EINVAL;
730 }
731
732 pr_debug("Console on ttyPSC%x is %s\n",
733 co->index, mpc52xx_uart_nodes[co->index]->full_name);
734
735 /* Fetch register locations */
736 if ((ret = of_address_to_resource(np, 0, &res)) != 0) {
737 pr_debug("Could not get resources for PSC%x\n", co->index);
738 return ret;
739 }
740
741 /* Search for bus-frequency property in this node or a parent */
742 if ((ipb_freq = mpc52xx_find_ipb_freq(np)) == 0) {
743 pr_debug("Could not find IPB bus frequency!\n");
744 return -EINVAL;
745 }
746
747 /* Basic port init. Needed since we use some uart_??? func before
748 * real init for early access */
749 spin_lock_init(&port->lock);
750 port->uartclk = ipb_freq / 2;
751 port->ops = &mpc52xx_uart_ops;
752 port->mapbase = res.start;
753 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
754 port->irq = irq_of_parse_and_map(np, 0);
755
756 if (port->membase == NULL)
757 return -EINVAL;
758
759 pr_debug("mpc52xx-psc uart at %lx, mapped to %p, irq=%x, freq=%i\n",
760 port->mapbase, port->membase, port->irq, port->uartclk);
761
762 /* Setup the port parameters accoding to options */
763 if (options)
764 uart_parse_options(options, &baud, &parity, &bits, &flow);
765 else
766 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
767
768 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
769 baud, bits, parity, flow);
770
771 return uart_set_options(port, co, baud, parity, bits, flow);
772}
773#endif /* defined(CONFIG_PPC_MERGE) */
774
659 775
660static struct uart_driver mpc52xx_uart_driver; 776static struct uart_driver mpc52xx_uart_driver;
661 777
@@ -669,10 +785,11 @@ static struct console mpc52xx_console = {
669 .data = &mpc52xx_uart_driver, 785 .data = &mpc52xx_uart_driver,
670}; 786};
671 787
672 788
673static int __init 789static int __init
674mpc52xx_console_init(void) 790mpc52xx_console_init(void)
675{ 791{
792 mpc52xx_uart_of_enumerate();
676 register_console(&mpc52xx_console); 793 register_console(&mpc52xx_console);
677 return 0; 794 return 0;
678} 795}
@@ -700,6 +817,7 @@ static struct uart_driver mpc52xx_uart_driver = {
700}; 817};
701 818
702 819
820#if !defined(CONFIG_PPC_MERGE)
703/* ======================================================================== */ 821/* ======================================================================== */
704/* Platform Driver */ 822/* Platform Driver */
705/* ======================================================================== */ 823/* ======================================================================== */
@@ -723,8 +841,6 @@ mpc52xx_uart_probe(struct platform_device *dev)
723 /* Init the port structure */ 841 /* Init the port structure */
724 port = &mpc52xx_uart_ports[idx]; 842 port = &mpc52xx_uart_ports[idx];
725 843
726 memset(port, 0x00, sizeof(struct uart_port));
727
728 spin_lock_init(&port->lock); 844 spin_lock_init(&port->lock);
729 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */ 845 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
730 port->fifosize = 512; 846 port->fifosize = 512;
@@ -733,6 +849,7 @@ mpc52xx_uart_probe(struct platform_device *dev)
733 ( uart_console(port) ? 0 : UPF_IOREMAP ); 849 ( uart_console(port) ? 0 : UPF_IOREMAP );
734 port->line = idx; 850 port->line = idx;
735 port->ops = &mpc52xx_uart_ops; 851 port->ops = &mpc52xx_uart_ops;
852 port->dev = &dev->dev;
736 853
737 /* Search for IRQ and mapbase */ 854 /* Search for IRQ and mapbase */
738 for (i=0 ; i<dev->num_resources ; i++, res++) { 855 for (i=0 ; i<dev->num_resources ; i++, res++) {
@@ -771,7 +888,7 @@ mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
771{ 888{
772 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev); 889 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
773 890
774 if (sport) 891 if (port)
775 uart_suspend_port(&mpc52xx_uart_driver, port); 892 uart_suspend_port(&mpc52xx_uart_driver, port);
776 893
777 return 0; 894 return 0;
@@ -789,6 +906,7 @@ mpc52xx_uart_resume(struct platform_device *dev)
789} 906}
790#endif 907#endif
791 908
909
792static struct platform_driver mpc52xx_uart_platform_driver = { 910static struct platform_driver mpc52xx_uart_platform_driver = {
793 .probe = mpc52xx_uart_probe, 911 .probe = mpc52xx_uart_probe,
794 .remove = mpc52xx_uart_remove, 912 .remove = mpc52xx_uart_remove,
@@ -800,6 +918,184 @@ static struct platform_driver mpc52xx_uart_platform_driver = {
800 .name = "mpc52xx-psc", 918 .name = "mpc52xx-psc",
801 }, 919 },
802}; 920};
921#endif /* !defined(CONFIG_PPC_MERGE) */
922
923
924#if defined(CONFIG_PPC_MERGE)
925/* ======================================================================== */
926/* OF Platform Driver */
927/* ======================================================================== */
928
929static int __devinit
930mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
931{
932 int idx = -1;
933 unsigned int ipb_freq;
934 struct uart_port *port = NULL;
935 struct resource res;
936 int ret;
937
938 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
939
940 /* Check validity & presence */
941 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
942 if (mpc52xx_uart_nodes[idx] == op->node)
943 break;
944 if (idx >= MPC52xx_PSC_MAXNUM)
945 return -EINVAL;
946 pr_debug("Found %s assigned to ttyPSC%x\n",
947 mpc52xx_uart_nodes[idx]->full_name, idx);
948
949 /* Search for bus-frequency property in this node or a parent */
950 if ((ipb_freq = mpc52xx_find_ipb_freq(op->node)) == 0) {
951 dev_dbg(&op->dev, "Could not find IPB bus frequency!\n");
952 return -EINVAL;
953 }
954
955 /* Init the port structure */
956 port = &mpc52xx_uart_ports[idx];
957
958 spin_lock_init(&port->lock);
959 port->uartclk = ipb_freq / 2;
960 port->fifosize = 512;
961 port->iotype = UPIO_MEM;
962 port->flags = UPF_BOOT_AUTOCONF |
963 ( uart_console(port) ? 0 : UPF_IOREMAP );
964 port->line = idx;
965 port->ops = &mpc52xx_uart_ops;
966 port->dev = &op->dev;
967
968 /* Search for IRQ and mapbase */
969 if ((ret = of_address_to_resource(op->node, 0, &res)) != 0)
970 return ret;
971
972 port->mapbase = res.start;
973 port->irq = irq_of_parse_and_map(op->node, 0);
974
975 dev_dbg(&op->dev, "mpc52xx-psc uart at %lx, irq=%x, freq=%i\n",
976 port->mapbase, port->irq, port->uartclk);
977
978 if ((port->irq==NO_IRQ) || !port->mapbase) {
979 printk(KERN_ERR "Could not allocate resources for PSC\n");
980 return -EINVAL;
981 }
982
983 /* Add the port to the uart sub-system */
984 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
985 if (!ret)
986 dev_set_drvdata(&op->dev, (void*)port);
987
988 return ret;
989}
990
991static int
992mpc52xx_uart_of_remove(struct of_device *op)
993{
994 struct uart_port *port = dev_get_drvdata(&op->dev);
995 dev_set_drvdata(&op->dev, NULL);
996
997 if (port)
998 uart_remove_one_port(&mpc52xx_uart_driver, port);
999
1000 return 0;
1001}
1002
1003#ifdef CONFIG_PM
1004static int
1005mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1006{
1007 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1008
1009 if (port)
1010 uart_suspend_port(&mpc52xx_uart_driver, port);
1011
1012 return 0;
1013}
1014
1015static int
1016mpc52xx_uart_of_resume(struct of_device *op)
1017{
1018 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1019
1020 if (port)
1021 uart_resume_port(&mpc52xx_uart_driver, port);
1022
1023 return 0;
1024}
1025#endif
1026
1027static void
1028mpc52xx_uart_of_assign(struct device_node *np, int idx)
1029{
1030 int free_idx = -1;
1031 int i;
1032
1033 /* Find the first free node */
1034 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1035 if (mpc52xx_uart_nodes[i] == NULL) {
1036 free_idx = i;
1037 break;
1038 }
1039 }
1040
1041 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1042 idx = free_idx;
1043
1044 if (idx < 0)
1045 return; /* No free slot; abort */
1046
1047 /* If the slot is already occupied, then swap slots */
1048 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1049 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
1050 mpc52xx_uart_nodes[i] = np;
1051}
1052
1053static void
1054mpc52xx_uart_of_enumerate(void)
1055{
1056 static int enum_done = 0;
1057 struct device_node *np;
1058 const unsigned int *devno;
1059 int i;
1060
1061 if (enum_done)
1062 return;
1063
1064 for_each_node_by_type(np, "serial") {
1065 if (!of_match_node(mpc52xx_uart_of_match, np))
1066 continue;
1067
1068 /* Is a particular device number requested? */
1069 devno = get_property(np, "device_no", NULL);
1070 mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1);
1071 }
1072
1073 enum_done = 1;
1074
1075 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1076 if (mpc52xx_uart_nodes[i])
1077 pr_debug("%s assigned to ttyPSC%x\n",
1078 mpc52xx_uart_nodes[i]->full_name, i);
1079 }
1080}
1081
1082MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1083
1084static struct of_platform_driver mpc52xx_uart_of_driver = {
1085 .owner = THIS_MODULE,
1086 .name = "mpc52xx-psc-uart",
1087 .match_table = mpc52xx_uart_of_match,
1088 .probe = mpc52xx_uart_of_probe,
1089 .remove = mpc52xx_uart_of_remove,
1090#ifdef CONFIG_PM
1091 .suspend = mpc52xx_uart_of_suspend,
1092 .resume = mpc52xx_uart_of_resume,
1093#endif
1094 .driver = {
1095 .name = "mpc52xx-psc-uart",
1096 },
1097};
1098#endif /* defined(CONFIG_PPC_MERGE) */
803 1099
804 1100
805/* ======================================================================== */ 1101/* ======================================================================== */
@@ -811,22 +1107,45 @@ mpc52xx_uart_init(void)
811{ 1107{
812 int ret; 1108 int ret;
813 1109
814 printk(KERN_INFO "Serial: MPC52xx PSC driver\n"); 1110 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
815 1111
816 ret = uart_register_driver(&mpc52xx_uart_driver); 1112 if ((ret = uart_register_driver(&mpc52xx_uart_driver)) != 0) {
817 if (ret == 0) { 1113 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
818 ret = platform_driver_register(&mpc52xx_uart_platform_driver); 1114 __FILE__, ret);
819 if (ret) 1115 return ret;
820 uart_unregister_driver(&mpc52xx_uart_driver);
821 } 1116 }
822 1117
823 return ret; 1118#if defined(CONFIG_PPC_MERGE)
1119 mpc52xx_uart_of_enumerate();
1120
1121 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1122 if (ret) {
1123 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1124 __FILE__, ret);
1125 uart_unregister_driver(&mpc52xx_uart_driver);
1126 return ret;
1127 }
1128#else
1129 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
1130 if (ret) {
1131 printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
1132 __FILE__, ret);
1133 uart_unregister_driver(&mpc52xx_uart_driver);
1134 return ret;
1135 }
1136#endif
1137
1138 return 0;
824} 1139}
825 1140
826static void __exit 1141static void __exit
827mpc52xx_uart_exit(void) 1142mpc52xx_uart_exit(void)
828{ 1143{
1144#if defined(CONFIG_PPC_MERGE)
1145 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1146#else
829 platform_driver_unregister(&mpc52xx_uart_platform_driver); 1147 platform_driver_unregister(&mpc52xx_uart_platform_driver);
1148#endif
830 uart_unregister_driver(&mpc52xx_uart_driver); 1149 uart_unregister_driver(&mpc52xx_uart_driver);
831} 1150}
832 1151
diff --git a/drivers/serial/mpsc.c b/drivers/serial/mpsc.c
index 8eea69f29989..29823bd60fb0 100644
--- a/drivers/serial/mpsc.c
+++ b/drivers/serial/mpsc.c
@@ -555,7 +555,7 @@ mpsc_sdma_start_tx(struct mpsc_port_info *pi)
555 if (!mpsc_sdma_tx_active(pi)) { 555 if (!mpsc_sdma_tx_active(pi)) {
556 txre = (struct mpsc_tx_desc *)(pi->txr + 556 txre = (struct mpsc_tx_desc *)(pi->txr +
557 (pi->txr_tail * MPSC_TXRE_SIZE)); 557 (pi->txr_tail * MPSC_TXRE_SIZE));
558 dma_cache_sync((void *) txre, MPSC_TXRE_SIZE, DMA_FROM_DEVICE); 558 dma_cache_sync(pi->port.dev, (void *) txre, MPSC_TXRE_SIZE, DMA_FROM_DEVICE);
559#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 559#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
560 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 560 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
561 invalidate_dcache_range((ulong)txre, 561 invalidate_dcache_range((ulong)txre,
@@ -931,7 +931,7 @@ mpsc_init_rings(struct mpsc_port_info *pi)
931 } 931 }
932 txre->link = cpu_to_be32(pi->txr_p); /* Wrap last back to first */ 932 txre->link = cpu_to_be32(pi->txr_p); /* Wrap last back to first */
933 933
934 dma_cache_sync((void *) pi->dma_region, MPSC_DMA_ALLOC_SIZE, 934 dma_cache_sync(pi->port.dev, (void *) pi->dma_region, MPSC_DMA_ALLOC_SIZE,
935 DMA_BIDIRECTIONAL); 935 DMA_BIDIRECTIONAL);
936#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 936#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
937 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 937 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
@@ -1005,7 +1005,7 @@ mpsc_rx_intr(struct mpsc_port_info *pi)
1005 1005
1006 rxre = (struct mpsc_rx_desc *)(pi->rxr + (pi->rxr_posn*MPSC_RXRE_SIZE)); 1006 rxre = (struct mpsc_rx_desc *)(pi->rxr + (pi->rxr_posn*MPSC_RXRE_SIZE));
1007 1007
1008 dma_cache_sync((void *)rxre, MPSC_RXRE_SIZE, DMA_FROM_DEVICE); 1008 dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, DMA_FROM_DEVICE);
1009#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1009#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1010 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1010 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1011 invalidate_dcache_range((ulong)rxre, 1011 invalidate_dcache_range((ulong)rxre,
@@ -1029,7 +1029,7 @@ mpsc_rx_intr(struct mpsc_port_info *pi)
1029 } 1029 }
1030 1030
1031 bp = pi->rxb + (pi->rxr_posn * MPSC_RXBE_SIZE); 1031 bp = pi->rxb + (pi->rxr_posn * MPSC_RXBE_SIZE);
1032 dma_cache_sync((void *) bp, MPSC_RXBE_SIZE, DMA_FROM_DEVICE); 1032 dma_cache_sync(pi->port.dev, (void *) bp, MPSC_RXBE_SIZE, DMA_FROM_DEVICE);
1033#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1033#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1034 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1034 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1035 invalidate_dcache_range((ulong)bp, 1035 invalidate_dcache_range((ulong)bp,
@@ -1098,7 +1098,7 @@ next_frame:
1098 SDMA_DESC_CMDSTAT_F | 1098 SDMA_DESC_CMDSTAT_F |
1099 SDMA_DESC_CMDSTAT_L); 1099 SDMA_DESC_CMDSTAT_L);
1100 wmb(); 1100 wmb();
1101 dma_cache_sync((void *)rxre, MPSC_RXRE_SIZE, DMA_BIDIRECTIONAL); 1101 dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, DMA_BIDIRECTIONAL);
1102#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1102#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1103 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1103 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1104 flush_dcache_range((ulong)rxre, 1104 flush_dcache_range((ulong)rxre,
@@ -1109,7 +1109,7 @@ next_frame:
1109 pi->rxr_posn = (pi->rxr_posn + 1) & (MPSC_RXR_ENTRIES - 1); 1109 pi->rxr_posn = (pi->rxr_posn + 1) & (MPSC_RXR_ENTRIES - 1);
1110 rxre = (struct mpsc_rx_desc *)(pi->rxr + 1110 rxre = (struct mpsc_rx_desc *)(pi->rxr +
1111 (pi->rxr_posn * MPSC_RXRE_SIZE)); 1111 (pi->rxr_posn * MPSC_RXRE_SIZE));
1112 dma_cache_sync((void *)rxre, MPSC_RXRE_SIZE, DMA_FROM_DEVICE); 1112 dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, DMA_FROM_DEVICE);
1113#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1113#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1114 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1114 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1115 invalidate_dcache_range((ulong)rxre, 1115 invalidate_dcache_range((ulong)rxre,
@@ -1143,7 +1143,7 @@ mpsc_setup_tx_desc(struct mpsc_port_info *pi, u32 count, u32 intr)
1143 SDMA_DESC_CMDSTAT_EI 1143 SDMA_DESC_CMDSTAT_EI
1144 : 0)); 1144 : 0));
1145 wmb(); 1145 wmb();
1146 dma_cache_sync((void *) txre, MPSC_TXRE_SIZE, DMA_BIDIRECTIONAL); 1146 dma_cache_sync(pi->port.dev, (void *) txre, MPSC_TXRE_SIZE, DMA_BIDIRECTIONAL);
1147#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1147#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1148 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1148 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1149 flush_dcache_range((ulong)txre, 1149 flush_dcache_range((ulong)txre,
@@ -1192,7 +1192,7 @@ mpsc_copy_tx_data(struct mpsc_port_info *pi)
1192 else /* All tx data copied into ring bufs */ 1192 else /* All tx data copied into ring bufs */
1193 return; 1193 return;
1194 1194
1195 dma_cache_sync((void *) bp, MPSC_TXBE_SIZE, DMA_BIDIRECTIONAL); 1195 dma_cache_sync(pi->port.dev, (void *) bp, MPSC_TXBE_SIZE, DMA_BIDIRECTIONAL);
1196#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1196#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1197 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1197 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1198 flush_dcache_range((ulong)bp, 1198 flush_dcache_range((ulong)bp,
@@ -1217,7 +1217,7 @@ mpsc_tx_intr(struct mpsc_port_info *pi)
1217 txre = (struct mpsc_tx_desc *)(pi->txr + 1217 txre = (struct mpsc_tx_desc *)(pi->txr +
1218 (pi->txr_tail * MPSC_TXRE_SIZE)); 1218 (pi->txr_tail * MPSC_TXRE_SIZE));
1219 1219
1220 dma_cache_sync((void *) txre, MPSC_TXRE_SIZE, DMA_FROM_DEVICE); 1220 dma_cache_sync(pi->port.dev, (void *) txre, MPSC_TXRE_SIZE, DMA_FROM_DEVICE);
1221#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1221#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1222 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1222 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1223 invalidate_dcache_range((ulong)txre, 1223 invalidate_dcache_range((ulong)txre,
@@ -1235,7 +1235,7 @@ mpsc_tx_intr(struct mpsc_port_info *pi)
1235 1235
1236 txre = (struct mpsc_tx_desc *)(pi->txr + 1236 txre = (struct mpsc_tx_desc *)(pi->txr +
1237 (pi->txr_tail * MPSC_TXRE_SIZE)); 1237 (pi->txr_tail * MPSC_TXRE_SIZE));
1238 dma_cache_sync((void *) txre, MPSC_TXRE_SIZE, 1238 dma_cache_sync(pi->port.dev, (void *) txre, MPSC_TXRE_SIZE,
1239 DMA_FROM_DEVICE); 1239 DMA_FROM_DEVICE);
1240#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1240#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1241 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1241 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
@@ -1652,7 +1652,7 @@ mpsc_console_write(struct console *co, const char *s, uint count)
1652 count--; 1652 count--;
1653 } 1653 }
1654 1654
1655 dma_cache_sync((void *) bp, MPSC_TXBE_SIZE, DMA_BIDIRECTIONAL); 1655 dma_cache_sync(pi->port.dev, (void *) bp, MPSC_TXBE_SIZE, DMA_BIDIRECTIONAL);
1656#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1656#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1657 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1657 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1658 flush_dcache_range((ulong)bp, 1658 flush_dcache_range((ulong)bp,
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c
index 00f9ffd69489..431433f4dd6d 100644
--- a/drivers/serial/serial_cs.c
+++ b/drivers/serial/serial_cs.c
@@ -723,7 +723,7 @@ static int serial_config(struct pcmcia_device * link)
723 u_char *buf; 723 u_char *buf;
724 cisparse_t *parse; 724 cisparse_t *parse;
725 cistpl_cftable_entry_t *cf; 725 cistpl_cftable_entry_t *cf;
726 int i, last_ret, last_fn; 726 int i;
727 727
728 DEBUG(0, "serial_config(0x%p)\n", link); 728 DEBUG(0, "serial_config(0x%p)\n", link);
729 729
@@ -740,15 +740,6 @@ static int serial_config(struct pcmcia_device * link)
740 tuple->TupleOffset = 0; 740 tuple->TupleOffset = 0;
741 tuple->TupleDataMax = 255; 741 tuple->TupleDataMax = 255;
742 tuple->Attributes = 0; 742 tuple->Attributes = 0;
743 /* Get configuration register information */
744 tuple->DesiredTuple = CISTPL_CONFIG;
745 last_ret = first_tuple(link, tuple, parse);
746 if (last_ret != CS_SUCCESS) {
747 last_fn = ParseTuple;
748 goto cs_failed;
749 }
750 link->conf.ConfigBase = parse->config.base;
751 link->conf.Present = parse->config.rmask[0];
752 743
753 /* Is this a compliant multifunction card? */ 744 /* Is this a compliant multifunction card? */
754 tuple->DesiredTuple = CISTPL_LONGLINK_MFC; 745 tuple->DesiredTuple = CISTPL_LONGLINK_MFC;
@@ -757,27 +748,25 @@ static int serial_config(struct pcmcia_device * link)
757 748
758 /* Is this a multiport card? */ 749 /* Is this a multiport card? */
759 tuple->DesiredTuple = CISTPL_MANFID; 750 tuple->DesiredTuple = CISTPL_MANFID;
760 if (first_tuple(link, tuple, parse) == CS_SUCCESS) { 751 info->manfid = link->manf_id;
761 info->manfid = parse->manfid.manf; 752 info->prodid = link->card_id;
762 info->prodid = parse->manfid.card; 753
763 754 for (i = 0; i < ARRAY_SIZE(quirks); i++)
764 for (i = 0; i < ARRAY_SIZE(quirks); i++) 755 if ((quirks[i].manfid == ~0 ||
765 if ((quirks[i].manfid == ~0 || 756 quirks[i].manfid == info->manfid) &&
766 quirks[i].manfid == info->manfid) && 757 (quirks[i].prodid == ~0 ||
767 (quirks[i].prodid == ~0 || 758 quirks[i].prodid == info->prodid)) {
768 quirks[i].prodid == info->prodid)) { 759 info->quirk = &quirks[i];
769 info->quirk = &quirks[i]; 760 break;
770 break; 761 }
771 }
772 }
773 762
774 /* Another check for dual-serial cards: look for either serial or 763 /* Another check for dual-serial cards: look for either serial or
775 multifunction cards that ask for appropriate IO port ranges */ 764 multifunction cards that ask for appropriate IO port ranges */
776 tuple->DesiredTuple = CISTPL_FUNCID; 765 tuple->DesiredTuple = CISTPL_FUNCID;
777 if ((info->multi == 0) && 766 if ((info->multi == 0) &&
778 ((first_tuple(link, tuple, parse) != CS_SUCCESS) || 767 (link->has_func_id) &&
779 (parse->funcid.func == CISTPL_FUNCID_MULTI) || 768 ((link->func_id == CISTPL_FUNCID_MULTI) ||
780 (parse->funcid.func == CISTPL_FUNCID_SERIAL))) { 769 (link->func_id == CISTPL_FUNCID_SERIAL))) {
781 tuple->DesiredTuple = CISTPL_CFTABLE_ENTRY; 770 tuple->DesiredTuple = CISTPL_CFTABLE_ENTRY;
782 if (first_tuple(link, tuple, parse) == CS_SUCCESS) { 771 if (first_tuple(link, tuple, parse) == CS_SUCCESS) {
783 if ((cf->io.nwin == 1) && (cf->io.win[0].len % 8 == 0)) 772 if ((cf->io.nwin == 1) && (cf->io.win[0].len % 8 == 0))
@@ -814,8 +803,6 @@ static int serial_config(struct pcmcia_device * link)
814 kfree(cfg_mem); 803 kfree(cfg_mem);
815 return 0; 804 return 0;
816 805
817 cs_failed:
818 cs_error(link, last_fn, last_ret);
819 failed: 806 failed:
820 serial_remove(link); 807 serial_remove(link);
821 kfree(cfg_mem); 808 kfree(cfg_mem);
@@ -925,6 +912,30 @@ static struct pcmcia_device_id serial_ids[] = {
925 PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "COMpad2.cis"), 912 PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "COMpad2.cis"),
926 PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "RS-COM-2P.cis"), 913 PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "RS-COM-2P.cis"),
927 PCMCIA_DEVICE_CIS_MANF_CARD(0x0013, 0x0000, "GLOBETROTTER.cis"), 914 PCMCIA_DEVICE_CIS_MANF_CARD(0x0013, 0x0000, "GLOBETROTTER.cis"),
915 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100 1.00.",0x19ca78af,0xf964f42b),
916 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100",0x19ca78af,0x71d98e83),
917 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL232 1.00.",0x19ca78af,0x69fb7490),
918 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL232",0x19ca78af,0xb6bc0235),
919 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c2000.","SERIAL CARD: CF232",0x63f2e0bd,0xb9e175d3),
920 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c2000.","SERIAL CARD: CF232-5",0x63f2e0bd,0xfce33442),
921 PCMCIA_DEVICE_PROD_ID12("Elan","Serial Port: CF232",0x3beb8cf2,0x171e7190),
922 PCMCIA_DEVICE_PROD_ID12("Elan","Serial Port: CF232-5",0x3beb8cf2,0x20da4262),
923 PCMCIA_DEVICE_PROD_ID12("Elan","Serial Port: CF428",0x3beb8cf2,0xea5dd57d),
924 PCMCIA_DEVICE_PROD_ID12("Elan","Serial Port: CF500",0x3beb8cf2,0xd77255fa),
925 PCMCIA_DEVICE_PROD_ID12("Elan","Serial Port: IC232",0x3beb8cf2,0x6a709903),
926 PCMCIA_DEVICE_PROD_ID12("Elan","Serial Port: SL232",0x3beb8cf2,0x18430676),
927 PCMCIA_DEVICE_PROD_ID12("Elan","Serial Port: XL232",0x3beb8cf2,0x6f933767),
928 PCMCIA_MFC_DEVICE_PROD_ID12(0,"Elan","Serial Port: CF332",0x3beb8cf2,0x16dc1ba7),
929 PCMCIA_MFC_DEVICE_PROD_ID12(0,"Elan","Serial Port: SL332",0x3beb8cf2,0x19816c41),
930 PCMCIA_MFC_DEVICE_PROD_ID12(0,"Elan","Serial Port: SL385",0x3beb8cf2,0x64112029),
931 PCMCIA_MFC_DEVICE_PROD_ID12(0,"Elan","Serial Port: SL432",0x3beb8cf2,0x1cce7ac4),
932 PCMCIA_MFC_DEVICE_PROD_ID12(0,"Elan","Serial+Parallel Port: SP230",0x3beb8cf2,0xdb9e58bc),
933 PCMCIA_MFC_DEVICE_PROD_ID12(1,"Elan","Serial Port: CF332",0x3beb8cf2,0x16dc1ba7),
934 PCMCIA_MFC_DEVICE_PROD_ID12(1,"Elan","Serial Port: SL332",0x3beb8cf2,0x19816c41),
935 PCMCIA_MFC_DEVICE_PROD_ID12(1,"Elan","Serial Port: SL385",0x3beb8cf2,0x64112029),
936 PCMCIA_MFC_DEVICE_PROD_ID12(1,"Elan","Serial Port: SL432",0x3beb8cf2,0x1cce7ac4),
937 PCMCIA_MFC_DEVICE_PROD_ID12(2,"Elan","Serial Port: SL432",0x3beb8cf2,0x1cce7ac4),
938 PCMCIA_MFC_DEVICE_PROD_ID12(3,"Elan","Serial Port: SL432",0x3beb8cf2,0x1cce7ac4),
928 /* too generic */ 939 /* too generic */
929 /* PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x0160, 0x0002), */ 940 /* PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x0160, 0x0002), */
930 /* PCMCIA_MFC_DEVICE_MANF_CARD(1, 0x0160, 0x0002), */ 941 /* PCMCIA_MFC_DEVICE_MANF_CARD(1, 0x0160, 0x0002), */
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index cfcc3caf49d8..3b5f19ec2126 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -775,7 +775,7 @@ static int sci_notifier(struct notifier_block *self,
775 * 775 *
776 * Clean this up later.. 776 * Clean this up later..
777 */ 777 */
778 clk = clk_get("module_clk"); 778 clk = clk_get(NULL, "module_clk");
779 port->uartclk = clk_get_rate(clk) * 16; 779 port->uartclk = clk_get_rate(clk) * 16;
780 clk_put(clk); 780 clk_put(clk);
781 } 781 }
@@ -960,7 +960,7 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios,
960 default: 960 default:
961 { 961 {
962#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) 962#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
963 struct clk *clk = clk_get("module_clk"); 963 struct clk *clk = clk_get(NULL, "module_clk");
964 t = SCBRR_VALUE(baud, clk_get_rate(clk)); 964 t = SCBRR_VALUE(baud, clk_get_rate(clk));
965 clk_put(clk); 965 clk_put(clk);
966#else 966#else
@@ -1128,7 +1128,7 @@ static void __init sci_init_ports(void)
1128 * XXX: We should use a proper SCI/SCIF clock 1128 * XXX: We should use a proper SCI/SCIF clock
1129 */ 1129 */
1130 { 1130 {
1131 struct clk *clk = clk_get("module_clk"); 1131 struct clk *clk = clk_get(NULL, "module_clk");
1132 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16; 1132 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1133 clk_put(clk); 1133 clk_put(clk);
1134 } 1134 }
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 7ee992146ae9..e4557cc4f74b 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -133,6 +133,20 @@
133# define SCIF_ORER 0x0001 /* Overrun error bit */ 133# define SCIF_ORER 0x0001 /* Overrun error bit */
134# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 134# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
135# define SCIF_ONLY 135# define SCIF_ONLY
136#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
137# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
138# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
139# define SCSPTR2 0xfffe9020 /* 16 bit SCIF */
140# define SCSPTR3 0xfffe9820 /* 16 bit SCIF */
141# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
142# define SCIF_ONLY
143#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
144# define SCSPTR0 0xf8400020 /* 16 bit SCIF */
145# define SCSPTR1 0xf8410020 /* 16 bit SCIF */
146# define SCSPTR2 0xf8420020 /* 16 bit SCIF */
147# define SCIF_ORER 0x0001 /* overrun error bit */
148# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
149# define SCIF_ONLY
136#else 150#else
137# error CPU subtype not defined 151# error CPU subtype not defined
138#endif 152#endif
@@ -365,6 +379,7 @@ SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8)
365SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) 379SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8)
366SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) 380SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
367#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) 381#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
382SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
368SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) 383SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16)
369SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) 384SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16)
370SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) 385SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)
@@ -544,6 +559,28 @@ static inline int sci_rxd_in(struct uart_port *port)
544 if (port->mapbase == 0xffe10000) 559 if (port->mapbase == 0xffe10000)
545 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 560 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
546} 561}
562#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
563static inline int sci_rxd_in(struct uart_port *port)
564{
565 if (port->mapbase == 0xfffe8000)
566 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
567 if (port->mapbase == 0xfffe8800)
568 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
569 if (port->mapbase == 0xfffe9000)
570 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
571 if (port->mapbase == 0xfffe9800)
572 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
573}
574#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
575static inline int sci_rxd_in(struct uart_port *port)
576{
577 if (port->mapbase == 0xf8400000)
578 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
579 if (port->mapbase == 0xf8410000)
580 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
581 if (port->mapbase == 0xf8420000)
582 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
583}
547#endif 584#endif
548 585
549/* 586/*
diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
new file mode 100644
index 000000000000..83690653b78b
--- /dev/null
+++ b/drivers/serial/uartlite.c
@@ -0,0 +1,505 @@
1/*
2 * uartlite.c: Serial driver for Xilinx uartlite serial controller
3 *
4 * Peter Korsgaard <jacmet@sunsite.dk>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/module.h>
13#include <linux/console.h>
14#include <linux/serial.h>
15#include <linux/serial_core.h>
16#include <linux/tty.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <asm/io.h>
20
21#define ULITE_MAJOR 204
22#define ULITE_MINOR 187
23#define ULITE_NR_UARTS 4
24
25/* For register details see datasheet:
26 http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
27*/
28#define ULITE_RX 0x00
29#define ULITE_TX 0x04
30#define ULITE_STATUS 0x08
31#define ULITE_CONTROL 0x0c
32
33#define ULITE_REGION 16
34
35#define ULITE_STATUS_RXVALID 0x01
36#define ULITE_STATUS_RXFULL 0x02
37#define ULITE_STATUS_TXEMPTY 0x04
38#define ULITE_STATUS_TXFULL 0x08
39#define ULITE_STATUS_IE 0x10
40#define ULITE_STATUS_OVERRUN 0x20
41#define ULITE_STATUS_FRAME 0x40
42#define ULITE_STATUS_PARITY 0x80
43
44#define ULITE_CONTROL_RST_TX 0x01
45#define ULITE_CONTROL_RST_RX 0x02
46#define ULITE_CONTROL_IE 0x10
47
48
49static struct uart_port ports[ULITE_NR_UARTS];
50
51static int ulite_receive(struct uart_port *port, int stat)
52{
53 struct tty_struct *tty = port->info->tty;
54 unsigned char ch = 0;
55 char flag = TTY_NORMAL;
56
57 if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
58 | ULITE_STATUS_FRAME)) == 0)
59 return 0;
60
61 /* stats */
62 if (stat & ULITE_STATUS_RXVALID) {
63 port->icount.rx++;
64 ch = readb(port->membase + ULITE_RX);
65
66 if (stat & ULITE_STATUS_PARITY)
67 port->icount.parity++;
68 }
69
70 if (stat & ULITE_STATUS_OVERRUN)
71 port->icount.overrun++;
72
73 if (stat & ULITE_STATUS_FRAME)
74 port->icount.frame++;
75
76
77 /* drop byte with parity error if IGNPAR specificed */
78 if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
79 stat &= ~ULITE_STATUS_RXVALID;
80
81 stat &= port->read_status_mask;
82
83 if (stat & ULITE_STATUS_PARITY)
84 flag = TTY_PARITY;
85
86
87 stat &= ~port->ignore_status_mask;
88
89 if (stat & ULITE_STATUS_RXVALID)
90 tty_insert_flip_char(tty, ch, flag);
91
92 if (stat & ULITE_STATUS_FRAME)
93 tty_insert_flip_char(tty, 0, TTY_FRAME);
94
95 if (stat & ULITE_STATUS_OVERRUN)
96 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
97
98 return 1;
99}
100
101static int ulite_transmit(struct uart_port *port, int stat)
102{
103 struct circ_buf *xmit = &port->info->xmit;
104
105 if (stat & ULITE_STATUS_TXFULL)
106 return 0;
107
108 if (port->x_char) {
109 writeb(port->x_char, port->membase + ULITE_TX);
110 port->x_char = 0;
111 port->icount.tx++;
112 return 1;
113 }
114
115 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
116 return 0;
117
118 writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
119 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
120 port->icount.tx++;
121
122 /* wake up */
123 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
124 uart_write_wakeup(port);
125
126 return 1;
127}
128
129static irqreturn_t ulite_isr(int irq, void *dev_id)
130{
131 struct uart_port *port = (struct uart_port *)dev_id;
132 int busy;
133
134 do {
135 int stat = readb(port->membase + ULITE_STATUS);
136 busy = ulite_receive(port, stat);
137 busy |= ulite_transmit(port, stat);
138 } while (busy);
139
140 tty_flip_buffer_push(port->info->tty);
141
142 return IRQ_HANDLED;
143}
144
145static unsigned int ulite_tx_empty(struct uart_port *port)
146{
147 unsigned long flags;
148 unsigned int ret;
149
150 spin_lock_irqsave(&port->lock, flags);
151 ret = readb(port->membase + ULITE_STATUS);
152 spin_unlock_irqrestore(&port->lock, flags);
153
154 return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
155}
156
157static unsigned int ulite_get_mctrl(struct uart_port *port)
158{
159 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
160}
161
162static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
163{
164 /* N/A */
165}
166
167static void ulite_stop_tx(struct uart_port *port)
168{
169 /* N/A */
170}
171
172static void ulite_start_tx(struct uart_port *port)
173{
174 ulite_transmit(port, readb(port->membase + ULITE_STATUS));
175}
176
177static void ulite_stop_rx(struct uart_port *port)
178{
179 /* don't forward any more data (like !CREAD) */
180 port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
181 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
182}
183
184static void ulite_enable_ms(struct uart_port *port)
185{
186 /* N/A */
187}
188
189static void ulite_break_ctl(struct uart_port *port, int ctl)
190{
191 /* N/A */
192}
193
194static int ulite_startup(struct uart_port *port)
195{
196 int ret;
197
198 ret = request_irq(port->irq, ulite_isr,
199 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
200 if (ret)
201 return ret;
202
203 writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
204 port->membase + ULITE_CONTROL);
205 writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
206
207 return 0;
208}
209
210static void ulite_shutdown(struct uart_port *port)
211{
212 writeb(0, port->membase + ULITE_CONTROL);
213 readb(port->membase + ULITE_CONTROL); /* dummy */
214 free_irq(port->irq, port);
215}
216
217static void ulite_set_termios(struct uart_port *port, struct termios *termios,
218 struct termios *old)
219{
220 unsigned long flags;
221 unsigned int baud;
222
223 spin_lock_irqsave(&port->lock, flags);
224
225 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
226 | ULITE_STATUS_TXFULL;
227
228 if (termios->c_iflag & INPCK)
229 port->read_status_mask |=
230 ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
231
232 port->ignore_status_mask = 0;
233 if (termios->c_iflag & IGNPAR)
234 port->ignore_status_mask |= ULITE_STATUS_PARITY
235 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
236
237 /* ignore all characters if CREAD is not set */
238 if ((termios->c_cflag & CREAD) == 0)
239 port->ignore_status_mask |=
240 ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
241 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
242
243 /* update timeout */
244 baud = uart_get_baud_rate(port, termios, old, 0, 460800);
245 uart_update_timeout(port, termios->c_cflag, baud);
246
247 spin_unlock_irqrestore(&port->lock, flags);
248}
249
250static const char *ulite_type(struct uart_port *port)
251{
252 return port->type == PORT_UARTLITE ? "uartlite" : NULL;
253}
254
255static void ulite_release_port(struct uart_port *port)
256{
257 release_mem_region(port->mapbase, ULITE_REGION);
258 iounmap(port->membase);
259 port->membase = 0;
260}
261
262static int ulite_request_port(struct uart_port *port)
263{
264 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
265 dev_err(port->dev, "Memory region busy\n");
266 return -EBUSY;
267 }
268
269 port->membase = ioremap(port->mapbase, ULITE_REGION);
270 if (!port->membase) {
271 dev_err(port->dev, "Unable to map registers\n");
272 release_mem_region(port->mapbase, ULITE_REGION);
273 return -EBUSY;
274 }
275
276 return 0;
277}
278
279static void ulite_config_port(struct uart_port *port, int flags)
280{
281 ulite_request_port(port);
282 port->type = PORT_UARTLITE;
283}
284
285static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
286{
287 /* we don't want the core code to modify any port params */
288 return -EINVAL;
289}
290
291static struct uart_ops ulite_ops = {
292 .tx_empty = ulite_tx_empty,
293 .set_mctrl = ulite_set_mctrl,
294 .get_mctrl = ulite_get_mctrl,
295 .stop_tx = ulite_stop_tx,
296 .start_tx = ulite_start_tx,
297 .stop_rx = ulite_stop_rx,
298 .enable_ms = ulite_enable_ms,
299 .break_ctl = ulite_break_ctl,
300 .startup = ulite_startup,
301 .shutdown = ulite_shutdown,
302 .set_termios = ulite_set_termios,
303 .type = ulite_type,
304 .release_port = ulite_release_port,
305 .request_port = ulite_request_port,
306 .config_port = ulite_config_port,
307 .verify_port = ulite_verify_port
308};
309
310#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
311static void ulite_console_wait_tx(struct uart_port *port)
312{
313 int i;
314
315 /* wait up to 10ms for the character(s) to be sent */
316 for (i = 0; i < 10000; i++) {
317 if (readb(port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY)
318 break;
319 udelay(1);
320 }
321}
322
323static void ulite_console_putchar(struct uart_port *port, int ch)
324{
325 ulite_console_wait_tx(port);
326 writeb(ch, port->membase + ULITE_TX);
327}
328
329static void ulite_console_write(struct console *co, const char *s,
330 unsigned int count)
331{
332 struct uart_port *port = &ports[co->index];
333 unsigned long flags;
334 unsigned int ier;
335 int locked = 1;
336
337 if (oops_in_progress) {
338 locked = spin_trylock_irqsave(&port->lock, flags);
339 } else
340 spin_lock_irqsave(&port->lock, flags);
341
342 /* save and disable interrupt */
343 ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
344 writeb(0, port->membase + ULITE_CONTROL);
345
346 uart_console_write(port, s, count, ulite_console_putchar);
347
348 ulite_console_wait_tx(port);
349
350 /* restore interrupt state */
351 if (ier)
352 writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
353
354 if (locked)
355 spin_unlock_irqrestore(&port->lock, flags);
356}
357
358static int __init ulite_console_setup(struct console *co, char *options)
359{
360 struct uart_port *port;
361 int baud = 9600;
362 int bits = 8;
363 int parity = 'n';
364 int flow = 'n';
365
366 if (co->index < 0 || co->index >= ULITE_NR_UARTS)
367 return -EINVAL;
368
369 port = &ports[co->index];
370
371 /* not initialized yet? */
372 if (!port->membase)
373 return -ENODEV;
374
375 if (options)
376 uart_parse_options(options, &baud, &parity, &bits, &flow);
377
378 return uart_set_options(port, co, baud, parity, bits, flow);
379}
380
381static struct uart_driver ulite_uart_driver;
382
383static struct console ulite_console = {
384 .name = "ttyUL",
385 .write = ulite_console_write,
386 .device = uart_console_device,
387 .setup = ulite_console_setup,
388 .flags = CON_PRINTBUFFER,
389 .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
390 .data = &ulite_uart_driver,
391};
392
393static int __init ulite_console_init(void)
394{
395 register_console(&ulite_console);
396 return 0;
397}
398
399console_initcall(ulite_console_init);
400
401#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
402
403static struct uart_driver ulite_uart_driver = {
404 .owner = THIS_MODULE,
405 .driver_name = "uartlite",
406 .dev_name = "ttyUL",
407 .major = ULITE_MAJOR,
408 .minor = ULITE_MINOR,
409 .nr = ULITE_NR_UARTS,
410#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
411 .cons = &ulite_console,
412#endif
413};
414
415static int __devinit ulite_probe(struct platform_device *pdev)
416{
417 struct resource *res, *res2;
418 struct uart_port *port;
419
420 if (pdev->id < 0 || pdev->id >= ULITE_NR_UARTS)
421 return -EINVAL;
422
423 if (ports[pdev->id].membase)
424 return -EBUSY;
425
426 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
427 if (!res)
428 return -ENODEV;
429
430 res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
431 if (!res2)
432 return -ENODEV;
433
434 port = &ports[pdev->id];
435
436 port->fifosize = 16;
437 port->regshift = 2;
438 port->iotype = UPIO_MEM;
439 port->iobase = 1; /* mark port in use */
440 port->mapbase = res->start;
441 port->membase = 0;
442 port->ops = &ulite_ops;
443 port->irq = res2->start;
444 port->flags = UPF_BOOT_AUTOCONF;
445 port->dev = &pdev->dev;
446 port->type = PORT_UNKNOWN;
447 port->line = pdev->id;
448
449 uart_add_one_port(&ulite_uart_driver, port);
450 platform_set_drvdata(pdev, port);
451
452 return 0;
453}
454
455static int ulite_remove(struct platform_device *pdev)
456{
457 struct uart_port *port = platform_get_drvdata(pdev);
458
459 platform_set_drvdata(pdev, NULL);
460
461 if (port)
462 uart_remove_one_port(&ulite_uart_driver, port);
463
464 /* mark port as free */
465 port->membase = 0;
466
467 return 0;
468}
469
470static struct platform_driver ulite_platform_driver = {
471 .probe = ulite_probe,
472 .remove = ulite_remove,
473 .driver = {
474 .owner = THIS_MODULE,
475 .name = "uartlite",
476 },
477};
478
479int __init ulite_init(void)
480{
481 int ret;
482
483 ret = uart_register_driver(&ulite_uart_driver);
484 if (ret)
485 return ret;
486
487 ret = platform_driver_register(&ulite_platform_driver);
488 if (ret)
489 uart_unregister_driver(&ulite_uart_driver);
490
491 return ret;
492}
493
494void __exit ulite_exit(void)
495{
496 platform_driver_unregister(&ulite_platform_driver);
497 uart_unregister_driver(&ulite_uart_driver);
498}
499
500module_init(ulite_init);
501module_exit(ulite_exit);
502
503MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
504MODULE_DESCRIPTION("Xilinx uartlite serial driver");
505MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-15 17:36:31 -0500