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-rw-r--r--drivers/serial/21285.c4
-rw-r--r--drivers/serial/68328serial.c4
-rw-r--r--drivers/serial/68360serial.c4
-rw-r--r--drivers/serial/8250.c28
-rw-r--r--drivers/serial/8250_acpi.c22
-rw-r--r--drivers/serial/8250_au1x00.c1
-rw-r--r--drivers/serial/8250_pci.c29
-rw-r--r--drivers/serial/Kconfig31
-rw-r--r--drivers/serial/amba-pl010.c8
-rw-r--r--drivers/serial/au1x00_uart.c12
-rw-r--r--drivers/serial/clps711x.c4
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_core.c25
-rw-r--r--drivers/serial/dz.c3
-rw-r--r--drivers/serial/imx.c12
-rw-r--r--drivers/serial/ioc4_serial.c20
-rw-r--r--drivers/serial/ip22zilog.c12
-rw-r--r--drivers/serial/jsm/jsm.h1
-rw-r--r--drivers/serial/jsm/jsm_driver.c3
-rw-r--r--drivers/serial/jsm/jsm_neo.c85
-rw-r--r--drivers/serial/jsm/jsm_tty.c209
-rw-r--r--drivers/serial/m32r_sio.c2
-rw-r--r--drivers/serial/m32r_sio.h2
-rw-r--r--drivers/serial/mcfserial.c17
-rw-r--r--drivers/serial/mux.c2
-rw-r--r--drivers/serial/pmac_zilog.c2
-rw-r--r--drivers/serial/s3c2410.c6
-rw-r--r--drivers/serial/sa1100.c8
-rw-r--r--drivers/serial/serial_core.c50
-rw-r--r--drivers/serial/serial_lh7a40x.c12
-rw-r--r--drivers/serial/sh-sci.c317
-rw-r--r--drivers/serial/sh-sci.h114
-rw-r--r--drivers/serial/sn_console.c2
-rw-r--r--drivers/serial/sunsab.c2
-rw-r--r--drivers/serial/sunsu.c27
-rw-r--r--drivers/serial/sunzilog.c4
-rw-r--r--drivers/serial/v850e_uart.c2
36 files changed, 565 insertions, 521 deletions
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c
index 221999bcf8fe..8c5c276c5577 100644
--- a/drivers/serial/21285.c
+++ b/drivers/serial/21285.c
@@ -362,11 +362,11 @@ static struct uart_ops serial21285_ops = {
362 362
363static struct uart_port serial21285_port = { 363static struct uart_port serial21285_port = {
364 .mapbase = 0x42000160, 364 .mapbase = 0x42000160,
365 .iotype = SERIAL_IO_MEM, 365 .iotype = UPIO_MEM,
366 .irq = NO_IRQ, 366 .irq = NO_IRQ,
367 .fifosize = 16, 367 .fifosize = 16,
368 .ops = &serial21285_ops, 368 .ops = &serial21285_ops,
369 .flags = ASYNC_BOOT_AUTOCONF, 369 .flags = UPF_BOOT_AUTOCONF,
370}; 370};
371 371
372static void serial21285_setup_ports(void) 372static void serial21285_setup_ports(void)
diff --git a/drivers/serial/68328serial.c b/drivers/serial/68328serial.c
index 8cbf0fc5a225..7f0f35a05dca 100644
--- a/drivers/serial/68328serial.c
+++ b/drivers/serial/68328serial.c
@@ -332,7 +332,7 @@ static _INLINE_ void receive_chars(struct m68k_serial *info, struct pt_regs *reg
332 * Make sure that we do not overflow the buffer 332 * Make sure that we do not overflow the buffer
333 */ 333 */
334 if (tty_request_buffer_room(tty, 1) == 0) { 334 if (tty_request_buffer_room(tty, 1) == 0) {
335 schedule_work(&tty->flip.work); 335 tty_schedule_flip(tty);
336 return; 336 return;
337 } 337 }
338 338
@@ -353,7 +353,7 @@ static _INLINE_ void receive_chars(struct m68k_serial *info, struct pt_regs *reg
353 } while((rx = uart->urx.w) & URX_DATA_READY); 353 } while((rx = uart->urx.w) & URX_DATA_READY);
354#endif 354#endif
355 355
356 schedule_work(&tty->flip.work); 356 tty_schedule_flip(tty);
357 357
358clear_and_exit: 358clear_and_exit:
359 return; 359 return;
diff --git a/drivers/serial/68360serial.c b/drivers/serial/68360serial.c
index 60f5a5dc17f1..9843ae3d420e 100644
--- a/drivers/serial/68360serial.c
+++ b/drivers/serial/68360serial.c
@@ -509,7 +509,7 @@ static _INLINE_ void receive_chars(ser_info_t *info)
509 509
510 info->rx_cur = (QUICC_BD *)bdp; 510 info->rx_cur = (QUICC_BD *)bdp;
511 511
512 schedule_work(&tty->flip.work); 512 tty_schedule_flip(tty);
513} 513}
514 514
515static _INLINE_ void receive_break(ser_info_t *info) 515static _INLINE_ void receive_break(ser_info_t *info)
@@ -521,7 +521,7 @@ static _INLINE_ void receive_break(ser_info_t *info)
521 * the break. If not, we exit now, losing the break. FIXME 521 * the break. If not, we exit now, losing the break. FIXME
522 */ 522 */
523 tty_insert_flip_char(tty, 0, TTY_BREAK); 523 tty_insert_flip_char(tty, 0, TTY_BREAK);
524 schedule_work(&tty->flip.work); 524 tty_schedule_flip(tty);
525} 525}
526 526
527static _INLINE_ void transmit_chars(ser_info_t *info) 527static _INLINE_ void transmit_chars(ser_info_t *info)
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index bc36edff2058..7aca22c9976d 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -31,7 +31,6 @@
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/console.h> 32#include <linux/console.h>
33#include <linux/sysrq.h> 33#include <linux/sysrq.h>
34#include <linux/mca.h>
35#include <linux/delay.h> 34#include <linux/delay.h>
36#include <linux/platform_device.h> 35#include <linux/platform_device.h>
37#include <linux/tty.h> 36#include <linux/tty.h>
@@ -2027,12 +2026,6 @@ static void serial8250_config_port(struct uart_port *port, int flags)
2027 int ret; 2026 int ret;
2028 2027
2029 /* 2028 /*
2030 * Don't probe for MCA ports on non-MCA machines.
2031 */
2032 if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
2033 return;
2034
2035 /*
2036 * Find the region that we can probe for. This in turn 2029 * Find the region that we can probe for. This in turn
2037 * tells us whether we can probe for the type of port. 2030 * tells us whether we can probe for the type of port.
2038 */ 2031 */
@@ -2164,7 +2157,7 @@ serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2164/* 2157/*
2165 * Wait for transmitter & holding register to empty 2158 * Wait for transmitter & holding register to empty
2166 */ 2159 */
2167static inline void wait_for_xmitr(struct uart_8250_port *up) 2160static inline void wait_for_xmitr(struct uart_8250_port *up, int bits)
2168{ 2161{
2169 unsigned int status, tmout = 10000; 2162 unsigned int status, tmout = 10000;
2170 2163
@@ -2178,7 +2171,7 @@ static inline void wait_for_xmitr(struct uart_8250_port *up)
2178 if (--tmout == 0) 2171 if (--tmout == 0)
2179 break; 2172 break;
2180 udelay(1); 2173 udelay(1);
2181 } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 2174 } while ((status & bits) != bits);
2182 2175
2183 /* Wait up to 1s for flow control if necessary */ 2176 /* Wait up to 1s for flow control if necessary */
2184 if (up->port.flags & UPF_CONS_FLOW) { 2177 if (up->port.flags & UPF_CONS_FLOW) {
@@ -2205,7 +2198,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2205 touch_nmi_watchdog(); 2198 touch_nmi_watchdog();
2206 2199
2207 /* 2200 /*
2208 * First save the UER then disable the interrupts 2201 * First save the IER then disable the interrupts
2209 */ 2202 */
2210 ier = serial_in(up, UART_IER); 2203 ier = serial_in(up, UART_IER);
2211 2204
@@ -2218,7 +2211,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2218 * Now, do each character 2211 * Now, do each character
2219 */ 2212 */
2220 for (i = 0; i < count; i++, s++) { 2213 for (i = 0; i < count; i++, s++) {
2221 wait_for_xmitr(up); 2214 wait_for_xmitr(up, UART_LSR_THRE);
2222 2215
2223 /* 2216 /*
2224 * Send the character out. 2217 * Send the character out.
@@ -2226,7 +2219,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2226 */ 2219 */
2227 serial_out(up, UART_TX, *s); 2220 serial_out(up, UART_TX, *s);
2228 if (*s == 10) { 2221 if (*s == 10) {
2229 wait_for_xmitr(up); 2222 wait_for_xmitr(up, UART_LSR_THRE);
2230 serial_out(up, UART_TX, 13); 2223 serial_out(up, UART_TX, 13);
2231 } 2224 }
2232 } 2225 }
@@ -2235,8 +2228,9 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
2235 * Finally, wait for transmitter to become empty 2228 * Finally, wait for transmitter to become empty
2236 * and restore the IER 2229 * and restore the IER
2237 */ 2230 */
2238 wait_for_xmitr(up); 2231 wait_for_xmitr(up, BOTH_EMPTY);
2239 serial_out(up, UART_IER, ier); 2232 up->ier |= UART_IER_THRI;
2233 serial_out(up, UART_IER, ier | UART_IER_THRI);
2240} 2234}
2241 2235
2242static int serial8250_console_setup(struct console *co, char *options) 2236static int serial8250_console_setup(struct console *co, char *options)
@@ -2332,6 +2326,12 @@ static struct uart_driver serial8250_reg = {
2332 .cons = SERIAL8250_CONSOLE, 2326 .cons = SERIAL8250_CONSOLE,
2333}; 2327};
2334 2328
2329/*
2330 * early_serial_setup - early registration for 8250 ports
2331 *
2332 * Setup an 8250 port structure prior to console initialisation. Use
2333 * after console initialisation will cause undefined behaviour.
2334 */
2335int __init early_serial_setup(struct uart_port *port) 2335int __init early_serial_setup(struct uart_port *port)
2336{ 2336{
2337 if (port->line >= ARRAY_SIZE(serial8250_ports)) 2337 if (port->line >= ARRAY_SIZE(serial8250_ports))
diff --git a/drivers/serial/8250_acpi.c b/drivers/serial/8250_acpi.c
index a802bdce6e5d..809f89ab965c 100644
--- a/drivers/serial/8250_acpi.c
+++ b/drivers/serial/8250_acpi.c
@@ -27,7 +27,7 @@ struct serial_private {
27static acpi_status acpi_serial_mmio(struct uart_port *port, 27static acpi_status acpi_serial_mmio(struct uart_port *port,
28 struct acpi_resource_address64 *addr) 28 struct acpi_resource_address64 *addr)
29{ 29{
30 port->mapbase = addr->min_address_range; 30 port->mapbase = addr->minimum;
31 port->iotype = UPIO_MEM; 31 port->iotype = UPIO_MEM;
32 port->flags |= UPF_IOREMAP; 32 port->flags |= UPF_IOREMAP;
33 return AE_OK; 33 return AE_OK;
@@ -36,8 +36,8 @@ static acpi_status acpi_serial_mmio(struct uart_port *port,
36static acpi_status acpi_serial_port(struct uart_port *port, 36static acpi_status acpi_serial_port(struct uart_port *port,
37 struct acpi_resource_io *io) 37 struct acpi_resource_io *io)
38{ 38{
39 if (io->range_length) { 39 if (io->address_length) {
40 port->iobase = io->min_base_address; 40 port->iobase = io->minimum;
41 port->iotype = UPIO_PORT; 41 port->iotype = UPIO_PORT;
42 } else 42 } else
43 printk(KERN_ERR "%s: zero-length IO port range?\n", __FUNCTION__); 43 printk(KERN_ERR "%s: zero-length IO port range?\n", __FUNCTION__);
@@ -45,13 +45,13 @@ static acpi_status acpi_serial_port(struct uart_port *port,
45} 45}
46 46
47static acpi_status acpi_serial_ext_irq(struct uart_port *port, 47static acpi_status acpi_serial_ext_irq(struct uart_port *port,
48 struct acpi_resource_ext_irq *ext_irq) 48 struct acpi_resource_extended_irq *ext_irq)
49{ 49{
50 int rc; 50 int rc;
51 51
52 if (ext_irq->number_of_interrupts > 0) { 52 if (ext_irq->interrupt_count > 0) {
53 rc = acpi_register_gsi(ext_irq->interrupts[0], 53 rc = acpi_register_gsi(ext_irq->interrupts[0],
54 ext_irq->edge_level, ext_irq->active_high_low); 54 ext_irq->triggering, ext_irq->polarity);
55 if (rc < 0) 55 if (rc < 0)
56 return AE_ERROR; 56 return AE_ERROR;
57 port->irq = rc; 57 port->irq = rc;
@@ -64,9 +64,9 @@ static acpi_status acpi_serial_irq(struct uart_port *port,
64{ 64{
65 int rc; 65 int rc;
66 66
67 if (irq->number_of_interrupts > 0) { 67 if (irq->interrupt_count > 0) {
68 rc = acpi_register_gsi(irq->interrupts[0], 68 rc = acpi_register_gsi(irq->interrupts[0],
69 irq->edge_level, irq->active_high_low); 69 irq->triggering, irq->polarity);
70 if (rc < 0) 70 if (rc < 0)
71 return AE_ERROR; 71 return AE_ERROR;
72 port->irq = rc; 72 port->irq = rc;
@@ -83,11 +83,11 @@ static acpi_status acpi_serial_resource(struct acpi_resource *res, void *data)
83 status = acpi_resource_to_address64(res, &addr); 83 status = acpi_resource_to_address64(res, &addr);
84 if (ACPI_SUCCESS(status)) 84 if (ACPI_SUCCESS(status))
85 return acpi_serial_mmio(port, &addr); 85 return acpi_serial_mmio(port, &addr);
86 else if (res->id == ACPI_RSTYPE_IO) 86 else if (res->type == ACPI_RESOURCE_TYPE_IO)
87 return acpi_serial_port(port, &res->data.io); 87 return acpi_serial_port(port, &res->data.io);
88 else if (res->id == ACPI_RSTYPE_EXT_IRQ) 88 else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ)
89 return acpi_serial_ext_irq(port, &res->data.extended_irq); 89 return acpi_serial_ext_irq(port, &res->data.extended_irq);
90 else if (res->id == ACPI_RSTYPE_IRQ) 90 else if (res->type == ACPI_RESOURCE_TYPE_IRQ)
91 return acpi_serial_irq(port, &res->data.irq); 91 return acpi_serial_irq(port, &res->data.irq);
92 return AE_OK; 92 return AE_OK;
93} 93}
diff --git a/drivers/serial/8250_au1x00.c b/drivers/serial/8250_au1x00.c
index 06ae8fbcc947..8d8d7a70d03e 100644
--- a/drivers/serial/8250_au1x00.c
+++ b/drivers/serial/8250_au1x00.c
@@ -56,7 +56,6 @@ static struct plat_serial8250_port au1x00_data[] = {
56#elif defined(CONFIG_SOC_AU1550) 56#elif defined(CONFIG_SOC_AU1550)
57 PORT(UART0_ADDR, AU1550_UART0_INT), 57 PORT(UART0_ADDR, AU1550_UART0_INT),
58 PORT(UART1_ADDR, AU1550_UART1_INT), 58 PORT(UART1_ADDR, AU1550_UART1_INT),
59 PORT(UART2_ADDR, AU1550_UART2_INT),
60 PORT(UART3_ADDR, AU1550_UART3_INT), 59 PORT(UART3_ADDR, AU1550_UART3_INT),
61#elif defined(CONFIG_SOC_AU1200) 60#elif defined(CONFIG_SOC_AU1200)
62 PORT(UART0_ADDR, AU1200_UART0_INT), 61 PORT(UART0_ADDR, AU1200_UART0_INT),
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 2a912153321e..94886c000d2a 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -439,6 +439,20 @@ static int pci_siig_init(struct pci_dev *dev)
439 return -ENODEV; 439 return -ENODEV;
440} 440}
441 441
442static int pci_siig_setup(struct serial_private *priv,
443 struct pciserial_board *board,
444 struct uart_port *port, int idx)
445{
446 unsigned int bar = FL_GET_BASE(board->flags) + idx, offset = 0;
447
448 if (idx > 3) {
449 bar = 4;
450 offset = (idx - 4) * 8;
451 }
452
453 return setup_port(priv, port, bar, offset, 0);
454}
455
442/* 456/*
443 * Timedia has an explosion of boards, and to avoid the PCI table from 457 * Timedia has an explosion of boards, and to avoid the PCI table from
444 * growing *huge*, we use this function to collapse some 70 entries 458 * growing *huge*, we use this function to collapse some 70 entries
@@ -748,7 +762,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
748 .subvendor = PCI_ANY_ID, 762 .subvendor = PCI_ANY_ID,
749 .subdevice = PCI_ANY_ID, 763 .subdevice = PCI_ANY_ID,
750 .init = pci_siig_init, 764 .init = pci_siig_init,
751 .setup = pci_default_setup, 765 .setup = pci_siig_setup,
752 }, 766 },
753 /* 767 /*
754 * Titan cards 768 * Titan cards
@@ -1868,6 +1882,10 @@ static struct pci_device_id serial_pci_tbl[] = {
1868 PCI_SUBVENDOR_ID_CONNECT_TECH, 1882 PCI_SUBVENDOR_ID_CONNECT_TECH,
1869 PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4, 0, 0, 1883 PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4, 0, 0,
1870 pbn_b0_4_1843200 }, 1884 pbn_b0_4_1843200 },
1885 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
1886 PCI_VENDOR_ID_AFAVLAB,
1887 PCI_SUBDEVICE_ID_AFAVLAB_P061, 0, 0,
1888 pbn_b0_4_1152000 },
1871 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152, 1889 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
1872 PCI_SUBVENDOR_ID_CONNECT_TECH, 1890 PCI_SUBVENDOR_ID_CONNECT_TECH,
1873 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232, 0, 0, 1891 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232, 0, 0,
@@ -2141,6 +2159,15 @@ static struct pci_device_id serial_pci_tbl[] = {
2141 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_850, 2159 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_850,
2142 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2160 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2143 pbn_b0_bt_4_921600 }, 2161 pbn_b0_bt_4_921600 },
2162 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_550,
2163 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2164 pbn_b0_bt_8_921600 },
2165 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_650,
2166 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2167 pbn_b0_bt_8_921600 },
2168 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_850,
2169 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2170 pbn_b0_bt_8_921600 },
2144 2171
2145 /* 2172 /*
2146 * Computone devices submitted by Doug McNash dmcnash@computone.com 2173 * Computone devices submitted by Doug McNash dmcnash@computone.com
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 9fd1925de361..b3c561abe3f6 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -23,7 +23,7 @@ config SERIAL_8250
23 work.) 23 work.)
24 24
25 To compile this driver as a module, choose M here: the 25 To compile this driver as a module, choose M here: the
26 module will be called serial. 26 module will be called 8250.
27 [WARNING: Do not compile this driver as a module if you are using 27 [WARNING: Do not compile this driver as a module if you are using
28 non-standard serial ports, since the configuration information will 28 non-standard serial ports, since the configuration information will
29 be lost when the driver is unloaded. This limitation may be lifted 29 be lost when the driver is unloaded. This limitation may be lifted
@@ -98,6 +98,7 @@ config SERIAL_8250_NR_UARTS
98config SERIAL_8250_RUNTIME_UARTS 98config SERIAL_8250_RUNTIME_UARTS
99 int "Number of 8250/16550 serial ports to register at runtime" 99 int "Number of 8250/16550 serial ports to register at runtime"
100 depends on SERIAL_8250 100 depends on SERIAL_8250
101 range 0 SERIAL_8250_NR_UARTS
101 default "4" 102 default "4"
102 help 103 help
103 Set this to the maximum number of serial ports you want 104 Set this to the maximum number of serial ports you want
@@ -892,20 +893,20 @@ config SERIAL_VR41XX_CONSOLE
892 a console on a serial port, say Y. Otherwise, say N. 893 a console on a serial port, say Y. Otherwise, say N.
893 894
894config SERIAL_JSM 895config SERIAL_JSM
895 tristate "Digi International NEO PCI Support" 896 tristate "Digi International NEO PCI Support"
896 depends on PCI && BROKEN 897 depends on PCI
897 select SERIAL_CORE 898 select SERIAL_CORE
898 help 899 help
899 This is a driver for Digi International's Neo series 900 This is a driver for Digi International's Neo series
900 of cards which provide multiple serial ports. You would need 901 of cards which provide multiple serial ports. You would need
901 something like this to connect more than two modems to your Linux 902 something like this to connect more than two modems to your Linux
902 box, for instance in order to become a dial-in server. This driver 903 box, for instance in order to become a dial-in server. This driver
903 supports PCI boards only. 904 supports PCI boards only.
904 If you have a card like this, say Y here and read the file 905
905 <file:Documentation/jsm.txt>. 906 If you have a card like this, say Y here, otherwise say N.
906 907
907 To compile this driver as a module, choose M here: the 908 To compile this driver as a module, choose M here: the
908 module will be called jsm. 909 module will be called jsm.
909 910
910config SERIAL_SGI_IOC4 911config SERIAL_SGI_IOC4
911 tristate "SGI IOC4 controller serial support" 912 tristate "SGI IOC4 controller serial support"
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 3490022e9fdc..321a3b3a5728 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -561,12 +561,12 @@ static struct uart_amba_port amba_ports[UART_NR] = {
561 .port = { 561 .port = {
562 .membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE), 562 .membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE),
563 .mapbase = INTEGRATOR_UART0_BASE, 563 .mapbase = INTEGRATOR_UART0_BASE,
564 .iotype = SERIAL_IO_MEM, 564 .iotype = UPIO_MEM,
565 .irq = IRQ_UARTINT0, 565 .irq = IRQ_UARTINT0,
566 .uartclk = 14745600, 566 .uartclk = 14745600,
567 .fifosize = 16, 567 .fifosize = 16,
568 .ops = &amba_pl010_pops, 568 .ops = &amba_pl010_pops,
569 .flags = ASYNC_BOOT_AUTOCONF, 569 .flags = UPF_BOOT_AUTOCONF,
570 .line = 0, 570 .line = 0,
571 }, 571 },
572 .dtr_mask = 1 << 5, 572 .dtr_mask = 1 << 5,
@@ -576,12 +576,12 @@ static struct uart_amba_port amba_ports[UART_NR] = {
576 .port = { 576 .port = {
577 .membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE), 577 .membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE),
578 .mapbase = INTEGRATOR_UART1_BASE, 578 .mapbase = INTEGRATOR_UART1_BASE,
579 .iotype = SERIAL_IO_MEM, 579 .iotype = UPIO_MEM,
580 .irq = IRQ_UARTINT1, 580 .irq = IRQ_UARTINT1,
581 .uartclk = 14745600, 581 .uartclk = 14745600,
582 .fifosize = 16, 582 .fifosize = 16,
583 .ops = &amba_pl010_pops, 583 .ops = &amba_pl010_pops,
584 .flags = ASYNC_BOOT_AUTOCONF, 584 .flags = UPF_BOOT_AUTOCONF,
585 .line = 1, 585 .line = 1,
586 }, 586 },
587 .dtr_mask = 1 << 7, 587 .dtr_mask = 1 << 7,
diff --git a/drivers/serial/au1x00_uart.c b/drivers/serial/au1x00_uart.c
index ceb5d7f37bbd..344022fe53ef 100644
--- a/drivers/serial/au1x00_uart.c
+++ b/drivers/serial/au1x00_uart.c
@@ -892,7 +892,7 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res
892 int ret = 0; 892 int ret = 0;
893 893
894 switch (up->port.iotype) { 894 switch (up->port.iotype) {
895 case SERIAL_IO_MEM: 895 case UPIO_MEM:
896 if (up->port.mapbase) { 896 if (up->port.mapbase) {
897 *res = request_mem_region(up->port.mapbase, size, "serial"); 897 *res = request_mem_region(up->port.mapbase, size, "serial");
898 if (!*res) 898 if (!*res)
@@ -900,8 +900,8 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res
900 } 900 }
901 break; 901 break;
902 902
903 case SERIAL_IO_HUB6: 903 case UPIO_HUB6:
904 case SERIAL_IO_PORT: 904 case UPIO_PORT:
905 *res = request_region(up->port.iobase, size, "serial"); 905 *res = request_region(up->port.iobase, size, "serial");
906 if (!*res) 906 if (!*res)
907 ret = -EBUSY; 907 ret = -EBUSY;
@@ -919,7 +919,7 @@ static void serial8250_release_port(struct uart_port *port)
919 size <<= up->port.regshift; 919 size <<= up->port.regshift;
920 920
921 switch (up->port.iotype) { 921 switch (up->port.iotype) {
922 case SERIAL_IO_MEM: 922 case UPIO_MEM:
923 if (up->port.mapbase) { 923 if (up->port.mapbase) {
924 /* 924 /*
925 * Unmap the area. 925 * Unmap the area.
@@ -935,8 +935,8 @@ static void serial8250_release_port(struct uart_port *port)
935 } 935 }
936 break; 936 break;
937 937
938 case SERIAL_IO_HUB6: 938 case UPIO_HUB6:
939 case SERIAL_IO_PORT: 939 case UPIO_PORT:
940 start = up->port.iobase; 940 start = up->port.iobase;
941 941
942 if (size) 942 if (size)
diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c
index 8ef999481f93..ce7b2e4ecd17 100644
--- a/drivers/serial/clps711x.c
+++ b/drivers/serial/clps711x.c
@@ -410,7 +410,7 @@ static struct uart_port clps711x_ports[UART_NR] = {
410 .fifosize = 16, 410 .fifosize = 16,
411 .ops = &clps711x_pops, 411 .ops = &clps711x_pops,
412 .line = 0, 412 .line = 0,
413 .flags = ASYNC_BOOT_AUTOCONF, 413 .flags = UPF_BOOT_AUTOCONF,
414 }, 414 },
415 { 415 {
416 .iobase = SYSCON2, 416 .iobase = SYSCON2,
@@ -419,7 +419,7 @@ static struct uart_port clps711x_ports[UART_NR] = {
419 .fifosize = 16, 419 .fifosize = 16,
420 .ops = &clps711x_pops, 420 .ops = &clps711x_pops,
421 .line = 1, 421 .line = 1,
422 .flags = ASYNC_BOOT_AUTOCONF, 422 .flags = UPF_BOOT_AUTOCONF,
423 } 423 }
424}; 424};
425 425
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index 16af5626c243..b7bf4c698a47 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -252,12 +252,9 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
252 /* If we have not enough room in tty flip buffer, then we try 252 /* If we have not enough room in tty flip buffer, then we try
253 * later, which will be the next rx-interrupt or a timeout 253 * later, which will be the next rx-interrupt or a timeout
254 */ 254 */
255 if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) { 255 if(tty_buffer_request_room(tty, i) < i) {
256 tty->flip.work.func((void *)tty); 256 printk(KERN_WARNING "No room in flip buffer\n");
257 if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) { 257 return;
258 printk(KERN_WARNING "TTY_DONT_FLIP set\n");
259 return;
260 }
261 } 258 }
262 259
263 /* get pointer */ 260 /* get pointer */
@@ -276,9 +273,7 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
276 continue; 273 continue;
277 274
278 error_return: 275 error_return:
279 *tty->flip.char_buf_ptr++ = ch; 276 tty_insert_flip_char(tty, ch, flg);
280 *tty->flip.flag_buf_ptr++ = flg;
281 tty->flip.count++;
282 277
283 } /* End while (i--) */ 278 } /* End while (i--) */
284 279
@@ -908,7 +903,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
908 .port = { 903 .port = {
909 .irq = SMC1_IRQ, 904 .irq = SMC1_IRQ,
910 .ops = &cpm_uart_pops, 905 .ops = &cpm_uart_pops,
911 .iotype = SERIAL_IO_MEM, 906 .iotype = UPIO_MEM,
912 .lock = SPIN_LOCK_UNLOCKED, 907 .lock = SPIN_LOCK_UNLOCKED,
913 }, 908 },
914 .flags = FLAG_SMC, 909 .flags = FLAG_SMC,
@@ -922,7 +917,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
922 .port = { 917 .port = {
923 .irq = SMC2_IRQ, 918 .irq = SMC2_IRQ,
924 .ops = &cpm_uart_pops, 919 .ops = &cpm_uart_pops,
925 .iotype = SERIAL_IO_MEM, 920 .iotype = UPIO_MEM,
926 .lock = SPIN_LOCK_UNLOCKED, 921 .lock = SPIN_LOCK_UNLOCKED,
927 }, 922 },
928 .flags = FLAG_SMC, 923 .flags = FLAG_SMC,
@@ -939,7 +934,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
939 .port = { 934 .port = {
940 .irq = SCC1_IRQ, 935 .irq = SCC1_IRQ,
941 .ops = &cpm_uart_pops, 936 .ops = &cpm_uart_pops,
942 .iotype = SERIAL_IO_MEM, 937 .iotype = UPIO_MEM,
943 .lock = SPIN_LOCK_UNLOCKED, 938 .lock = SPIN_LOCK_UNLOCKED,
944 }, 939 },
945 .tx_nrfifos = TX_NUM_FIFO, 940 .tx_nrfifos = TX_NUM_FIFO,
@@ -953,7 +948,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
953 .port = { 948 .port = {
954 .irq = SCC2_IRQ, 949 .irq = SCC2_IRQ,
955 .ops = &cpm_uart_pops, 950 .ops = &cpm_uart_pops,
956 .iotype = SERIAL_IO_MEM, 951 .iotype = UPIO_MEM,
957 .lock = SPIN_LOCK_UNLOCKED, 952 .lock = SPIN_LOCK_UNLOCKED,
958 }, 953 },
959 .tx_nrfifos = TX_NUM_FIFO, 954 .tx_nrfifos = TX_NUM_FIFO,
@@ -967,7 +962,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
967 .port = { 962 .port = {
968 .irq = SCC3_IRQ, 963 .irq = SCC3_IRQ,
969 .ops = &cpm_uart_pops, 964 .ops = &cpm_uart_pops,
970 .iotype = SERIAL_IO_MEM, 965 .iotype = UPIO_MEM,
971 .lock = SPIN_LOCK_UNLOCKED, 966 .lock = SPIN_LOCK_UNLOCKED,
972 }, 967 },
973 .tx_nrfifos = TX_NUM_FIFO, 968 .tx_nrfifos = TX_NUM_FIFO,
@@ -981,7 +976,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
981 .port = { 976 .port = {
982 .irq = SCC4_IRQ, 977 .irq = SCC4_IRQ,
983 .ops = &cpm_uart_pops, 978 .ops = &cpm_uart_pops,
984 .iotype = SERIAL_IO_MEM, 979 .iotype = UPIO_MEM,
985 .lock = SPIN_LOCK_UNLOCKED, 980 .lock = SPIN_LOCK_UNLOCKED,
986 }, 981 },
987 .tx_nrfifos = TX_NUM_FIFO, 982 .tx_nrfifos = TX_NUM_FIFO,
diff --git a/drivers/serial/dz.c b/drivers/serial/dz.c
index a64ba26a94e8..ba5541de673b 100644
--- a/drivers/serial/dz.c
+++ b/drivers/serial/dz.c
@@ -262,6 +262,7 @@ static inline void dz_receive_chars(struct dz_port *dport)
262 } 262 }
263 tty_insert_flip_char(tty, ch, flag); 263 tty_insert_flip_char(tty, ch, flag);
264 ignore_char: 264 ignore_char:
265 ;
265 } while (status & DZ_DVAL); 266 } while (status & DZ_DVAL);
266 267
267 if (tty) 268 if (tty)
@@ -650,7 +651,7 @@ static void __init dz_init_ports(void)
650 for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) { 651 for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
651 spin_lock_init(&dport->port.lock); 652 spin_lock_init(&dport->port.lock);
652 dport->port.membase = (char *) base; 653 dport->port.membase = (char *) base;
653 dport->port.iotype = SERIAL_IO_PORT; 654 dport->port.iotype = UPIO_PORT;
654 dport->port.irq = dec_interrupt[DEC_IRQ_DZ11]; 655 dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
655 dport->port.line = i; 656 dport->port.line = i;
656 dport->port.fifosize = 1; 657 dport->port.fifosize = 1;
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 587cc6a95114..4d53fb5ca87b 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -402,10 +402,10 @@ static int imx_startup(struct uart_port *port)
402 DRIVER_NAME, sport); 402 DRIVER_NAME, sport);
403 if (retval) goto error_out2; 403 if (retval) goto error_out2;
404 404
405 retval = request_irq(sport->rtsirq, imx_rtsint, 0, 405 retval = request_irq(sport->rtsirq, imx_rtsint,
406 SA_TRIGGER_FALLING | SA_TRIGGER_RISING,
406 DRIVER_NAME, sport); 407 DRIVER_NAME, sport);
407 if (retval) goto error_out3; 408 if (retval) goto error_out3;
408 set_irq_type(sport->rtsirq, IRQT_BOTHEDGE);
409 409
410 /* 410 /*
411 * Finally, clear and enable interrupts 411 * Finally, clear and enable interrupts
@@ -668,13 +668,13 @@ static struct imx_port imx_ports[] = {
668 .rtsirq = UART1_MINT_RTS, 668 .rtsirq = UART1_MINT_RTS,
669 .port = { 669 .port = {
670 .type = PORT_IMX, 670 .type = PORT_IMX,
671 .iotype = SERIAL_IO_MEM, 671 .iotype = UPIO_MEM,
672 .membase = (void *)IMX_UART1_BASE, 672 .membase = (void *)IMX_UART1_BASE,
673 .mapbase = IMX_UART1_BASE, /* FIXME */ 673 .mapbase = IMX_UART1_BASE, /* FIXME */
674 .irq = UART1_MINT_RX, 674 .irq = UART1_MINT_RX,
675 .uartclk = 16000000, 675 .uartclk = 16000000,
676 .fifosize = 8, 676 .fifosize = 8,
677 .flags = ASYNC_BOOT_AUTOCONF, 677 .flags = UPF_BOOT_AUTOCONF,
678 .ops = &imx_pops, 678 .ops = &imx_pops,
679 .line = 0, 679 .line = 0,
680 }, 680 },
@@ -684,13 +684,13 @@ static struct imx_port imx_ports[] = {
684 .rtsirq = UART2_MINT_RTS, 684 .rtsirq = UART2_MINT_RTS,
685 .port = { 685 .port = {
686 .type = PORT_IMX, 686 .type = PORT_IMX,
687 .iotype = SERIAL_IO_MEM, 687 .iotype = UPIO_MEM,
688 .membase = (void *)IMX_UART2_BASE, 688 .membase = (void *)IMX_UART2_BASE,
689 .mapbase = IMX_UART2_BASE, /* FIXME */ 689 .mapbase = IMX_UART2_BASE, /* FIXME */
690 .irq = UART2_MINT_RX, 690 .irq = UART2_MINT_RX,
691 .uartclk = 16000000, 691 .uartclk = 16000000,
692 .fifosize = 8, 692 .fifosize = 8,
693 .flags = ASYNC_BOOT_AUTOCONF, 693 .flags = UPF_BOOT_AUTOCONF,
694 .ops = &imx_pops, 694 .ops = &imx_pops,
695 .line = 1, 695 .line = 1,
696 }, 696 },
diff --git a/drivers/serial/ioc4_serial.c b/drivers/serial/ioc4_serial.c
index 1d85533d46d2..a37579ce6d76 100644
--- a/drivers/serial/ioc4_serial.c
+++ b/drivers/serial/ioc4_serial.c
@@ -1717,11 +1717,9 @@ ioc4_change_speed(struct uart_port *the_port,
1717 } 1717 }
1718 1718
1719 if (cflag & CRTSCTS) { 1719 if (cflag & CRTSCTS) {
1720 info->flags |= ASYNC_CTS_FLOW;
1721 port->ip_sscr |= IOC4_SSCR_HFC_EN; 1720 port->ip_sscr |= IOC4_SSCR_HFC_EN;
1722 } 1721 }
1723 else { 1722 else {
1724 info->flags &= ~ASYNC_CTS_FLOW;
1725 port->ip_sscr &= ~IOC4_SSCR_HFC_EN; 1723 port->ip_sscr &= ~IOC4_SSCR_HFC_EN;
1726 } 1724 }
1727 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 1725 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
@@ -1760,18 +1758,6 @@ static inline int ic4_startup_local(struct uart_port *the_port)
1760 1758
1761 info = the_port->info; 1759 info = the_port->info;
1762 1760
1763 if (info->tty) {
1764 set_bit(TTY_IO_ERROR, &info->tty->flags);
1765 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1766 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1767 info->tty->alt_speed = 57600;
1768 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1769 info->tty->alt_speed = 115200;
1770 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1771 info->tty->alt_speed = 230400;
1772 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1773 info->tty->alt_speed = 460800;
1774 }
1775 local_open(port); 1761 local_open(port);
1776 1762
1777 /* set the speed of the serial port */ 1763 /* set the speed of the serial port */
@@ -2315,7 +2301,6 @@ static void receive_chars(struct uart_port *the_port)
2315 int read_count, request_count = IOC4_MAX_CHARS; 2301 int read_count, request_count = IOC4_MAX_CHARS;
2316 struct uart_icount *icount; 2302 struct uart_icount *icount;
2317 struct uart_info *info = the_port->info; 2303 struct uart_info *info = the_port->info;
2318 int flip = 0;
2319 unsigned long pflags; 2304 unsigned long pflags;
2320 2305
2321 /* Make sure all the pointers are "good" ones */ 2306 /* Make sure all the pointers are "good" ones */
@@ -2327,7 +2312,7 @@ static void receive_chars(struct uart_port *the_port)
2327 spin_lock_irqsave(&the_port->lock, pflags); 2312 spin_lock_irqsave(&the_port->lock, pflags);
2328 tty = info->tty; 2313 tty = info->tty;
2329 2314
2330 request_count = tty_buffer_request_room(tty, IOC4_MAX_CHARS - 2); 2315 request_count = tty_buffer_request_room(tty, IOC4_MAX_CHARS);
2331 2316
2332 if (request_count > 0) { 2317 if (request_count > 0) {
2333 icount = &the_port->icount; 2318 icount = &the_port->icount;
@@ -2340,8 +2325,7 @@ static void receive_chars(struct uart_port *the_port)
2340 2325
2341 spin_unlock_irqrestore(&the_port->lock, pflags); 2326 spin_unlock_irqrestore(&the_port->lock, pflags);
2342 2327
2343 if (flip) 2328 tty_flip_buffer_push(tty);
2344 tty_flip_buffer_push(tty);
2345} 2329}
2346 2330
2347/** 2331/**
diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c
index 66f117d15065..193722d680cf 100644
--- a/drivers/serial/ip22zilog.c
+++ b/drivers/serial/ip22zilog.c
@@ -215,7 +215,7 @@ static void __load_zsregs(struct zilog_channel *channel, unsigned char *regs)
215 /* Lower and upper byte of baud rate generator divisor. */ 215 /* Lower and upper byte of baud rate generator divisor. */
216 write_zsreg(channel, R12, regs[R12]); 216 write_zsreg(channel, R12, regs[R12]);
217 write_zsreg(channel, R13, regs[R13]); 217 write_zsreg(channel, R13, regs[R13]);
218 218
219 /* Now rewrite R14, with BRENAB (if set). */ 219 /* Now rewrite R14, with BRENAB (if set). */
220 write_zsreg(channel, R14, regs[R14]); 220 write_zsreg(channel, R14, regs[R14]);
221 221
@@ -420,10 +420,8 @@ static void ip22zilog_transmit_chars(struct uart_ip22zilog_port *up,
420 if (up->port.info == NULL) 420 if (up->port.info == NULL)
421 goto ack_tx_int; 421 goto ack_tx_int;
422 xmit = &up->port.info->xmit; 422 xmit = &up->port.info->xmit;
423 if (uart_circ_empty(xmit)) { 423 if (uart_circ_empty(xmit))
424 uart_write_wakeup(&up->port);
425 goto ack_tx_int; 424 goto ack_tx_int;
426 }
427 if (uart_tx_stopped(&up->port)) 425 if (uart_tx_stopped(&up->port))
428 goto ack_tx_int; 426 goto ack_tx_int;
429 427
@@ -571,7 +569,7 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl)
571 else 569 else
572 clear_bits |= DTR; 570 clear_bits |= DTR;
573 571
574 /* NOTE: Not subject to 'transmitter active' rule. */ 572 /* NOTE: Not subject to 'transmitter active' rule. */
575 up->curregs[R5] |= set_bits; 573 up->curregs[R5] |= set_bits;
576 up->curregs[R5] &= ~clear_bits; 574 up->curregs[R5] &= ~clear_bits;
577 write_zsreg(channel, R5, up->curregs[R5]); 575 write_zsreg(channel, R5, up->curregs[R5]);
@@ -654,7 +652,7 @@ static void ip22zilog_enable_ms(struct uart_port *port)
654 if (new_reg != up->curregs[R15]) { 652 if (new_reg != up->curregs[R15]) {
655 up->curregs[R15] = new_reg; 653 up->curregs[R15] = new_reg;
656 654
657 /* NOTE: Not subject to 'transmitter active' rule. */ 655 /* NOTE: Not subject to 'transmitter active' rule. */
658 write_zsreg(channel, R15, up->curregs[R15]); 656 write_zsreg(channel, R15, up->curregs[R15]);
659 } 657 }
660} 658}
@@ -680,7 +678,7 @@ static void ip22zilog_break_ctl(struct uart_port *port, int break_state)
680 if (new_reg != up->curregs[R5]) { 678 if (new_reg != up->curregs[R5]) {
681 up->curregs[R5] = new_reg; 679 up->curregs[R5] = new_reg;
682 680
683 /* NOTE: Not subject to 'transmitter active' rule. */ 681 /* NOTE: Not subject to 'transmitter active' rule. */
684 write_zsreg(channel, R5, up->curregs[R5]); 682 write_zsreg(channel, R5, up->curregs[R5]);
685 } 683 }
686 684
diff --git a/drivers/serial/jsm/jsm.h b/drivers/serial/jsm/jsm.h
index 18753193f59b..dfc1e86d3aa1 100644
--- a/drivers/serial/jsm/jsm.h
+++ b/drivers/serial/jsm/jsm.h
@@ -380,7 +380,6 @@ struct neo_uart_struct {
380extern struct uart_driver jsm_uart_driver; 380extern struct uart_driver jsm_uart_driver;
381extern struct board_ops jsm_neo_ops; 381extern struct board_ops jsm_neo_ops;
382extern int jsm_debug; 382extern int jsm_debug;
383extern int jsm_rawreadok;
384 383
385/************************************************************************* 384/*************************************************************************
386 * 385 *
diff --git a/drivers/serial/jsm/jsm_driver.c b/drivers/serial/jsm/jsm_driver.c
index 7e56c7824194..b1b66e71d281 100644
--- a/drivers/serial/jsm/jsm_driver.c
+++ b/drivers/serial/jsm/jsm_driver.c
@@ -49,11 +49,8 @@ struct uart_driver jsm_uart_driver = {
49}; 49};
50 50
51int jsm_debug; 51int jsm_debug;
52int jsm_rawreadok;
53module_param(jsm_debug, int, 0); 52module_param(jsm_debug, int, 0);
54module_param(jsm_rawreadok, int, 0);
55MODULE_PARM_DESC(jsm_debug, "Driver debugging level"); 53MODULE_PARM_DESC(jsm_debug, "Driver debugging level");
56MODULE_PARM_DESC(jsm_rawreadok, "Bypass flip buffers on input");
57 54
58static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) 55static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
59{ 56{
diff --git a/drivers/serial/jsm/jsm_neo.c b/drivers/serial/jsm/jsm_neo.c
index 6f22b42d9337..87e4e2cf8ce7 100644
--- a/drivers/serial/jsm/jsm_neo.c
+++ b/drivers/serial/jsm/jsm_neo.c
@@ -965,56 +965,47 @@ static void neo_param(struct jsm_channel *ch)
965 baud = ch->ch_custom_speed; 965 baud = ch->ch_custom_speed;
966 if (ch->ch_flags & CH_BAUD0) 966 if (ch->ch_flags & CH_BAUD0)
967 ch->ch_flags &= ~(CH_BAUD0); 967 ch->ch_flags &= ~(CH_BAUD0);
968 } else { 968 } else {
969 int iindex = 0; 969 int i;
970 int jindex = 0; 970 unsigned int cflag;
971 971 static struct {
972 const u64 bauds[4][16] = { 972 unsigned int rate;
973 { 973 unsigned int cflag;
974 0, 50, 75, 110, 974 } baud_rates[] = {
975 134, 150, 200, 300, 975 { 921600, B921600 },
976 600, 1200, 1800, 2400, 976 { 460800, B460800 },
977 4800, 9600, 19200, 38400 }, 977 { 230400, B230400 },
978 { 978 { 115200, B115200 },
979 0, 57600, 115200, 230400, 979 { 57600, B57600 },
980 460800, 150, 200, 921600, 980 { 38400, B38400 },
981 600, 1200, 1800, 2400, 981 { 19200, B19200 },
982 4800, 9600, 19200, 38400 }, 982 { 9600, B9600 },
983 { 983 { 4800, B4800 },
984 0, 57600, 76800, 115200, 984 { 2400, B2400 },
985 131657, 153600, 230400, 460800, 985 { 1200, B1200 },
986 921600, 1200, 1800, 2400, 986 { 600, B600 },
987 4800, 9600, 19200, 38400 }, 987 { 300, B300 },
988 { 988 { 200, B200 },
989 0, 57600, 115200, 230400, 989 { 150, B150 },
990 460800, 150, 200, 921600, 990 { 134, B134 },
991 600, 1200, 1800, 2400, 991 { 110, B110 },
992 4800, 9600, 19200, 38400 } 992 { 75, B75 },
993 }; 993 { 50, B50 },
994 994 };
995 baud = C_BAUD(ch->uart_port.info->tty) & 0xff; 995
996 996 cflag = C_BAUD(ch->uart_port.info->tty);
997 if (ch->ch_c_cflag & CBAUDEX) 997 baud = 9600;
998 iindex = 1; 998 for (i = 0; i < ARRAY_SIZE(baud_rates); i++) {
999 999 if (baud_rates[i].cflag == cflag) {
1000 jindex = baud; 1000 baud = baud_rates[i].rate;
1001 1001 break;
1002 if ((iindex >= 0) && (iindex < 4) && (jindex >= 0) && (jindex < 16))
1003 baud = bauds[iindex][jindex];
1004 else {
1005 jsm_printk(IOCTL, DEBUG, &ch->ch_bd->pci_dev,
1006 "baud indices were out of range (%d)(%d)",
1007 iindex, jindex);
1008 baud = 0;
1009 } 1002 }
1010
1011 if (baud == 0)
1012 baud = 9600;
1013
1014 if (ch->ch_flags & CH_BAUD0)
1015 ch->ch_flags &= ~(CH_BAUD0);
1016 } 1003 }
1017 1004
1005 if (ch->ch_flags & CH_BAUD0)
1006 ch->ch_flags &= ~(CH_BAUD0);
1007 }
1008
1018 if (ch->ch_c_cflag & PARENB) 1009 if (ch->ch_c_cflag & PARENB)
1019 lcr |= UART_LCR_PARITY; 1010 lcr |= UART_LCR_PARITY;
1020 1011
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c
index 6fa0d62d6f68..4d48b625cd3d 100644
--- a/drivers/serial/jsm/jsm_tty.c
+++ b/drivers/serial/jsm/jsm_tty.c
@@ -20,8 +20,10 @@
20 * 20 *
21 * Contact Information: 21 * Contact Information:
22 * Scott H Kilau <Scott_Kilau@digi.com> 22 * Scott H Kilau <Scott_Kilau@digi.com>
23 * Wendy Xiong <wendyx@us.ltcfwd.linux.ibm.com> 23 * Ananda Venkatarman <mansarov@us.ibm.com>
24 * 24 * Modifications:
25 * 01/19/06: changed jsm_input routine to use the dynamically allocated
26 * tty_buffer changes. Contributors: Scott Kilau and Ananda V.
25 ***********************************************************************/ 27 ***********************************************************************/
26#include <linux/tty.h> 28#include <linux/tty.h>
27#include <linux/tty_flip.h> 29#include <linux/tty_flip.h>
@@ -497,16 +499,15 @@ void jsm_input(struct jsm_channel *ch)
497{ 499{
498 struct jsm_board *bd; 500 struct jsm_board *bd;
499 struct tty_struct *tp; 501 struct tty_struct *tp;
502 struct tty_ldisc *ld;
500 u32 rmask; 503 u32 rmask;
501 u16 head; 504 u16 head;
502 u16 tail; 505 u16 tail;
503 int data_len; 506 int data_len;
504 unsigned long lock_flags; 507 unsigned long lock_flags;
505 int flip_len; 508 int flip_len = 0;
506 int len = 0; 509 int len = 0;
507 int n = 0; 510 int n = 0;
508 char *buf = NULL;
509 char *buf2 = NULL;
510 int s = 0; 511 int s = 0;
511 int i = 0; 512 int i = 0;
512 513
@@ -574,56 +575,50 @@ void jsm_input(struct jsm_channel *ch)
574 575
575 /* 576 /*
576 * If the rxbuf is empty and we are not throttled, put as much 577 * If the rxbuf is empty and we are not throttled, put as much
577 * as we can directly into the linux TTY flip buffer. 578 * as we can directly into the linux TTY buffer.
578 * The jsm_rawreadok case takes advantage of carnal knowledge that
579 * the char_buf and the flag_buf are next to each other and
580 * are each of (2 * TTY_FLIPBUF_SIZE) size.
581 * 579 *
582 * NOTE: if(!tty->real_raw), the call to ldisc.receive_buf
583 *actually still uses the flag buffer, so you can't
584 *use it for input data
585 */ 580 */
586 if (jsm_rawreadok) { 581 flip_len = TTY_FLIPBUF_SIZE;
587 if (tp->real_raw)
588 flip_len = MYFLIPLEN;
589 else
590 flip_len = 2 * TTY_FLIPBUF_SIZE;
591 } else
592 flip_len = TTY_FLIPBUF_SIZE - tp->flip.count;
593 582
594 len = min(data_len, flip_len); 583 len = min(data_len, flip_len);
595 len = min(len, (N_TTY_BUF_SIZE - 1) - tp->read_cnt); 584 len = min(len, (N_TTY_BUF_SIZE - 1) - tp->read_cnt);
585 ld = tty_ldisc_ref(tp);
596 586
597 if (len <= 0) { 587 /*
598 spin_unlock_irqrestore(&ch->ch_lock, lock_flags); 588 * If the DONT_FLIP flag is on, don't flush our buffer, and act
599 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, "jsm_input 1\n"); 589 * like the ld doesn't have any space to put the data right now.
600 return; 590 */
601 } 591 if (test_bit(TTY_DONT_FLIP, &tp->flags))
592 len = 0;
602 593
603 /* 594 /*
604 * If we're bypassing flip buffers on rx, we can blast it 595 * If we were unable to get a reference to the ld,
605 * right into the beginning of the buffer. 596 * don't flush our buffer, and act like the ld doesn't
597 * have any space to put the data right now.
606 */ 598 */
607 if (jsm_rawreadok) { 599 if (!ld) {
608 if (tp->real_raw) { 600 len = 0;
609 if (ch->ch_flags & CH_FLIPBUF_IN_USE) {
610 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev,
611 "JSM - FLIPBUF in use. delaying input\n");
612 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
613 return;
614 }
615 ch->ch_flags |= CH_FLIPBUF_IN_USE;
616 buf = ch->ch_bd->flipbuf;
617 buf2 = NULL;
618 } else {
619 buf = tp->flip.char_buf;
620 buf2 = tp->flip.flag_buf;
621 }
622 } else { 601 } else {
623 buf = tp->flip.char_buf_ptr; 602 /*
624 buf2 = tp->flip.flag_buf_ptr; 603 * If ld doesn't have a pointer to a receive_buf function,
604 * flush the data, then act like the ld doesn't have any
605 * space to put the data right now.
606 */
607 if (!ld->receive_buf) {
608 ch->ch_r_head = ch->ch_r_tail;
609 len = 0;
610 }
625 } 611 }
626 612
613 if (len <= 0) {
614 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
615 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, "jsm_input 1\n");
616 if (ld)
617 tty_ldisc_deref(ld);
618 return;
619 }
620
621 len = tty_buffer_request_room(tp, len);
627 n = len; 622 n = len;
628 623
629 /* 624 /*
@@ -638,121 +633,47 @@ void jsm_input(struct jsm_channel *ch)
638 if (s <= 0) 633 if (s <= 0)
639 break; 634 break;
640 635
641 memcpy(buf, ch->ch_rqueue + tail, s); 636 /*
642 637 * If conditions are such that ld needs to see all
643 /* buf2 is only set when port isn't raw */ 638 * UART errors, we will have to walk each character
644 if (buf2) 639 * and error byte and send them to the buffer one at
645 memcpy(buf2, ch->ch_equeue + tail, s); 640 * a time.
646 641 */
647 tail += s;
648 buf += s;
649 if (buf2)
650 buf2 += s;
651 n -= s;
652 /* Flip queue if needed */
653 tail &= rmask;
654 }
655 642
656 /*
657 * In high performance mode, we don't have to update
658 * flag_buf or any of the counts or pointers into flip buf.
659 */
660 if (!jsm_rawreadok) {
661 if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) { 643 if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) {
662 for (i = 0; i < len; i++) { 644 for (i = 0; i < s; i++) {
663 /* 645 /*
664 * Give the Linux ld the flags in the 646 * Give the Linux ld the flags in the
665 * format it likes. 647 * format it likes.
666 */ 648 */
667 if (tp->flip.flag_buf_ptr[i] & UART_LSR_BI) 649 if (*(ch->ch_equeue +tail +i) & UART_LSR_BI)
668 tp->flip.flag_buf_ptr[i] = TTY_BREAK; 650 tty_insert_flip_char(tp, *(ch->ch_rqueue +tail +i), TTY_BREAK);
669 else if (tp->flip.flag_buf_ptr[i] & UART_LSR_PE) 651 else if (*(ch->ch_equeue +tail +i) & UART_LSR_PE)
670 tp->flip.flag_buf_ptr[i] = TTY_PARITY; 652 tty_insert_flip_char(tp, *(ch->ch_rqueue +tail +i), TTY_PARITY);
671 else if (tp->flip.flag_buf_ptr[i] & UART_LSR_FE) 653 else if (*(ch->ch_equeue +tail +i) & UART_LSR_FE)
672 tp->flip.flag_buf_ptr[i] = TTY_FRAME; 654 tty_insert_flip_char(tp, *(ch->ch_rqueue +tail +i), TTY_FRAME);
673 else 655 else
674 tp->flip.flag_buf_ptr[i] = TTY_NORMAL; 656 tty_insert_flip_char(tp, *(ch->ch_rqueue +tail +i), TTY_NORMAL);
675 } 657 }
676 } else { 658 } else {
677 memset(tp->flip.flag_buf_ptr, 0, len); 659 tty_insert_flip_string(tp, ch->ch_rqueue + tail, s) ;
678 } 660 }
679 661 tail += s;
680 tp->flip.char_buf_ptr += len; 662 n -= s;
681 tp->flip.flag_buf_ptr += len; 663 /* Flip queue if needed */
682 tp->flip.count += len; 664 tail &= rmask;
683 }
684 else if (!tp->real_raw) {
685 if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) {
686 for (i = 0; i < len; i++) {
687 /*
688 * Give the Linux ld the flags in the
689 * format it likes.
690 */
691 if (tp->flip.flag_buf_ptr[i] & UART_LSR_BI)
692 tp->flip.flag_buf_ptr[i] = TTY_BREAK;
693 else if (tp->flip.flag_buf_ptr[i] & UART_LSR_PE)
694 tp->flip.flag_buf_ptr[i] = TTY_PARITY;
695 else if (tp->flip.flag_buf_ptr[i] & UART_LSR_FE)
696 tp->flip.flag_buf_ptr[i] = TTY_FRAME;
697 else
698 tp->flip.flag_buf_ptr[i] = TTY_NORMAL;
699 }
700 } else
701 memset(tp->flip.flag_buf, 0, len);
702 } 665 }
703 666
704 /* 667 ch->ch_r_tail = tail & rmask;
705 * If we're doing raw reads, jam it right into the 668 ch->ch_e_tail = tail & rmask;
706 * line disc bypassing the flip buffers. 669 jsm_check_queue_flow_control(ch);
707 */ 670 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
708 if (jsm_rawreadok) {
709 if (tp->real_raw) {
710 ch->ch_r_tail = tail & rmask;
711 ch->ch_e_tail = tail & rmask;
712
713 jsm_check_queue_flow_control(ch);
714
715 /* !!! WE *MUST* LET GO OF ALL LOCKS BEFORE CALLING RECEIVE BUF !!! */
716 671
717 spin_unlock_irqrestore(&ch->ch_lock, lock_flags); 672 /* Tell the tty layer its okay to "eat" the data now */
673 tty_flip_buffer_push(tp);
718 674
719 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, 675 if (ld)
720 "jsm_input. %d real_raw len:%d calling receive_buf for board %d\n", 676 tty_ldisc_deref(ld);
721 __LINE__, len, ch->ch_bd->boardnum);
722 tp->ldisc.receive_buf(tp, ch->ch_bd->flipbuf, NULL, len);
723
724 /* Allow use of channel flip buffer again */
725 spin_lock_irqsave(&ch->ch_lock, lock_flags);
726 ch->ch_flags &= ~CH_FLIPBUF_IN_USE;
727 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
728
729 } else {
730 ch->ch_r_tail = tail & rmask;
731 ch->ch_e_tail = tail & rmask;
732
733 jsm_check_queue_flow_control(ch);
734
735 /* !!! WE *MUST* LET GO OF ALL LOCKS BEFORE CALLING RECEIVE BUF !!! */
736 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
737
738 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev,
739 "jsm_input. %d not real_raw len:%d calling receive_buf for board %d\n",
740 __LINE__, len, ch->ch_bd->boardnum);
741
742 tp->ldisc.receive_buf(tp, tp->flip.char_buf, tp->flip.flag_buf, len);
743 }
744 } else {
745 ch->ch_r_tail = tail & rmask;
746 ch->ch_e_tail = tail & rmask;
747
748 jsm_check_queue_flow_control(ch);
749
750 spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
751
752 jsm_printk(READ, INFO, &ch->ch_bd->pci_dev,
753 "jsm_input. %d not jsm_read raw okay scheduling flip\n", __LINE__);
754 tty_schedule_flip(tp);
755 }
756 677
757 jsm_printk(IOCTL, INFO, &ch->ch_bd->pci_dev, "finish\n"); 678 jsm_printk(IOCTL, INFO, &ch->ch_bd->pci_dev, "finish\n");
758} 679}
diff --git a/drivers/serial/m32r_sio.c b/drivers/serial/m32r_sio.c
index b48066a64a7d..242a04104393 100644
--- a/drivers/serial/m32r_sio.c
+++ b/drivers/serial/m32r_sio.c
@@ -80,7 +80,7 @@
80#include <asm/serial.h> 80#include <asm/serial.h>
81 81
82/* Standard COM flags */ 82/* Standard COM flags */
83#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) 83#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
84 84
85/* 85/*
86 * SERIAL_PORT_DFNS tells us about built-in ports that have no 86 * SERIAL_PORT_DFNS tells us about built-in ports that have no
diff --git a/drivers/serial/m32r_sio.h b/drivers/serial/m32r_sio.h
index 07d0dd80aa3d..7c3ec24f7e50 100644
--- a/drivers/serial/m32r_sio.h
+++ b/drivers/serial/m32r_sio.h
@@ -37,7 +37,7 @@ struct old_serial_port {
37 unsigned int irq; 37 unsigned int irq;
38 unsigned int flags; 38 unsigned int flags;
39 unsigned char io_type; 39 unsigned char io_type;
40 unsigned char *iomem_base; 40 unsigned char __iomem *iomem_base;
41 unsigned short iomem_reg_shift; 41 unsigned short iomem_reg_shift;
42}; 42};
43 43
diff --git a/drivers/serial/mcfserial.c b/drivers/serial/mcfserial.c
index d957a3a9edf1..8cbbb954df2c 100644
--- a/drivers/serial/mcfserial.c
+++ b/drivers/serial/mcfserial.c
@@ -57,20 +57,16 @@ struct timer_list mcfrs_timer_struct;
57 * keep going. Perhaps one day the cflag settings for the 57 * keep going. Perhaps one day the cflag settings for the
58 * console can be used instead. 58 * console can be used instead.
59 */ 59 */
60#if defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \
61 defined(CONFIG_senTec) || defined(CONFIG_SNEHA)
62#define CONSOLE_BAUD_RATE 19200
63#define DEFAULT_CBAUD B19200
64#endif
65
66#if defined(CONFIG_HW_FEITH) 60#if defined(CONFIG_HW_FEITH)
67#define CONSOLE_BAUD_RATE 38400 61#define CONSOLE_BAUD_RATE 38400
68#define DEFAULT_CBAUD B38400 62#define DEFAULT_CBAUD B38400
69#endif 63#elif defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB)
70
71#if defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB)
72#define CONSOLE_BAUD_RATE 115200 64#define CONSOLE_BAUD_RATE 115200
73#define DEFAULT_CBAUD B115200 65#define DEFAULT_CBAUD B115200
66#elif defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \
67 defined(CONFIG_senTec) || defined(CONFIG_SNEHA)
68#define CONSOLE_BAUD_RATE 19200
69#define DEFAULT_CBAUD B19200
74#endif 70#endif
75 71
76#ifndef CONSOLE_BAUD_RATE 72#ifndef CONSOLE_BAUD_RATE
@@ -350,8 +346,7 @@ static inline void receive_chars(struct mcf_serial *info)
350 } 346 }
351 tty_insert_flip_char(tty, ch, flag); 347 tty_insert_flip_char(tty, ch, flag);
352 } 348 }
353 349 tty_schedule_flip(tty);
354 schedule_work(&tty->flip.work);
355 return; 350 return;
356} 351}
357 352
diff --git a/drivers/serial/mux.c b/drivers/serial/mux.c
index 4e49168c3176..868eaf4a1a68 100644
--- a/drivers/serial/mux.c
+++ b/drivers/serial/mux.c
@@ -462,7 +462,7 @@ static int __init mux_probe(struct parisc_device *dev)
462 port->mapbase = dev->hpa.start + MUX_OFFSET + 462 port->mapbase = dev->hpa.start + MUX_OFFSET +
463 (i * MUX_LINE_OFFSET); 463 (i * MUX_LINE_OFFSET);
464 port->membase = ioremap(port->mapbase, MUX_LINE_OFFSET); 464 port->membase = ioremap(port->mapbase, MUX_LINE_OFFSET);
465 port->iotype = SERIAL_IO_MEM; 465 port->iotype = UPIO_MEM;
466 port->type = PORT_MUX; 466 port->type = PORT_MUX;
467 port->irq = NO_IRQ; 467 port->irq = NO_IRQ;
468 port->uartclk = 0; 468 port->uartclk = 0;
diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c
index 4e03a87f3fb4..9b7ed58cb53b 100644
--- a/drivers/serial/pmac_zilog.c
+++ b/drivers/serial/pmac_zilog.c
@@ -1492,7 +1492,7 @@ no_dma:
1492 /* 1492 /*
1493 * Init remaining bits of "port" structure 1493 * Init remaining bits of "port" structure
1494 */ 1494 */
1495 uap->port.iotype = SERIAL_IO_MEM; 1495 uap->port.iotype = UPIO_MEM;
1496 uap->port.irq = np->intrs[0].line; 1496 uap->port.irq = np->intrs[0].line;
1497 uap->port.uartclk = ZS_CLOCK; 1497 uap->port.uartclk = ZS_CLOCK;
1498 uap->port.fifosize = 1; 1498 uap->port.fifosize = 1;
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
index eb4883efb7c6..7410e093a6b9 100644
--- a/drivers/serial/s3c2410.c
+++ b/drivers/serial/s3c2410.c
@@ -161,7 +161,11 @@ s3c24xx_serial_dbg(const char *fmt, ...)
161 161
162/* we can support 3 uarts, but not always use them */ 162/* we can support 3 uarts, but not always use them */
163 163
164#ifdef CONFIG_CPU_S3C2400
165#define NR_PORTS (2)
166#else
164#define NR_PORTS (3) 167#define NR_PORTS (3)
168#endif
165 169
166/* port irq numbers */ 170/* port irq numbers */
167 171
@@ -1060,7 +1064,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1060 dbg("resource %p (%lx..%lx)\n", res, res->start, res->end); 1064 dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
1061 1065
1062 port->mapbase = res->start; 1066 port->mapbase = res->start;
1063 port->membase = S3C24XX_VA_UART + (res->start - S3C2410_PA_UART); 1067 port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART);
1064 port->irq = platform_get_irq(platdev, 0); 1068 port->irq = platform_get_irq(platdev, 0);
1065 1069
1066 ourport->clk = clk_get(&platdev->dev, "uart"); 1070 ourport->clk = clk_get(&platdev->dev, "uart");
diff --git a/drivers/serial/sa1100.c b/drivers/serial/sa1100.c
index 1bd93168f504..2c00b8625852 100644
--- a/drivers/serial/sa1100.c
+++ b/drivers/serial/sa1100.c
@@ -628,7 +628,7 @@ static void __init sa1100_init_ports(void)
628 sa1100_ports[i].port.ops = &sa1100_pops; 628 sa1100_ports[i].port.ops = &sa1100_pops;
629 sa1100_ports[i].port.fifosize = 8; 629 sa1100_ports[i].port.fifosize = 8;
630 sa1100_ports[i].port.line = i; 630 sa1100_ports[i].port.line = i;
631 sa1100_ports[i].port.iotype = SERIAL_IO_MEM; 631 sa1100_ports[i].port.iotype = UPIO_MEM;
632 init_timer(&sa1100_ports[i].timer); 632 init_timer(&sa1100_ports[i].timer);
633 sa1100_ports[i].timer.function = sa1100_timeout; 633 sa1100_ports[i].timer.function = sa1100_timeout;
634 sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i]; 634 sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];
@@ -665,21 +665,21 @@ void __init sa1100_register_uart(int idx, int port)
665 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0; 665 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
666 sa1100_ports[idx].port.mapbase = _Ser1UTCR0; 666 sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
667 sa1100_ports[idx].port.irq = IRQ_Ser1UART; 667 sa1100_ports[idx].port.irq = IRQ_Ser1UART;
668 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF; 668 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
669 break; 669 break;
670 670
671 case 2: 671 case 2:
672 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0; 672 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
673 sa1100_ports[idx].port.mapbase = _Ser2UTCR0; 673 sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
674 sa1100_ports[idx].port.irq = IRQ_Ser2ICP; 674 sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
675 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF; 675 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
676 break; 676 break;
677 677
678 case 3: 678 case 3:
679 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0; 679 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
680 sa1100_ports[idx].port.mapbase = _Ser3UTCR0; 680 sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
681 sa1100_ports[idx].port.irq = IRQ_Ser3UART; 681 sa1100_ports[idx].port.irq = IRQ_Ser3UART;
682 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF; 682 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
683 break; 683 break;
684 684
685 default: 685 default:
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index 943770470b9d..cc1faa31d124 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -71,6 +71,11 @@ static void uart_change_pm(struct uart_state *state, int pm_state);
71void uart_write_wakeup(struct uart_port *port) 71void uart_write_wakeup(struct uart_port *port)
72{ 72{
73 struct uart_info *info = port->info; 73 struct uart_info *info = port->info;
74 /*
75 * This means you called this function _after_ the port was
76 * closed. No cookie for you.
77 */
78 BUG_ON(!info);
74 tasklet_schedule(&info->tlet); 79 tasklet_schedule(&info->tlet);
75} 80}
76 81
@@ -332,7 +337,7 @@ uart_get_baud_rate(struct uart_port *port, struct termios *termios,
332 struct termios *old, unsigned int min, unsigned int max) 337 struct termios *old, unsigned int min, unsigned int max)
333{ 338{
334 unsigned int try, baud, altbaud = 38400; 339 unsigned int try, baud, altbaud = 38400;
335 unsigned int flags = port->flags & UPF_SPD_MASK; 340 upf_t flags = port->flags & UPF_SPD_MASK;
336 341
337 if (flags == UPF_SPD_HI) 342 if (flags == UPF_SPD_HI)
338 altbaud = 57600; 343 altbaud = 57600;
@@ -471,14 +476,26 @@ static void uart_flush_chars(struct tty_struct *tty)
471} 476}
472 477
473static int 478static int
474uart_write(struct tty_struct *tty, const unsigned char * buf, int count) 479uart_write(struct tty_struct *tty, const unsigned char *buf, int count)
475{ 480{
476 struct uart_state *state = tty->driver_data; 481 struct uart_state *state = tty->driver_data;
477 struct uart_port *port = state->port; 482 struct uart_port *port;
478 struct circ_buf *circ = &state->info->xmit; 483 struct circ_buf *circ;
479 unsigned long flags; 484 unsigned long flags;
480 int c, ret = 0; 485 int c, ret = 0;
481 486
487 /*
488 * This means you called this function _after_ the port was
489 * closed. No cookie for you.
490 */
491 if (!state || !state->info) {
492 WARN_ON(1);
493 return -EL3HLT;
494 }
495
496 port = state->port;
497 circ = &state->info->xmit;
498
482 if (!circ->buf) 499 if (!circ->buf)
483 return 0; 500 return 0;
484 501
@@ -521,6 +538,15 @@ static void uart_flush_buffer(struct tty_struct *tty)
521 struct uart_port *port = state->port; 538 struct uart_port *port = state->port;
522 unsigned long flags; 539 unsigned long flags;
523 540
541 /*
542 * This means you called this function _after_ the port was
543 * closed. No cookie for you.
544 */
545 if (!state || !state->info) {
546 WARN_ON(1);
547 return;
548 }
549
524 DPRINTK("uart_flush_buffer(%d) called\n", tty->index); 550 DPRINTK("uart_flush_buffer(%d) called\n", tty->index);
525 551
526 spin_lock_irqsave(&port->lock, flags); 552 spin_lock_irqsave(&port->lock, flags);
@@ -615,8 +641,9 @@ static int uart_set_info(struct uart_state *state,
615 struct serial_struct new_serial; 641 struct serial_struct new_serial;
616 struct uart_port *port = state->port; 642 struct uart_port *port = state->port;
617 unsigned long new_port; 643 unsigned long new_port;
618 unsigned int change_irq, change_port, old_flags, closing_wait; 644 unsigned int change_irq, change_port, closing_wait;
619 unsigned int old_custom_divisor, close_delay; 645 unsigned int old_custom_divisor, close_delay;
646 upf_t old_flags, new_flags;
620 int retval = 0; 647 int retval = 0;
621 648
622 if (copy_from_user(&new_serial, newinfo, sizeof(new_serial))) 649 if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
@@ -655,6 +682,7 @@ static int uart_set_info(struct uart_state *state,
655 new_serial.type != port->type; 682 new_serial.type != port->type;
656 683
657 old_flags = port->flags; 684 old_flags = port->flags;
685 new_flags = new_serial.flags;
658 old_custom_divisor = port->custom_divisor; 686 old_custom_divisor = port->custom_divisor;
659 687
660 if (!capable(CAP_SYS_ADMIN)) { 688 if (!capable(CAP_SYS_ADMIN)) {
@@ -664,10 +692,10 @@ static int uart_set_info(struct uart_state *state,
664 (close_delay != state->close_delay) || 692 (close_delay != state->close_delay) ||
665 (closing_wait != state->closing_wait) || 693 (closing_wait != state->closing_wait) ||
666 (new_serial.xmit_fifo_size != port->fifosize) || 694 (new_serial.xmit_fifo_size != port->fifosize) ||
667 (((new_serial.flags ^ old_flags) & ~UPF_USR_MASK) != 0)) 695 (((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0))
668 goto exit; 696 goto exit;
669 port->flags = ((port->flags & ~UPF_USR_MASK) | 697 port->flags = ((port->flags & ~UPF_USR_MASK) |
670 (new_serial.flags & UPF_USR_MASK)); 698 (new_flags & UPF_USR_MASK));
671 port->custom_divisor = new_serial.custom_divisor; 699 port->custom_divisor = new_serial.custom_divisor;
672 goto check_and_exit; 700 goto check_and_exit;
673 } 701 }
@@ -764,7 +792,7 @@ static int uart_set_info(struct uart_state *state,
764 port->irq = new_serial.irq; 792 port->irq = new_serial.irq;
765 port->uartclk = new_serial.baud_base * 16; 793 port->uartclk = new_serial.baud_base * 16;
766 port->flags = (port->flags & ~UPF_CHANGE_MASK) | 794 port->flags = (port->flags & ~UPF_CHANGE_MASK) |
767 (new_serial.flags & UPF_CHANGE_MASK); 795 (new_flags & UPF_CHANGE_MASK);
768 port->custom_divisor = new_serial.custom_divisor; 796 port->custom_divisor = new_serial.custom_divisor;
769 state->close_delay = close_delay; 797 state->close_delay = close_delay;
770 state->closing_wait = closing_wait; 798 state->closing_wait = closing_wait;
@@ -1870,7 +1898,7 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *port)
1870 mutex_lock(&state->mutex); 1898 mutex_lock(&state->mutex);
1871 1899
1872 if (state->info && state->info->flags & UIF_INITIALIZED) { 1900 if (state->info && state->info->flags & UIF_INITIALIZED) {
1873 struct uart_ops *ops = port->ops; 1901 const struct uart_ops *ops = port->ops;
1874 1902
1875 spin_lock_irq(&port->lock); 1903 spin_lock_irq(&port->lock);
1876 ops->stop_tx(port); 1904 ops->stop_tx(port);
@@ -1932,7 +1960,7 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
1932 } 1960 }
1933 1961
1934 if (state->info && state->info->flags & UIF_INITIALIZED) { 1962 if (state->info && state->info->flags & UIF_INITIALIZED) {
1935 struct uart_ops *ops = port->ops; 1963 const struct uart_ops *ops = port->ops;
1936 int ret; 1964 int ret;
1937 1965
1938 ops->set_mctrl(port, 0); 1966 ops->set_mctrl(port, 0);
@@ -2235,7 +2263,7 @@ int uart_add_one_port(struct uart_driver *drv, struct uart_port *port)
2235 * If this port is a console, then the spinlock is already 2263 * If this port is a console, then the spinlock is already
2236 * initialised. 2264 * initialised.
2237 */ 2265 */
2238 if (!uart_console(port)) 2266 if (!(uart_console(port) && (port->cons->flags & CON_ENABLED)))
2239 spin_lock_init(&port->lock); 2267 spin_lock_init(&port->lock);
2240 2268
2241 uart_configure_port(drv, state, port); 2269 uart_configure_port(drv, state, port);
diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c
index d4a1f0e798c1..04186eaae227 100644
--- a/drivers/serial/serial_lh7a40x.c
+++ b/drivers/serial/serial_lh7a40x.c
@@ -501,12 +501,12 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
501 .port = { 501 .port = {
502 .membase = (void*) io_p2v (UART1_PHYS), 502 .membase = (void*) io_p2v (UART1_PHYS),
503 .mapbase = UART1_PHYS, 503 .mapbase = UART1_PHYS,
504 .iotype = SERIAL_IO_MEM, 504 .iotype = UPIO_MEM,
505 .irq = IRQ_UART1INTR, 505 .irq = IRQ_UART1INTR,
506 .uartclk = 14745600/2, 506 .uartclk = 14745600/2,
507 .fifosize = 16, 507 .fifosize = 16,
508 .ops = &lh7a40x_uart_ops, 508 .ops = &lh7a40x_uart_ops,
509 .flags = ASYNC_BOOT_AUTOCONF, 509 .flags = UPF_BOOT_AUTOCONF,
510 .line = 0, 510 .line = 0,
511 }, 511 },
512 }, 512 },
@@ -514,12 +514,12 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
514 .port = { 514 .port = {
515 .membase = (void*) io_p2v (UART2_PHYS), 515 .membase = (void*) io_p2v (UART2_PHYS),
516 .mapbase = UART2_PHYS, 516 .mapbase = UART2_PHYS,
517 .iotype = SERIAL_IO_MEM, 517 .iotype = UPIO_MEM,
518 .irq = IRQ_UART2INTR, 518 .irq = IRQ_UART2INTR,
519 .uartclk = 14745600/2, 519 .uartclk = 14745600/2,
520 .fifosize = 16, 520 .fifosize = 16,
521 .ops = &lh7a40x_uart_ops, 521 .ops = &lh7a40x_uart_ops,
522 .flags = ASYNC_BOOT_AUTOCONF, 522 .flags = UPF_BOOT_AUTOCONF,
523 .line = 1, 523 .line = 1,
524 }, 524 },
525 }, 525 },
@@ -527,12 +527,12 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
527 .port = { 527 .port = {
528 .membase = (void*) io_p2v (UART3_PHYS), 528 .membase = (void*) io_p2v (UART3_PHYS),
529 .mapbase = UART3_PHYS, 529 .mapbase = UART3_PHYS,
530 .iotype = SERIAL_IO_MEM, 530 .iotype = UPIO_MEM,
531 .irq = IRQ_UART3INTR, 531 .irq = IRQ_UART3INTR,
532 .uartclk = 14745600/2, 532 .uartclk = 14745600/2,
533 .fifosize = 16, 533 .fifosize = 16,
534 .ops = &lh7a40x_uart_ops, 534 .ops = &lh7a40x_uart_ops,
535 .flags = ASYNC_BOOT_AUTOCONF, 535 .flags = UPF_BOOT_AUTOCONF,
536 .line = 2, 536 .line = 2,
537 }, 537 },
538 }, 538 },
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index a9e070759628..44f6bf79bbe1 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -42,6 +42,7 @@
42#include <linux/delay.h> 42#include <linux/delay.h>
43#include <linux/console.h> 43#include <linux/console.h>
44#include <linux/bitops.h> 44#include <linux/bitops.h>
45#include <linux/generic_serial.h>
45 46
46#ifdef CONFIG_CPU_FREQ 47#ifdef CONFIG_CPU_FREQ
47#include <linux/notifier.h> 48#include <linux/notifier.h>
@@ -53,7 +54,9 @@
53#include <asm/irq.h> 54#include <asm/irq.h>
54#include <asm/uaccess.h> 55#include <asm/uaccess.h>
55 56
56#include <linux/generic_serial.h> 57#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
58#include <asm/clock.h>
59#endif
57 60
58#ifdef CONFIG_SH_STANDARD_BIOS 61#ifdef CONFIG_SH_STANDARD_BIOS
59#include <asm/sh_bios.h> 62#include <asm/sh_bios.h>
@@ -86,9 +89,11 @@ static void sci_stop_rx(struct uart_port *port);
86static int sci_request_irq(struct sci_port *port); 89static int sci_request_irq(struct sci_port *port);
87static void sci_free_irq(struct sci_port *port); 90static void sci_free_irq(struct sci_port *port);
88 91
89static struct sci_port sci_ports[SCI_NPORTS]; 92static struct sci_port sci_ports[];
90static struct uart_driver sci_uart_driver; 93static struct uart_driver sci_uart_driver;
91 94
95#define SCI_NPORTS sci_uart_driver.nr
96
92#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) 97#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
93 98
94static void handle_error(struct uart_port *port) 99static void handle_error(struct uart_port *port)
@@ -168,7 +173,7 @@ static void put_string(struct sci_port *sci_port, const char *buffer, int count)
168 int usegdb=0; 173 int usegdb=0;
169 174
170#ifdef CONFIG_SH_STANDARD_BIOS 175#ifdef CONFIG_SH_STANDARD_BIOS
171 /* This call only does a trap the first time it is 176 /* This call only does a trap the first time it is
172 * called, and so is safe to do here unconditionally 177 * called, and so is safe to do here unconditionally
173 */ 178 */
174 usegdb |= sh_bios_in_gdb_mode(); 179 usegdb |= sh_bios_in_gdb_mode();
@@ -324,47 +329,46 @@ static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
324 /* tx mark output*/ 329 /* tx mark output*/
325 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx; 330 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
326} 331}
327#else
328static void sci_init_pins_sci(struct uart_port *port, unsigned int cflag)
329{
330}
331#endif 332#endif
332#endif 333#endif
333 334
334#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) 335#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
335#if defined(CONFIG_CPU_SH3) 336#if defined(CONFIG_CPU_SUBTYPE_SH7300)
336/* For SH7705, SH7707, SH7709, SH7709A, SH7729, SH7300*/ 337/* SH7300 doesn't use RTS/CTS */
338static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
339{
340 sci_out(port, SCFCR, 0);
341}
342#elif defined(CONFIG_CPU_SH3)
343/* For SH7705, SH7707, SH7709, SH7709A, SH7729 */
337static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 344static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
338{ 345{
339 unsigned int fcr_val = 0; 346 unsigned int fcr_val = 0;
340#if !defined(CONFIG_CPU_SUBTYPE_SH7300) /* SH7300 doesn't use RTS/CTS */ 347 unsigned short data;
341 { 348
342 unsigned short data; 349 /* We need to set SCPCR to enable RTS/CTS */
350 data = ctrl_inw(SCPCR);
351 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
352 ctrl_outw(data & 0x0fcf, SCPCR);
343 353
344 /* We need to set SCPCR to enable RTS/CTS */
345 data = ctrl_inw(SCPCR);
346 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
347 ctrl_outw(data&0x0fcf, SCPCR);
348 }
349 if (cflag & CRTSCTS) 354 if (cflag & CRTSCTS)
350 fcr_val |= SCFCR_MCE; 355 fcr_val |= SCFCR_MCE;
351 else { 356 else {
352 unsigned short data;
353
354 /* We need to set SCPCR to enable RTS/CTS */ 357 /* We need to set SCPCR to enable RTS/CTS */
355 data = ctrl_inw(SCPCR); 358 data = ctrl_inw(SCPCR);
356 /* Clear out SCP7MD1,0, SCP4MD1,0, 359 /* Clear out SCP7MD1,0, SCP4MD1,0,
357 Set SCP6MD1,0 = {01} (output) */ 360 Set SCP6MD1,0 = {01} (output) */
358 ctrl_outw((data&0x0fcf)|0x1000, SCPCR); 361 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
359 362
360 data = ctrl_inb(SCPDR); 363 data = ctrl_inb(SCPDR);
361 /* Set /RTS2 (bit6) = 0 */ 364 /* Set /RTS2 (bit6) = 0 */
362 ctrl_outb(data&0xbf, SCPDR); 365 ctrl_outb(data & 0xbf, SCPDR);
363 } 366 }
364#endif 367
365 sci_out(port, SCFCR, fcr_val); 368 sci_out(port, SCFCR, fcr_val);
366} 369}
367 370
371#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
368static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) 372static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
369{ 373{
370 unsigned int fcr_val = 0; 374 unsigned int fcr_val = 0;
@@ -374,7 +378,7 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
374 378
375 sci_out(port, SCFCR, fcr_val); 379 sci_out(port, SCFCR, fcr_val);
376} 380}
377 381#endif
378#else 382#else
379 383
380/* For SH7750 */ 384/* For SH7750 */
@@ -385,7 +389,11 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
385 if (cflag & CRTSCTS) { 389 if (cflag & CRTSCTS) {
386 fcr_val |= SCFCR_MCE; 390 fcr_val |= SCFCR_MCE;
387 } else { 391 } else {
392#ifdef CONFIG_CPU_SUBTYPE_SH7780
393 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
394#else
388 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */ 395 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
396#endif
389 } 397 }
390 sci_out(port, SCFCR, fcr_val); 398 sci_out(port, SCFCR, fcr_val);
391} 399}
@@ -422,7 +430,11 @@ static void sci_transmit_chars(struct uart_port *port)
422 430
423#if !defined(SCI_ONLY) 431#if !defined(SCI_ONLY)
424 if (port->type == PORT_SCIF) { 432 if (port->type == PORT_SCIF) {
433#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
434 txroom = SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
435#else
425 txroom = SCIF_TXROOM_MAX - (sci_in(port, SCFDR)>>8); 436 txroom = SCIF_TXROOM_MAX - (sci_in(port, SCFDR)>>8);
437#endif
426 } else { 438 } else {
427 txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0; 439 txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0;
428 } 440 }
@@ -491,7 +503,11 @@ static inline void sci_receive_chars(struct uart_port *port,
491 while (1) { 503 while (1) {
492#if !defined(SCI_ONLY) 504#if !defined(SCI_ONLY)
493 if (port->type == PORT_SCIF) { 505 if (port->type == PORT_SCIF) {
506#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
507 count = sci_in(port, SCRFDR) & 0x7f;
508#else
494 count = sci_in(port, SCFDR)&SCIF_RFDC_MASK ; 509 count = sci_in(port, SCFDR)&SCIF_RFDC_MASK ;
510#endif
495 } else { 511 } else {
496 count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0; 512 count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0;
497 } 513 }
@@ -652,7 +668,7 @@ static inline int sci_handle_breaks(struct uart_port *port)
652 struct tty_struct *tty = port->info->tty; 668 struct tty_struct *tty = port->info->tty;
653 struct sci_port *s = &sci_ports[port->line]; 669 struct sci_port *s = &sci_ports[port->line];
654 670
655 if (!s->break_flag && status & SCxSR_BRK(port)) 671 if (!s->break_flag && status & SCxSR_BRK(port)) {
656#if defined(CONFIG_CPU_SH3) 672#if defined(CONFIG_CPU_SH3)
657 /* Debounce break */ 673 /* Debounce break */
658 s->break_flag = 1; 674 s->break_flag = 1;
@@ -783,6 +799,7 @@ static int sci_notifier(struct notifier_block *self, unsigned long phase, void *
783 (phase == CPUFREQ_RESUMECHANGE)){ 799 (phase == CPUFREQ_RESUMECHANGE)){
784 for (i = 0; i < SCI_NPORTS; i++) { 800 for (i = 0; i < SCI_NPORTS; i++) {
785 struct uart_port *port = &sci_ports[i].port; 801 struct uart_port *port = &sci_ports[i].port;
802 struct clk *clk;
786 803
787 /* 804 /*
788 * Update the uartclk per-port if frequency has 805 * Update the uartclk per-port if frequency has
@@ -795,7 +812,9 @@ static int sci_notifier(struct notifier_block *self, unsigned long phase, void *
795 * 812 *
796 * Clean this up later.. 813 * Clean this up later..
797 */ 814 */
798 port->uartclk = current_cpu_data.module_clock * 16; 815 clk = clk_get("module_clk");
816 port->uartclk = clk_get_rate(clk) * 16;
817 clk_put(clk);
799 } 818 }
800 819
801 printk("%s: got a postchange notification for cpu %d (old %d, new %d)\n", 820 printk("%s: got a postchange notification for cpu %d (old %d, new %d)\n",
@@ -1008,15 +1027,20 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios,
1008 sci_out(port, SCSMR, smr_val); 1027 sci_out(port, SCSMR, smr_val);
1009 1028
1010 switch (baud) { 1029 switch (baud) {
1011 case 0: t = -1; break; 1030 case 0:
1012 case 2400: t = BPS_2400; break; 1031 t = -1;
1013 case 4800: t = BPS_4800; break; 1032 break;
1014 case 9600: t = BPS_9600; break; 1033 default:
1015 case 19200: t = BPS_19200; break; 1034 {
1016 case 38400: t = BPS_38400; break; 1035#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1017 case 57600: t = BPS_57600; break; 1036 struct clk *clk = clk_get("module_clk");
1018 case 115200: t = BPS_115200; break; 1037 t = SCBRR_VALUE(baud, clk_get_rate(clk));
1019 default: t = SCBRR_VALUE(baud); break; 1038 clk_put(clk);
1039#else
1040 t = SCBRR_VALUE(baud);
1041#endif
1042 }
1043 break;
1020 } 1044 }
1021 1045
1022 if (t > 0) { 1046 if (t > 0) {
@@ -1030,7 +1054,9 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios,
1030 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ 1054 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1031 } 1055 }
1032 1056
1033 s->init_pins(port, termios->c_cflag); 1057 if (likely(s->init_pins))
1058 s->init_pins(port, termios->c_cflag);
1059
1034 sci_out(port, SCSCR, SCSCR_INIT(port)); 1060 sci_out(port, SCSCR, SCSCR_INIT(port));
1035 1061
1036 if ((termios->c_cflag & CREAD) != 0) 1062 if ((termios->c_cflag & CREAD) != 0)
@@ -1107,31 +1133,30 @@ static struct uart_ops sci_uart_ops = {
1107 .verify_port = sci_verify_port, 1133 .verify_port = sci_verify_port,
1108}; 1134};
1109 1135
1110static struct sci_port sci_ports[SCI_NPORTS] = { 1136static struct sci_port sci_ports[] = {
1111#if defined(CONFIG_CPU_SUBTYPE_SH7708) 1137#if defined(CONFIG_CPU_SUBTYPE_SH7708)
1112 { 1138 {
1113 .port = { 1139 .port = {
1114 .membase = (void *)0xfffffe80, 1140 .membase = (void *)0xfffffe80,
1115 .mapbase = 0xfffffe80, 1141 .mapbase = 0xfffffe80,
1116 .iotype = SERIAL_IO_MEM, 1142 .iotype = UPIO_MEM,
1117 .irq = 25, 1143 .irq = 25,
1118 .ops = &sci_uart_ops, 1144 .ops = &sci_uart_ops,
1119 .flags = ASYNC_BOOT_AUTOCONF, 1145 .flags = UPF_BOOT_AUTOCONF,
1120 .line = 0, 1146 .line = 0,
1121 }, 1147 },
1122 .type = PORT_SCI, 1148 .type = PORT_SCI,
1123 .irqs = SCI_IRQS, 1149 .irqs = SCI_IRQS,
1124 .init_pins = sci_init_pins_sci,
1125 }, 1150 },
1126#elif defined(CONFIG_CPU_SUBTYPE_SH7705) 1151#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
1127 { 1152 {
1128 .port = { 1153 .port = {
1129 .membase = (void *)SCIF0, 1154 .membase = (void *)SCIF0,
1130 .mapbase = SCIF0, 1155 .mapbase = SCIF0,
1131 .iotype = SERIAL_IO_MEM, 1156 .iotype = UPIO_MEM,
1132 .irq = 55, 1157 .irq = 55,
1133 .ops = &sci_uart_ops, 1158 .ops = &sci_uart_ops,
1134 .flags = ASYNC_BOOT_AUTOCONF, 1159 .flags = UPF_BOOT_AUTOCONF,
1135 .line = 0, 1160 .line = 0,
1136 }, 1161 },
1137 .type = PORT_SCIF, 1162 .type = PORT_SCIF,
@@ -1142,10 +1167,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1142 .port = { 1167 .port = {
1143 .membase = (void *)SCIF2, 1168 .membase = (void *)SCIF2,
1144 .mapbase = SCIF2, 1169 .mapbase = SCIF2,
1145 .iotype = SERIAL_IO_MEM, 1170 .iotype = UPIO_MEM,
1146 .irq = 59, 1171 .irq = 59,
1147 .ops = &sci_uart_ops, 1172 .ops = &sci_uart_ops,
1148 .flags = ASYNC_BOOT_AUTOCONF, 1173 .flags = UPF_BOOT_AUTOCONF,
1149 .line = 1, 1174 .line = 1,
1150 }, 1175 },
1151 .type = PORT_SCIF, 1176 .type = PORT_SCIF,
@@ -1157,24 +1182,23 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1157 .port = { 1182 .port = {
1158 .membase = (void *)0xfffffe80, 1183 .membase = (void *)0xfffffe80,
1159 .mapbase = 0xfffffe80, 1184 .mapbase = 0xfffffe80,
1160 .iotype = SERIAL_IO_MEM, 1185 .iotype = UPIO_MEM,
1161 .irq = 25, 1186 .irq = 25,
1162 .ops = &sci_uart_ops, 1187 .ops = &sci_uart_ops,
1163 .flags = ASYNC_BOOT_AUTOCONF, 1188 .flags = UPF_BOOT_AUTOCONF,
1164 .line = 0, 1189 .line = 0,
1165 }, 1190 },
1166 .type = PORT_SCI, 1191 .type = PORT_SCI,
1167 .irqs = SCI_IRQS, 1192 .irqs = SCI_IRQS,
1168 .init_pins = sci_init_pins_sci,
1169 }, 1193 },
1170 { 1194 {
1171 .port = { 1195 .port = {
1172 .membase = (void *)0xa4000150, 1196 .membase = (void *)0xa4000150,
1173 .mapbase = 0xa4000150, 1197 .mapbase = 0xa4000150,
1174 .iotype = SERIAL_IO_MEM, 1198 .iotype = UPIO_MEM,
1175 .irq = 59, 1199 .irq = 59,
1176 .ops = &sci_uart_ops, 1200 .ops = &sci_uart_ops,
1177 .flags = ASYNC_BOOT_AUTOCONF, 1201 .flags = UPF_BOOT_AUTOCONF,
1178 .line = 1, 1202 .line = 1,
1179 }, 1203 },
1180 .type = PORT_SCIF, 1204 .type = PORT_SCIF,
@@ -1185,10 +1209,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1185 .port = { 1209 .port = {
1186 .membase = (void *)0xa4000140, 1210 .membase = (void *)0xa4000140,
1187 .mapbase = 0xa4000140, 1211 .mapbase = 0xa4000140,
1188 .iotype = SERIAL_IO_MEM, 1212 .iotype = UPIO_MEM,
1189 .irq = 55, 1213 .irq = 55,
1190 .ops = &sci_uart_ops, 1214 .ops = &sci_uart_ops,
1191 .flags = ASYNC_BOOT_AUTOCONF, 1215 .flags = UPF_BOOT_AUTOCONF,
1192 .line = 2, 1216 .line = 2,
1193 }, 1217 },
1194 .type = PORT_IRDA, 1218 .type = PORT_IRDA,
@@ -1200,10 +1224,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1200 .port = { 1224 .port = {
1201 .membase = (void *)0xA4430000, 1225 .membase = (void *)0xA4430000,
1202 .mapbase = 0xA4430000, 1226 .mapbase = 0xA4430000,
1203 .iotype = SERIAL_IO_MEM, 1227 .iotype = UPIO_MEM,
1204 .irq = 25, 1228 .irq = 25,
1205 .ops = &sci_uart_ops, 1229 .ops = &sci_uart_ops,
1206 .flags = ASYNC_BOOT_AUTOCONF, 1230 .flags = UPF_BOOT_AUTOCONF,
1207 .line = 0, 1231 .line = 0,
1208 }, 1232 },
1209 .type = PORT_SCIF, 1233 .type = PORT_SCIF,
@@ -1215,25 +1239,25 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1215 .port = { 1239 .port = {
1216 .membase = (void *)0xffe00000, 1240 .membase = (void *)0xffe00000,
1217 .mapbase = 0xffe00000, 1241 .mapbase = 0xffe00000,
1218 .iotype = SERIAL_IO_MEM, 1242 .iotype = UPIO_MEM,
1219 .irq = 25, 1243 .irq = 25,
1220 .ops = &sci_uart_ops, 1244 .ops = &sci_uart_ops,
1221 .flags = ASYNC_BOOT_AUTOCONF, 1245 .flags = UPF_BOOT_AUTOCONF,
1222 .line = 0, 1246 .line = 0,
1223 }, 1247 },
1224 .type = PORT_SCIF, 1248 .type = PORT_SCIF,
1225 .irqs = SH73180_SCIF_IRQS, 1249 .irqs = SH73180_SCIF_IRQS,
1226 .init_pins = sci_init_pins_scif, 1250 .init_pins = sci_init_pins_scif,
1227 }, 1251 },
1228#elif defined(CONFIG_SH_RTS7751R2D) 1252#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
1229 { 1253 {
1230 .port = { 1254 .port = {
1231 .membase = (void *)0xffe80000, 1255 .membase = (void *)0xffe80000,
1232 .mapbase = 0xffe80000, 1256 .mapbase = 0xffe80000,
1233 .iotype = SERIAL_IO_MEM, 1257 .iotype = UPIO_MEM,
1234 .irq = 43, 1258 .irq = 43,
1235 .ops = &sci_uart_ops, 1259 .ops = &sci_uart_ops,
1236 .flags = ASYNC_BOOT_AUTOCONF, 1260 .flags = UPF_BOOT_AUTOCONF,
1237 .line = 0, 1261 .line = 0,
1238 }, 1262 },
1239 .type = PORT_SCIF, 1263 .type = PORT_SCIF,
@@ -1245,24 +1269,23 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1245 .port = { 1269 .port = {
1246 .membase = (void *)0xffe00000, 1270 .membase = (void *)0xffe00000,
1247 .mapbase = 0xffe00000, 1271 .mapbase = 0xffe00000,
1248 .iotype = SERIAL_IO_MEM, 1272 .iotype = UPIO_MEM,
1249 .irq = 25, 1273 .irq = 25,
1250 .ops = &sci_uart_ops, 1274 .ops = &sci_uart_ops,
1251 .flags = ASYNC_BOOT_AUTOCONF, 1275 .flags = UPF_BOOT_AUTOCONF,
1252 .line = 0, 1276 .line = 0,
1253 }, 1277 },
1254 .type = PORT_SCI, 1278 .type = PORT_SCI,
1255 .irqs = SCI_IRQS, 1279 .irqs = SCI_IRQS,
1256 .init_pins = sci_init_pins_sci,
1257 }, 1280 },
1258 { 1281 {
1259 .port = { 1282 .port = {
1260 .membase = (void *)0xffe80000, 1283 .membase = (void *)0xffe80000,
1261 .mapbase = 0xffe80000, 1284 .mapbase = 0xffe80000,
1262 .iotype = SERIAL_IO_MEM, 1285 .iotype = UPIO_MEM,
1263 .irq = 43, 1286 .irq = 43,
1264 .ops = &sci_uart_ops, 1287 .ops = &sci_uart_ops,
1265 .flags = ASYNC_BOOT_AUTOCONF, 1288 .flags = UPF_BOOT_AUTOCONF,
1266 .line = 1, 1289 .line = 1,
1267 }, 1290 },
1268 .type = PORT_SCIF, 1291 .type = PORT_SCIF,
@@ -1274,10 +1297,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1274 .port = { 1297 .port = {
1275 .membase = (void *)0xfe600000, 1298 .membase = (void *)0xfe600000,
1276 .mapbase = 0xfe600000, 1299 .mapbase = 0xfe600000,
1277 .iotype = SERIAL_IO_MEM, 1300 .iotype = UPIO_MEM,
1278 .irq = 55, 1301 .irq = 55,
1279 .ops = &sci_uart_ops, 1302 .ops = &sci_uart_ops,
1280 .flags = ASYNC_BOOT_AUTOCONF, 1303 .flags = UPF_BOOT_AUTOCONF,
1281 .line = 0, 1304 .line = 0,
1282 }, 1305 },
1283 .type = PORT_SCIF, 1306 .type = PORT_SCIF,
@@ -1288,10 +1311,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1288 .port = { 1311 .port = {
1289 .membase = (void *)0xfe610000, 1312 .membase = (void *)0xfe610000,
1290 .mapbase = 0xfe610000, 1313 .mapbase = 0xfe610000,
1291 .iotype = SERIAL_IO_MEM, 1314 .iotype = UPIO_MEM,
1292 .irq = 75, 1315 .irq = 75,
1293 .ops = &sci_uart_ops, 1316 .ops = &sci_uart_ops,
1294 .flags = ASYNC_BOOT_AUTOCONF, 1317 .flags = UPF_BOOT_AUTOCONF,
1295 .line = 1, 1318 .line = 1,
1296 }, 1319 },
1297 .type = PORT_SCIF, 1320 .type = PORT_SCIF,
@@ -1302,40 +1325,25 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1302 .port = { 1325 .port = {
1303 .membase = (void *)0xfe620000, 1326 .membase = (void *)0xfe620000,
1304 .mapbase = 0xfe620000, 1327 .mapbase = 0xfe620000,
1305 .iotype = SERIAL_IO_MEM, 1328 .iotype = UPIO_MEM,
1306 .irq = 79, 1329 .irq = 79,
1307 .ops = &sci_uart_ops, 1330 .ops = &sci_uart_ops,
1308 .flags = ASYNC_BOOT_AUTOCONF, 1331 .flags = UPF_BOOT_AUTOCONF,
1309 .line = 2, 1332 .line = 2,
1310 }, 1333 },
1311 .type = PORT_SCIF, 1334 .type = PORT_SCIF,
1312 .irqs = SH7760_SCIF2_IRQS, 1335 .irqs = SH7760_SCIF2_IRQS,
1313 .init_pins = sci_init_pins_scif, 1336 .init_pins = sci_init_pins_scif,
1314 }, 1337 },
1315#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
1316 {
1317 .port = {
1318 .membase = (void *)0xffe80000,
1319 .mapbase = 0xffe80000,
1320 .iotype = SERIAL_IO_MEM,
1321 .irq = 43,
1322 .ops = &sci_uart_ops,
1323 .flags = ASYNC_BOOT_AUTOCONF,
1324 .line = 0,
1325 },
1326 .type = PORT_SCIF,
1327 .irqs = SH4_SCIF_IRQS,
1328 .init_pins = sci_init_pins_scif,
1329 },
1330#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) 1338#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
1331 { 1339 {
1332 .port = { 1340 .port = {
1333 .membase = (void *)0xffe00000, 1341 .membase = (void *)0xffe00000,
1334 .mapbase = 0xffe00000, 1342 .mapbase = 0xffe00000,
1335 .iotype = SERIAL_IO_MEM, 1343 .iotype = UPIO_MEM,
1336 .irq = 26, 1344 .irq = 26,
1337 .ops = &sci_uart_ops, 1345 .ops = &sci_uart_ops,
1338 .flags = ASYNC_BOOT_AUTOCONF, 1346 .flags = UPF_BOOT_AUTOCONF,
1339 .line = 0, 1347 .line = 0,
1340 }, 1348 },
1341 .type = PORT_SCIF, 1349 .type = PORT_SCIF,
@@ -1346,10 +1354,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1346 .port = { 1354 .port = {
1347 .membase = (void *)0xffe80000, 1355 .membase = (void *)0xffe80000,
1348 .mapbase = 0xffe80000, 1356 .mapbase = 0xffe80000,
1349 .iotype = SERIAL_IO_MEM, 1357 .iotype = UPIO_MEM,
1350 .irq = 43, 1358 .irq = 43,
1351 .ops = &sci_uart_ops, 1359 .ops = &sci_uart_ops,
1352 .flags = ASYNC_BOOT_AUTOCONF, 1360 .flags = UPF_BOOT_AUTOCONF,
1353 .line = 1, 1361 .line = 1,
1354 }, 1362 },
1355 .type = PORT_SCIF, 1363 .type = PORT_SCIF,
@@ -1359,10 +1367,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1359#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) 1367#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1360 { 1368 {
1361 .port = { 1369 .port = {
1362 .iotype = SERIAL_IO_MEM, 1370 .iotype = UPIO_MEM,
1363 .irq = 42, 1371 .irq = 42,
1364 .ops = &sci_uart_ops, 1372 .ops = &sci_uart_ops,
1365 .flags = ASYNC_BOOT_AUTOCONF, 1373 .flags = UPF_BOOT_AUTOCONF,
1366 .line = 0, 1374 .line = 0,
1367 }, 1375 },
1368 .type = PORT_SCIF, 1376 .type = PORT_SCIF,
@@ -1374,10 +1382,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1374 .port = { 1382 .port = {
1375 .membase = (void *)0x00ffffb0, 1383 .membase = (void *)0x00ffffb0,
1376 .mapbase = 0x00ffffb0, 1384 .mapbase = 0x00ffffb0,
1377 .iotype = SERIAL_IO_MEM, 1385 .iotype = UPIO_MEM,
1378 .irq = 54, 1386 .irq = 54,
1379 .ops = &sci_uart_ops, 1387 .ops = &sci_uart_ops,
1380 .flags = ASYNC_BOOT_AUTOCONF, 1388 .flags = UPF_BOOT_AUTOCONF,
1381 .line = 0, 1389 .line = 0,
1382 }, 1390 },
1383 .type = PORT_SCI, 1391 .type = PORT_SCI,
@@ -1388,10 +1396,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1388 .port = { 1396 .port = {
1389 .membase = (void *)0x00ffffb8, 1397 .membase = (void *)0x00ffffb8,
1390 .mapbase = 0x00ffffb8, 1398 .mapbase = 0x00ffffb8,
1391 .iotype = SERIAL_IO_MEM, 1399 .iotype = UPIO_MEM,
1392 .irq = 58, 1400 .irq = 58,
1393 .ops = &sci_uart_ops, 1401 .ops = &sci_uart_ops,
1394 .flags = ASYNC_BOOT_AUTOCONF, 1402 .flags = UPF_BOOT_AUTOCONF,
1395 .line = 1, 1403 .line = 1,
1396 }, 1404 },
1397 .type = PORT_SCI, 1405 .type = PORT_SCI,
@@ -1402,10 +1410,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1402 .port = { 1410 .port = {
1403 .membase = (void *)0x00ffffc0, 1411 .membase = (void *)0x00ffffc0,
1404 .mapbase = 0x00ffffc0, 1412 .mapbase = 0x00ffffc0,
1405 .iotype = SERIAL_IO_MEM, 1413 .iotype = UPIO_MEM,
1406 .irq = 62, 1414 .irq = 62,
1407 .ops = &sci_uart_ops, 1415 .ops = &sci_uart_ops,
1408 .flags = ASYNC_BOOT_AUTOCONF, 1416 .flags = UPF_BOOT_AUTOCONF,
1409 .line = 2, 1417 .line = 2,
1410 }, 1418 },
1411 .type = PORT_SCI, 1419 .type = PORT_SCI,
@@ -1417,10 +1425,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1417 .port = { 1425 .port = {
1418 .membase = (void *)0x00ffff78, 1426 .membase = (void *)0x00ffff78,
1419 .mapbase = 0x00ffff78, 1427 .mapbase = 0x00ffff78,
1420 .iotype = SERIAL_IO_MEM, 1428 .iotype = UPIO_MEM,
1421 .irq = 90, 1429 .irq = 90,
1422 .ops = &sci_uart_ops, 1430 .ops = &sci_uart_ops,
1423 .flags = ASYNC_BOOT_AUTOCONF, 1431 .flags = UPF_BOOT_AUTOCONF,
1424 .line = 0, 1432 .line = 0,
1425 }, 1433 },
1426 .type = PORT_SCI, 1434 .type = PORT_SCI,
@@ -1431,10 +1439,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1431 .port = { 1439 .port = {
1432 .membase = (void *)0x00ffff80, 1440 .membase = (void *)0x00ffff80,
1433 .mapbase = 0x00ffff80, 1441 .mapbase = 0x00ffff80,
1434 .iotype = SERIAL_IO_MEM, 1442 .iotype = UPIO_MEM,
1435 .irq = 94, 1443 .irq = 94,
1436 .ops = &sci_uart_ops, 1444 .ops = &sci_uart_ops,
1437 .flags = ASYNC_BOOT_AUTOCONF, 1445 .flags = UPF_BOOT_AUTOCONF,
1438 .line = 1, 1446 .line = 1,
1439 }, 1447 },
1440 .type = PORT_SCI, 1448 .type = PORT_SCI,
@@ -1445,16 +1453,88 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
1445 .port = { 1453 .port = {
1446 .membase = (void *)0x00ffff88, 1454 .membase = (void *)0x00ffff88,
1447 .mapbase = 0x00ffff88, 1455 .mapbase = 0x00ffff88,
1448 .iotype = SERIAL_IO_MEM, 1456 .iotype = UPIO_MEM,
1449 .irq = 98, 1457 .irq = 98,
1450 .ops = &sci_uart_ops, 1458 .ops = &sci_uart_ops,
1451 .flags = ASYNC_BOOT_AUTOCONF, 1459 .flags = UPF_BOOT_AUTOCONF,
1452 .line = 2, 1460 .line = 2,
1453 }, 1461 },
1454 .type = PORT_SCI, 1462 .type = PORT_SCI,
1455 .irqs = H8S_SCI_IRQS2, 1463 .irqs = H8S_SCI_IRQS2,
1456 .init_pins = sci_init_pins_sci, 1464 .init_pins = sci_init_pins_sci,
1457 }, 1465 },
1466#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
1467 {
1468 .port = {
1469 .membase = (void *)0xff923000,
1470 .mapbase = 0xff923000,
1471 .iotype = UPIO_MEM,
1472 .irq = 61,
1473 .ops = &sci_uart_ops,
1474 .flags = UPF_BOOT_AUTOCONF,
1475 .line = 0,
1476 },
1477 .type = PORT_SCIF,
1478 .irqs = SH7770_SCIF0_IRQS,
1479 .init_pins = sci_init_pins_scif,
1480 },
1481 {
1482 .port = {
1483 .membase = (void *)0xff924000,
1484 .mapbase = 0xff924000,
1485 .iotype = UPIO_MEM,
1486 .irq = 62,
1487 .ops = &sci_uart_ops,
1488 .flags = UPF_BOOT_AUTOCONF,
1489 .line = 1,
1490 },
1491 .type = PORT_SCIF,
1492 .irqs = SH7770_SCIF1_IRQS,
1493 .init_pins = sci_init_pins_scif,
1494 },
1495 {
1496 .port = {
1497 .membase = (void *)0xff925000,
1498 .mapbase = 0xff925000,
1499 .iotype = UPIO_MEM,
1500 .irq = 63,
1501 .ops = &sci_uart_ops,
1502 .flags = UPF_BOOT_AUTOCONF,
1503 .line = 2,
1504 },
1505 .type = PORT_SCIF,
1506 .irqs = SH7770_SCIF2_IRQS,
1507 .init_pins = sci_init_pins_scif,
1508 },
1509#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
1510 {
1511 .port = {
1512 .membase = (void *)0xffe00000,
1513 .mapbase = 0xffe00000,
1514 .iotype = UPIO_MEM,
1515 .irq = 43,
1516 .ops = &sci_uart_ops,
1517 .flags = UPF_BOOT_AUTOCONF,
1518 .line = 0,
1519 },
1520 .type = PORT_SCIF,
1521 .irqs = SH7780_SCIF0_IRQS,
1522 .init_pins = sci_init_pins_scif,
1523 },
1524 {
1525 .port = {
1526 .membase = (void *)0xffe10000,
1527 .mapbase = 0xffe10000,
1528 .iotype = UPIO_MEM,
1529 .irq = 79,
1530 .ops = &sci_uart_ops,
1531 .flags = UPF_BOOT_AUTOCONF,
1532 .line = 1,
1533 },
1534 .type = PORT_SCIF,
1535 .irqs = SH7780_SCIF1_IRQS,
1536 .init_pins = sci_init_pins_scif,
1537 },
1458#else 1538#else
1459#error "CPU subtype not defined" 1539#error "CPU subtype not defined"
1460#endif 1540#endif
@@ -1480,9 +1560,6 @@ static int __init serial_console_setup(struct console *co, char *options)
1480 int flow = 'n'; 1560 int flow = 'n';
1481 int ret; 1561 int ret;
1482 1562
1483 if (co->index >= SCI_NPORTS)
1484 co->index = 0;
1485
1486 serial_console_port = &sci_ports[co->index]; 1563 serial_console_port = &sci_ports[co->index];
1487 port = &serial_console_port->port; 1564 port = &serial_console_port->port;
1488 port->type = serial_console_port->type; 1565 port->type = serial_console_port->type;
@@ -1496,14 +1573,21 @@ static int __init serial_console_setup(struct console *co, char *options)
1496 * We need to set the initial uartclk here, since otherwise it will 1573 * We need to set the initial uartclk here, since otherwise it will
1497 * only ever be setup at sci_init() time. 1574 * only ever be setup at sci_init() time.
1498 */ 1575 */
1499#if !defined(__H8300H__) && !defined(__H8300S__) 1576#if defined(__H8300H__) || defined(__H8300S__)
1500 port->uartclk = current_cpu_data.module_clock * 16;
1501#else
1502 port->uartclk = CONFIG_CPU_CLOCK; 1577 port->uartclk = CONFIG_CPU_CLOCK;
1503#endif 1578
1504#if defined(__H8300S__) 1579#if defined(__H8300S__)
1505 h8300_sci_enable(port, sci_enable); 1580 h8300_sci_enable(port, sci_enable);
1506#endif 1581#endif
1582#elif defined(CONFIG_SUPERH64)
1583 port->uartclk = current_cpu_info.module_clock * 16;
1584#else
1585 {
1586 struct clk *clk = clk_get("module_clk");
1587 port->uartclk = clk_get_rate(clk) * 16;
1588 clk_put(clk);
1589 }
1590#endif
1507 if (options) 1591 if (options)
1508 uart_parse_options(options, &baud, &parity, &bits, &flow); 1592 uart_parse_options(options, &baud, &parity, &bits, &flow);
1509 1593
@@ -1566,7 +1650,7 @@ int __init kgdb_console_setup(struct console *co, char *options)
1566 int parity = 'n'; 1650 int parity = 'n';
1567 int flow = 'n'; 1651 int flow = 'n';
1568 1652
1569 if (co->index >= SCI_NPORTS || co->index != kgdb_portnum) 1653 if (co->index != kgdb_portnum)
1570 co->index = kgdb_portnum; 1654 co->index = kgdb_portnum;
1571 1655
1572 if (options) 1656 if (options)
@@ -1606,7 +1690,7 @@ console_initcall(kgdb_console_init);
1606#elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE) 1690#elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1607#define SCI_CONSOLE &serial_console 1691#define SCI_CONSOLE &serial_console
1608#else 1692#else
1609#define SCI_CONSOLE 0 1693#define SCI_CONSOLE 0
1610#endif 1694#endif
1611 1695
1612static char banner[] __initdata = 1696static char banner[] __initdata =
@@ -1621,7 +1705,6 @@ static struct uart_driver sci_uart_driver = {
1621 .dev_name = "ttySC", 1705 .dev_name = "ttySC",
1622 .major = SCI_MAJOR, 1706 .major = SCI_MAJOR,
1623 .minor = SCI_MINOR_START, 1707 .minor = SCI_MINOR_START,
1624 .nr = SCI_NPORTS,
1625 .cons = SCI_CONSOLE, 1708 .cons = SCI_CONSOLE,
1626}; 1709};
1627 1710
@@ -1631,15 +1714,21 @@ static int __init sci_init(void)
1631 1714
1632 printk("%s", banner); 1715 printk("%s", banner);
1633 1716
1717 sci_uart_driver.nr = ARRAY_SIZE(sci_ports);
1718
1634 ret = uart_register_driver(&sci_uart_driver); 1719 ret = uart_register_driver(&sci_uart_driver);
1635 if (ret == 0) { 1720 if (ret == 0) {
1636 for (chan = 0; chan < SCI_NPORTS; chan++) { 1721 for (chan = 0; chan < SCI_NPORTS; chan++) {
1637 struct sci_port *sciport = &sci_ports[chan]; 1722 struct sci_port *sciport = &sci_ports[chan];
1638 1723
1639#if !defined(__H8300H__) && !defined(__H8300S__) 1724#if defined(__H8300H__) || defined(__H8300S__)
1640 sciport->port.uartclk = (current_cpu_data.module_clock * 16);
1641#else
1642 sciport->port.uartclk = CONFIG_CPU_CLOCK; 1725 sciport->port.uartclk = CONFIG_CPU_CLOCK;
1726#elif defined(CONFIG_SUPERH64)
1727 sciport->port.uartclk = current_cpu_info.module_clock * 16;
1728#else
1729 struct clk *clk = clk_get("module_clk");
1730 sciport->port.uartclk = clk_get_rate(clk) * 16;
1731 clk_put(clk);
1643#endif 1732#endif
1644 uart_add_one_port(&sci_uart_driver, &sciport->port); 1733 uart_add_one_port(&sci_uart_driver, &sciport->port);
1645 sciport->break_timer.data = (unsigned long)sciport; 1734 sciport->break_timer.data = (unsigned long)sciport;
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 2892169eff05..1f14bb4382f6 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -46,14 +46,17 @@
46#define H8S_SCI_IRQS1 {92, 93, 94, 0 } 46#define H8S_SCI_IRQS1 {92, 93, 94, 0 }
47#define H8S_SCI_IRQS2 {96, 97, 98, 0 } 47#define H8S_SCI_IRQS2 {96, 97, 98, 0 }
48#define SH5_SCIF_IRQS {39, 40, 42, 0 } 48#define SH5_SCIF_IRQS {39, 40, 42, 0 }
49#define SH7770_SCIF0_IRQS {61, 61, 61, 61 }
50#define SH7770_SCIF1_IRQS {62, 62, 62, 62 }
51#define SH7770_SCIF2_IRQS {63, 63, 63, 63 }
52#define SH7780_SCIF0_IRQS {40, 41, 43, 42 }
53#define SH7780_SCIF1_IRQS {76, 77, 79, 78 }
49 54
50#if defined(CONFIG_CPU_SUBTYPE_SH7708) 55#if defined(CONFIG_CPU_SUBTYPE_SH7708)
51# define SCI_NPORTS 1
52# define SCSPTR 0xffffff7c /* 8 bit */ 56# define SCSPTR 0xffffff7c /* 8 bit */
53# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ 57# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
54# define SCI_ONLY 58# define SCI_ONLY
55#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) 59#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
56# define SCI_NPORTS 3
57# define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */ 60# define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */
58# define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */ 61# define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */
59# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ 62# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
@@ -61,9 +64,8 @@
61#elif defined(CONFIG_CPU_SUBTYPE_SH7705) 64#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
62# define SCIF0 0xA4400000 65# define SCIF0 0xA4400000
63# define SCIF2 0xA4410000 66# define SCIF2 0xA4410000
64# define SCSMR_Ir 0xA44A0000 67# define SCSMR_Ir 0xA44A0000
65# define IRDA_SCIF SCIF0 68# define IRDA_SCIF SCIF0
66# define SCI_NPORTS 2
67# define SCPCR 0xA4000116 69# define SCPCR 0xA4000116
68# define SCPDR 0xA4000136 70# define SCPDR 0xA4000136
69 71
@@ -74,14 +76,11 @@
74# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 76# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
75# define SCIF_ONLY 77# define SCIF_ONLY
76#elif defined(CONFIG_SH_RTS7751R2D) 78#elif defined(CONFIG_SH_RTS7751R2D)
77# define SCI_NPORTS 1
78# define SCSPTR1 0xffe0001c /* 8 bit SCI */
79# define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ 79# define SCSPTR2 0xFFE80020 /* 16 bit SCIF */
80# define SCIF_ORER 0x0001 /* overrun error bit */ 80# define SCIF_ORER 0x0001 /* overrun error bit */
81# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 81# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
82# define SCIF_ONLY 82# define SCIF_ONLY
83#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) 83#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751)
84# define SCI_NPORTS 2
85# define SCSPTR1 0xffe0001c /* 8 bit SCI */ 84# define SCSPTR1 0xffe0001c /* 8 bit SCI */
86# define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ 85# define SCSPTR2 0xFFE80020 /* 16 bit SCIF */
87# define SCIF_ORER 0x0001 /* overrun error bit */ 86# define SCIF_ORER 0x0001 /* overrun error bit */
@@ -90,34 +89,29 @@
90 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ ) 89 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ )
91# define SCI_AND_SCIF 90# define SCI_AND_SCIF
92#elif defined(CONFIG_CPU_SUBTYPE_SH7760) 91#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
93# define SCI_NPORTS 3 92# define SCSPTR0 0xfe600024 /* 16 bit SCIF */
94# define SCSPTR0 0xfe600000 /* 16 bit SCIF */ 93# define SCSPTR1 0xfe610024 /* 16 bit SCIF */
95# define SCSPTR1 0xfe610000 /* 16 bit SCIF */ 94# define SCSPTR2 0xfe620024 /* 16 bit SCIF */
96# define SCSPTR2 0xfe620000 /* 16 bit SCIF */
97# define SCIF_ORER 0x0001 /* overrun error bit */ 95# define SCIF_ORER 0x0001 /* overrun error bit */
98# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 96# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
99# define SCIF_ONLY 97# define SCIF_ONLY
100#elif defined(CONFIG_CPU_SUBTYPE_SH7300) 98#elif defined(CONFIG_CPU_SUBTYPE_SH7300)
101# define SCI_NPORTS 1
102# define SCPCR 0xA4050116 /* 16 bit SCIF */ 99# define SCPCR 0xA4050116 /* 16 bit SCIF */
103# define SCPDR 0xA4050136 /* 16 bit SCIF */ 100# define SCPDR 0xA4050136 /* 16 bit SCIF */
104# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ 101# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
105# define SCIF_ONLY 102# define SCIF_ONLY
106#elif defined(CONFIG_CPU_SUBTYPE_SH73180) 103#elif defined(CONFIG_CPU_SUBTYPE_SH73180)
107# define SCI_NPORTS 1
108# define SCPDR 0xA4050138 /* 16 bit SCIF */ 104# define SCPDR 0xA4050138 /* 16 bit SCIF */
109# define SCSPTR2 SCPDR 105# define SCSPTR2 SCPDR
110# define SCIF_ORER 0x0001 /* overrun error bit */ 106# define SCIF_ORER 0x0001 /* overrun error bit */
111# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1 */ 107# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1 */
112# define SCIF_ONLY 108# define SCIF_ONLY
113#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) 109#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
114# define SCI_NPORTS 1
115# define SCSPTR2 0xffe80020 /* 16 bit SCIF */ 110# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
116# define SCIF_ORER 0x0001 /* overrun error bit */ 111# define SCIF_ORER 0x0001 /* overrun error bit */
117# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 112# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
118# define SCIF_ONLY 113# define SCIF_ONLY
119#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) 114#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
120# define SCI_NPORTS 2
121# define SCSPTR1 0xffe00020 /* 16 bit SCIF */ 115# define SCSPTR1 0xffe00020 /* 16 bit SCIF */
122# define SCSPTR2 0xffe80020 /* 16 bit SCIF */ 116# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
123# define SCIF_ORER 0x0001 /* overrun error bit */ 117# define SCIF_ORER 0x0001 /* overrun error bit */
@@ -129,26 +123,32 @@
129# define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR 123# define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR
130# define SCIF_PTR2_OFFS 0x0000020 124# define SCIF_PTR2_OFFS 0x0000020
131# define SCIF_LSR2_OFFS 0x0000024 125# define SCIF_LSR2_OFFS 0x0000024
132# define SCI_NPORTS 1
133# define SCI_INIT { \
134 { {}, PORT_SCIF, 0, \
135 SH5_SCIF_IRQS, sci_init_pins_scif } \
136}
137# define SCSPTR2 ((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */ 126# define SCSPTR2 ((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */
138# define SCLSR2 ((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */ 127# define SCLSR2 ((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */
139# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0, 128# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,
140 TE=1,RE=1,REIE=1 */ 129 TE=1,RE=1,REIE=1 */
141# define SCIF_ONLY 130# define SCIF_ONLY
142#elif defined(CONFIG_H83007) || defined(CONFIG_H83068) 131#elif defined(CONFIG_H83007) || defined(CONFIG_H83068)
143# define SCI_NPORTS 3
144# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ 132# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
145# define SCI_ONLY 133# define SCI_ONLY
146# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) 134# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port)
147#elif defined(CONFIG_H8S2678) 135#elif defined(CONFIG_H8S2678)
148# define SCI_NPORTS 3
149# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ 136# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
150# define SCI_ONLY 137# define SCI_ONLY
151# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) 138# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port)
139#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
140# define SCSPTR0 0xff923020 /* 16 bit SCIF */
141# define SCSPTR1 0xff924020 /* 16 bit SCIF */
142# define SCSPTR2 0xff925020 /* 16 bit SCIF */
143# define SCIF_ORER 0x0001 /* overrun error bit */
144# define SCSCR_INIT(port) 0x3c /* TIE=0,RIE=0,TE=1,RE=1,REIE=1,cke=2 */
145# define SCIF_ONLY
146#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
147# define SCSPTR0 0xffe00024 /* 16 bit SCIF */
148# define SCSPTR1 0xffe10024 /* 16 bit SCIF */
149# define SCIF_OPER 0x0001 /* Overrun error bit */
150# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
151# define SCIF_ONLY
152#else 152#else
153# error CPU subtype not defined 153# error CPU subtype not defined
154#endif 154#endif
@@ -158,7 +158,7 @@
158#define SCI_CTRL_FLAGS_RIE 0x40 /* all */ 158#define SCI_CTRL_FLAGS_RIE 0x40 /* all */
159#define SCI_CTRL_FLAGS_TE 0x20 /* all */ 159#define SCI_CTRL_FLAGS_TE 0x20 /* all */
160#define SCI_CTRL_FLAGS_RE 0x10 /* all */ 160#define SCI_CTRL_FLAGS_RE 0x10 /* all */
161#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) 161#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7780)
162#define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */ 162#define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */
163#else 163#else
164#define SCI_CTRL_FLAGS_REIE 0 164#define SCI_CTRL_FLAGS_REIE 0
@@ -213,7 +213,7 @@
213# define SCxSR_RDxF_CLEAR(port) 0xbc 213# define SCxSR_RDxF_CLEAR(port) 0xbc
214# define SCxSR_ERROR_CLEAR(port) 0xc4 214# define SCxSR_ERROR_CLEAR(port) 0xc4
215# define SCxSR_TDxE_CLEAR(port) 0x78 215# define SCxSR_TDxE_CLEAR(port) 0x78
216# define SCxSR_BREAK_CLEAR(port) 0xc4 216# define SCxSR_BREAK_CLEAR(port) 0xc4
217#elif defined(SCIF_ONLY) 217#elif defined(SCIF_ONLY)
218# define SCxSR_TEND(port) SCIF_TEND 218# define SCxSR_TEND(port) SCIF_TEND
219# define SCxSR_ERRORS(port) SCIF_ERRORS 219# define SCxSR_ERRORS(port) SCIF_ERRORS
@@ -237,7 +237,7 @@
237# define SCxSR_RDxF_CLEAR(port) 0x00fc 237# define SCxSR_RDxF_CLEAR(port) 0x00fc
238# define SCxSR_ERROR_CLEAR(port) 0x0073 238# define SCxSR_ERROR_CLEAR(port) 0x0073
239# define SCxSR_TDxE_CLEAR(port) 0x00df 239# define SCxSR_TDxE_CLEAR(port) 0x00df
240# define SCxSR_BREAK_CLEAR(port) 0x00e3 240# define SCxSR_BREAK_CLEAR(port) 0x00e3
241#endif 241#endif
242#else 242#else
243# define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) 243# define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND)
@@ -285,14 +285,14 @@ struct sci_port {
285 285
286#define SCI_IN(size, offset) \ 286#define SCI_IN(size, offset) \
287 unsigned int addr = port->mapbase + (offset); \ 287 unsigned int addr = port->mapbase + (offset); \
288 if ((size) == 8) { \ 288 if ((size) == 8) { \
289 return ctrl_inb(addr); \ 289 return ctrl_inb(addr); \
290 } else { \ 290 } else { \
291 return ctrl_inw(addr); \ 291 return ctrl_inw(addr); \
292 } 292 }
293#define SCI_OUT(size, offset, value) \ 293#define SCI_OUT(size, offset, value) \
294 unsigned int addr = port->mapbase + (offset); \ 294 unsigned int addr = port->mapbase + (offset); \
295 if ((size) == 8) { \ 295 if ((size) == 8) { \
296 ctrl_outb(value, addr); \ 296 ctrl_outb(value, addr); \
297 } else { \ 297 } else { \
298 ctrl_outw(value, addr); \ 298 ctrl_outw(value, addr); \
@@ -301,10 +301,10 @@ struct sci_port {
301#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\ 301#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\
302 static inline unsigned int sci_##name##_in(struct uart_port *port) \ 302 static inline unsigned int sci_##name##_in(struct uart_port *port) \
303 { \ 303 { \
304 if (port->type == PORT_SCI) { \ 304 if (port->type == PORT_SCI) { \
305 SCI_IN(sci_size, sci_offset) \ 305 SCI_IN(sci_size, sci_offset) \
306 } else { \ 306 } else { \
307 SCI_IN(scif_size, scif_offset); \ 307 SCI_IN(scif_size, scif_offset); \
308 } \ 308 } \
309 } \ 309 } \
310 static inline void sci_##name##_out(struct uart_port *port, unsigned int value) \ 310 static inline void sci_##name##_out(struct uart_port *port, unsigned int value) \
@@ -319,7 +319,7 @@ struct sci_port {
319#define CPU_SCIF_FNS(name, scif_offset, scif_size) \ 319#define CPU_SCIF_FNS(name, scif_offset, scif_size) \
320 static inline unsigned int sci_##name##_in(struct uart_port *port) \ 320 static inline unsigned int sci_##name##_in(struct uart_port *port) \
321 { \ 321 { \
322 SCI_IN(scif_size, scif_offset); \ 322 SCI_IN(scif_size, scif_offset); \
323 } \ 323 } \
324 static inline void sci_##name##_out(struct uart_port *port, unsigned int value) \ 324 static inline void sci_##name##_out(struct uart_port *port, unsigned int value) \
325 { \ 325 { \
@@ -329,7 +329,7 @@ struct sci_port {
329#define CPU_SCI_FNS(name, sci_offset, sci_size) \ 329#define CPU_SCI_FNS(name, sci_offset, sci_size) \
330 static inline unsigned int sci_##name##_in(struct uart_port* port) \ 330 static inline unsigned int sci_##name##_in(struct uart_port* port) \
331 { \ 331 { \
332 SCI_IN(sci_size, sci_offset); \ 332 SCI_IN(sci_size, sci_offset); \
333 } \ 333 } \
334 static inline void sci_##name##_out(struct uart_port* port, unsigned int value) \ 334 static inline void sci_##name##_out(struct uart_port* port, unsigned int value) \
335 { \ 335 { \
@@ -385,10 +385,17 @@ SCIx_FNS(SCxTDR, 0x06, 8, 0x0c, 8, 0x06, 8, 0x0C, 8, 0x03, 8)
385SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8) 385SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8)
386SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) 386SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8)
387SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) 387SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
388#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
389SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16)
390SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16)
391SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)
392SCIF_FNS(SCLSR, 0, 0, 0x28, 16)
393#else
388SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) 394SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
389SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) 395SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
390SCIF_FNS(SCLSR, 0, 0, 0x24, 16) 396SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
391#endif 397#endif
398#endif
392#define sci_in(port, reg) sci_##reg##_in(port) 399#define sci_in(port, reg) sci_##reg##_in(port)
393#define sci_out(port, reg, value) sci_##reg##_out(port, value) 400#define sci_out(port, reg, value) sci_##reg##_out(port, value)
394 401
@@ -518,6 +525,24 @@ static inline int sci_rxd_in(struct uart_port *port)
518 int ch = (port->mapbase - SMR0) >> 3; 525 int ch = (port->mapbase - SMR0) >> 3;
519 return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0; 526 return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0;
520} 527}
528#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
529static inline int sci_rxd_in(struct uart_port *port)
530{
531 if (port->mapbase == 0xff923000)
532 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
533 if (port->mapbase == 0xff924000)
534 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
535 if (port->mapbase == 0xff925000)
536 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
537}
538#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
539static inline int sci_rxd_in(struct uart_port *port)
540{
541 if (port->mapbase == 0xffe00000)
542 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
543 if (port->mapbase == 0xffe10000)
544 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
545}
521#endif 546#endif
522 547
523/* 548/*
@@ -552,22 +577,15 @@ static inline int sci_rxd_in(struct uart_port *port)
552 * -- Mitch Davis - 15 Jul 2000 577 * -- Mitch Davis - 15 Jul 2000
553 */ 578 */
554 579
555#define PCLK (current_cpu_data.module_clock) 580#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7780)
556 581#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
557#if defined(CONFIG_CPU_SUBTYPE_SH7300)
558#define SCBRR_VALUE(bps) ((PCLK+16*bps)/(16*bps)-1)
559#elif defined(CONFIG_CPU_SUBTYPE_SH7705) 582#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
560#define SCBRR_VALUE(bps) (((PCLK*2)+16*bps)/(32*bps)-1) 583#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
561#elif !defined(__H8300H__) && !defined(__H8300S__) 584#elif defined(__H8300H__) || defined(__H8300S__)
562#define SCBRR_VALUE(bps) ((PCLK+16*bps)/(32*bps)-1)
563#else
564#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1) 585#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1)
586#elif defined(CONFIG_SUPERH64)
587#define SCBRR_VALUE(bps) ((current_cpu_data.module_clock+16*bps)/(32*bps)-1)
588#else /* Generic SH */
589#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
565#endif 590#endif
566#define BPS_2400 SCBRR_VALUE(2400)
567#define BPS_4800 SCBRR_VALUE(4800)
568#define BPS_9600 SCBRR_VALUE(9600)
569#define BPS_19200 SCBRR_VALUE(19200)
570#define BPS_38400 SCBRR_VALUE(38400)
571#define BPS_57600 SCBRR_VALUE(57600)
572#define BPS_115200 SCBRR_VALUE(115200)
573 591
diff --git a/drivers/serial/sn_console.c b/drivers/serial/sn_console.c
index 43e67d6c29d4..60ea4a3f0713 100644
--- a/drivers/serial/sn_console.c
+++ b/drivers/serial/sn_console.c
@@ -820,7 +820,7 @@ static int __init sn_sal_module_init(void)
820 int retval; 820 int retval;
821 821
822 if (!ia64_platform_is("sn2")) 822 if (!ia64_platform_is("sn2"))
823 return -ENODEV; 823 return 0;
824 824
825 printk(KERN_INFO "sn_console: Console driver init\n"); 825 printk(KERN_INFO "sn_console: Console driver init\n");
826 826
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c
index 8bcaebcc0ad7..85664228a0b6 100644
--- a/drivers/serial/sunsab.c
+++ b/drivers/serial/sunsab.c
@@ -1036,7 +1036,7 @@ static void __init sab_attach_callback(struct linux_ebus_device *edev, void *arg
1036 up->port.irq = edev->irqs[0]; 1036 up->port.irq = edev->irqs[0];
1037 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE; 1037 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
1038 up->port.mapbase = (unsigned long)up->regs; 1038 up->port.mapbase = (unsigned long)up->regs;
1039 up->port.iotype = SERIAL_IO_MEM; 1039 up->port.iotype = UPIO_MEM;
1040 1040
1041 writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc); 1041 writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);
1042 1042
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index 9a3665b34d97..4e453fa966ae 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -109,11 +109,11 @@ static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
109 offset <<= up->port.regshift; 109 offset <<= up->port.regshift;
110 110
111 switch (up->port.iotype) { 111 switch (up->port.iotype) {
112 case SERIAL_IO_HUB6: 112 case UPIO_HUB6:
113 outb(up->port.hub6 - 1 + offset, up->port.iobase); 113 outb(up->port.hub6 - 1 + offset, up->port.iobase);
114 return inb(up->port.iobase + 1); 114 return inb(up->port.iobase + 1);
115 115
116 case SERIAL_IO_MEM: 116 case UPIO_MEM:
117 return readb(up->port.membase + offset); 117 return readb(up->port.membase + offset);
118 118
119 default: 119 default:
@@ -139,12 +139,12 @@ serial_out(struct uart_sunsu_port *up, int offset, int value)
139 offset <<= up->port.regshift; 139 offset <<= up->port.regshift;
140 140
141 switch (up->port.iotype) { 141 switch (up->port.iotype) {
142 case SERIAL_IO_HUB6: 142 case UPIO_HUB6:
143 outb(up->port.hub6 - 1 + offset, up->port.iobase); 143 outb(up->port.hub6 - 1 + offset, up->port.iobase);
144 outb(value, up->port.iobase + 1); 144 outb(value, up->port.iobase + 1);
145 break; 145 break;
146 146
147 case SERIAL_IO_MEM: 147 case UPIO_MEM:
148 writeb(value, up->port.membase + offset); 148 writeb(value, up->port.membase + offset);
149 break; 149 break;
150 150
@@ -299,13 +299,10 @@ static void sunsu_start_tx(struct uart_port *port)
299static void sunsu_stop_rx(struct uart_port *port) 299static void sunsu_stop_rx(struct uart_port *port)
300{ 300{
301 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; 301 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
302 unsigned long flags;
303 302
304 spin_lock_irqsave(&up->port.lock, flags);
305 up->ier &= ~UART_IER_RLSI; 303 up->ier &= ~UART_IER_RLSI;
306 up->port.read_status_mask &= ~UART_LSR_DR; 304 up->port.read_status_mask &= ~UART_LSR_DR;
307 serial_out(up, UART_IER, up->ier); 305 serial_out(up, UART_IER, up->ier);
308 spin_unlock_irqrestore(&up->port.lock, flags);
309} 306}
310 307
311static void sunsu_enable_ms(struct uart_port *port) 308static void sunsu_enable_ms(struct uart_port *port)
@@ -669,7 +666,7 @@ static int sunsu_startup(struct uart_port *port)
669 * if it is, then bail out, because there's likely no UART 666 * if it is, then bail out, because there's likely no UART
670 * here. 667 * here.
671 */ 668 */
672 if (!(up->port.flags & ASYNC_BUGGY_UART) && 669 if (!(up->port.flags & UPF_BUGGY_UART) &&
673 (serial_inp(up, UART_LSR) == 0xff)) { 670 (serial_inp(up, UART_LSR) == 0xff)) {
674 printk("ttyS%d: LSR safety check engaged!\n", up->port.line); 671 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
675 return -ENODEV; 672 return -ENODEV;
@@ -707,7 +704,7 @@ static int sunsu_startup(struct uart_port *port)
707 up->ier = UART_IER_RLSI | UART_IER_RDI; 704 up->ier = UART_IER_RLSI | UART_IER_RDI;
708 serial_outp(up, UART_IER, up->ier); 705 serial_outp(up, UART_IER, up->ier);
709 706
710 if (up->port.flags & ASYNC_FOURPORT) { 707 if (up->port.flags & UPF_FOURPORT) {
711 unsigned int icp; 708 unsigned int icp;
712 /* 709 /*
713 * Enable interrupts on the AST Fourport board 710 * Enable interrupts on the AST Fourport board
@@ -740,7 +737,7 @@ static void sunsu_shutdown(struct uart_port *port)
740 serial_outp(up, UART_IER, 0); 737 serial_outp(up, UART_IER, 0);
741 738
742 spin_lock_irqsave(&up->port.lock, flags); 739 spin_lock_irqsave(&up->port.lock, flags);
743 if (up->port.flags & ASYNC_FOURPORT) { 740 if (up->port.flags & UPF_FOURPORT) {
744 /* reset interrupts on the AST Fourport board */ 741 /* reset interrupts on the AST Fourport board */
745 inb((up->port.iobase & 0xfe0) | 0x1f); 742 inb((up->port.iobase & 0xfe0) | 0x1f);
746 up->port.mctrl |= TIOCM_OUT1; 743 up->port.mctrl |= TIOCM_OUT1;
@@ -1052,7 +1049,7 @@ static void sunsu_autoconfig(struct uart_sunsu_port *up)
1052 return; 1049 return;
1053 1050
1054 up->type_probed = PORT_UNKNOWN; 1051 up->type_probed = PORT_UNKNOWN;
1055 up->port.iotype = SERIAL_IO_MEM; 1052 up->port.iotype = UPIO_MEM;
1056 1053
1057 /* 1054 /*
1058 * First we look for Ebus-bases su's 1055 * First we look for Ebus-bases su's
@@ -1132,7 +1129,7 @@ ebus_done:
1132 1129
1133 spin_lock_irqsave(&up->port.lock, flags); 1130 spin_lock_irqsave(&up->port.lock, flags);
1134 1131
1135 if (!(up->port.flags & ASYNC_BUGGY_UART)) { 1132 if (!(up->port.flags & UPF_BUGGY_UART)) {
1136 /* 1133 /*
1137 * Do a simple existence test first; if we fail this, there's 1134 * Do a simple existence test first; if we fail this, there's
1138 * no point trying anything else. 1135 * no point trying anything else.
@@ -1170,7 +1167,7 @@ ebus_done:
1170 * manufacturer would be stupid enough to design a board 1167 * manufacturer would be stupid enough to design a board
1171 * that conflicts with COM 1-4 --- we hope! 1168 * that conflicts with COM 1-4 --- we hope!
1172 */ 1169 */
1173 if (!(up->port.flags & ASYNC_SKIP_TEST)) { 1170 if (!(up->port.flags & UPF_SKIP_TEST)) {
1174 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A); 1171 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1175 status1 = serial_inp(up, UART_MSR) & 0xF0; 1172 status1 = serial_inp(up, UART_MSR) & 0xF0;
1176 serial_outp(up, UART_MCR, save_mcr); 1173 serial_outp(up, UART_MCR, save_mcr);
@@ -1371,7 +1368,7 @@ static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1371 } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 1368 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1372 1369
1373 /* Wait up to 1s for flow control if necessary */ 1370 /* Wait up to 1s for flow control if necessary */
1374 if (up->port.flags & ASYNC_CONS_FLOW) { 1371 if (up->port.flags & UPF_CONS_FLOW) {
1375 tmout = 1000000; 1372 tmout = 1000000;
1376 while (--tmout && 1373 while (--tmout &&
1377 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) 1374 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
@@ -1513,7 +1510,7 @@ static int __init sunsu_serial_init(void)
1513 up->su_type == SU_PORT_KBD) 1510 up->su_type == SU_PORT_KBD)
1514 continue; 1511 continue;
1515 1512
1516 up->port.flags |= ASYNC_BOOT_AUTOCONF; 1513 up->port.flags |= UPF_BOOT_AUTOCONF;
1517 up->port.type = PORT_UNKNOWN; 1514 up->port.type = PORT_UNKNOWN;
1518 up->port.uartclk = (SU_BASE_BAUD * 16); 1515 up->port.uartclk = (SU_BASE_BAUD * 16);
1519 1516
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c
index 3c72484adea7..5cc4d4c2935c 100644
--- a/drivers/serial/sunzilog.c
+++ b/drivers/serial/sunzilog.c
@@ -1487,7 +1487,7 @@ static void __init sunzilog_prepare(void)
1487 up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB; 1487 up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB;
1488 1488
1489 /* Channel A */ 1489 /* Channel A */
1490 up[(chip * 2) + 0].port.iotype = SERIAL_IO_MEM; 1490 up[(chip * 2) + 0].port.iotype = UPIO_MEM;
1491 up[(chip * 2) + 0].port.irq = zilog_irq; 1491 up[(chip * 2) + 0].port.irq = zilog_irq;
1492 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; 1492 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK;
1493 up[(chip * 2) + 0].port.fifosize = 1; 1493 up[(chip * 2) + 0].port.fifosize = 1;
@@ -1498,7 +1498,7 @@ static void __init sunzilog_prepare(void)
1498 up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A; 1498 up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
1499 1499
1500 /* Channel B */ 1500 /* Channel B */
1501 up[(chip * 2) + 1].port.iotype = SERIAL_IO_MEM; 1501 up[(chip * 2) + 1].port.iotype = UPIO_MEM;
1502 up[(chip * 2) + 1].port.irq = zilog_irq; 1502 up[(chip * 2) + 1].port.irq = zilog_irq;
1503 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; 1503 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK;
1504 up[(chip * 2) + 1].port.fifosize = 1; 1504 up[(chip * 2) + 1].port.fifosize = 1;
diff --git a/drivers/serial/v850e_uart.c b/drivers/serial/v850e_uart.c
index 9378895a8d56..df705fda4243 100644
--- a/drivers/serial/v850e_uart.c
+++ b/drivers/serial/v850e_uart.c
@@ -496,7 +496,7 @@ static int __init v850e_uart_init (void)
496 496
497 port->ops = &v850e_uart_ops; 497 port->ops = &v850e_uart_ops;
498 port->line = chan; 498 port->line = chan;
499 port->iotype = SERIAL_IO_MEM; 499 port->iotype = UPIO_MEM;
500 port->flags = UPF_BOOT_AUTOCONF; 500 port->flags = UPF_BOOT_AUTOCONF;
501 501
502 /* We actually use multiple IRQs, but the serial 502 /* We actually use multiple IRQs, but the serial
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-25 15:13:23 -0500