diff options
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/8250_pnp.c | 2 | ||||
-rw-r--r-- | drivers/serial/Kconfig | 23 | ||||
-rw-r--r-- | drivers/serial/Makefile | 1 | ||||
-rw-r--r-- | drivers/serial/atmel_serial.c | 207 | ||||
-rw-r--r-- | drivers/serial/imx.c | 10 | ||||
-rw-r--r-- | drivers/serial/mcf.c | 6 | ||||
-rw-r--r-- | drivers/serial/mpc52xx_uart.c | 35 | ||||
-rw-r--r-- | drivers/serial/pmac_zilog.c | 4 | ||||
-rw-r--r-- | drivers/serial/serial_cs.c | 9 | ||||
-rw-r--r-- | drivers/serial/serial_ks8695.c | 1 | ||||
-rw-r--r-- | drivers/serial/sh-sci.c | 171 |
11 files changed, 328 insertions, 141 deletions
diff --git a/drivers/serial/8250_pnp.c b/drivers/serial/8250_pnp.c index 24485cc62ff8..4822cb50cd0f 100644 --- a/drivers/serial/8250_pnp.c +++ b/drivers/serial/8250_pnp.c | |||
@@ -348,6 +348,8 @@ static const struct pnp_device_id pnp_dev_table[] = { | |||
348 | { "FUJ02E6", 0 }, | 348 | { "FUJ02E6", 0 }, |
349 | /* Fujitsu Wacom 2FGT Tablet PC device */ | 349 | /* Fujitsu Wacom 2FGT Tablet PC device */ |
350 | { "FUJ02E7", 0 }, | 350 | { "FUJ02E7", 0 }, |
351 | /* Fujitsu Wacom 1FGT Tablet PC device */ | ||
352 | { "FUJ02E9", 0 }, | ||
351 | /* | 353 | /* |
352 | * LG C1 EXPRESS DUAL (C1-PB11A3) touch screen (actually a FUJ02E6 in | 354 | * LG C1 EXPRESS DUAL (C1-PB11A3) touch screen (actually a FUJ02E6 in |
353 | * disguise) | 355 | * disguise) |
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index f55c49475a8c..302836a80693 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -518,12 +518,13 @@ config SERIAL_S3C2412 | |||
518 | Serial port support for the Samsung S3C2412 and S3C2413 SoC | 518 | Serial port support for the Samsung S3C2412 and S3C2413 SoC |
519 | 519 | ||
520 | config SERIAL_S3C2440 | 520 | config SERIAL_S3C2440 |
521 | tristate "Samsung S3C2440/S3C2442 Serial port support" | 521 | tristate "Samsung S3C2440/S3C2442/S3C2416 Serial port support" |
522 | depends on SERIAL_SAMSUNG && (CPU_S3C2440 || CPU_S3C2442) | 522 | depends on SERIAL_SAMSUNG && (CPU_S3C2440 || CPU_S3C2442 || CPU_S3C2416) |
523 | default y if CPU_S3C2440 | 523 | default y if CPU_S3C2440 |
524 | default y if CPU_S3C2442 | 524 | default y if CPU_S3C2442 |
525 | select SERIAL_SAMSUNG_UARTS_4 if CPU_S3C2416 | ||
525 | help | 526 | help |
526 | Serial port support for the Samsung S3C2440 and S3C2442 SoC | 527 | Serial port support for the Samsung S3C2440, S3C2416 and S3C2442 SoC |
527 | 528 | ||
528 | config SERIAL_S3C24A0 | 529 | config SERIAL_S3C24A0 |
529 | tristate "Samsung S3C24A0 Serial port support" | 530 | tristate "Samsung S3C24A0 Serial port support" |
@@ -533,21 +534,13 @@ config SERIAL_S3C24A0 | |||
533 | Serial port support for the Samsung S3C24A0 SoC | 534 | Serial port support for the Samsung S3C24A0 SoC |
534 | 535 | ||
535 | config SERIAL_S3C6400 | 536 | config SERIAL_S3C6400 |
536 | tristate "Samsung S3C6400/S3C6410/S5P6440 Seria port support" | 537 | tristate "Samsung S3C6400/S3C6410/S5P6440/S5PC100 Serial port support" |
537 | depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440) | 538 | depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5PC100) |
538 | select SERIAL_SAMSUNG_UARTS_4 | 539 | select SERIAL_SAMSUNG_UARTS_4 |
539 | default y | 540 | default y |
540 | help | 541 | help |
541 | Serial port support for the Samsung S3C6400, S3C6410 and S5P6440 | 542 | Serial port support for the Samsung S3C6400, S3C6410, S5P6440 |
542 | SoCs | 543 | and S5PC100 SoCs |
543 | |||
544 | config SERIAL_S5PC100 | ||
545 | tristate "Samsung S5PC100 Serial port support" | ||
546 | depends on SERIAL_SAMSUNG && CPU_S5PC100 | ||
547 | select SERIAL_SAMSUNG_UARTS_4 | ||
548 | default y | ||
549 | help | ||
550 | Serial port support for the Samsung S5PC100 SoCs | ||
551 | 544 | ||
552 | config SERIAL_S5PV210 | 545 | config SERIAL_S5PV210 |
553 | tristate "Samsung S5PV210 Serial port support" | 546 | tristate "Samsung S5PV210 Serial port support" |
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 6aa4723b74ee..328f107346c4 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile | |||
@@ -44,7 +44,6 @@ obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o | |||
44 | obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o | 44 | obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o |
45 | obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o | 45 | obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o |
46 | obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o | 46 | obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o |
47 | obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o | ||
48 | obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o | 47 | obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o |
49 | obj-$(CONFIG_SERIAL_MAX3100) += max3100.o | 48 | obj-$(CONFIG_SERIAL_MAX3100) += max3100.o |
50 | obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o | 49 | obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o |
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c index 2c9bf9b68327..eed3c2d8dd1c 100644 --- a/drivers/serial/atmel_serial.c +++ b/drivers/serial/atmel_serial.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <linux/dma-mapping.h> | 38 | #include <linux/dma-mapping.h> |
39 | #include <linux/atmel_pdc.h> | 39 | #include <linux/atmel_pdc.h> |
40 | #include <linux/atmel_serial.h> | 40 | #include <linux/atmel_serial.h> |
41 | #include <linux/uaccess.h> | ||
41 | 42 | ||
42 | #include <asm/io.h> | 43 | #include <asm/io.h> |
43 | 44 | ||
@@ -59,6 +60,9 @@ | |||
59 | 60 | ||
60 | #include <linux/serial_core.h> | 61 | #include <linux/serial_core.h> |
61 | 62 | ||
63 | static void atmel_start_rx(struct uart_port *port); | ||
64 | static void atmel_stop_rx(struct uart_port *port); | ||
65 | |||
62 | #ifdef CONFIG_SERIAL_ATMEL_TTYAT | 66 | #ifdef CONFIG_SERIAL_ATMEL_TTYAT |
63 | 67 | ||
64 | /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we | 68 | /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we |
@@ -93,6 +97,7 @@ | |||
93 | #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) | 97 | #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) |
94 | #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) | 98 | #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) |
95 | #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) | 99 | #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) |
100 | #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR) | ||
96 | 101 | ||
97 | /* PDC registers */ | 102 | /* PDC registers */ |
98 | #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) | 103 | #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) |
@@ -147,6 +152,9 @@ struct atmel_uart_port { | |||
147 | unsigned int irq_status_prev; | 152 | unsigned int irq_status_prev; |
148 | 153 | ||
149 | struct circ_buf rx_ring; | 154 | struct circ_buf rx_ring; |
155 | |||
156 | struct serial_rs485 rs485; /* rs485 settings */ | ||
157 | unsigned int tx_done_mask; | ||
150 | }; | 158 | }; |
151 | 159 | ||
152 | static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; | 160 | static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; |
@@ -187,6 +195,46 @@ static bool atmel_use_dma_tx(struct uart_port *port) | |||
187 | } | 195 | } |
188 | #endif | 196 | #endif |
189 | 197 | ||
198 | /* Enable or disable the rs485 support */ | ||
199 | void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) | ||
200 | { | ||
201 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | ||
202 | unsigned int mode; | ||
203 | |||
204 | spin_lock(&port->lock); | ||
205 | |||
206 | /* Disable interrupts */ | ||
207 | UART_PUT_IDR(port, atmel_port->tx_done_mask); | ||
208 | |||
209 | mode = UART_GET_MR(port); | ||
210 | |||
211 | /* Resetting serial mode to RS232 (0x0) */ | ||
212 | mode &= ~ATMEL_US_USMODE; | ||
213 | |||
214 | atmel_port->rs485 = *rs485conf; | ||
215 | |||
216 | if (rs485conf->flags & SER_RS485_ENABLED) { | ||
217 | dev_dbg(port->dev, "Setting UART to RS485\n"); | ||
218 | atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; | ||
219 | UART_PUT_TTGR(port, rs485conf->delay_rts_before_send); | ||
220 | mode |= ATMEL_US_USMODE_RS485; | ||
221 | } else { | ||
222 | dev_dbg(port->dev, "Setting UART to RS232\n"); | ||
223 | if (atmel_use_dma_tx(port)) | ||
224 | atmel_port->tx_done_mask = ATMEL_US_ENDTX | | ||
225 | ATMEL_US_TXBUFE; | ||
226 | else | ||
227 | atmel_port->tx_done_mask = ATMEL_US_TXRDY; | ||
228 | } | ||
229 | UART_PUT_MR(port, mode); | ||
230 | |||
231 | /* Enable interrupts */ | ||
232 | UART_PUT_IER(port, atmel_port->tx_done_mask); | ||
233 | |||
234 | spin_unlock(&port->lock); | ||
235 | |||
236 | } | ||
237 | |||
190 | /* | 238 | /* |
191 | * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. | 239 | * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. |
192 | */ | 240 | */ |
@@ -202,6 +250,7 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) | |||
202 | { | 250 | { |
203 | unsigned int control = 0; | 251 | unsigned int control = 0; |
204 | unsigned int mode; | 252 | unsigned int mode; |
253 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | ||
205 | 254 | ||
206 | #ifdef CONFIG_ARCH_AT91RM9200 | 255 | #ifdef CONFIG_ARCH_AT91RM9200 |
207 | if (cpu_is_at91rm9200()) { | 256 | if (cpu_is_at91rm9200()) { |
@@ -236,6 +285,17 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) | |||
236 | mode |= ATMEL_US_CHMODE_LOC_LOOP; | 285 | mode |= ATMEL_US_CHMODE_LOC_LOOP; |
237 | else | 286 | else |
238 | mode |= ATMEL_US_CHMODE_NORMAL; | 287 | mode |= ATMEL_US_CHMODE_NORMAL; |
288 | |||
289 | /* Resetting serial mode to RS232 (0x0) */ | ||
290 | mode &= ~ATMEL_US_USMODE; | ||
291 | |||
292 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) { | ||
293 | dev_dbg(port->dev, "Setting UART to RS485\n"); | ||
294 | UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send); | ||
295 | mode |= ATMEL_US_USMODE_RS485; | ||
296 | } else { | ||
297 | dev_dbg(port->dev, "Setting UART to RS232\n"); | ||
298 | } | ||
239 | UART_PUT_MR(port, mode); | 299 | UART_PUT_MR(port, mode); |
240 | } | 300 | } |
241 | 301 | ||
@@ -268,12 +328,17 @@ static u_int atmel_get_mctrl(struct uart_port *port) | |||
268 | */ | 328 | */ |
269 | static void atmel_stop_tx(struct uart_port *port) | 329 | static void atmel_stop_tx(struct uart_port *port) |
270 | { | 330 | { |
331 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | ||
332 | |||
271 | if (atmel_use_dma_tx(port)) { | 333 | if (atmel_use_dma_tx(port)) { |
272 | /* disable PDC transmit */ | 334 | /* disable PDC transmit */ |
273 | UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); | 335 | UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); |
274 | UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); | 336 | } |
275 | } else | 337 | /* Disable interrupts */ |
276 | UART_PUT_IDR(port, ATMEL_US_TXRDY); | 338 | UART_PUT_IDR(port, atmel_port->tx_done_mask); |
339 | |||
340 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) | ||
341 | atmel_start_rx(port); | ||
277 | } | 342 | } |
278 | 343 | ||
279 | /* | 344 | /* |
@@ -281,17 +346,39 @@ static void atmel_stop_tx(struct uart_port *port) | |||
281 | */ | 346 | */ |
282 | static void atmel_start_tx(struct uart_port *port) | 347 | static void atmel_start_tx(struct uart_port *port) |
283 | { | 348 | { |
349 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | ||
350 | |||
284 | if (atmel_use_dma_tx(port)) { | 351 | if (atmel_use_dma_tx(port)) { |
285 | if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN) | 352 | if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN) |
286 | /* The transmitter is already running. Yes, we | 353 | /* The transmitter is already running. Yes, we |
287 | really need this.*/ | 354 | really need this.*/ |
288 | return; | 355 | return; |
289 | 356 | ||
290 | UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); | 357 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) |
358 | atmel_stop_rx(port); | ||
359 | |||
291 | /* re-enable PDC transmit */ | 360 | /* re-enable PDC transmit */ |
292 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); | 361 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); |
293 | } else | 362 | } |
294 | UART_PUT_IER(port, ATMEL_US_TXRDY); | 363 | /* Enable interrupts */ |
364 | UART_PUT_IER(port, atmel_port->tx_done_mask); | ||
365 | } | ||
366 | |||
367 | /* | ||
368 | * start receiving - port is in process of being opened. | ||
369 | */ | ||
370 | static void atmel_start_rx(struct uart_port *port) | ||
371 | { | ||
372 | UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */ | ||
373 | |||
374 | if (atmel_use_dma_rx(port)) { | ||
375 | /* enable PDC controller */ | ||
376 | UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | | ||
377 | port->read_status_mask); | ||
378 | UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); | ||
379 | } else { | ||
380 | UART_PUT_IER(port, ATMEL_US_RXRDY); | ||
381 | } | ||
295 | } | 382 | } |
296 | 383 | ||
297 | /* | 384 | /* |
@@ -302,9 +389,11 @@ static void atmel_stop_rx(struct uart_port *port) | |||
302 | if (atmel_use_dma_rx(port)) { | 389 | if (atmel_use_dma_rx(port)) { |
303 | /* disable PDC receive */ | 390 | /* disable PDC receive */ |
304 | UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); | 391 | UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); |
305 | UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); | 392 | UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | |
306 | } else | 393 | port->read_status_mask); |
394 | } else { | ||
307 | UART_PUT_IDR(port, ATMEL_US_RXRDY); | 395 | UART_PUT_IDR(port, ATMEL_US_RXRDY); |
396 | } | ||
308 | } | 397 | } |
309 | 398 | ||
310 | /* | 399 | /* |
@@ -428,8 +517,9 @@ static void atmel_rx_chars(struct uart_port *port) | |||
428 | static void atmel_tx_chars(struct uart_port *port) | 517 | static void atmel_tx_chars(struct uart_port *port) |
429 | { | 518 | { |
430 | struct circ_buf *xmit = &port->state->xmit; | 519 | struct circ_buf *xmit = &port->state->xmit; |
520 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | ||
431 | 521 | ||
432 | if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) { | 522 | if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) { |
433 | UART_PUT_CHAR(port, port->x_char); | 523 | UART_PUT_CHAR(port, port->x_char); |
434 | port->icount.tx++; | 524 | port->icount.tx++; |
435 | port->x_char = 0; | 525 | port->x_char = 0; |
@@ -437,7 +527,7 @@ static void atmel_tx_chars(struct uart_port *port) | |||
437 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) | 527 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) |
438 | return; | 528 | return; |
439 | 529 | ||
440 | while (UART_GET_CSR(port) & ATMEL_US_TXRDY) { | 530 | while (UART_GET_CSR(port) & atmel_port->tx_done_mask) { |
441 | UART_PUT_CHAR(port, xmit->buf[xmit->tail]); | 531 | UART_PUT_CHAR(port, xmit->buf[xmit->tail]); |
442 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | 532 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
443 | port->icount.tx++; | 533 | port->icount.tx++; |
@@ -449,7 +539,8 @@ static void atmel_tx_chars(struct uart_port *port) | |||
449 | uart_write_wakeup(port); | 539 | uart_write_wakeup(port); |
450 | 540 | ||
451 | if (!uart_circ_empty(xmit)) | 541 | if (!uart_circ_empty(xmit)) |
452 | UART_PUT_IER(port, ATMEL_US_TXRDY); | 542 | /* Enable interrupts */ |
543 | UART_PUT_IER(port, atmel_port->tx_done_mask); | ||
453 | } | 544 | } |
454 | 545 | ||
455 | /* | 546 | /* |
@@ -501,18 +592,10 @@ atmel_handle_transmit(struct uart_port *port, unsigned int pending) | |||
501 | { | 592 | { |
502 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | 593 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
503 | 594 | ||
504 | if (atmel_use_dma_tx(port)) { | 595 | if (pending & atmel_port->tx_done_mask) { |
505 | /* PDC transmit */ | 596 | /* Either PDC or interrupt transmission */ |
506 | if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) { | 597 | UART_PUT_IDR(port, atmel_port->tx_done_mask); |
507 | UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); | 598 | tasklet_schedule(&atmel_port->tasklet); |
508 | tasklet_schedule(&atmel_port->tasklet); | ||
509 | } | ||
510 | } else { | ||
511 | /* Interrupt transmit */ | ||
512 | if (pending & ATMEL_US_TXRDY) { | ||
513 | UART_PUT_IDR(port, ATMEL_US_TXRDY); | ||
514 | tasklet_schedule(&atmel_port->tasklet); | ||
515 | } | ||
516 | } | 599 | } |
517 | } | 600 | } |
518 | 601 | ||
@@ -590,9 +673,15 @@ static void atmel_tx_dma(struct uart_port *port) | |||
590 | 673 | ||
591 | UART_PUT_TPR(port, pdc->dma_addr + xmit->tail); | 674 | UART_PUT_TPR(port, pdc->dma_addr + xmit->tail); |
592 | UART_PUT_TCR(port, count); | 675 | UART_PUT_TCR(port, count); |
593 | /* re-enable PDC transmit and interrupts */ | 676 | /* re-enable PDC transmit */ |
594 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); | 677 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); |
595 | UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); | 678 | /* Enable interrupts */ |
679 | UART_PUT_IER(port, atmel_port->tx_done_mask); | ||
680 | } else { | ||
681 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) { | ||
682 | /* DMA done, stop TX, start RX for RS485 */ | ||
683 | atmel_start_rx(port); | ||
684 | } | ||
596 | } | 685 | } |
597 | 686 | ||
598 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | 687 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
@@ -1017,6 +1106,7 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, | |||
1017 | { | 1106 | { |
1018 | unsigned long flags; | 1107 | unsigned long flags; |
1019 | unsigned int mode, imr, quot, baud; | 1108 | unsigned int mode, imr, quot, baud; |
1109 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | ||
1020 | 1110 | ||
1021 | /* Get current mode register */ | 1111 | /* Get current mode register */ |
1022 | mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | 1112 | mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL |
@@ -1115,6 +1205,17 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, | |||
1115 | /* disable receiver and transmitter */ | 1205 | /* disable receiver and transmitter */ |
1116 | UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); | 1206 | UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); |
1117 | 1207 | ||
1208 | /* Resetting serial mode to RS232 (0x0) */ | ||
1209 | mode &= ~ATMEL_US_USMODE; | ||
1210 | |||
1211 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) { | ||
1212 | dev_dbg(port->dev, "Setting UART to RS485\n"); | ||
1213 | UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send); | ||
1214 | mode |= ATMEL_US_USMODE_RS485; | ||
1215 | } else { | ||
1216 | dev_dbg(port->dev, "Setting UART to RS232\n"); | ||
1217 | } | ||
1218 | |||
1118 | /* set the parity, stop bits and data size */ | 1219 | /* set the parity, stop bits and data size */ |
1119 | UART_PUT_MR(port, mode); | 1220 | UART_PUT_MR(port, mode); |
1120 | 1221 | ||
@@ -1231,6 +1332,35 @@ static void atmel_poll_put_char(struct uart_port *port, unsigned char ch) | |||
1231 | } | 1332 | } |
1232 | #endif | 1333 | #endif |
1233 | 1334 | ||
1335 | static int | ||
1336 | atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg) | ||
1337 | { | ||
1338 | struct serial_rs485 rs485conf; | ||
1339 | |||
1340 | switch (cmd) { | ||
1341 | case TIOCSRS485: | ||
1342 | if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg, | ||
1343 | sizeof(rs485conf))) | ||
1344 | return -EFAULT; | ||
1345 | |||
1346 | atmel_config_rs485(port, &rs485conf); | ||
1347 | break; | ||
1348 | |||
1349 | case TIOCGRS485: | ||
1350 | if (copy_to_user((struct serial_rs485 *) arg, | ||
1351 | &(to_atmel_uart_port(port)->rs485), | ||
1352 | sizeof(rs485conf))) | ||
1353 | return -EFAULT; | ||
1354 | break; | ||
1355 | |||
1356 | default: | ||
1357 | return -ENOIOCTLCMD; | ||
1358 | } | ||
1359 | return 0; | ||
1360 | } | ||
1361 | |||
1362 | |||
1363 | |||
1234 | static struct uart_ops atmel_pops = { | 1364 | static struct uart_ops atmel_pops = { |
1235 | .tx_empty = atmel_tx_empty, | 1365 | .tx_empty = atmel_tx_empty, |
1236 | .set_mctrl = atmel_set_mctrl, | 1366 | .set_mctrl = atmel_set_mctrl, |
@@ -1250,6 +1380,7 @@ static struct uart_ops atmel_pops = { | |||
1250 | .config_port = atmel_config_port, | 1380 | .config_port = atmel_config_port, |
1251 | .verify_port = atmel_verify_port, | 1381 | .verify_port = atmel_verify_port, |
1252 | .pm = atmel_serial_pm, | 1382 | .pm = atmel_serial_pm, |
1383 | .ioctl = atmel_ioctl, | ||
1253 | #ifdef CONFIG_CONSOLE_POLL | 1384 | #ifdef CONFIG_CONSOLE_POLL |
1254 | .poll_get_char = atmel_poll_get_char, | 1385 | .poll_get_char = atmel_poll_get_char, |
1255 | .poll_put_char = atmel_poll_put_char, | 1386 | .poll_put_char = atmel_poll_put_char, |
@@ -1265,13 +1396,12 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, | |||
1265 | struct uart_port *port = &atmel_port->uart; | 1396 | struct uart_port *port = &atmel_port->uart; |
1266 | struct atmel_uart_data *data = pdev->dev.platform_data; | 1397 | struct atmel_uart_data *data = pdev->dev.platform_data; |
1267 | 1398 | ||
1268 | port->iotype = UPIO_MEM; | 1399 | port->iotype = UPIO_MEM; |
1269 | port->flags = UPF_BOOT_AUTOCONF; | 1400 | port->flags = UPF_BOOT_AUTOCONF; |
1270 | port->ops = &atmel_pops; | 1401 | port->ops = &atmel_pops; |
1271 | port->fifosize = 1; | 1402 | port->fifosize = 1; |
1272 | port->line = pdev->id; | 1403 | port->line = pdev->id; |
1273 | port->dev = &pdev->dev; | 1404 | port->dev = &pdev->dev; |
1274 | |||
1275 | port->mapbase = pdev->resource[0].start; | 1405 | port->mapbase = pdev->resource[0].start; |
1276 | port->irq = pdev->resource[1].start; | 1406 | port->irq = pdev->resource[1].start; |
1277 | 1407 | ||
@@ -1299,8 +1429,16 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, | |||
1299 | 1429 | ||
1300 | atmel_port->use_dma_rx = data->use_dma_rx; | 1430 | atmel_port->use_dma_rx = data->use_dma_rx; |
1301 | atmel_port->use_dma_tx = data->use_dma_tx; | 1431 | atmel_port->use_dma_tx = data->use_dma_tx; |
1302 | if (atmel_use_dma_tx(port)) | 1432 | atmel_port->rs485 = data->rs485; |
1433 | /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */ | ||
1434 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) | ||
1435 | atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; | ||
1436 | else if (atmel_use_dma_tx(port)) { | ||
1303 | port->fifosize = PDC_BUFFER_SIZE; | 1437 | port->fifosize = PDC_BUFFER_SIZE; |
1438 | atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE; | ||
1439 | } else { | ||
1440 | atmel_port->tx_done_mask = ATMEL_US_TXRDY; | ||
1441 | } | ||
1304 | } | 1442 | } |
1305 | 1443 | ||
1306 | /* | 1444 | /* |
@@ -1334,6 +1472,7 @@ static void atmel_console_putchar(struct uart_port *port, int ch) | |||
1334 | static void atmel_console_write(struct console *co, const char *s, u_int count) | 1472 | static void atmel_console_write(struct console *co, const char *s, u_int count) |
1335 | { | 1473 | { |
1336 | struct uart_port *port = &atmel_ports[co->index].uart; | 1474 | struct uart_port *port = &atmel_ports[co->index].uart; |
1475 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | ||
1337 | unsigned int status, imr; | 1476 | unsigned int status, imr; |
1338 | unsigned int pdc_tx; | 1477 | unsigned int pdc_tx; |
1339 | 1478 | ||
@@ -1341,7 +1480,7 @@ static void atmel_console_write(struct console *co, const char *s, u_int count) | |||
1341 | * First, save IMR and then disable interrupts | 1480 | * First, save IMR and then disable interrupts |
1342 | */ | 1481 | */ |
1343 | imr = UART_GET_IMR(port); | 1482 | imr = UART_GET_IMR(port); |
1344 | UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY); | 1483 | UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask); |
1345 | 1484 | ||
1346 | /* Store PDC transmit status and disable it */ | 1485 | /* Store PDC transmit status and disable it */ |
1347 | pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN; | 1486 | pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN; |
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 4315b23590bd..eacb588a9345 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c | |||
@@ -120,7 +120,8 @@ | |||
120 | #define MX2_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ | 120 | #define MX2_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ |
121 | #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ | 121 | #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ |
122 | #define UCR3_BPEN (1<<0) /* Preset registers enable */ | 122 | #define UCR3_BPEN (1<<0) /* Preset registers enable */ |
123 | #define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ | 123 | #define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */ |
124 | #define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */ | ||
124 | #define UCR4_INVR (1<<9) /* Inverted infrared reception */ | 125 | #define UCR4_INVR (1<<9) /* Inverted infrared reception */ |
125 | #define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ | 126 | #define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ |
126 | #define UCR4_WKEN (1<<7) /* Wake interrupt enable */ | 127 | #define UCR4_WKEN (1<<7) /* Wake interrupt enable */ |
@@ -591,6 +592,9 @@ static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) | |||
591 | return 0; | 592 | return 0; |
592 | } | 593 | } |
593 | 594 | ||
595 | /* half the RX buffer size */ | ||
596 | #define CTSTL 16 | ||
597 | |||
594 | static int imx_startup(struct uart_port *port) | 598 | static int imx_startup(struct uart_port *port) |
595 | { | 599 | { |
596 | struct imx_port *sport = (struct imx_port *)port; | 600 | struct imx_port *sport = (struct imx_port *)port; |
@@ -607,6 +611,10 @@ static int imx_startup(struct uart_port *port) | |||
607 | if (USE_IRDA(sport)) | 611 | if (USE_IRDA(sport)) |
608 | temp |= UCR4_IRSC; | 612 | temp |= UCR4_IRSC; |
609 | 613 | ||
614 | /* set the trigger level for CTS */ | ||
615 | temp &= ~(UCR4_CTSTL_MASK<< UCR4_CTSTL_SHF); | ||
616 | temp |= CTSTL<< UCR4_CTSTL_SHF; | ||
617 | |||
610 | writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); | 618 | writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); |
611 | 619 | ||
612 | if (USE_IRDA(sport)) { | 620 | if (USE_IRDA(sport)) { |
diff --git a/drivers/serial/mcf.c b/drivers/serial/mcf.c index 7bb5fee639e3..b5aaef965f24 100644 --- a/drivers/serial/mcf.c +++ b/drivers/serial/mcf.c | |||
@@ -263,6 +263,7 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios, | |||
263 | } | 263 | } |
264 | 264 | ||
265 | spin_lock_irqsave(&port->lock, flags); | 265 | spin_lock_irqsave(&port->lock, flags); |
266 | uart_update_timeout(port, termios->c_cflag, baud); | ||
266 | writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR); | 267 | writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR); |
267 | writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR); | 268 | writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR); |
268 | writeb(MCFUART_UCR_CMDRESETMRPTR, port->membase + MCFUART_UCR); | 269 | writeb(MCFUART_UCR_CMDRESETMRPTR, port->membase + MCFUART_UCR); |
@@ -379,6 +380,7 @@ static irqreturn_t mcf_interrupt(int irq, void *data) | |||
379 | static void mcf_config_port(struct uart_port *port, int flags) | 380 | static void mcf_config_port(struct uart_port *port, int flags) |
380 | { | 381 | { |
381 | port->type = PORT_MCF; | 382 | port->type = PORT_MCF; |
383 | port->fifosize = MCFUART_TXFIFOSIZE; | ||
382 | 384 | ||
383 | /* Clear mask, so no surprise interrupts. */ | 385 | /* Clear mask, so no surprise interrupts. */ |
384 | writeb(0, port->membase + MCFUART_UIMR); | 386 | writeb(0, port->membase + MCFUART_UIMR); |
@@ -424,7 +426,7 @@ static int mcf_verify_port(struct uart_port *port, struct serial_struct *ser) | |||
424 | /* | 426 | /* |
425 | * Define the basic serial functions we support. | 427 | * Define the basic serial functions we support. |
426 | */ | 428 | */ |
427 | static struct uart_ops mcf_uart_ops = { | 429 | static const struct uart_ops mcf_uart_ops = { |
428 | .tx_empty = mcf_tx_empty, | 430 | .tx_empty = mcf_tx_empty, |
429 | .get_mctrl = mcf_get_mctrl, | 431 | .get_mctrl = mcf_get_mctrl, |
430 | .set_mctrl = mcf_set_mctrl, | 432 | .set_mctrl = mcf_set_mctrl, |
@@ -443,7 +445,7 @@ static struct uart_ops mcf_uart_ops = { | |||
443 | .verify_port = mcf_verify_port, | 445 | .verify_port = mcf_verify_port, |
444 | }; | 446 | }; |
445 | 447 | ||
446 | static struct mcf_uart mcf_ports[3]; | 448 | static struct mcf_uart mcf_ports[4]; |
447 | 449 | ||
448 | #define MCF_MAXPORTS ARRAY_SIZE(mcf_ports) | 450 | #define MCF_MAXPORTS ARRAY_SIZE(mcf_ports) |
449 | 451 | ||
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index 3119fddaedb5..02469c31bf0b 100644 --- a/drivers/serial/mpc52xx_uart.c +++ b/drivers/serial/mpc52xx_uart.c | |||
@@ -29,39 +29,6 @@ | |||
29 | * kind, whether express or implied. | 29 | * kind, whether express or implied. |
30 | */ | 30 | */ |
31 | 31 | ||
32 | /* Platform device Usage : | ||
33 | * | ||
34 | * Since PSCs can have multiple function, the correct driver for each one | ||
35 | * is selected by calling mpc52xx_match_psc_function(...). The function | ||
36 | * handled by this driver is "uart". | ||
37 | * | ||
38 | * The driver init all necessary registers to place the PSC in uart mode without | ||
39 | * DCD. However, the pin multiplexing aren't changed and should be set either | ||
40 | * by the bootloader or in the platform init code. | ||
41 | * | ||
42 | * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2, | ||
43 | * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and | ||
44 | * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly | ||
45 | * fpr the console code : without this 1:1 mapping, at early boot time, when we | ||
46 | * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it | ||
47 | * will be mapped to. | ||
48 | */ | ||
49 | |||
50 | /* OF Platform device Usage : | ||
51 | * | ||
52 | * This driver is only used for PSCs configured in uart mode. The device | ||
53 | * tree will have a node for each PSC with "mpc52xx-psc-uart" in the compatible | ||
54 | * list. | ||
55 | * | ||
56 | * By default, PSC devices are enumerated in the order they are found. However | ||
57 | * a particular PSC number can be forces by adding 'device_no = <port#>' | ||
58 | * to the device node. | ||
59 | * | ||
60 | * The driver init all necessary registers to place the PSC in uart mode without | ||
61 | * DCD. However, the pin multiplexing aren't changed and should be set either | ||
62 | * by the bootloader or in the platform init code. | ||
63 | */ | ||
64 | |||
65 | #undef DEBUG | 32 | #undef DEBUG |
66 | 33 | ||
67 | #include <linux/device.h> | 34 | #include <linux/device.h> |
@@ -1500,7 +1467,7 @@ mpc52xx_uart_init(void) | |||
1500 | /* | 1467 | /* |
1501 | * Map the PSC FIFO Controller and init if on MPC512x. | 1468 | * Map the PSC FIFO Controller and init if on MPC512x. |
1502 | */ | 1469 | */ |
1503 | if (psc_ops->fifoc_init) { | 1470 | if (psc_ops && psc_ops->fifoc_init) { |
1504 | ret = psc_ops->fifoc_init(); | 1471 | ret = psc_ops->fifoc_init(); |
1505 | if (ret) | 1472 | if (ret) |
1506 | return ret; | 1473 | return ret; |
diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c index 4eaa043ca2a8..700e10833bf9 100644 --- a/drivers/serial/pmac_zilog.c +++ b/drivers/serial/pmac_zilog.c | |||
@@ -752,8 +752,10 @@ static void pmz_break_ctl(struct uart_port *port, int break_state) | |||
752 | uap->curregs[R5] = new_reg; | 752 | uap->curregs[R5] = new_reg; |
753 | 753 | ||
754 | /* NOTE: Not subject to 'transmitter active' rule. */ | 754 | /* NOTE: Not subject to 'transmitter active' rule. */ |
755 | if (ZS_IS_ASLEEP(uap)) | 755 | if (ZS_IS_ASLEEP(uap)) { |
756 | spin_unlock_irqrestore(&port->lock, flags); | ||
756 | return; | 757 | return; |
758 | } | ||
757 | write_zsreg(uap, R5, uap->curregs[R5]); | 759 | write_zsreg(uap, R5, uap->curregs[R5]); |
758 | } | 760 | } |
759 | 761 | ||
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c index 175d202ab37e..8cfa5b12ea7a 100644 --- a/drivers/serial/serial_cs.c +++ b/drivers/serial/serial_cs.c | |||
@@ -105,6 +105,10 @@ struct serial_cfg_mem { | |||
105 | * manfid 0x0160, 0x0104 | 105 | * manfid 0x0160, 0x0104 |
106 | * This card appears to have a 14.7456MHz clock. | 106 | * This card appears to have a 14.7456MHz clock. |
107 | */ | 107 | */ |
108 | /* Generic Modem: MD55x (GPRS/EDGE) have | ||
109 | * Elan VPU16551 UART with 14.7456MHz oscillator | ||
110 | * manfid 0x015D, 0x4C45 | ||
111 | */ | ||
108 | static void quirk_setup_brainboxes_0104(struct pcmcia_device *link, struct uart_port *port) | 112 | static void quirk_setup_brainboxes_0104(struct pcmcia_device *link, struct uart_port *port) |
109 | { | 113 | { |
110 | port->uartclk = 14745600; | 114 | port->uartclk = 14745600; |
@@ -196,6 +200,11 @@ static const struct serial_quirk quirks[] = { | |||
196 | .multi = -1, | 200 | .multi = -1, |
197 | .setup = quirk_setup_brainboxes_0104, | 201 | .setup = quirk_setup_brainboxes_0104, |
198 | }, { | 202 | }, { |
203 | .manfid = 0x015D, | ||
204 | .prodid = 0x4C45, | ||
205 | .multi = -1, | ||
206 | .setup = quirk_setup_brainboxes_0104, | ||
207 | }, { | ||
199 | .manfid = MANFID_IBM, | 208 | .manfid = MANFID_IBM, |
200 | .prodid = ~0, | 209 | .prodid = ~0, |
201 | .multi = -1, | 210 | .multi = -1, |
diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c index 2e71bbc04dac..b1962025b1aa 100644 --- a/drivers/serial/serial_ks8695.c +++ b/drivers/serial/serial_ks8695.c | |||
@@ -650,6 +650,7 @@ static struct console ks8695_console = { | |||
650 | 650 | ||
651 | static int __init ks8695_console_init(void) | 651 | static int __init ks8695_console_init(void) |
652 | { | 652 | { |
653 | add_preferred_console(SERIAL_KS8695_DEVNAME, 0, NULL); | ||
653 | register_console(&ks8695_console); | 654 | register_console(&ks8695_console); |
654 | return 0; | 655 | return 0; |
655 | } | 656 | } |
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 78e0545243d0..8d993c4cceac 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -83,8 +83,8 @@ struct sci_port { | |||
83 | 83 | ||
84 | /* Interface clock */ | 84 | /* Interface clock */ |
85 | struct clk *iclk; | 85 | struct clk *iclk; |
86 | /* Data clock */ | 86 | /* Function clock */ |
87 | struct clk *dclk; | 87 | struct clk *fclk; |
88 | 88 | ||
89 | struct list_head node; | 89 | struct list_head node; |
90 | struct dma_chan *chan_tx; | 90 | struct dma_chan *chan_tx; |
@@ -107,6 +107,7 @@ struct sci_port { | |||
107 | struct work_struct work_tx; | 107 | struct work_struct work_tx; |
108 | struct work_struct work_rx; | 108 | struct work_struct work_rx; |
109 | struct timer_list rx_timer; | 109 | struct timer_list rx_timer; |
110 | unsigned int rx_timeout; | ||
110 | #endif | 111 | #endif |
111 | }; | 112 | }; |
112 | 113 | ||
@@ -674,22 +675,22 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr) | |||
674 | struct sci_port *s = to_sci_port(port); | 675 | struct sci_port *s = to_sci_port(port); |
675 | 676 | ||
676 | if (s->chan_rx) { | 677 | if (s->chan_rx) { |
677 | unsigned long tout; | ||
678 | u16 scr = sci_in(port, SCSCR); | 678 | u16 scr = sci_in(port, SCSCR); |
679 | u16 ssr = sci_in(port, SCxSR); | 679 | u16 ssr = sci_in(port, SCxSR); |
680 | 680 | ||
681 | /* Disable future Rx interrupts */ | 681 | /* Disable future Rx interrupts */ |
682 | sci_out(port, SCSCR, scr & ~SCI_CTRL_FLAGS_RIE); | 682 | if (port->type == PORT_SCIFA) { |
683 | disable_irq_nosync(irq); | ||
684 | scr |= 0x4000; | ||
685 | } else { | ||
686 | scr &= ~SCI_CTRL_FLAGS_RIE; | ||
687 | } | ||
688 | sci_out(port, SCSCR, scr); | ||
683 | /* Clear current interrupt */ | 689 | /* Clear current interrupt */ |
684 | sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port))); | 690 | sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port))); |
685 | /* Calculate delay for 1.5 DMA buffers */ | 691 | dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n", |
686 | tout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 / | 692 | jiffies, s->rx_timeout); |
687 | port->fifosize / 2; | 693 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); |
688 | dev_dbg(port->dev, "Rx IRQ: setup timeout in %lu ms\n", | ||
689 | tout * 1000 / HZ); | ||
690 | if (tout < 2) | ||
691 | tout = 2; | ||
692 | mod_timer(&s->rx_timer, jiffies + tout); | ||
693 | 694 | ||
694 | return IRQ_HANDLED; | 695 | return IRQ_HANDLED; |
695 | } | 696 | } |
@@ -799,7 +800,7 @@ static int sci_notifier(struct notifier_block *self, | |||
799 | (phase == CPUFREQ_RESUMECHANGE)) { | 800 | (phase == CPUFREQ_RESUMECHANGE)) { |
800 | spin_lock_irqsave(&priv->lock, flags); | 801 | spin_lock_irqsave(&priv->lock, flags); |
801 | list_for_each_entry(sci_port, &priv->ports, node) | 802 | list_for_each_entry(sci_port, &priv->ports, node) |
802 | sci_port->port.uartclk = clk_get_rate(sci_port->dclk); | 803 | sci_port->port.uartclk = clk_get_rate(sci_port->iclk); |
803 | spin_unlock_irqrestore(&priv->lock, flags); | 804 | spin_unlock_irqrestore(&priv->lock, flags); |
804 | } | 805 | } |
805 | 806 | ||
@@ -810,21 +811,17 @@ static void sci_clk_enable(struct uart_port *port) | |||
810 | { | 811 | { |
811 | struct sci_port *sci_port = to_sci_port(port); | 812 | struct sci_port *sci_port = to_sci_port(port); |
812 | 813 | ||
813 | clk_enable(sci_port->dclk); | 814 | clk_enable(sci_port->iclk); |
814 | sci_port->port.uartclk = clk_get_rate(sci_port->dclk); | 815 | sci_port->port.uartclk = clk_get_rate(sci_port->iclk); |
815 | 816 | clk_enable(sci_port->fclk); | |
816 | if (sci_port->iclk) | ||
817 | clk_enable(sci_port->iclk); | ||
818 | } | 817 | } |
819 | 818 | ||
820 | static void sci_clk_disable(struct uart_port *port) | 819 | static void sci_clk_disable(struct uart_port *port) |
821 | { | 820 | { |
822 | struct sci_port *sci_port = to_sci_port(port); | 821 | struct sci_port *sci_port = to_sci_port(port); |
823 | 822 | ||
824 | if (sci_port->iclk) | 823 | clk_disable(sci_port->fclk); |
825 | clk_disable(sci_port->iclk); | 824 | clk_disable(sci_port->iclk); |
826 | |||
827 | clk_disable(sci_port->dclk); | ||
828 | } | 825 | } |
829 | 826 | ||
830 | static int sci_request_irq(struct sci_port *port) | 827 | static int sci_request_irq(struct sci_port *port) |
@@ -922,13 +919,17 @@ static void sci_dma_tx_complete(void *arg) | |||
922 | s->cookie_tx = -EINVAL; | 919 | s->cookie_tx = -EINVAL; |
923 | s->desc_tx = NULL; | 920 | s->desc_tx = NULL; |
924 | 921 | ||
925 | spin_unlock_irqrestore(&port->lock, flags); | ||
926 | |||
927 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | 922 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
928 | uart_write_wakeup(port); | 923 | uart_write_wakeup(port); |
929 | 924 | ||
930 | if (uart_circ_chars_pending(xmit)) | 925 | if (!uart_circ_empty(xmit)) { |
931 | schedule_work(&s->work_tx); | 926 | schedule_work(&s->work_tx); |
927 | } else if (port->type == PORT_SCIFA) { | ||
928 | u16 ctrl = sci_in(port, SCSCR); | ||
929 | sci_out(port, SCSCR, ctrl & ~SCI_CTRL_FLAGS_TIE); | ||
930 | } | ||
931 | |||
932 | spin_unlock_irqrestore(&port->lock, flags); | ||
932 | } | 933 | } |
933 | 934 | ||
934 | /* Locking: called with port lock held */ | 935 | /* Locking: called with port lock held */ |
@@ -972,13 +973,13 @@ static void sci_dma_rx_complete(void *arg) | |||
972 | unsigned long flags; | 973 | unsigned long flags; |
973 | int count; | 974 | int count; |
974 | 975 | ||
975 | dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); | 976 | dev_dbg(port->dev, "%s(%d) active #%d\n", __func__, port->line, s->active_rx); |
976 | 977 | ||
977 | spin_lock_irqsave(&port->lock, flags); | 978 | spin_lock_irqsave(&port->lock, flags); |
978 | 979 | ||
979 | count = sci_dma_rx_push(s, tty, s->buf_len_rx); | 980 | count = sci_dma_rx_push(s, tty, s->buf_len_rx); |
980 | 981 | ||
981 | mod_timer(&s->rx_timer, jiffies + msecs_to_jiffies(5)); | 982 | mod_timer(&s->rx_timer, jiffies + s->rx_timeout); |
982 | 983 | ||
983 | spin_unlock_irqrestore(&port->lock, flags); | 984 | spin_unlock_irqrestore(&port->lock, flags); |
984 | 985 | ||
@@ -1050,6 +1051,8 @@ static void sci_submit_rx(struct sci_port *s) | |||
1050 | sci_rx_dma_release(s, true); | 1051 | sci_rx_dma_release(s, true); |
1051 | return; | 1052 | return; |
1052 | } | 1053 | } |
1054 | dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__, | ||
1055 | s->cookie_rx[i], i); | ||
1053 | } | 1056 | } |
1054 | 1057 | ||
1055 | s->active_rx = s->cookie_rx[0]; | 1058 | s->active_rx = s->cookie_rx[0]; |
@@ -1107,10 +1110,10 @@ static void work_fn_rx(struct work_struct *work) | |||
1107 | return; | 1110 | return; |
1108 | } | 1111 | } |
1109 | 1112 | ||
1110 | dev_dbg(port->dev, "%s: cookie %d #%d\n", __func__, | ||
1111 | s->cookie_rx[new], new); | ||
1112 | |||
1113 | s->active_rx = s->cookie_rx[!new]; | 1113 | s->active_rx = s->cookie_rx[!new]; |
1114 | |||
1115 | dev_dbg(port->dev, "%s: cookie %d #%d, new active #%d\n", __func__, | ||
1116 | s->cookie_rx[new], new, s->active_rx); | ||
1114 | } | 1117 | } |
1115 | 1118 | ||
1116 | static void work_fn_tx(struct work_struct *work) | 1119 | static void work_fn_tx(struct work_struct *work) |
@@ -1172,23 +1175,28 @@ static void work_fn_tx(struct work_struct *work) | |||
1172 | 1175 | ||
1173 | static void sci_start_tx(struct uart_port *port) | 1176 | static void sci_start_tx(struct uart_port *port) |
1174 | { | 1177 | { |
1178 | struct sci_port *s = to_sci_port(port); | ||
1175 | unsigned short ctrl; | 1179 | unsigned short ctrl; |
1176 | 1180 | ||
1177 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | 1181 | #ifdef CONFIG_SERIAL_SH_SCI_DMA |
1178 | struct sci_port *s = to_sci_port(port); | 1182 | if (port->type == PORT_SCIFA) { |
1179 | 1183 | u16 new, scr = sci_in(port, SCSCR); | |
1180 | if (s->chan_tx) { | 1184 | if (s->chan_tx) |
1181 | if (!uart_circ_empty(&s->port.state->xmit) && s->cookie_tx < 0) | 1185 | new = scr | 0x8000; |
1182 | schedule_work(&s->work_tx); | 1186 | else |
1183 | 1187 | new = scr & ~0x8000; | |
1184 | return; | 1188 | if (new != scr) |
1189 | sci_out(port, SCSCR, new); | ||
1185 | } | 1190 | } |
1191 | if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) && | ||
1192 | s->cookie_tx < 0) | ||
1193 | schedule_work(&s->work_tx); | ||
1186 | #endif | 1194 | #endif |
1187 | 1195 | if (!s->chan_tx || port->type == PORT_SCIFA) { | |
1188 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ | 1196 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ |
1189 | ctrl = sci_in(port, SCSCR); | 1197 | ctrl = sci_in(port, SCSCR); |
1190 | ctrl |= SCI_CTRL_FLAGS_TIE; | 1198 | sci_out(port, SCSCR, ctrl | SCI_CTRL_FLAGS_TIE); |
1191 | sci_out(port, SCSCR, ctrl); | 1199 | } |
1192 | } | 1200 | } |
1193 | 1201 | ||
1194 | static void sci_stop_tx(struct uart_port *port) | 1202 | static void sci_stop_tx(struct uart_port *port) |
@@ -1197,6 +1205,8 @@ static void sci_stop_tx(struct uart_port *port) | |||
1197 | 1205 | ||
1198 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ | 1206 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ |
1199 | ctrl = sci_in(port, SCSCR); | 1207 | ctrl = sci_in(port, SCSCR); |
1208 | if (port->type == PORT_SCIFA) | ||
1209 | ctrl &= ~0x8000; | ||
1200 | ctrl &= ~SCI_CTRL_FLAGS_TIE; | 1210 | ctrl &= ~SCI_CTRL_FLAGS_TIE; |
1201 | sci_out(port, SCSCR, ctrl); | 1211 | sci_out(port, SCSCR, ctrl); |
1202 | } | 1212 | } |
@@ -1207,6 +1217,8 @@ static void sci_start_rx(struct uart_port *port) | |||
1207 | 1217 | ||
1208 | /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ | 1218 | /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ |
1209 | ctrl |= sci_in(port, SCSCR); | 1219 | ctrl |= sci_in(port, SCSCR); |
1220 | if (port->type == PORT_SCIFA) | ||
1221 | ctrl &= ~0x4000; | ||
1210 | sci_out(port, SCSCR, ctrl); | 1222 | sci_out(port, SCSCR, ctrl); |
1211 | } | 1223 | } |
1212 | 1224 | ||
@@ -1216,6 +1228,8 @@ static void sci_stop_rx(struct uart_port *port) | |||
1216 | 1228 | ||
1217 | /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ | 1229 | /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ |
1218 | ctrl = sci_in(port, SCSCR); | 1230 | ctrl = sci_in(port, SCSCR); |
1231 | if (port->type == PORT_SCIFA) | ||
1232 | ctrl &= ~0x4000; | ||
1219 | ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); | 1233 | ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); |
1220 | sci_out(port, SCSCR, ctrl); | 1234 | sci_out(port, SCSCR, ctrl); |
1221 | } | 1235 | } |
@@ -1250,8 +1264,12 @@ static void rx_timer_fn(unsigned long arg) | |||
1250 | { | 1264 | { |
1251 | struct sci_port *s = (struct sci_port *)arg; | 1265 | struct sci_port *s = (struct sci_port *)arg; |
1252 | struct uart_port *port = &s->port; | 1266 | struct uart_port *port = &s->port; |
1253 | |||
1254 | u16 scr = sci_in(port, SCSCR); | 1267 | u16 scr = sci_in(port, SCSCR); |
1268 | |||
1269 | if (port->type == PORT_SCIFA) { | ||
1270 | scr &= ~0x4000; | ||
1271 | enable_irq(s->irqs[1]); | ||
1272 | } | ||
1255 | sci_out(port, SCSCR, scr | SCI_CTRL_FLAGS_RIE); | 1273 | sci_out(port, SCSCR, scr | SCI_CTRL_FLAGS_RIE); |
1256 | dev_dbg(port->dev, "DMA Rx timed out\n"); | 1274 | dev_dbg(port->dev, "DMA Rx timed out\n"); |
1257 | schedule_work(&s->work_rx); | 1275 | schedule_work(&s->work_rx); |
@@ -1401,8 +1419,12 @@ static void sci_shutdown(struct uart_port *port) | |||
1401 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | 1419 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, |
1402 | struct ktermios *old) | 1420 | struct ktermios *old) |
1403 | { | 1421 | { |
1422 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
1423 | struct sci_port *s = to_sci_port(port); | ||
1424 | #endif | ||
1404 | unsigned int status, baud, smr_val, max_baud; | 1425 | unsigned int status, baud, smr_val, max_baud; |
1405 | int t = -1; | 1426 | int t = -1; |
1427 | u16 scfcr = 0; | ||
1406 | 1428 | ||
1407 | /* | 1429 | /* |
1408 | * earlyprintk comes here early on with port->uartclk set to zero. | 1430 | * earlyprintk comes here early on with port->uartclk set to zero. |
@@ -1425,7 +1447,7 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
1425 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ | 1447 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ |
1426 | 1448 | ||
1427 | if (port->type != PORT_SCI) | 1449 | if (port->type != PORT_SCI) |
1428 | sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); | 1450 | sci_out(port, SCFCR, scfcr | SCFCR_RFRST | SCFCR_TFRST); |
1429 | 1451 | ||
1430 | smr_val = sci_in(port, SCSMR) & 3; | 1452 | smr_val = sci_in(port, SCSMR) & 3; |
1431 | if ((termios->c_cflag & CSIZE) == CS7) | 1453 | if ((termios->c_cflag & CSIZE) == CS7) |
@@ -1456,10 +1478,32 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
1456 | } | 1478 | } |
1457 | 1479 | ||
1458 | sci_init_pins(port, termios->c_cflag); | 1480 | sci_init_pins(port, termios->c_cflag); |
1459 | sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0); | 1481 | sci_out(port, SCFCR, scfcr | ((termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0)); |
1460 | 1482 | ||
1461 | sci_out(port, SCSCR, SCSCR_INIT(port)); | 1483 | sci_out(port, SCSCR, SCSCR_INIT(port)); |
1462 | 1484 | ||
1485 | #ifdef CONFIG_SERIAL_SH_SCI_DMA | ||
1486 | /* | ||
1487 | * Calculate delay for 1.5 DMA buffers: see | ||
1488 | * drivers/serial/serial_core.c::uart_update_timeout(). With 10 bits | ||
1489 | * (CS8), 250Hz, 115200 baud and 64 bytes FIFO, the above function | ||
1490 | * calculates 1 jiffie for the data plus 5 jiffies for the "slop(e)." | ||
1491 | * Then below we calculate 3 jiffies (12ms) for 1.5 DMA buffers (3 FIFO | ||
1492 | * sizes), but it has been found out experimentally, that this is not | ||
1493 | * enough: the driver too often needlessly runs on a DMA timeout. 20ms | ||
1494 | * as a minimum seem to work perfectly. | ||
1495 | */ | ||
1496 | if (s->chan_rx) { | ||
1497 | s->rx_timeout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 / | ||
1498 | port->fifosize / 2; | ||
1499 | dev_dbg(port->dev, | ||
1500 | "DMA Rx t-out %ums, tty t-out %u jiffies\n", | ||
1501 | s->rx_timeout * 1000 / HZ, port->timeout); | ||
1502 | if (s->rx_timeout < msecs_to_jiffies(20)) | ||
1503 | s->rx_timeout = msecs_to_jiffies(20); | ||
1504 | } | ||
1505 | #endif | ||
1506 | |||
1463 | if ((termios->c_cflag & CREAD) != 0) | 1507 | if ((termios->c_cflag & CREAD) != 0) |
1464 | sci_start_rx(port); | 1508 | sci_start_rx(port); |
1465 | } | 1509 | } |
@@ -1551,10 +1595,10 @@ static struct uart_ops sci_uart_ops = { | |||
1551 | #endif | 1595 | #endif |
1552 | }; | 1596 | }; |
1553 | 1597 | ||
1554 | static void __devinit sci_init_single(struct platform_device *dev, | 1598 | static int __devinit sci_init_single(struct platform_device *dev, |
1555 | struct sci_port *sci_port, | 1599 | struct sci_port *sci_port, |
1556 | unsigned int index, | 1600 | unsigned int index, |
1557 | struct plat_sci_port *p) | 1601 | struct plat_sci_port *p) |
1558 | { | 1602 | { |
1559 | struct uart_port *port = &sci_port->port; | 1603 | struct uart_port *port = &sci_port->port; |
1560 | 1604 | ||
@@ -1575,8 +1619,23 @@ static void __devinit sci_init_single(struct platform_device *dev, | |||
1575 | } | 1619 | } |
1576 | 1620 | ||
1577 | if (dev) { | 1621 | if (dev) { |
1578 | sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL; | 1622 | sci_port->iclk = clk_get(&dev->dev, "sci_ick"); |
1579 | sci_port->dclk = clk_get(&dev->dev, "peripheral_clk"); | 1623 | if (IS_ERR(sci_port->iclk)) { |
1624 | sci_port->iclk = clk_get(&dev->dev, "peripheral_clk"); | ||
1625 | if (IS_ERR(sci_port->iclk)) { | ||
1626 | dev_err(&dev->dev, "can't get iclk\n"); | ||
1627 | return PTR_ERR(sci_port->iclk); | ||
1628 | } | ||
1629 | } | ||
1630 | |||
1631 | /* | ||
1632 | * The function clock is optional, ignore it if we can't | ||
1633 | * find it. | ||
1634 | */ | ||
1635 | sci_port->fclk = clk_get(&dev->dev, "sci_fck"); | ||
1636 | if (IS_ERR(sci_port->fclk)) | ||
1637 | sci_port->fclk = NULL; | ||
1638 | |||
1580 | sci_port->enable = sci_clk_enable; | 1639 | sci_port->enable = sci_clk_enable; |
1581 | sci_port->disable = sci_clk_disable; | 1640 | sci_port->disable = sci_clk_disable; |
1582 | port->dev = &dev->dev; | 1641 | port->dev = &dev->dev; |
@@ -1603,6 +1662,7 @@ static void __devinit sci_init_single(struct platform_device *dev, | |||
1603 | #endif | 1662 | #endif |
1604 | 1663 | ||
1605 | memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs)); | 1664 | memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs)); |
1665 | return 0; | ||
1606 | } | 1666 | } |
1607 | 1667 | ||
1608 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE | 1668 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE |
@@ -1752,8 +1812,11 @@ static int sci_remove(struct platform_device *dev) | |||
1752 | cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); | 1812 | cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); |
1753 | 1813 | ||
1754 | spin_lock_irqsave(&priv->lock, flags); | 1814 | spin_lock_irqsave(&priv->lock, flags); |
1755 | list_for_each_entry(p, &priv->ports, node) | 1815 | list_for_each_entry(p, &priv->ports, node) { |
1756 | uart_remove_one_port(&sci_uart_driver, &p->port); | 1816 | uart_remove_one_port(&sci_uart_driver, &p->port); |
1817 | clk_put(p->iclk); | ||
1818 | clk_put(p->fclk); | ||
1819 | } | ||
1757 | spin_unlock_irqrestore(&priv->lock, flags); | 1820 | spin_unlock_irqrestore(&priv->lock, flags); |
1758 | 1821 | ||
1759 | kfree(priv); | 1822 | kfree(priv); |
@@ -1779,7 +1842,9 @@ static int __devinit sci_probe_single(struct platform_device *dev, | |||
1779 | return 0; | 1842 | return 0; |
1780 | } | 1843 | } |
1781 | 1844 | ||
1782 | sci_init_single(dev, sciport, index, p); | 1845 | ret = sci_init_single(dev, sciport, index, p); |
1846 | if (ret) | ||
1847 | return ret; | ||
1783 | 1848 | ||
1784 | ret = uart_add_one_port(&sci_uart_driver, &sciport->port); | 1849 | ret = uart_add_one_port(&sci_uart_driver, &sciport->port); |
1785 | if (ret) | 1850 | if (ret) |