diff options
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/sh-sci.c | 4 | ||||
-rw-r--r-- | drivers/serial/sh-sci.h | 19 |
2 files changed, 21 insertions, 2 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 6fbfd140b7e7..ddf639144538 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -395,7 +395,8 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | |||
395 | } else { | 395 | } else { |
396 | #ifdef CONFIG_CPU_SUBTYPE_SH7343 | 396 | #ifdef CONFIG_CPU_SUBTYPE_SH7343 |
397 | /* Nothing */ | 397 | /* Nothing */ |
398 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 398 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ |
399 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | ||
399 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 400 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
400 | defined(CONFIG_CPU_SUBTYPE_SHX3) | 401 | defined(CONFIG_CPU_SUBTYPE_SHX3) |
401 | ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ | 402 | ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ |
@@ -408,6 +409,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | |||
408 | #endif | 409 | #endif |
409 | 410 | ||
410 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ | 411 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ |
412 | defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | ||
411 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 413 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
412 | defined(CONFIG_CPU_SUBTYPE_SH7785) | 414 | defined(CONFIG_CPU_SUBTYPE_SH7785) |
413 | static inline int scif_txroom(struct uart_port *port) | 415 | static inline int scif_txroom(struct uart_port *port) |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 85562040a6d3..f5764ebcfe07 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -120,6 +120,12 @@ | |||
120 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ | 120 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ |
121 | # define SCI_ONLY | 121 | # define SCI_ONLY |
122 | # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) | 122 | # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) |
123 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
124 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ | ||
125 | # define SCSPTR1 0xffe08024 /* 16 bit SCIF */ | ||
126 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
127 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | ||
128 | # define SCIF_ONLY | ||
123 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) | 129 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) |
124 | # define SCSPTR0 0xff923020 /* 16 bit SCIF */ | 130 | # define SCSPTR0 0xff923020 /* 16 bit SCIF */ |
125 | # define SCSPTR1 0xff924020 /* 16 bit SCIF */ | 131 | # define SCSPTR1 0xff924020 /* 16 bit SCIF */ |
@@ -419,6 +425,7 @@ SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8) | |||
419 | SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) | 425 | SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) |
420 | SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) | 426 | SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) |
421 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ | 427 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ |
428 | defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | ||
422 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 429 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
423 | defined(CONFIG_CPU_SUBTYPE_SH7785) | 430 | defined(CONFIG_CPU_SUBTYPE_SH7785) |
424 | SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) | 431 | SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) |
@@ -588,6 +595,15 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
588 | int ch = (port->mapbase - SMR0) >> 3; | 595 | int ch = (port->mapbase - SMR0) >> 3; |
589 | return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0; | 596 | return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0; |
590 | } | 597 | } |
598 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
599 | static inline int sci_rxd_in(struct uart_port *port) | ||
600 | { | ||
601 | if (port->mapbase == 0xffe00000) | ||
602 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | ||
603 | if (port->mapbase == 0xffe08000) | ||
604 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | ||
605 | return 1; | ||
606 | } | ||
591 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) | 607 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) |
592 | static inline int sci_rxd_in(struct uart_port *port) | 608 | static inline int sci_rxd_in(struct uart_port *port) |
593 | { | 609 | { |
@@ -698,7 +714,8 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
698 | * -- Mitch Davis - 15 Jul 2000 | 714 | * -- Mitch Davis - 15 Jul 2000 |
699 | */ | 715 | */ |
700 | 716 | ||
701 | #if defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 717 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) || \ |
718 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | ||
702 | defined(CONFIG_CPU_SUBTYPE_SH7785) | 719 | defined(CONFIG_CPU_SUBTYPE_SH7785) |
703 | #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) | 720 | #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) |
704 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 721 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |