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-rw-r--r--drivers/serial/sh-sci.c32
-rw-r--r--drivers/serial/sh-sci.h27
2 files changed, 36 insertions, 23 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 969106187718..8fdafc27fce8 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -42,14 +42,12 @@
42#include <linux/console.h> 42#include <linux/console.h>
43#include <linux/platform_device.h> 43#include <linux/platform_device.h>
44#include <linux/serial_sci.h> 44#include <linux/serial_sci.h>
45
46#ifdef CONFIG_CPU_FREQ
47#include <linux/notifier.h> 45#include <linux/notifier.h>
48#include <linux/cpufreq.h> 46#include <linux/cpufreq.h>
49#endif 47#include <linux/clk.h>
50
51#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
52#include <linux/ctype.h> 48#include <linux/ctype.h>
49
50#ifdef CONFIG_SUPERH
53#include <asm/clock.h> 51#include <asm/clock.h>
54#include <asm/sh_bios.h> 52#include <asm/sh_bios.h>
55#include <asm/kgdb.h> 53#include <asm/kgdb.h>
@@ -80,7 +78,7 @@ struct sci_port {
80 struct timer_list break_timer; 78 struct timer_list break_timer;
81 int break_flag; 79 int break_flag;
82 80
83#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) 81#ifdef CONFIG_SUPERH
84 /* Port clock */ 82 /* Port clock */
85 struct clk *clk; 83 struct clk *clk;
86#endif 84#endif
@@ -365,21 +363,19 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
365static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 363static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
366{ 364{
367 unsigned int fcr_val = 0; 365 unsigned int fcr_val = 0;
366 unsigned short data;
368 367
369 if (cflag & CRTSCTS) { 368 if (port->mapbase == 0xffe00000) {
370 fcr_val |= SCFCR_MCE; 369 data = ctrl_inw(PSCR);
371 370 data &= ~0x03cf;
372 ctrl_outw(0x0000, PORT_PSCR); 371 if (cflag & CRTSCTS)
373 } else { 372 fcr_val |= SCFCR_MCE;
374 unsigned short data; 373 else
375 374 data |= 0x0340;
376 data = ctrl_inw(PORT_PSCR);
377 data &= 0x033f;
378 data |= 0x0400;
379 ctrl_outw(data, PORT_PSCR);
380 375
381 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0); 376 ctrl_outw(data, PSCR);
382 } 377 }
378 /* SCIF1 and SCIF2 should be setup by board code */
383 379
384 sci_out(port, SCFCR, fcr_val); 380 sci_out(port, SCFCR, fcr_val);
385} 381}
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index fa8700a968fc..eb84833233fd 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -76,12 +76,13 @@
76# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ 76# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */
77# define SCIF_ONLY 77# define SCIF_ONLY
78#elif defined(CONFIG_CPU_SUBTYPE_SH7722) 78#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
79# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ 79# define PADR 0xA4050120
80# define SCSPTR0 SCPDR0 80# define PSDR 0xA405013e
81# define PWDR 0xA4050166
82# define PSCR 0xA405011E
81# define SCIF_ORER 0x0001 /* overrun error bit */ 83# define SCIF_ORER 0x0001 /* overrun error bit */
82# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 84# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
83# define SCIF_ONLY 85# define SCIF_ONLY
84# define PORT_PSCR 0xA405011E
85#elif defined(CONFIG_CPU_SUBTYPE_SH7366) 86#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
86# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ 87# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
87# define SCSPTR0 SCPDR0 88# define SCSPTR0 SCPDR0
@@ -320,7 +321,7 @@
320 unsigned int addr = port->mapbase + (offset); \ 321 unsigned int addr = port->mapbase + (offset); \
321 if ((size) == 8) { \ 322 if ((size) == 8) { \
322 ctrl_outb(value, addr); \ 323 ctrl_outb(value, addr); \
323 } else { \ 324 } else if ((size) == 16) { \
324 ctrl_outw(value, addr); \ 325 ctrl_outw(value, addr); \
325 } 326 }
326 327
@@ -451,7 +452,11 @@ SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)
451SCIF_FNS(SCLSR, 0, 0, 0x28, 16) 452SCIF_FNS(SCLSR, 0, 0, 0x28, 16)
452#else 453#else
453SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) 454SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
455#if defined(CONFIG_CPU_SUBTYPE_SH7722)
456SCIF_FNS(SCSPTR, 0, 0, 0, 0)
457#else
454SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) 458SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
459#endif
455SCIF_FNS(SCLSR, 0, 0, 0x24, 16) 460SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
456#endif 461#endif
457#endif 462#endif
@@ -593,13 +598,25 @@ static inline int sci_rxd_in(struct uart_port *port)
593 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 598 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
594 return 1; 599 return 1;
595} 600}
596#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366) 601#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
597static inline int sci_rxd_in(struct uart_port *port) 602static inline int sci_rxd_in(struct uart_port *port)
598{ 603{
599 if (port->mapbase == 0xffe00000) 604 if (port->mapbase == 0xffe00000)
600 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ 605 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
601 return 1; 606 return 1;
602} 607}
608#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
609static inline int sci_rxd_in(struct uart_port *port)
610{
611 if (port->mapbase == 0xffe00000)
612 return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */
613 if (port->mapbase == 0xffe10000)
614 return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */
615 if (port->mapbase == 0xffe20000)
616 return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */
617
618 return 1;
619}
603#elif defined(CONFIG_CPU_SUBTYPE_SH7723) 620#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
604static inline int sci_rxd_in(struct uart_port *port) 621static inline int sci_rxd_in(struct uart_port *port)
605{ 622{