aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/serial
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/21285.c10
-rw-r--r--drivers/serial/68328serial.c26
-rw-r--r--drivers/serial/68360serial.c10
-rw-r--r--drivers/serial/8250.c59
-rw-r--r--drivers/serial/8250_early.c57
-rw-r--r--drivers/serial/8250_pci.c13
-rw-r--r--drivers/serial/Kconfig56
-rw-r--r--drivers/serial/Makefile4
-rw-r--r--drivers/serial/altera_uart.c2
-rw-r--r--drivers/serial/apbuart.c2
-rw-r--r--drivers/serial/atmel_serial.c11
-rw-r--r--drivers/serial/bfin_5xx.c7
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_core.c6
-rw-r--r--drivers/serial/crisv10.c23
-rw-r--r--drivers/serial/imx.c10
-rw-r--r--drivers/serial/ioc3_serial.c9
-rw-r--r--drivers/serial/ioc4_serial.c9
-rw-r--r--drivers/serial/kgdboc.c18
-rw-r--r--drivers/serial/max3100.c7
-rw-r--r--drivers/serial/max3107-aava.c344
-rw-r--r--drivers/serial/max3107.c1197
-rw-r--r--drivers/serial/max3107.h441
-rw-r--r--drivers/serial/mcf.c31
-rw-r--r--drivers/serial/mfd.c1498
-rw-r--r--drivers/serial/mpc52xx_uart.c153
-rw-r--r--drivers/serial/mrst_max3110.c844
-rw-r--r--drivers/serial/mrst_max3110.h59
-rw-r--r--drivers/serial/nwpserial.c4
-rw-r--r--drivers/serial/of_serial.c6
-rw-r--r--drivers/serial/s5pv210.c8
-rw-r--r--drivers/serial/samsung.c9
-rw-r--r--drivers/serial/serial_core.c288
-rw-r--r--drivers/serial/serial_cs.c68
-rw-r--r--drivers/serial/sh-sci.c42
-rw-r--r--drivers/serial/sh-sci.h29
-rw-r--r--drivers/serial/sn_console.c6
-rw-r--r--drivers/serial/sunhv.c12
-rw-r--r--drivers/serial/sunsab.c14
-rw-r--r--drivers/serial/sunsu.c12
-rw-r--r--drivers/serial/sunzilog.c22
-rw-r--r--drivers/serial/timbuart.c6
-rw-r--r--drivers/serial/uartlite.c5
-rw-r--r--drivers/serial/ucc_uart.c4
43 files changed, 5028 insertions, 413 deletions
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c
index 8681f1345056..d89aa38c5cf0 100644
--- a/drivers/serial/21285.c
+++ b/drivers/serial/21285.c
@@ -216,7 +216,7 @@ serial21285_set_termios(struct uart_port *port, struct ktermios *termios,
216 struct ktermios *old) 216 struct ktermios *old)
217{ 217{
218 unsigned long flags; 218 unsigned long flags;
219 unsigned int baud, quot, h_lcr; 219 unsigned int baud, quot, h_lcr, b;
220 220
221 /* 221 /*
222 * We don't support modem control lines. 222 * We don't support modem control lines.
@@ -234,12 +234,8 @@ serial21285_set_termios(struct uart_port *port, struct ktermios *termios,
234 */ 234 */
235 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 235 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
236 quot = uart_get_divisor(port, baud); 236 quot = uart_get_divisor(port, baud);
237 237 b = port->uartclk / (16 * quot);
238 if (port->state && port->state->port.tty) { 238 tty_termios_encode_baud_rate(termios, b, b);
239 struct tty_struct *tty = port->state->port.tty;
240 unsigned int b = port->uartclk / (16 * quot);
241 tty_encode_baud_rate(tty, b, b);
242 }
243 239
244 switch (termios->c_cflag & CSIZE) { 240 switch (termios->c_cflag & CSIZE) {
245 case CS5: 241 case CS5:
diff --git a/drivers/serial/68328serial.c b/drivers/serial/68328serial.c
index 30463862603b..7356a56ac458 100644
--- a/drivers/serial/68328serial.c
+++ b/drivers/serial/68328serial.c
@@ -78,10 +78,6 @@ struct m68k_serial *m68k_consinfo = 0;
78 78
79#define M68K_CLOCK (16667000) /* FIXME: 16MHz is likely wrong */ 79#define M68K_CLOCK (16667000) /* FIXME: 16MHz is likely wrong */
80 80
81#ifdef CONFIG_CONSOLE
82extern wait_queue_head_t keypress_wait;
83#endif
84
85struct tty_driver *serial_driver; 81struct tty_driver *serial_driver;
86 82
87/* number of characters left in xmit buffer before we ask for more */ 83/* number of characters left in xmit buffer before we ask for more */
@@ -102,19 +98,13 @@ static void change_speed(struct m68k_serial *info);
102 * Setup for console. Argument comes from the boot command line. 98 * Setup for console. Argument comes from the boot command line.
103 */ 99 */
104 100
105#if defined(CONFIG_M68EZ328ADS) || defined(CONFIG_ALMA_ANS) || defined(CONFIG_DRAGONIXVZ) 101/* note: this is messy, but it works, again, perhaps defined somewhere else?*/
106#define CONSOLE_BAUD_RATE 115200 102#ifdef CONFIG_M68VZ328
107#define DEFAULT_CBAUD B115200 103#define CONSOLE_BAUD_RATE 19200
108#else 104#define DEFAULT_CBAUD B19200
109 /* (es) */
110 /* note: this is messy, but it works, again, perhaps defined somewhere else?*/
111 #ifdef CONFIG_M68VZ328
112 #define CONSOLE_BAUD_RATE 19200
113 #define DEFAULT_CBAUD B19200
114 #endif
115 /* (/es) */
116#endif 105#endif
117 106
107
118#ifndef CONSOLE_BAUD_RATE 108#ifndef CONSOLE_BAUD_RATE
119#define CONSOLE_BAUD_RATE 9600 109#define CONSOLE_BAUD_RATE 9600
120#define DEFAULT_CBAUD B9600 110#define DEFAULT_CBAUD B9600
@@ -300,10 +290,6 @@ static void receive_chars(struct m68k_serial *info, unsigned short rx)
300 return; 290 return;
301#endif /* CONFIG_MAGIC_SYSRQ */ 291#endif /* CONFIG_MAGIC_SYSRQ */
302 } 292 }
303 /* It is a 'keyboard interrupt' ;-) */
304#ifdef CONFIG_CONSOLE
305 wake_up(&keypress_wait);
306#endif
307 } 293 }
308 294
309 if(!tty) 295 if(!tty)
@@ -1243,7 +1229,9 @@ static int block_til_ready(struct tty_struct *tty, struct file * filp,
1243 retval = -ERESTARTSYS; 1229 retval = -ERESTARTSYS;
1244 break; 1230 break;
1245 } 1231 }
1232 tty_unlock();
1246 schedule(); 1233 schedule();
1234 tty_lock();
1247 } 1235 }
1248 current->state = TASK_RUNNING; 1236 current->state = TASK_RUNNING;
1249 remove_wait_queue(&info->open_wait, &wait); 1237 remove_wait_queue(&info->open_wait, &wait);
diff --git a/drivers/serial/68360serial.c b/drivers/serial/68360serial.c
index 24661cd5e4fb..0dff3bbddc8b 100644
--- a/drivers/serial/68360serial.c
+++ b/drivers/serial/68360serial.c
@@ -1705,7 +1705,6 @@ static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1705 printk("jiff=%lu...", jiffies); 1705 printk("jiff=%lu...", jiffies);
1706#endif 1706#endif
1707 1707
1708 lock_kernel();
1709 /* We go through the loop at least once because we can't tell 1708 /* We go through the loop at least once because we can't tell
1710 * exactly when the last character exits the shifter. There can 1709 * exactly when the last character exits the shifter. There can
1711 * be at least two characters waiting to be sent after the buffers 1710 * be at least two characters waiting to be sent after the buffers
@@ -1734,7 +1733,6 @@ static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1734 bdp--; 1733 bdp--;
1735 } while (bdp->status & BD_SC_READY); 1734 } while (bdp->status & BD_SC_READY);
1736 current->state = TASK_RUNNING; 1735 current->state = TASK_RUNNING;
1737 unlock_kernel();
1738#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT 1736#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1739 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); 1737 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1740#endif 1738#endif
@@ -1862,7 +1860,9 @@ static int block_til_ready(struct tty_struct *tty, struct file * filp,
1862 printk("block_til_ready blocking: ttys%d, count = %d\n", 1860 printk("block_til_ready blocking: ttys%d, count = %d\n",
1863 info->line, state->count); 1861 info->line, state->count);
1864#endif 1862#endif
1863 tty_unlock();
1865 schedule(); 1864 schedule();
1865 tty_lock();
1866 } 1866 }
1867 current->state = TASK_RUNNING; 1867 current->state = TASK_RUNNING;
1868 remove_wait_queue(&info->open_wait, &wait); 1868 remove_wait_queue(&info->open_wait, &wait);
@@ -2649,7 +2649,7 @@ static int __init rs_360_init(void)
2649 sup->tfcr = SMC_EB; 2649 sup->tfcr = SMC_EB;
2650 2650
2651 /* Set this to 1 for now, so we get single 2651 /* Set this to 1 for now, so we get single
2652 * character interrupts. Using idle charater 2652 * character interrupts. Using idle character
2653 * time requires some additional tuning. 2653 * time requires some additional tuning.
2654 */ 2654 */
2655 sup->mrblr = 1; 2655 sup->mrblr = 1;
@@ -2728,7 +2728,7 @@ static int __init rs_360_init(void)
2728 up->tfcr = SMC_EB; 2728 up->tfcr = SMC_EB;
2729 2729
2730 /* Set this to 1 for now, so we get single 2730 /* Set this to 1 for now, so we get single
2731 * character interrupts. Using idle charater 2731 * character interrupts. Using idle character
2732 * time requires some additional tuning. 2732 * time requires some additional tuning.
2733 */ 2733 */
2734 up->mrblr = 1; 2734 up->mrblr = 1;
@@ -2886,7 +2886,7 @@ int serial_console_setup( struct console *co, char *options)
2886 sup->tfcr = SMC_EB; 2886 sup->tfcr = SMC_EB;
2887 2887
2888 /* Set this to 1 for now, so we get single 2888 /* Set this to 1 for now, so we get single
2889 * character interrupts. Using idle charater 2889 * character interrupts. Using idle character
2890 * time requires some additional tuning. 2890 * time requires some additional tuning.
2891 */ 2891 */
2892 sup->mrblr = 1; 2892 sup->mrblr = 1;
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 891e1dd65f24..24110f6f61e0 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -241,7 +241,7 @@ static const struct serial8250_config uart_config[] = {
241 .fifo_size = 128, 241 .fifo_size = 128,
242 .tx_loadsz = 128, 242 .tx_loadsz = 128,
243 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, 243 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
244 .flags = UART_CAP_FIFO, 244 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
245 }, 245 },
246 [PORT_16654] = { 246 [PORT_16654] = {
247 .name = "ST16654", 247 .name = "ST16654",
@@ -300,9 +300,16 @@ static const struct serial8250_config uart_config[] = {
300 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, 300 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
301 .flags = UART_CAP_FIFO | UART_CAP_AFE, 301 .flags = UART_CAP_FIFO | UART_CAP_AFE,
302 }, 302 },
303 [PORT_U6_16550A] = {
304 .name = "U6_16550A",
305 .fifo_size = 64,
306 .tx_loadsz = 64,
307 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
308 .flags = UART_CAP_FIFO | UART_CAP_AFE,
309 },
303}; 310};
304 311
305#if defined (CONFIG_SERIAL_8250_AU1X00) 312#if defined(CONFIG_MIPS_ALCHEMY)
306 313
307/* Au1x00 UART hardware has a weird register layout */ 314/* Au1x00 UART hardware has a weird register layout */
308static const u8 au_io_in_map[] = { 315static const u8 au_io_in_map[] = {
@@ -422,7 +429,6 @@ static unsigned int mem32_serial_in(struct uart_port *p, int offset)
422 return readl(p->membase + offset); 429 return readl(p->membase + offset);
423} 430}
424 431
425#ifdef CONFIG_SERIAL_8250_AU1X00
426static unsigned int au_serial_in(struct uart_port *p, int offset) 432static unsigned int au_serial_in(struct uart_port *p, int offset)
427{ 433{
428 offset = map_8250_in_reg(p, offset) << p->regshift; 434 offset = map_8250_in_reg(p, offset) << p->regshift;
@@ -434,7 +440,6 @@ static void au_serial_out(struct uart_port *p, int offset, int value)
434 offset = map_8250_out_reg(p, offset) << p->regshift; 440 offset = map_8250_out_reg(p, offset) << p->regshift;
435 __raw_writel(value, p->membase + offset); 441 __raw_writel(value, p->membase + offset);
436} 442}
437#endif
438 443
439static unsigned int tsi_serial_in(struct uart_port *p, int offset) 444static unsigned int tsi_serial_in(struct uart_port *p, int offset)
440{ 445{
@@ -503,12 +508,11 @@ static void set_io_from_upio(struct uart_port *p)
503 p->serial_out = mem32_serial_out; 508 p->serial_out = mem32_serial_out;
504 break; 509 break;
505 510
506#ifdef CONFIG_SERIAL_8250_AU1X00
507 case UPIO_AU: 511 case UPIO_AU:
508 p->serial_in = au_serial_in; 512 p->serial_in = au_serial_in;
509 p->serial_out = au_serial_out; 513 p->serial_out = au_serial_out;
510 break; 514 break;
511#endif 515
512 case UPIO_TSI: 516 case UPIO_TSI:
513 p->serial_in = tsi_serial_in; 517 p->serial_in = tsi_serial_in;
514 p->serial_out = tsi_serial_out; 518 p->serial_out = tsi_serial_out;
@@ -535,9 +539,7 @@ serial_out_sync(struct uart_8250_port *up, int offset, int value)
535 switch (p->iotype) { 539 switch (p->iotype) {
536 case UPIO_MEM: 540 case UPIO_MEM:
537 case UPIO_MEM32: 541 case UPIO_MEM32:
538#ifdef CONFIG_SERIAL_8250_AU1X00
539 case UPIO_AU: 542 case UPIO_AU:
540#endif
541 case UPIO_DWAPB: 543 case UPIO_DWAPB:
542 p->serial_out(p, offset, value); 544 p->serial_out(p, offset, value);
543 p->serial_in(p, UART_LCR); /* safe, no side-effects */ 545 p->serial_in(p, UART_LCR); /* safe, no side-effects */
@@ -573,7 +575,7 @@ static inline void _serial_dl_write(struct uart_8250_port *up, int value)
573 serial_outp(up, UART_DLM, value >> 8 & 0xff); 575 serial_outp(up, UART_DLM, value >> 8 & 0xff);
574} 576}
575 577
576#if defined(CONFIG_SERIAL_8250_AU1X00) 578#if defined(CONFIG_MIPS_ALCHEMY)
577/* Au1x00 haven't got a standard divisor latch */ 579/* Au1x00 haven't got a standard divisor latch */
578static int serial_dl_read(struct uart_8250_port *up) 580static int serial_dl_read(struct uart_8250_port *up)
579{ 581{
@@ -1075,6 +1077,15 @@ static void autoconfig_16550a(struct uart_8250_port *up)
1075 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 "); 1077 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1076 } 1078 }
1077 serial_outp(up, UART_IER, iersave); 1079 serial_outp(up, UART_IER, iersave);
1080
1081 /*
1082 * We distinguish between 16550A and U6 16550A by counting
1083 * how many bytes are in the FIFO.
1084 */
1085 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1086 up->port.type = PORT_U6_16550A;
1087 up->capabilities |= UART_CAP_AFE;
1088 }
1078} 1089}
1079 1090
1080/* 1091/*
@@ -2229,9 +2240,9 @@ static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int
2229 return quot; 2240 return quot;
2230} 2241}
2231 2242
2232static void 2243void
2233serial8250_set_termios(struct uart_port *port, struct ktermios *termios, 2244serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2234 struct ktermios *old) 2245 struct ktermios *old)
2235{ 2246{
2236 struct uart_8250_port *up = (struct uart_8250_port *)port; 2247 struct uart_8250_port *up = (struct uart_8250_port *)port;
2237 unsigned char cval, fcr = 0; 2248 unsigned char cval, fcr = 0;
@@ -2407,16 +2418,22 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2407 if (tty_termios_baud_rate(termios)) 2418 if (tty_termios_baud_rate(termios))
2408 tty_termios_encode_baud_rate(termios, baud, baud); 2419 tty_termios_encode_baud_rate(termios, baud, baud);
2409} 2420}
2421EXPORT_SYMBOL(serial8250_do_set_termios);
2410 2422
2411static void 2423static void
2412serial8250_set_ldisc(struct uart_port *port) 2424serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2425 struct ktermios *old)
2413{ 2426{
2414 int line = port->line; 2427 if (port->set_termios)
2415 2428 port->set_termios(port, termios, old);
2416 if (line >= port->state->port.tty->driver->num) 2429 else
2417 return; 2430 serial8250_do_set_termios(port, termios, old);
2431}
2418 2432
2419 if (port->state->port.tty->ldisc->ops->num == N_PPS) { 2433static void
2434serial8250_set_ldisc(struct uart_port *port, int new)
2435{
2436 if (new == N_PPS) {
2420 port->flags |= UPF_HARDPPS_CD; 2437 port->flags |= UPF_HARDPPS_CD;
2421 serial8250_enable_ms(port); 2438 serial8250_enable_ms(port);
2422 } else 2439 } else
@@ -2596,11 +2613,9 @@ static void serial8250_config_port(struct uart_port *port, int flags)
2596 if (flags & UART_CONFIG_TYPE) 2613 if (flags & UART_CONFIG_TYPE)
2597 autoconfig(up, probeflags); 2614 autoconfig(up, probeflags);
2598 2615
2599#ifdef CONFIG_SERIAL_8250_AU1X00
2600 /* if access method is AU, it is a 16550 with a quirk */ 2616 /* if access method is AU, it is a 16550 with a quirk */
2601 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU) 2617 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
2602 up->bugs |= UART_BUG_NOMSR; 2618 up->bugs |= UART_BUG_NOMSR;
2603#endif
2604 2619
2605 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) 2620 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2606 autoconfig_irq(up); 2621 autoconfig_irq(up);
@@ -2994,6 +3009,7 @@ static int __devinit serial8250_probe(struct platform_device *dev)
2994 port.type = p->type; 3009 port.type = p->type;
2995 port.serial_in = p->serial_in; 3010 port.serial_in = p->serial_in;
2996 port.serial_out = p->serial_out; 3011 port.serial_out = p->serial_out;
3012 port.set_termios = p->set_termios;
2997 port.dev = &dev->dev; 3013 port.dev = &dev->dev;
2998 port.irqflags |= irqflag; 3014 port.irqflags |= irqflag;
2999 ret = serial8250_register_port(&port); 3015 ret = serial8250_register_port(&port);
@@ -3157,6 +3173,9 @@ int serial8250_register_port(struct uart_port *port)
3157 uart->port.serial_in = port->serial_in; 3173 uart->port.serial_in = port->serial_in;
3158 if (port->serial_out) 3174 if (port->serial_out)
3159 uart->port.serial_out = port->serial_out; 3175 uart->port.serial_out = port->serial_out;
3176 /* Possibly override set_termios call */
3177 if (port->set_termios)
3178 uart->port.set_termios = port->set_termios;
3160 3179
3161 ret = uart_add_one_port(&serial8250_reg, &uart->port); 3180 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3162 if (ret == 0) 3181 if (ret == 0)
diff --git a/drivers/serial/8250_early.c b/drivers/serial/8250_early.c
index f279745e9fef..b745792ec25a 100644
--- a/drivers/serial/8250_early.c
+++ b/drivers/serial/8250_early.c
@@ -19,9 +19,11 @@
19 * The user can specify the device directly, e.g., 19 * The user can specify the device directly, e.g.,
20 * earlycon=uart8250,io,0x3f8,9600n8 20 * earlycon=uart8250,io,0x3f8,9600n8
21 * earlycon=uart8250,mmio,0xff5e0000,115200n8 21 * earlycon=uart8250,mmio,0xff5e0000,115200n8
22 * earlycon=uart8250,mmio32,0xff5e0000,115200n8
22 * or 23 * or
23 * console=uart8250,io,0x3f8,9600n8 24 * console=uart8250,io,0x3f8,9600n8
24 * console=uart8250,mmio,0xff5e0000,115200n8 25 * console=uart8250,mmio,0xff5e0000,115200n8
26 * console=uart8250,mmio32,0xff5e0000,115200n8
25 */ 27 */
26 28
27#include <linux/tty.h> 29#include <linux/tty.h>
@@ -48,18 +50,31 @@ static struct early_serial8250_device early_device;
48 50
49static unsigned int __init serial_in(struct uart_port *port, int offset) 51static unsigned int __init serial_in(struct uart_port *port, int offset)
50{ 52{
51 if (port->iotype == UPIO_MEM) 53 switch (port->iotype) {
54 case UPIO_MEM:
52 return readb(port->membase + offset); 55 return readb(port->membase + offset);
53 else 56 case UPIO_MEM32:
57 return readl(port->membase + (offset << 2));
58 case UPIO_PORT:
54 return inb(port->iobase + offset); 59 return inb(port->iobase + offset);
60 default:
61 return 0;
62 }
55} 63}
56 64
57static void __init serial_out(struct uart_port *port, int offset, int value) 65static void __init serial_out(struct uart_port *port, int offset, int value)
58{ 66{
59 if (port->iotype == UPIO_MEM) 67 switch (port->iotype) {
68 case UPIO_MEM:
60 writeb(value, port->membase + offset); 69 writeb(value, port->membase + offset);
61 else 70 break;
71 case UPIO_MEM32:
72 writel(value, port->membase + (offset << 2));
73 break;
74 case UPIO_PORT:
62 outb(value, port->iobase + offset); 75 outb(value, port->iobase + offset);
76 break;
77 }
63} 78}
64 79
65#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 80#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
@@ -137,15 +152,21 @@ static int __init parse_options(struct early_serial8250_device *device,
137 char *options) 152 char *options)
138{ 153{
139 struct uart_port *port = &device->port; 154 struct uart_port *port = &device->port;
140 int mmio, length; 155 int mmio, mmio32, length;
141 156
142 if (!options) 157 if (!options)
143 return -ENODEV; 158 return -ENODEV;
144 159
145 port->uartclk = BASE_BAUD * 16; 160 port->uartclk = BASE_BAUD * 16;
146 if (!strncmp(options, "mmio,", 5)) { 161
147 port->iotype = UPIO_MEM; 162 mmio = !strncmp(options, "mmio,", 5);
148 port->mapbase = simple_strtoul(options + 5, &options, 0); 163 mmio32 = !strncmp(options, "mmio32,", 7);
164 if (mmio || mmio32) {
165 port->iotype = (mmio ? UPIO_MEM : UPIO_MEM32);
166 port->mapbase = simple_strtoul(options + (mmio ? 5 : 7),
167 &options, 0);
168 if (mmio32)
169 port->regshift = 2;
149#ifdef CONFIG_FIX_EARLYCON_MEM 170#ifdef CONFIG_FIX_EARLYCON_MEM
150 set_fixmap_nocache(FIX_EARLYCON_MEM_BASE, 171 set_fixmap_nocache(FIX_EARLYCON_MEM_BASE,
151 port->mapbase & PAGE_MASK); 172 port->mapbase & PAGE_MASK);
@@ -157,11 +178,10 @@ static int __init parse_options(struct early_serial8250_device *device,
157 if (!port->membase) { 178 if (!port->membase) {
158 printk(KERN_ERR "%s: Couldn't ioremap 0x%llx\n", 179 printk(KERN_ERR "%s: Couldn't ioremap 0x%llx\n",
159 __func__, 180 __func__,
160 (unsigned long long)port->mapbase); 181 (unsigned long long) port->mapbase);
161 return -ENOMEM; 182 return -ENOMEM;
162 } 183 }
163#endif 184#endif
164 mmio = 1;
165 } else if (!strncmp(options, "io,", 3)) { 185 } else if (!strncmp(options, "io,", 3)) {
166 port->iotype = UPIO_PORT; 186 port->iotype = UPIO_PORT;
167 port->iobase = simple_strtoul(options + 3, &options, 0); 187 port->iobase = simple_strtoul(options + 3, &options, 0);
@@ -181,11 +201,18 @@ static int __init parse_options(struct early_serial8250_device *device,
181 device->baud); 201 device->baud);
182 } 202 }
183 203
184 printk(KERN_INFO "Early serial console at %s 0x%llx (options '%s')\n", 204 if (mmio || mmio32)
185 mmio ? "MMIO" : "I/O port", 205 printk(KERN_INFO
186 mmio ? (unsigned long long) port->mapbase 206 "Early serial console at MMIO%s 0x%llu (options '%s')\n",
187 : (unsigned long long) port->iobase, 207 mmio32 ? "32" : "",
188 device->options); 208 (unsigned long long)port->mapbase,
209 device->options);
210 else
211 printk(KERN_INFO
212 "Early serial console at I/O port 0x%lu (options '%s')\n",
213 port->iobase,
214 device->options);
215
189 return 0; 216 return 0;
190} 217}
191 218
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 746a44621d91..53be4d35a0aa 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -994,6 +994,7 @@ static int skip_tx_en_setup(struct serial_private *priv,
994#define PCI_DEVICE_ID_TITAN_800E 0xA014 994#define PCI_DEVICE_ID_TITAN_800E 0xA014
995#define PCI_DEVICE_ID_TITAN_200EI 0xA016 995#define PCI_DEVICE_ID_TITAN_200EI 0xA016
996#define PCI_DEVICE_ID_TITAN_200EISI 0xA017 996#define PCI_DEVICE_ID_TITAN_200EISI 0xA017
997#define PCI_DEVICE_ID_OXSEMI_16PCI958 0x9538
997 998
998/* Unknown vendors/cards - this should not be in linux/pci_ids.h */ 999/* Unknown vendors/cards - this should not be in linux/pci_ids.h */
999#define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584 1000#define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584
@@ -1542,6 +1543,8 @@ enum pci_board_num_t {
1542 pbn_b2_4_921600, 1543 pbn_b2_4_921600,
1543 pbn_b2_8_921600, 1544 pbn_b2_8_921600,
1544 1545
1546 pbn_b2_8_1152000,
1547
1545 pbn_b2_bt_1_115200, 1548 pbn_b2_bt_1_115200,
1546 pbn_b2_bt_2_115200, 1549 pbn_b2_bt_2_115200,
1547 pbn_b2_bt_4_115200, 1550 pbn_b2_bt_4_115200,
@@ -1960,6 +1963,13 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1960 .uart_offset = 8, 1963 .uart_offset = 8,
1961 }, 1964 },
1962 1965
1966 [pbn_b2_8_1152000] = {
1967 .flags = FL_BASE2,
1968 .num_ports = 8,
1969 .base_baud = 1152000,
1970 .uart_offset = 8,
1971 },
1972
1963 [pbn_b2_bt_1_115200] = { 1973 [pbn_b2_bt_1_115200] = {
1964 .flags = FL_BASE2|FL_BASE_BARS, 1974 .flags = FL_BASE2|FL_BASE_BARS,
1965 .num_ports = 1, 1975 .num_ports = 1,
@@ -2875,6 +2885,9 @@ static struct pci_device_id serial_pci_tbl[] = {
2875 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI952, 2885 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI952,
2876 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2886 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2877 pbn_b0_bt_2_921600 }, 2887 pbn_b0_bt_2_921600 },
2888 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI958,
2889 PCI_ANY_ID , PCI_ANY_ID, 0, 0,
2890 pbn_b2_8_1152000 },
2878 2891
2879 /* 2892 /*
2880 * Oxford Semiconductor Inc. Tornado PCI express device range. 2893 * Oxford Semiconductor Inc. Tornado PCI express device range.
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 8b23165bc5dc..12900f7083b0 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -258,14 +258,6 @@ config SERIAL_8250_ACORN
258 system, say Y to this option. The driver can handle 1, 2, or 3 port 258 system, say Y to this option. The driver can handle 1, 2, or 3 port
259 cards. If unsure, say N. 259 cards. If unsure, say N.
260 260
261config SERIAL_8250_AU1X00
262 bool "Au1x00 serial port support"
263 depends on SERIAL_8250 != n && SOC_AU1X00
264 help
265 If you have an Au1x00 SOC based board and want to use the serial port,
266 say Y to this option. The driver can handle up to 4 serial ports,
267 depending on the SOC. If unsure, say N.
268
269config SERIAL_8250_RM9K 261config SERIAL_8250_RM9K
270 bool "Support for MIPS RM9xxx integrated serial port" 262 bool "Support for MIPS RM9xxx integrated serial port"
271 depends on SERIAL_8250 != n && SERIAL_RM9000 263 depends on SERIAL_8250 != n && SERIAL_RM9000
@@ -544,12 +536,13 @@ config SERIAL_S3C6400
544 536
545config SERIAL_S5PV210 537config SERIAL_S5PV210
546 tristate "Samsung S5PV210 Serial port support" 538 tristate "Samsung S5PV210 Serial port support"
547 depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442) 539 depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442 || CPU_S5PV310)
548 select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210 540 select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_S5PV310)
549 default y 541 default y
550 help 542 help
551 Serial port support for Samsung's S5P Family of SoC's 543 Serial port support for Samsung's S5P Family of SoC's
552 544
545
553config SERIAL_MAX3100 546config SERIAL_MAX3100
554 tristate "MAX3100 support" 547 tristate "MAX3100 support"
555 depends on SPI 548 depends on SPI
@@ -557,6 +550,22 @@ config SERIAL_MAX3100
557 help 550 help
558 MAX3100 chip support 551 MAX3100 chip support
559 552
553config SERIAL_MAX3107
554 tristate "MAX3107 support"
555 depends on SPI
556 select SERIAL_CORE
557 help
558 MAX3107 chip support
559
560config SERIAL_MAX3107_AAVA
561 tristate "MAX3107 AAVA platform support"
562 depends on X86_MRST && SERIAL_MAX3107 && GPIOLIB
563 select SERIAL_CORE
564 help
565 Support for the MAX3107 chip configuration found on the AAVA
566 platform. Includes the extra initialisation and GPIO support
567 neded for this device.
568
560config SERIAL_DZ 569config SERIAL_DZ
561 bool "DECstation DZ serial driver" 570 bool "DECstation DZ serial driver"
562 depends on MACH_DECSTATION && 32BIT 571 depends on MACH_DECSTATION && 32BIT
@@ -698,6 +707,33 @@ config SERIAL_SA1100_CONSOLE
698 your boot loader (lilo or loadlin) about how to pass options to the 707 your boot loader (lilo or loadlin) about how to pass options to the
699 kernel at boot time.) 708 kernel at boot time.)
700 709
710config SERIAL_MRST_MAX3110
711 tristate "SPI UART driver for Max3110"
712 depends on SPI_DW_PCI
713 select SERIAL_CORE
714 select SERIAL_CORE_CONSOLE
715 help
716 This is the UART protocol driver for the MAX3110 device on
717 the Intel Moorestown platform. On other systems use the max3100
718 driver.
719
720config MRST_MAX3110_IRQ
721 boolean "Enable GPIO IRQ for Max3110 over Moorestown"
722 default n
723 depends on SERIAL_MRST_MAX3110 && GPIO_LANGWELL
724 help
725 This has to be enabled after Moorestown GPIO driver is loaded
726
727config SERIAL_MFD_HSU
728 tristate "Medfield High Speed UART support"
729 depends on PCI
730 select SERIAL_CORE
731
732config SERIAL_MFD_HSU_CONSOLE
733 boolean "Medfile HSU serial console support"
734 depends on SERIAL_MFD_HSU=y
735 select SERIAL_CORE_CONSOLE
736
701config SERIAL_BFIN 737config SERIAL_BFIN
702 tristate "Blackfin serial port support" 738 tristate "Blackfin serial port support"
703 depends on BLACKFIN 739 depends on BLACKFIN
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 208a85572c32..1ca4fd599ffe 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -46,6 +46,8 @@ obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
46obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o 46obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
47obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o 47obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
48obj-$(CONFIG_SERIAL_MAX3100) += max3100.o 48obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
49obj-$(CONFIG_SERIAL_MAX3107) += max3107.o
50obj-$(CONFIG_SERIAL_MAX3107_AAVA) += max3107-aava.o
49obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o 51obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
50obj-$(CONFIG_SERIAL_MUX) += mux.o 52obj-$(CONFIG_SERIAL_MUX) += mux.o
51obj-$(CONFIG_SERIAL_68328) += 68328serial.o 53obj-$(CONFIG_SERIAL_68328) += 68328serial.o
@@ -84,3 +86,5 @@ obj-$(CONFIG_SERIAL_TIMBERDALE) += timbuart.o
84obj-$(CONFIG_SERIAL_GRLIB_GAISLER_APBUART) += apbuart.o 86obj-$(CONFIG_SERIAL_GRLIB_GAISLER_APBUART) += apbuart.o
85obj-$(CONFIG_SERIAL_ALTERA_JTAGUART) += altera_jtaguart.o 87obj-$(CONFIG_SERIAL_ALTERA_JTAGUART) += altera_jtaguart.o
86obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o 88obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o
89obj-$(CONFIG_SERIAL_MRST_MAX3110) += mrst_max3110.o
90obj-$(CONFIG_SERIAL_MFD_HSU) += mfd.o
diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
index 0f1189605d21..f8d8a00554da 100644
--- a/drivers/serial/altera_uart.c
+++ b/drivers/serial/altera_uart.c
@@ -394,7 +394,7 @@ int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
394static void altera_uart_console_putc(struct uart_port *port, const char c) 394static void altera_uart_console_putc(struct uart_port *port, const char c)
395{ 395{
396 while (!(readl(port->membase + ALTERA_UART_STATUS_REG) & 396 while (!(readl(port->membase + ALTERA_UART_STATUS_REG) &
397 ALTERA_UART_STATUS_TRDY_MSK)) 397 ALTERA_UART_STATUS_TRDY_MSK))
398 cpu_relax(); 398 cpu_relax();
399 399
400 writel(c, port->membase + ALTERA_UART_TXDATA_REG); 400 writel(c, port->membase + ALTERA_UART_TXDATA_REG);
diff --git a/drivers/serial/apbuart.c b/drivers/serial/apbuart.c
index 0099b8692b60..cc01c650a144 100644
--- a/drivers/serial/apbuart.c
+++ b/drivers/serial/apbuart.c
@@ -551,7 +551,7 @@ static struct uart_driver grlib_apbuart_driver = {
551/* OF Platform Driver */ 551/* OF Platform Driver */
552/* ======================================================================== */ 552/* ======================================================================== */
553 553
554static int __devinit apbuart_probe(struct of_device *op, 554static int __devinit apbuart_probe(struct platform_device *op,
555 const struct of_device_id *match) 555 const struct of_device_id *match)
556{ 556{
557 int i = -1; 557 int i = -1;
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index a182def7007d..3892666b5fbd 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -217,7 +217,8 @@ void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
217 if (rs485conf->flags & SER_RS485_ENABLED) { 217 if (rs485conf->flags & SER_RS485_ENABLED) {
218 dev_dbg(port->dev, "Setting UART to RS485\n"); 218 dev_dbg(port->dev, "Setting UART to RS485\n");
219 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; 219 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
220 UART_PUT_TTGR(port, rs485conf->delay_rts_before_send); 220 if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
221 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
221 mode |= ATMEL_US_USMODE_RS485; 222 mode |= ATMEL_US_USMODE_RS485;
222 } else { 223 } else {
223 dev_dbg(port->dev, "Setting UART to RS232\n"); 224 dev_dbg(port->dev, "Setting UART to RS232\n");
@@ -292,7 +293,9 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
292 293
293 if (atmel_port->rs485.flags & SER_RS485_ENABLED) { 294 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
294 dev_dbg(port->dev, "Setting UART to RS485\n"); 295 dev_dbg(port->dev, "Setting UART to RS485\n");
295 UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send); 296 if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
297 UART_PUT_TTGR(port,
298 atmel_port->rs485.delay_rts_after_send);
296 mode |= ATMEL_US_USMODE_RS485; 299 mode |= ATMEL_US_USMODE_RS485;
297 } else { 300 } else {
298 dev_dbg(port->dev, "Setting UART to RS232\n"); 301 dev_dbg(port->dev, "Setting UART to RS232\n");
@@ -1211,7 +1214,9 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1211 1214
1212 if (atmel_port->rs485.flags & SER_RS485_ENABLED) { 1215 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1213 dev_dbg(port->dev, "Setting UART to RS485\n"); 1216 dev_dbg(port->dev, "Setting UART to RS485\n");
1214 UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send); 1217 if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
1218 UART_PUT_TTGR(port,
1219 atmel_port->rs485.delay_rts_after_send);
1215 mode |= ATMEL_US_USMODE_RS485; 1220 mode |= ATMEL_US_USMODE_RS485;
1216 } else { 1221 } else {
1217 dev_dbg(port->dev, "Setting UART to RS232\n"); 1222 dev_dbg(port->dev, "Setting UART to RS232\n");
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index 511cbf687877..a9eff2b18eab 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -957,15 +957,12 @@ bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
957 * Enable the IrDA function if tty->ldisc.num is N_IRDA. 957 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
958 * In other cases, disable IrDA function. 958 * In other cases, disable IrDA function.
959 */ 959 */
960static void bfin_serial_set_ldisc(struct uart_port *port) 960static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
961{ 961{
962 int line = port->line; 962 int line = port->line;
963 unsigned short val; 963 unsigned short val;
964 964
965 if (line >= port->state->port.tty->driver->num) 965 switch (ld) {
966 return;
967
968 switch (port->state->port.tty->termios->c_line) {
969 case N_IRDA: 966 case N_IRDA:
970 val = UART_GET_GCTL(&bfin_serial_ports[line]); 967 val = UART_GET_GCTL(&bfin_serial_ports[line]);
971 val |= (IREN | RPOLC); 968 val |= (IREN | RPOLC);
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index cd6cf575902e..f2b8adcc6c92 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -852,7 +852,7 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
852 */ 852 */
853 cpm_set_smc_fcr(up); 853 cpm_set_smc_fcr(up);
854 854
855 /* Using idle charater time requires some additional tuning. */ 855 /* Using idle character time requires some additional tuning. */
856 out_be16(&up->smc_mrblr, pinfo->rx_fifosize); 856 out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
857 out_be16(&up->smc_maxidl, pinfo->rx_fifosize); 857 out_be16(&up->smc_maxidl, pinfo->rx_fifosize);
858 out_be16(&up->smc_brklen, 0); 858 out_be16(&up->smc_brklen, 0);
@@ -1340,7 +1340,7 @@ static struct uart_driver cpm_reg = {
1340 1340
1341static int probe_index; 1341static int probe_index;
1342 1342
1343static int __devinit cpm_uart_probe(struct of_device *ofdev, 1343static int __devinit cpm_uart_probe(struct platform_device *ofdev,
1344 const struct of_device_id *match) 1344 const struct of_device_id *match)
1345{ 1345{
1346 int index = probe_index++; 1346 int index = probe_index++;
@@ -1364,7 +1364,7 @@ static int __devinit cpm_uart_probe(struct of_device *ofdev,
1364 return uart_add_one_port(&cpm_reg, &pinfo->port); 1364 return uart_add_one_port(&cpm_reg, &pinfo->port);
1365} 1365}
1366 1366
1367static int __devexit cpm_uart_remove(struct of_device *ofdev) 1367static int __devexit cpm_uart_remove(struct platform_device *ofdev)
1368{ 1368{
1369 struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev); 1369 struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev);
1370 return uart_remove_one_port(&cpm_reg, &pinfo->port); 1370 return uart_remove_one_port(&cpm_reg, &pinfo->port);
diff --git a/drivers/serial/crisv10.c b/drivers/serial/crisv10.c
index 31f172397af3..c856905bb3bd 100644
--- a/drivers/serial/crisv10.c
+++ b/drivers/serial/crisv10.c
@@ -3724,6 +3724,17 @@ rs_ioctl(struct tty_struct *tty, struct file * file,
3724 return e100_enable_rs485(tty, &rs485data); 3724 return e100_enable_rs485(tty, &rs485data);
3725 } 3725 }
3726 3726
3727 case TIOCGRS485:
3728 {
3729 struct serial_rs485 *rs485data =
3730 &(((struct e100_serial *)tty->driver_data)->rs485);
3731 /* This is the ioctl to get RS485 data from user-space */
3732 if (copy_to_user((struct serial_rs485 *) arg,
3733 rs485data,
3734 sizeof(serial_rs485)))
3735 return -EFAULT;
3736 break;
3737 }
3727 3738
3728 case TIOCSERWRRS485: 3739 case TIOCSERWRRS485:
3729 { 3740 {
@@ -3924,7 +3935,6 @@ static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
3924 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO 3935 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
3925 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k) 3936 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
3926 */ 3937 */
3927 lock_kernel();
3928 orig_jiffies = jiffies; 3938 orig_jiffies = jiffies;
3929 while (info->xmit.head != info->xmit.tail || /* More in send queue */ 3939 while (info->xmit.head != info->xmit.tail || /* More in send queue */
3930 (*info->ostatusadr & 0x007f) || /* more in FIFO */ 3940 (*info->ostatusadr & 0x007f) || /* more in FIFO */
@@ -3941,7 +3951,6 @@ static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
3941 curr_time_usec - info->last_tx_active_usec; 3951 curr_time_usec - info->last_tx_active_usec;
3942 } 3952 }
3943 set_current_state(TASK_RUNNING); 3953 set_current_state(TASK_RUNNING);
3944 unlock_kernel();
3945} 3954}
3946 3955
3947/* 3956/*
@@ -3981,7 +3990,7 @@ block_til_ready(struct tty_struct *tty, struct file * filp,
3981 */ 3990 */
3982 if (tty_hung_up_p(filp) || 3991 if (tty_hung_up_p(filp) ||
3983 (info->flags & ASYNC_CLOSING)) { 3992 (info->flags & ASYNC_CLOSING)) {
3984 wait_event_interruptible(info->close_wait, 3993 wait_event_interruptible_tty(info->close_wait,
3985 !(info->flags & ASYNC_CLOSING)); 3994 !(info->flags & ASYNC_CLOSING));
3986#ifdef SERIAL_DO_RESTART 3995#ifdef SERIAL_DO_RESTART
3987 if (info->flags & ASYNC_HUP_NOTIFY) 3996 if (info->flags & ASYNC_HUP_NOTIFY)
@@ -4057,7 +4066,9 @@ block_til_ready(struct tty_struct *tty, struct file * filp,
4057 printk("block_til_ready blocking: ttyS%d, count = %d\n", 4066 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4058 info->line, info->count); 4067 info->line, info->count);
4059#endif 4068#endif
4069 tty_unlock();
4060 schedule(); 4070 schedule();
4071 tty_lock();
4061 } 4072 }
4062 set_current_state(TASK_RUNNING); 4073 set_current_state(TASK_RUNNING);
4063 remove_wait_queue(&info->open_wait, &wait); 4074 remove_wait_queue(&info->open_wait, &wait);
@@ -4139,7 +4150,7 @@ rs_open(struct tty_struct *tty, struct file * filp)
4139 */ 4150 */
4140 if (tty_hung_up_p(filp) || 4151 if (tty_hung_up_p(filp) ||
4141 (info->flags & ASYNC_CLOSING)) { 4152 (info->flags & ASYNC_CLOSING)) {
4142 wait_event_interruptible(info->close_wait, 4153 wait_event_interruptible_tty(info->close_wait,
4143 !(info->flags & ASYNC_CLOSING)); 4154 !(info->flags & ASYNC_CLOSING));
4144#ifdef SERIAL_DO_RESTART 4155#ifdef SERIAL_DO_RESTART
4145 return ((info->flags & ASYNC_HUP_NOTIFY) ? 4156 return ((info->flags & ASYNC_HUP_NOTIFY) ?
@@ -4522,8 +4533,8 @@ static int __init rs_init(void)
4522 INIT_WORK(&info->work, do_softint); 4533 INIT_WORK(&info->work, do_softint);
4523 4534
4524 if (info->enabled) { 4535 if (info->enabled) {
4525 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n", 4536 printk(KERN_INFO "%s%d at %p is a builtin UART with DMA\n",
4526 serial_driver->name, info->line, (unsigned int)info->ioport); 4537 serial_driver->name, info->line, info->ioport);
4527 } 4538 }
4528 } 4539 }
4529#ifdef CONFIG_ETRAX_FAST_TIMER 4540#ifdef CONFIG_ETRAX_FAST_TIMER
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index eacb588a9345..66ecc7ab6dab 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -909,13 +909,11 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
909 rational_best_approximation(16 * div * baud, sport->port.uartclk, 909 rational_best_approximation(16 * div * baud, sport->port.uartclk,
910 1 << 16, 1 << 16, &num, &denom); 910 1 << 16, 1 << 16, &num, &denom);
911 911
912 if (port->state && port->state->port.tty) { 912 tdiv64 = sport->port.uartclk;
913 tdiv64 = sport->port.uartclk; 913 tdiv64 *= num;
914 tdiv64 *= num; 914 do_div(tdiv64, denom * 16 * div);
915 do_div(tdiv64, denom * 16 * div); 915 tty_termios_encode_baud_rate(termios,
916 tty_encode_baud_rate(sport->port.state->port.tty,
917 (speed_t)tdiv64, (speed_t)tdiv64); 916 (speed_t)tdiv64, (speed_t)tdiv64);
918 }
919 917
920 num -= 1; 918 num -= 1;
921 denom -= 1; 919 denom -= 1;
diff --git a/drivers/serial/ioc3_serial.c b/drivers/serial/ioc3_serial.c
index f164ba4eba02..93de907b1208 100644
--- a/drivers/serial/ioc3_serial.c
+++ b/drivers/serial/ioc3_serial.c
@@ -954,12 +954,13 @@ ioc3_change_speed(struct uart_port *the_port,
954 struct ktermios *new_termios, struct ktermios *old_termios) 954 struct ktermios *new_termios, struct ktermios *old_termios)
955{ 955{
956 struct ioc3_port *port = get_ioc3_port(the_port); 956 struct ioc3_port *port = get_ioc3_port(the_port);
957 unsigned int cflag; 957 unsigned int cflag, iflag;
958 int baud; 958 int baud;
959 int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8; 959 int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8;
960 struct uart_state *state = the_port->state; 960 struct uart_state *state = the_port->state;
961 961
962 cflag = new_termios->c_cflag; 962 cflag = new_termios->c_cflag;
963 iflag = new_termios->c_iflag;
963 964
964 switch (cflag & CSIZE) { 965 switch (cflag & CSIZE) {
965 case CS5: 966 case CS5:
@@ -1000,12 +1001,12 @@ ioc3_change_speed(struct uart_port *the_port,
1000 1001
1001 state->port.tty->low_latency = 1; 1002 state->port.tty->low_latency = 1;
1002 1003
1003 if (I_IGNPAR(state->port.tty)) 1004 if (iflag & IGNPAR)
1004 the_port->ignore_status_mask &= ~(N_PARITY_ERROR 1005 the_port->ignore_status_mask &= ~(N_PARITY_ERROR
1005 | N_FRAMING_ERROR); 1006 | N_FRAMING_ERROR);
1006 if (I_IGNBRK(state->port.tty)) { 1007 if (iflag & IGNBRK) {
1007 the_port->ignore_status_mask &= ~N_BREAK; 1008 the_port->ignore_status_mask &= ~N_BREAK;
1008 if (I_IGNPAR(state->port.tty)) 1009 if (iflag & IGNPAR)
1009 the_port->ignore_status_mask &= ~N_OVERRUN_ERROR; 1010 the_port->ignore_status_mask &= ~N_OVERRUN_ERROR;
1010 } 1011 }
1011 if (!(cflag & CREAD)) { 1012 if (!(cflag & CREAD)) {
diff --git a/drivers/serial/ioc4_serial.c b/drivers/serial/ioc4_serial.c
index 8ad28fc64926..fcfe82653ac8 100644
--- a/drivers/serial/ioc4_serial.c
+++ b/drivers/serial/ioc4_serial.c
@@ -1685,11 +1685,12 @@ ioc4_change_speed(struct uart_port *the_port,
1685{ 1685{
1686 struct ioc4_port *port = get_ioc4_port(the_port, 0); 1686 struct ioc4_port *port = get_ioc4_port(the_port, 0);
1687 int baud, bits; 1687 int baud, bits;
1688 unsigned cflag; 1688 unsigned cflag, iflag;
1689 int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8; 1689 int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8;
1690 struct uart_state *state = the_port->state; 1690 struct uart_state *state = the_port->state;
1691 1691
1692 cflag = new_termios->c_cflag; 1692 cflag = new_termios->c_cflag;
1693 iflag = new_termios->c_iflag;
1693 1694
1694 switch (cflag & CSIZE) { 1695 switch (cflag & CSIZE) {
1695 case CS5: 1696 case CS5:
@@ -1741,12 +1742,12 @@ ioc4_change_speed(struct uart_port *the_port,
1741 1742
1742 state->port.tty->low_latency = 1; 1743 state->port.tty->low_latency = 1;
1743 1744
1744 if (I_IGNPAR(state->port.tty)) 1745 if (iflag & IGNPAR)
1745 the_port->ignore_status_mask &= ~(N_PARITY_ERROR 1746 the_port->ignore_status_mask &= ~(N_PARITY_ERROR
1746 | N_FRAMING_ERROR); 1747 | N_FRAMING_ERROR);
1747 if (I_IGNBRK(state->port.tty)) { 1748 if (iflag & IGNBRK) {
1748 the_port->ignore_status_mask &= ~N_BREAK; 1749 the_port->ignore_status_mask &= ~N_BREAK;
1749 if (I_IGNPAR(state->port.tty)) 1750 if (iflag & IGNPAR)
1750 the_port->ignore_status_mask &= ~N_OVERRUN_ERROR; 1751 the_port->ignore_status_mask &= ~N_OVERRUN_ERROR;
1751 } 1752 }
1752 if (!(cflag & CREAD)) { 1753 if (!(cflag & CREAD)) {
diff --git a/drivers/serial/kgdboc.c b/drivers/serial/kgdboc.c
index a9a94ae72349..39f9a1adaa75 100644
--- a/drivers/serial/kgdboc.c
+++ b/drivers/serial/kgdboc.c
@@ -17,6 +17,7 @@
17#include <linux/kdb.h> 17#include <linux/kdb.h>
18#include <linux/tty.h> 18#include <linux/tty.h>
19#include <linux/console.h> 19#include <linux/console.h>
20#include <linux/vt_kern.h>
20 21
21#define MAX_CONFIG_LEN 40 22#define MAX_CONFIG_LEN 40
22 23
@@ -31,6 +32,7 @@ static struct kparam_string kps = {
31 .maxlen = MAX_CONFIG_LEN, 32 .maxlen = MAX_CONFIG_LEN,
32}; 33};
33 34
35static int kgdboc_use_kms; /* 1 if we use kernel mode switching */
34static struct tty_driver *kgdb_tty_driver; 36static struct tty_driver *kgdb_tty_driver;
35static int kgdb_tty_line; 37static int kgdb_tty_line;
36 38
@@ -104,6 +106,12 @@ static int configure_kgdboc(void)
104 kgdboc_io_ops.is_console = 0; 106 kgdboc_io_ops.is_console = 0;
105 kgdb_tty_driver = NULL; 107 kgdb_tty_driver = NULL;
106 108
109 kgdboc_use_kms = 0;
110 if (strncmp(cptr, "kms,", 4) == 0) {
111 cptr += 4;
112 kgdboc_use_kms = 1;
113 }
114
107 if (kgdboc_register_kbd(&cptr)) 115 if (kgdboc_register_kbd(&cptr))
108 goto do_register; 116 goto do_register;
109 117
@@ -201,8 +209,14 @@ static int param_set_kgdboc_var(const char *kmessage, struct kernel_param *kp)
201 return configure_kgdboc(); 209 return configure_kgdboc();
202} 210}
203 211
212static int dbg_restore_graphics;
213
204static void kgdboc_pre_exp_handler(void) 214static void kgdboc_pre_exp_handler(void)
205{ 215{
216 if (!dbg_restore_graphics && kgdboc_use_kms) {
217 dbg_restore_graphics = 1;
218 con_debug_enter(vc_cons[fg_console].d);
219 }
206 /* Increment the module count when the debugger is active */ 220 /* Increment the module count when the debugger is active */
207 if (!kgdb_connected) 221 if (!kgdb_connected)
208 try_module_get(THIS_MODULE); 222 try_module_get(THIS_MODULE);
@@ -213,6 +227,10 @@ static void kgdboc_post_exp_handler(void)
213 /* decrement the module count when the debugger detaches */ 227 /* decrement the module count when the debugger detaches */
214 if (!kgdb_connected) 228 if (!kgdb_connected)
215 module_put(THIS_MODULE); 229 module_put(THIS_MODULE);
230 if (kgdboc_use_kms && dbg_restore_graphics) {
231 dbg_restore_graphics = 0;
232 con_debug_leave();
233 }
216} 234}
217 235
218static struct kgdb_io kgdboc_io_ops = { 236static struct kgdb_io kgdboc_io_ops = {
diff --git a/drivers/serial/max3100.c b/drivers/serial/max3100.c
index 3351c3bd59e4..beb1afa27d8d 100644
--- a/drivers/serial/max3100.c
+++ b/drivers/serial/max3100.c
@@ -430,17 +430,14 @@ max3100_set_termios(struct uart_port *port, struct ktermios *termios,
430 int baud = 0; 430 int baud = 0;
431 unsigned cflag; 431 unsigned cflag;
432 u32 param_new, param_mask, parity = 0; 432 u32 param_new, param_mask, parity = 0;
433 struct tty_struct *tty = s->port.state->port.tty;
434 433
435 dev_dbg(&s->spi->dev, "%s\n", __func__); 434 dev_dbg(&s->spi->dev, "%s\n", __func__);
436 if (!tty)
437 return;
438 435
439 cflag = termios->c_cflag; 436 cflag = termios->c_cflag;
440 param_new = 0; 437 param_new = 0;
441 param_mask = 0; 438 param_mask = 0;
442 439
443 baud = tty_get_baud_rate(tty); 440 baud = tty_termios_baud_rate(termios);
444 param_new = s->conf & MAX3100_BAUD; 441 param_new = s->conf & MAX3100_BAUD;
445 switch (baud) { 442 switch (baud) {
446 case 300: 443 case 300:
@@ -485,7 +482,7 @@ max3100_set_termios(struct uart_port *port, struct ktermios *termios,
485 default: 482 default:
486 baud = s->baud; 483 baud = s->baud;
487 } 484 }
488 tty_encode_baud_rate(tty, baud, baud); 485 tty_termios_encode_baud_rate(termios, baud, baud);
489 s->baud = baud; 486 s->baud = baud;
490 param_mask |= MAX3100_BAUD; 487 param_mask |= MAX3100_BAUD;
491 488
diff --git a/drivers/serial/max3107-aava.c b/drivers/serial/max3107-aava.c
new file mode 100644
index 000000000000..a1fe304f2f52
--- /dev/null
+++ b/drivers/serial/max3107-aava.c
@@ -0,0 +1,344 @@
1/*
2 * max3107.c - spi uart protocol driver for Maxim 3107
3 * Based on max3100.c
4 * by Christian Pellegrin <chripell@evolware.org>
5 * and max3110.c
6 * by Feng Tang <feng.tang@intel.com>
7 *
8 * Copyright (C) Aavamobile 2009
9 *
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27 *
28 */
29
30#include <linux/delay.h>
31#include <linux/device.h>
32#include <linux/serial_core.h>
33#include <linux/serial.h>
34#include <linux/spi/spi.h>
35#include <linux/freezer.h>
36#include <linux/platform_device.h>
37#include <linux/gpio.h>
38#include <linux/sfi.h>
39#include <asm/mrst.h>
40#include "max3107.h"
41
42/* GPIO direction to input function */
43static int max3107_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
44{
45 struct max3107_port *s = container_of(chip, struct max3107_port, chip);
46 u16 buf[1]; /* Buffer for SPI transfer */
47
48 if (offset >= MAX3107_GPIO_COUNT) {
49 dev_err(&s->spi->dev, "Invalid GPIO\n");
50 return -EINVAL;
51 }
52
53 /* Read current GPIO configuration register */
54 buf[0] = MAX3107_GPIOCFG_REG;
55 /* Perform SPI transfer */
56 if (max3107_rw(s, (u8 *)buf, (u8 *)buf, 2)) {
57 dev_err(&s->spi->dev, "SPI transfer GPIO read failed\n");
58 return -EIO;
59 }
60 buf[0] &= MAX3107_SPI_RX_DATA_MASK;
61
62 /* Set GPIO to input */
63 buf[0] &= ~(0x0001 << offset);
64
65 /* Write new GPIO configuration register value */
66 buf[0] |= (MAX3107_WRITE_BIT | MAX3107_GPIOCFG_REG);
67 /* Perform SPI transfer */
68 if (max3107_rw(s, (u8 *)buf, NULL, 2)) {
69 dev_err(&s->spi->dev, "SPI transfer GPIO write failed\n");
70 return -EIO;
71 }
72 return 0;
73}
74
75/* GPIO direction to output function */
76static int max3107_gpio_direction_out(struct gpio_chip *chip, unsigned offset,
77 int value)
78{
79 struct max3107_port *s = container_of(chip, struct max3107_port, chip);
80 u16 buf[2]; /* Buffer for SPI transfers */
81
82 if (offset >= MAX3107_GPIO_COUNT) {
83 dev_err(&s->spi->dev, "Invalid GPIO\n");
84 return -EINVAL;
85 }
86
87 /* Read current GPIO configuration and data registers */
88 buf[0] = MAX3107_GPIOCFG_REG;
89 buf[1] = MAX3107_GPIODATA_REG;
90 /* Perform SPI transfer */
91 if (max3107_rw(s, (u8 *)buf, (u8 *)buf, 4)) {
92 dev_err(&s->spi->dev, "SPI transfer gpio failed\n");
93 return -EIO;
94 }
95 buf[0] &= MAX3107_SPI_RX_DATA_MASK;
96 buf[1] &= MAX3107_SPI_RX_DATA_MASK;
97
98 /* Set GPIO to output */
99 buf[0] |= (0x0001 << offset);
100 /* Set value */
101 if (value)
102 buf[1] |= (0x0001 << offset);
103 else
104 buf[1] &= ~(0x0001 << offset);
105
106 /* Write new GPIO configuration and data register values */
107 buf[0] |= (MAX3107_WRITE_BIT | MAX3107_GPIOCFG_REG);
108 buf[1] |= (MAX3107_WRITE_BIT | MAX3107_GPIODATA_REG);
109 /* Perform SPI transfer */
110 if (max3107_rw(s, (u8 *)buf, NULL, 4)) {
111 dev_err(&s->spi->dev,
112 "SPI transfer for GPIO conf data w failed\n");
113 return -EIO;
114 }
115 return 0;
116}
117
118/* GPIO value query function */
119static int max3107_gpio_get(struct gpio_chip *chip, unsigned offset)
120{
121 struct max3107_port *s = container_of(chip, struct max3107_port, chip);
122 u16 buf[1]; /* Buffer for SPI transfer */
123
124 if (offset >= MAX3107_GPIO_COUNT) {
125 dev_err(&s->spi->dev, "Invalid GPIO\n");
126 return -EINVAL;
127 }
128
129 /* Read current GPIO data register */
130 buf[0] = MAX3107_GPIODATA_REG;
131 /* Perform SPI transfer */
132 if (max3107_rw(s, (u8 *)buf, (u8 *)buf, 2)) {
133 dev_err(&s->spi->dev, "SPI transfer GPIO data r failed\n");
134 return -EIO;
135 }
136 buf[0] &= MAX3107_SPI_RX_DATA_MASK;
137
138 /* Return value */
139 return buf[0] & (0x0001 << offset);
140}
141
142/* GPIO value set function */
143static void max3107_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
144{
145 struct max3107_port *s = container_of(chip, struct max3107_port, chip);
146 u16 buf[2]; /* Buffer for SPI transfers */
147
148 if (offset >= MAX3107_GPIO_COUNT) {
149 dev_err(&s->spi->dev, "Invalid GPIO\n");
150 return;
151 }
152
153 /* Read current GPIO configuration registers*/
154 buf[0] = MAX3107_GPIODATA_REG;
155 buf[1] = MAX3107_GPIOCFG_REG;
156 /* Perform SPI transfer */
157 if (max3107_rw(s, (u8 *)buf, (u8 *)buf, 4)) {
158 dev_err(&s->spi->dev,
159 "SPI transfer for GPIO data and config read failed\n");
160 return;
161 }
162 buf[0] &= MAX3107_SPI_RX_DATA_MASK;
163 buf[1] &= MAX3107_SPI_RX_DATA_MASK;
164
165 if (!(buf[1] & (0x0001 << offset))) {
166 /* Configured as input, can't set value */
167 dev_warn(&s->spi->dev,
168 "Trying to set value for input GPIO\n");
169 return;
170 }
171
172 /* Set value */
173 if (value)
174 buf[0] |= (0x0001 << offset);
175 else
176 buf[0] &= ~(0x0001 << offset);
177
178 /* Write new GPIO data register value */
179 buf[0] |= (MAX3107_WRITE_BIT | MAX3107_GPIODATA_REG);
180 /* Perform SPI transfer */
181 if (max3107_rw(s, (u8 *)buf, NULL, 2))
182 dev_err(&s->spi->dev, "SPI transfer GPIO data w failed\n");
183}
184
185/* GPIO chip data */
186static struct gpio_chip max3107_gpio_chip = {
187 .owner = THIS_MODULE,
188 .direction_input = max3107_gpio_direction_in,
189 .direction_output = max3107_gpio_direction_out,
190 .get = max3107_gpio_get,
191 .set = max3107_gpio_set,
192 .can_sleep = 1,
193 .base = MAX3107_GPIO_BASE,
194 .ngpio = MAX3107_GPIO_COUNT,
195};
196
197/**
198 * max3107_aava_reset - reset on AAVA systems
199 * @spi: The SPI device we are probing
200 *
201 * Reset the device ready for probing.
202 */
203
204static int max3107_aava_reset(struct spi_device *spi)
205{
206 /* Reset the chip */
207 if (gpio_request(MAX3107_RESET_GPIO, "max3107")) {
208 pr_err("Requesting RESET GPIO failed\n");
209 return -EIO;
210 }
211 if (gpio_direction_output(MAX3107_RESET_GPIO, 0)) {
212 pr_err("Setting RESET GPIO to 0 failed\n");
213 gpio_free(MAX3107_RESET_GPIO);
214 return -EIO;
215 }
216 msleep(MAX3107_RESET_DELAY);
217 if (gpio_direction_output(MAX3107_RESET_GPIO, 1)) {
218 pr_err("Setting RESET GPIO to 1 failed\n");
219 gpio_free(MAX3107_RESET_GPIO);
220 return -EIO;
221 }
222 gpio_free(MAX3107_RESET_GPIO);
223 msleep(MAX3107_WAKEUP_DELAY);
224 return 0;
225}
226
227static int max3107_aava_configure(struct max3107_port *s)
228{
229 int retval;
230
231 /* Initialize GPIO chip data */
232 s->chip = max3107_gpio_chip;
233 s->chip.label = s->spi->modalias;
234 s->chip.dev = &s->spi->dev;
235
236 /* Add GPIO chip */
237 retval = gpiochip_add(&s->chip);
238 if (retval) {
239 dev_err(&s->spi->dev, "Adding GPIO chip failed\n");
240 return retval;
241 }
242
243 /* Temporary fix for EV2 boot problems, set modem reset to 0 */
244 max3107_gpio_direction_out(&s->chip, 3, 0);
245 return 0;
246}
247
248#if 0
249/* This will get enabled once we have the board stuff merged for this
250 specific case */
251
252static const struct baud_table brg13_ext[] = {
253 { 300, MAX3107_BRG13_B300 },
254 { 600, MAX3107_BRG13_B600 },
255 { 1200, MAX3107_BRG13_B1200 },
256 { 2400, MAX3107_BRG13_B2400 },
257 { 4800, MAX3107_BRG13_B4800 },
258 { 9600, MAX3107_BRG13_B9600 },
259 { 19200, MAX3107_BRG13_B19200 },
260 { 57600, MAX3107_BRG13_B57600 },
261 { 115200, MAX3107_BRG13_B115200 },
262 { 230400, MAX3107_BRG13_B230400 },
263 { 460800, MAX3107_BRG13_B460800 },
264 { 921600, MAX3107_BRG13_B921600 },
265 { 0, 0 }
266};
267
268static void max3107_aava_init(struct max3107_port *s)
269{
270 /*override for AAVA SC specific*/
271 if (mrst_platform_id() == MRST_PLATFORM_AAVA_SC) {
272 if (get_koski_build_id() <= KOSKI_EV2)
273 if (s->ext_clk) {
274 s->brg_cfg = MAX3107_BRG13_B9600;
275 s->baud_tbl = (struct baud_table *)brg13_ext;
276 }
277 }
278}
279#endif
280
281static int __devexit max3107_aava_remove(struct spi_device *spi)
282{
283 struct max3107_port *s = dev_get_drvdata(&spi->dev);
284
285 /* Remove GPIO chip */
286 if (gpiochip_remove(&s->chip))
287 dev_warn(&spi->dev, "Removing GPIO chip failed\n");
288
289 /* Then do the default remove */
290 return max3107_remove(spi);
291}
292
293/* Platform data */
294static struct max3107_plat aava_plat_data = {
295 .loopback = 0,
296 .ext_clk = 1,
297/* .init = max3107_aava_init, */
298 .configure = max3107_aava_configure,
299 .hw_suspend = max3107_hw_susp,
300 .polled_mode = 0,
301 .poll_time = 0,
302};
303
304
305static int __devinit max3107_probe_aava(struct spi_device *spi)
306{
307 int err = max3107_aava_reset(spi);
308 if (err < 0)
309 return err;
310 return max3107_probe(spi, &aava_plat_data);
311}
312
313/* Spi driver data */
314static struct spi_driver max3107_driver = {
315 .driver = {
316 .name = "aava-max3107",
317 .bus = &spi_bus_type,
318 .owner = THIS_MODULE,
319 },
320 .probe = max3107_probe_aava,
321 .remove = __devexit_p(max3107_aava_remove),
322 .suspend = max3107_suspend,
323 .resume = max3107_resume,
324};
325
326/* Driver init function */
327static int __init max3107_init(void)
328{
329 return spi_register_driver(&max3107_driver);
330}
331
332/* Driver exit function */
333static void __exit max3107_exit(void)
334{
335 spi_unregister_driver(&max3107_driver);
336}
337
338module_init(max3107_init);
339module_exit(max3107_exit);
340
341MODULE_DESCRIPTION("MAX3107 driver");
342MODULE_AUTHOR("Aavamobile");
343MODULE_ALIAS("aava-max3107-spi");
344MODULE_LICENSE("GPL v2");
diff --git a/drivers/serial/max3107.c b/drivers/serial/max3107.c
new file mode 100644
index 000000000000..67283c1a57ff
--- /dev/null
+++ b/drivers/serial/max3107.c
@@ -0,0 +1,1197 @@
1/*
2 * max3107.c - spi uart protocol driver for Maxim 3107
3 * Based on max3100.c
4 * by Christian Pellegrin <chripell@evolware.org>
5 * and max3110.c
6 * by Feng Tang <feng.tang@intel.com>
7 *
8 * Copyright (C) Aavamobile 2009
9 *
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27 *
28 */
29
30#include <linux/delay.h>
31#include <linux/device.h>
32#include <linux/serial_core.h>
33#include <linux/serial.h>
34#include <linux/gpio.h>
35#include <linux/spi/spi.h>
36#include <linux/freezer.h>
37#include "max3107.h"
38
39static const struct baud_table brg26_ext[] = {
40 { 300, MAX3107_BRG26_B300 },
41 { 600, MAX3107_BRG26_B600 },
42 { 1200, MAX3107_BRG26_B1200 },
43 { 2400, MAX3107_BRG26_B2400 },
44 { 4800, MAX3107_BRG26_B4800 },
45 { 9600, MAX3107_BRG26_B9600 },
46 { 19200, MAX3107_BRG26_B19200 },
47 { 57600, MAX3107_BRG26_B57600 },
48 { 115200, MAX3107_BRG26_B115200 },
49 { 230400, MAX3107_BRG26_B230400 },
50 { 460800, MAX3107_BRG26_B460800 },
51 { 921600, MAX3107_BRG26_B921600 },
52 { 0, 0 }
53};
54
55static const struct baud_table brg13_int[] = {
56 { 300, MAX3107_BRG13_IB300 },
57 { 600, MAX3107_BRG13_IB600 },
58 { 1200, MAX3107_BRG13_IB1200 },
59 { 2400, MAX3107_BRG13_IB2400 },
60 { 4800, MAX3107_BRG13_IB4800 },
61 { 9600, MAX3107_BRG13_IB9600 },
62 { 19200, MAX3107_BRG13_IB19200 },
63 { 57600, MAX3107_BRG13_IB57600 },
64 { 115200, MAX3107_BRG13_IB115200 },
65 { 230400, MAX3107_BRG13_IB230400 },
66 { 460800, MAX3107_BRG13_IB460800 },
67 { 921600, MAX3107_BRG13_IB921600 },
68 { 0, 0 }
69};
70
71static u32 get_new_brg(int baud, struct max3107_port *s)
72{
73 int i;
74 const struct baud_table *baud_tbl = s->baud_tbl;
75
76 for (i = 0; i < 13; i++) {
77 if (baud == baud_tbl[i].baud)
78 return baud_tbl[i].new_brg;
79 }
80
81 return 0;
82}
83
84/* Perform SPI transfer for write/read of device register(s) */
85int max3107_rw(struct max3107_port *s, u8 *tx, u8 *rx, int len)
86{
87 struct spi_message spi_msg;
88 struct spi_transfer spi_xfer;
89
90 /* Initialize SPI ,message */
91 spi_message_init(&spi_msg);
92
93 /* Initialize SPI transfer */
94 memset(&spi_xfer, 0, sizeof spi_xfer);
95 spi_xfer.len = len;
96 spi_xfer.tx_buf = tx;
97 spi_xfer.rx_buf = rx;
98 spi_xfer.speed_hz = MAX3107_SPI_SPEED;
99
100 /* Add SPI transfer to SPI message */
101 spi_message_add_tail(&spi_xfer, &spi_msg);
102
103#ifdef DBG_TRACE_SPI_DATA
104 {
105 int i;
106 pr_info("tx len %d:\n", spi_xfer.len);
107 for (i = 0 ; i < spi_xfer.len && i < 32 ; i++)
108 pr_info(" %x", ((u8 *)spi_xfer.tx_buf)[i]);
109 pr_info("\n");
110 }
111#endif
112
113 /* Perform synchronous SPI transfer */
114 if (spi_sync(s->spi, &spi_msg)) {
115 dev_err(&s->spi->dev, "spi_sync failure\n");
116 return -EIO;
117 }
118
119#ifdef DBG_TRACE_SPI_DATA
120 if (spi_xfer.rx_buf) {
121 int i;
122 pr_info("rx len %d:\n", spi_xfer.len);
123 for (i = 0 ; i < spi_xfer.len && i < 32 ; i++)
124 pr_info(" %x", ((u8 *)spi_xfer.rx_buf)[i]);
125 pr_info("\n");
126 }
127#endif
128 return 0;
129}
130EXPORT_SYMBOL_GPL(max3107_rw);
131
132/* Puts received data to circular buffer */
133static void put_data_to_circ_buf(struct max3107_port *s, unsigned char *data,
134 int len)
135{
136 struct uart_port *port = &s->port;
137 struct tty_struct *tty;
138
139 if (!port->state)
140 return;
141
142 tty = port->state->port.tty;
143 if (!tty)
144 return;
145
146 /* Insert received data */
147 tty_insert_flip_string(tty, data, len);
148 /* Update RX counter */
149 port->icount.rx += len;
150}
151
152/* Handle data receiving */
153static void max3107_handlerx(struct max3107_port *s, u16 rxlvl)
154{
155 int i;
156 int j;
157 int len; /* SPI transfer buffer length */
158 u16 *buf;
159 u8 *valid_str;
160
161 if (!s->rx_enabled)
162 /* RX is disabled */
163 return;
164
165 if (rxlvl == 0) {
166 /* RX fifo is empty */
167 return;
168 } else if (rxlvl >= MAX3107_RX_FIFO_SIZE) {
169 dev_warn(&s->spi->dev, "Possible RX FIFO overrun %d\n", rxlvl);
170 /* Ensure sanity of RX level */
171 rxlvl = MAX3107_RX_FIFO_SIZE;
172 }
173 if ((s->rxbuf == 0) || (s->rxstr == 0)) {
174 dev_warn(&s->spi->dev, "Rx buffer/str isn't ready\n");
175 return;
176 }
177 buf = s->rxbuf;
178 valid_str = s->rxstr;
179 while (rxlvl) {
180 pr_debug("rxlvl %d\n", rxlvl);
181 /* Clear buffer */
182 memset(buf, 0, sizeof(u16) * (MAX3107_RX_FIFO_SIZE + 2));
183 len = 0;
184 if (s->irqen_reg & MAX3107_IRQ_RXFIFO_BIT) {
185 /* First disable RX FIFO interrupt */
186 pr_debug("Disabling RX INT\n");
187 buf[0] = (MAX3107_WRITE_BIT | MAX3107_IRQEN_REG);
188 s->irqen_reg &= ~MAX3107_IRQ_RXFIFO_BIT;
189 buf[0] |= s->irqen_reg;
190 len++;
191 }
192 /* Just increase the length by amount of words in FIFO since
193 * buffer was zeroed and SPI transfer of 0x0000 means reading
194 * from RX FIFO
195 */
196 len += rxlvl;
197 /* Append RX level query */
198 buf[len] = MAX3107_RXFIFOLVL_REG;
199 len++;
200
201 /* Perform the SPI transfer */
202 if (max3107_rw(s, (u8 *)buf, (u8 *)buf, len * 2)) {
203 dev_err(&s->spi->dev, "SPI transfer for RX h failed\n");
204 return;
205 }
206
207 /* Skip RX FIFO interrupt disabling word if it was added */
208 j = ((len - 1) - rxlvl);
209 /* Read received words */
210 for (i = 0; i < rxlvl; i++, j++)
211 valid_str[i] = (u8)buf[j];
212 put_data_to_circ_buf(s, valid_str, rxlvl);
213 /* Get new RX level */
214 rxlvl = (buf[len - 1] & MAX3107_SPI_RX_DATA_MASK);
215 }
216
217 if (s->rx_enabled) {
218 /* RX still enabled, re-enable RX FIFO interrupt */
219 pr_debug("Enabling RX INT\n");
220 buf[0] = (MAX3107_WRITE_BIT | MAX3107_IRQEN_REG);
221 s->irqen_reg |= MAX3107_IRQ_RXFIFO_BIT;
222 buf[0] |= s->irqen_reg;
223 if (max3107_rw(s, (u8 *)buf, NULL, 2))
224 dev_err(&s->spi->dev, "RX FIFO INT enabling failed\n");
225 }
226
227 /* Push the received data to receivers */
228 if (s->port.state->port.tty)
229 tty_flip_buffer_push(s->port.state->port.tty);
230}
231
232
233/* Handle data sending */
234static void max3107_handletx(struct max3107_port *s)
235{
236 struct circ_buf *xmit = &s->port.state->xmit;
237 int i;
238 unsigned long flags;
239 int len; /* SPI transfer buffer length */
240 u16 *buf;
241
242 if (!s->tx_fifo_empty)
243 /* Don't send more data before previous data is sent */
244 return;
245
246 if (uart_circ_empty(xmit) || uart_tx_stopped(&s->port))
247 /* No data to send or TX is stopped */
248 return;
249
250 if (!s->txbuf) {
251 dev_warn(&s->spi->dev, "Txbuf isn't ready\n");
252 return;
253 }
254 buf = s->txbuf;
255 /* Get length of data pending in circular buffer */
256 len = uart_circ_chars_pending(xmit);
257 if (len) {
258 /* Limit to size of TX FIFO */
259 if (len > MAX3107_TX_FIFO_SIZE)
260 len = MAX3107_TX_FIFO_SIZE;
261
262 pr_debug("txlen %d\n", len);
263
264 /* Update TX counter */
265 s->port.icount.tx += len;
266
267 /* TX FIFO will no longer be empty */
268 s->tx_fifo_empty = 0;
269
270 i = 0;
271 if (s->irqen_reg & MAX3107_IRQ_TXEMPTY_BIT) {
272 /* First disable TX empty interrupt */
273 pr_debug("Disabling TE INT\n");
274 buf[i] = (MAX3107_WRITE_BIT | MAX3107_IRQEN_REG);
275 s->irqen_reg &= ~MAX3107_IRQ_TXEMPTY_BIT;
276 buf[i] |= s->irqen_reg;
277 i++;
278 len++;
279 }
280 /* Add data to send */
281 spin_lock_irqsave(&s->port.lock, flags);
282 for ( ; i < len ; i++) {
283 buf[i] = (MAX3107_WRITE_BIT | MAX3107_THR_REG);
284 buf[i] |= ((u16)xmit->buf[xmit->tail] &
285 MAX3107_SPI_TX_DATA_MASK);
286 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
287 }
288 spin_unlock_irqrestore(&s->port.lock, flags);
289 if (!(s->irqen_reg & MAX3107_IRQ_TXEMPTY_BIT)) {
290 /* Enable TX empty interrupt */
291 pr_debug("Enabling TE INT\n");
292 buf[i] = (MAX3107_WRITE_BIT | MAX3107_IRQEN_REG);
293 s->irqen_reg |= MAX3107_IRQ_TXEMPTY_BIT;
294 buf[i] |= s->irqen_reg;
295 i++;
296 len++;
297 }
298 if (!s->tx_enabled) {
299 /* Enable TX */
300 pr_debug("Enable TX\n");
301 buf[i] = (MAX3107_WRITE_BIT | MAX3107_MODE1_REG);
302 spin_lock_irqsave(&s->data_lock, flags);
303 s->mode1_reg &= ~MAX3107_MODE1_TXDIS_BIT;
304 buf[i] |= s->mode1_reg;
305 spin_unlock_irqrestore(&s->data_lock, flags);
306 s->tx_enabled = 1;
307 i++;
308 len++;
309 }
310
311 /* Perform the SPI transfer */
312 if (max3107_rw(s, (u8 *)buf, NULL, len*2)) {
313 dev_err(&s->spi->dev,
314 "SPI transfer TX handling failed\n");
315 return;
316 }
317 }
318
319 /* Indicate wake up if circular buffer is getting low on data */
320 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
321 uart_write_wakeup(&s->port);
322
323}
324
325/* Handle interrupts
326 * Also reads and returns current RX FIFO level
327 */
328static u16 handle_interrupt(struct max3107_port *s)
329{
330 u16 buf[4]; /* Buffer for SPI transfers */
331 u8 irq_status;
332 u16 rx_level;
333 unsigned long flags;
334
335 /* Read IRQ status register */
336 buf[0] = MAX3107_IRQSTS_REG;
337 /* Read status IRQ status register */
338 buf[1] = MAX3107_STS_IRQSTS_REG;
339 /* Read LSR IRQ status register */
340 buf[2] = MAX3107_LSR_IRQSTS_REG;
341 /* Query RX level */
342 buf[3] = MAX3107_RXFIFOLVL_REG;
343
344 if (max3107_rw(s, (u8 *)buf, (u8 *)buf, 8)) {
345 dev_err(&s->spi->dev,
346 "SPI transfer for INTR handling failed\n");
347 return 0;
348 }
349
350 irq_status = (u8)buf[0];
351 pr_debug("IRQSTS %x\n", irq_status);
352 rx_level = (buf[3] & MAX3107_SPI_RX_DATA_MASK);
353
354 if (irq_status & MAX3107_IRQ_LSR_BIT) {
355 /* LSR interrupt */
356 if (buf[2] & MAX3107_LSR_RXTO_BIT)
357 /* RX timeout interrupt,
358 * handled by normal RX handling
359 */
360 pr_debug("RX TO INT\n");
361 }
362
363 if (irq_status & MAX3107_IRQ_TXEMPTY_BIT) {
364 /* Tx empty interrupt,
365 * disable TX and set tx_fifo_empty flag
366 */
367 pr_debug("TE INT, disabling TX\n");
368 buf[0] = (MAX3107_WRITE_BIT | MAX3107_MODE1_REG);
369 spin_lock_irqsave(&s->data_lock, flags);
370 s->mode1_reg |= MAX3107_MODE1_TXDIS_BIT;
371 buf[0] |= s->mode1_reg;
372 spin_unlock_irqrestore(&s->data_lock, flags);
373 if (max3107_rw(s, (u8 *)buf, NULL, 2))
374 dev_err(&s->spi->dev, "SPI transfer TX dis failed\n");
375 s->tx_enabled = 0;
376 s->tx_fifo_empty = 1;
377 }
378
379 if (irq_status & MAX3107_IRQ_RXFIFO_BIT)
380 /* RX FIFO interrupt,
381 * handled by normal RX handling
382 */
383 pr_debug("RFIFO INT\n");
384
385 /* Return RX level */
386 return rx_level;
387}
388
389/* Trigger work thread*/
390static void max3107_dowork(struct max3107_port *s)
391{
392 if (!work_pending(&s->work) && !freezing(current) && !s->suspended)
393 queue_work(s->workqueue, &s->work);
394 else
395 dev_warn(&s->spi->dev, "interrup isn't serviced normally!\n");
396}
397
398/* Work thread */
399static void max3107_work(struct work_struct *w)
400{
401 struct max3107_port *s = container_of(w, struct max3107_port, work);
402 u16 rxlvl = 0;
403 int len; /* SPI transfer buffer length */
404 u16 buf[5]; /* Buffer for SPI transfers */
405 unsigned long flags;
406
407 /* Start by reading current RX FIFO level */
408 buf[0] = MAX3107_RXFIFOLVL_REG;
409 if (max3107_rw(s, (u8 *)buf, (u8 *)buf, 2)) {
410 dev_err(&s->spi->dev, "SPI transfer RX lev failed\n");
411 rxlvl = 0;
412 } else {
413 rxlvl = (buf[0] & MAX3107_SPI_RX_DATA_MASK);
414 }
415
416 do {
417 pr_debug("rxlvl %d\n", rxlvl);
418
419 /* Handle RX */
420 max3107_handlerx(s, rxlvl);
421 rxlvl = 0;
422
423 if (s->handle_irq) {
424 /* Handle pending interrupts
425 * We also get new RX FIFO level since new data may
426 * have been received while pushing received data to
427 * receivers
428 */
429 s->handle_irq = 0;
430 rxlvl = handle_interrupt(s);
431 }
432
433 /* Handle TX */
434 max3107_handletx(s);
435
436 /* Handle configuration changes */
437 len = 0;
438 spin_lock_irqsave(&s->data_lock, flags);
439 if (s->mode1_commit) {
440 pr_debug("mode1_commit\n");
441 buf[len] = (MAX3107_WRITE_BIT | MAX3107_MODE1_REG);
442 buf[len++] |= s->mode1_reg;
443 s->mode1_commit = 0;
444 }
445 if (s->lcr_commit) {
446 pr_debug("lcr_commit\n");
447 buf[len] = (MAX3107_WRITE_BIT | MAX3107_LCR_REG);
448 buf[len++] |= s->lcr_reg;
449 s->lcr_commit = 0;
450 }
451 if (s->brg_commit) {
452 pr_debug("brg_commit\n");
453 buf[len] = (MAX3107_WRITE_BIT | MAX3107_BRGDIVMSB_REG);
454 buf[len++] |= ((s->brg_cfg >> 16) &
455 MAX3107_SPI_TX_DATA_MASK);
456 buf[len] = (MAX3107_WRITE_BIT | MAX3107_BRGDIVLSB_REG);
457 buf[len++] |= ((s->brg_cfg >> 8) &
458 MAX3107_SPI_TX_DATA_MASK);
459 buf[len] = (MAX3107_WRITE_BIT | MAX3107_BRGCFG_REG);
460 buf[len++] |= ((s->brg_cfg) & 0xff);
461 s->brg_commit = 0;
462 }
463 spin_unlock_irqrestore(&s->data_lock, flags);
464
465 if (len > 0) {
466 if (max3107_rw(s, (u8 *)buf, NULL, len * 2))
467 dev_err(&s->spi->dev,
468 "SPI transfer config failed\n");
469 }
470
471 /* Reloop if interrupt handling indicated data in RX FIFO */
472 } while (rxlvl);
473
474}
475
476/* Set sleep mode */
477static void max3107_set_sleep(struct max3107_port *s, int mode)
478{
479 u16 buf[1]; /* Buffer for SPI transfer */
480 unsigned long flags;
481 pr_debug("enter, mode %d\n", mode);
482
483 buf[0] = (MAX3107_WRITE_BIT | MAX3107_MODE1_REG);
484 spin_lock_irqsave(&s->data_lock, flags);
485 switch (mode) {
486 case MAX3107_DISABLE_FORCED_SLEEP:
487 s->mode1_reg &= ~MAX3107_MODE1_FORCESLEEP_BIT;
488 break;
489 case MAX3107_ENABLE_FORCED_SLEEP:
490 s->mode1_reg |= MAX3107_MODE1_FORCESLEEP_BIT;
491 break;
492 case MAX3107_DISABLE_AUTOSLEEP:
493 s->mode1_reg &= ~MAX3107_MODE1_AUTOSLEEP_BIT;
494 break;
495 case MAX3107_ENABLE_AUTOSLEEP:
496 s->mode1_reg |= MAX3107_MODE1_AUTOSLEEP_BIT;
497 break;
498 default:
499 spin_unlock_irqrestore(&s->data_lock, flags);
500 dev_warn(&s->spi->dev, "invalid sleep mode\n");
501 return;
502 }
503 buf[0] |= s->mode1_reg;
504 spin_unlock_irqrestore(&s->data_lock, flags);
505
506 if (max3107_rw(s, (u8 *)buf, NULL, 2))
507 dev_err(&s->spi->dev, "SPI transfer sleep mode failed\n");
508
509 if (mode == MAX3107_DISABLE_AUTOSLEEP ||
510 mode == MAX3107_DISABLE_FORCED_SLEEP)
511 msleep(MAX3107_WAKEUP_DELAY);
512}
513
514/* Perform full register initialization */
515static void max3107_register_init(struct max3107_port *s)
516{
517 u16 buf[11]; /* Buffer for SPI transfers */
518
519 /* 1. Configure baud rate, 9600 as default */
520 s->baud = 9600;
521 /* the below is default*/
522 if (s->ext_clk) {
523 s->brg_cfg = MAX3107_BRG26_B9600;
524 s->baud_tbl = (struct baud_table *)brg26_ext;
525 } else {
526 s->brg_cfg = MAX3107_BRG13_IB9600;
527 s->baud_tbl = (struct baud_table *)brg13_int;
528 }
529
530 if (s->pdata->init)
531 s->pdata->init(s);
532
533 buf[0] = (MAX3107_WRITE_BIT | MAX3107_BRGDIVMSB_REG)
534 | ((s->brg_cfg >> 16) & MAX3107_SPI_TX_DATA_MASK);
535 buf[1] = (MAX3107_WRITE_BIT | MAX3107_BRGDIVLSB_REG)
536 | ((s->brg_cfg >> 8) & MAX3107_SPI_TX_DATA_MASK);
537 buf[2] = (MAX3107_WRITE_BIT | MAX3107_BRGCFG_REG)
538 | ((s->brg_cfg) & 0xff);
539
540 /* 2. Configure LCR register, 8N1 mode by default */
541 s->lcr_reg = MAX3107_LCR_WORD_LEN_8;
542 buf[3] = (MAX3107_WRITE_BIT | MAX3107_LCR_REG)
543 | s->lcr_reg;
544
545 /* 3. Configure MODE 1 register */
546 s->mode1_reg = 0;
547 /* Enable IRQ pin */
548 s->mode1_reg |= MAX3107_MODE1_IRQSEL_BIT;
549 /* Disable TX */
550 s->mode1_reg |= MAX3107_MODE1_TXDIS_BIT;
551 s->tx_enabled = 0;
552 /* RX is enabled */
553 s->rx_enabled = 1;
554 buf[4] = (MAX3107_WRITE_BIT | MAX3107_MODE1_REG)
555 | s->mode1_reg;
556
557 /* 4. Configure MODE 2 register */
558 buf[5] = (MAX3107_WRITE_BIT | MAX3107_MODE2_REG);
559 if (s->loopback) {
560 /* Enable loopback */
561 buf[5] |= MAX3107_MODE2_LOOPBACK_BIT;
562 }
563 /* Reset FIFOs */
564 buf[5] |= MAX3107_MODE2_FIFORST_BIT;
565 s->tx_fifo_empty = 1;
566
567 /* 5. Configure FIFO trigger level register */
568 buf[6] = (MAX3107_WRITE_BIT | MAX3107_FIFOTRIGLVL_REG);
569 /* RX FIFO trigger for 16 words, TX FIFO trigger not used */
570 buf[6] |= (MAX3107_FIFOTRIGLVL_RX(16) | MAX3107_FIFOTRIGLVL_TX(0));
571
572 /* 6. Configure flow control levels */
573 buf[7] = (MAX3107_WRITE_BIT | MAX3107_FLOWLVL_REG);
574 /* Flow control halt level 96, resume level 48 */
575 buf[7] |= (MAX3107_FLOWLVL_RES(48) | MAX3107_FLOWLVL_HALT(96));
576
577 /* 7. Configure flow control */
578 buf[8] = (MAX3107_WRITE_BIT | MAX3107_FLOWCTRL_REG);
579 /* Enable auto CTS and auto RTS flow control */
580 buf[8] |= (MAX3107_FLOWCTRL_AUTOCTS_BIT | MAX3107_FLOWCTRL_AUTORTS_BIT);
581
582 /* 8. Configure RX timeout register */
583 buf[9] = (MAX3107_WRITE_BIT | MAX3107_RXTO_REG);
584 /* Timeout after 48 character intervals */
585 buf[9] |= 0x0030;
586
587 /* 9. Configure LSR interrupt enable register */
588 buf[10] = (MAX3107_WRITE_BIT | MAX3107_LSR_IRQEN_REG);
589 /* Enable RX timeout interrupt */
590 buf[10] |= MAX3107_LSR_RXTO_BIT;
591
592 /* Perform SPI transfer */
593 if (max3107_rw(s, (u8 *)buf, NULL, 22))
594 dev_err(&s->spi->dev, "SPI transfer for init failed\n");
595
596 /* 10. Clear IRQ status register by reading it */
597 buf[0] = MAX3107_IRQSTS_REG;
598
599 /* 11. Configure interrupt enable register */
600 /* Enable LSR interrupt */
601 s->irqen_reg = MAX3107_IRQ_LSR_BIT;
602 /* Enable RX FIFO interrupt */
603 s->irqen_reg |= MAX3107_IRQ_RXFIFO_BIT;
604 buf[1] = (MAX3107_WRITE_BIT | MAX3107_IRQEN_REG)
605 | s->irqen_reg;
606
607 /* 12. Clear FIFO reset that was set in step 6 */
608 buf[2] = (MAX3107_WRITE_BIT | MAX3107_MODE2_REG);
609 if (s->loopback) {
610 /* Keep loopback enabled */
611 buf[2] |= MAX3107_MODE2_LOOPBACK_BIT;
612 }
613
614 /* Perform SPI transfer */
615 if (max3107_rw(s, (u8 *)buf, (u8 *)buf, 6))
616 dev_err(&s->spi->dev, "SPI transfer for init failed\n");
617
618}
619
620/* IRQ handler */
621static irqreturn_t max3107_irq(int irqno, void *dev_id)
622{
623 struct max3107_port *s = dev_id;
624
625 if (irqno != s->spi->irq) {
626 /* Unexpected IRQ */
627 return IRQ_NONE;
628 }
629
630 /* Indicate irq */
631 s->handle_irq = 1;
632
633 /* Trigger work thread */
634 max3107_dowork(s);
635
636 return IRQ_HANDLED;
637}
638
639/* HW suspension function
640 *
641 * Currently autosleep is used to decrease current consumption, alternative
642 * approach would be to set the chip to reset mode if UART is not being
643 * used but that would mess the GPIOs
644 *
645 */
646void max3107_hw_susp(struct max3107_port *s, int suspend)
647{
648 pr_debug("enter, suspend %d\n", suspend);
649
650 if (suspend) {
651 /* Suspend requested,
652 * enable autosleep to decrease current consumption
653 */
654 s->suspended = 1;
655 max3107_set_sleep(s, MAX3107_ENABLE_AUTOSLEEP);
656 } else {
657 /* Resume requested,
658 * disable autosleep
659 */
660 s->suspended = 0;
661 max3107_set_sleep(s, MAX3107_DISABLE_AUTOSLEEP);
662 }
663}
664EXPORT_SYMBOL_GPL(max3107_hw_susp);
665
666/* Modem status IRQ enabling */
667static void max3107_enable_ms(struct uart_port *port)
668{
669 /* Modem status not supported */
670}
671
672/* Data send function */
673static void max3107_start_tx(struct uart_port *port)
674{
675 struct max3107_port *s = container_of(port, struct max3107_port, port);
676
677 /* Trigger work thread for sending data */
678 max3107_dowork(s);
679}
680
681/* Function for checking that there is no pending transfers */
682static unsigned int max3107_tx_empty(struct uart_port *port)
683{
684 struct max3107_port *s = container_of(port, struct max3107_port, port);
685
686 pr_debug("returning %d\n",
687 (s->tx_fifo_empty && uart_circ_empty(&s->port.state->xmit)));
688 return s->tx_fifo_empty && uart_circ_empty(&s->port.state->xmit);
689}
690
691/* Function for stopping RX */
692static void max3107_stop_rx(struct uart_port *port)
693{
694 struct max3107_port *s = container_of(port, struct max3107_port, port);
695 unsigned long flags;
696
697 /* Set RX disabled in MODE 1 register */
698 spin_lock_irqsave(&s->data_lock, flags);
699 s->mode1_reg |= MAX3107_MODE1_RXDIS_BIT;
700 s->mode1_commit = 1;
701 spin_unlock_irqrestore(&s->data_lock, flags);
702 /* Set RX disabled */
703 s->rx_enabled = 0;
704 /* Trigger work thread for doing the actual configuration change */
705 max3107_dowork(s);
706}
707
708/* Function for returning control pin states */
709static unsigned int max3107_get_mctrl(struct uart_port *port)
710{
711 /* DCD and DSR are not wired and CTS/RTS is handled automatically
712 * so just indicate DSR and CAR asserted
713 */
714 return TIOCM_DSR | TIOCM_CAR;
715}
716
717/* Function for setting control pin states */
718static void max3107_set_mctrl(struct uart_port *port, unsigned int mctrl)
719{
720 /* DCD and DSR are not wired and CTS/RTS is hadnled automatically
721 * so do nothing
722 */
723}
724
725/* Function for configuring UART parameters */
726static void max3107_set_termios(struct uart_port *port,
727 struct ktermios *termios,
728 struct ktermios *old)
729{
730 struct max3107_port *s = container_of(port, struct max3107_port, port);
731 struct tty_struct *tty;
732 int baud;
733 u16 new_lcr = 0;
734 u32 new_brg = 0;
735 unsigned long flags;
736
737 if (!port->state)
738 return;
739
740 tty = port->state->port.tty;
741 if (!tty)
742 return;
743
744 /* Get new LCR register values */
745 /* Word size */
746 if ((termios->c_cflag & CSIZE) == CS7)
747 new_lcr |= MAX3107_LCR_WORD_LEN_7;
748 else
749 new_lcr |= MAX3107_LCR_WORD_LEN_8;
750
751 /* Parity */
752 if (termios->c_cflag & PARENB) {
753 new_lcr |= MAX3107_LCR_PARITY_BIT;
754 if (!(termios->c_cflag & PARODD))
755 new_lcr |= MAX3107_LCR_EVENPARITY_BIT;
756 }
757
758 /* Stop bits */
759 if (termios->c_cflag & CSTOPB) {
760 /* 2 stop bits */
761 new_lcr |= MAX3107_LCR_STOPLEN_BIT;
762 }
763
764 /* Mask termios capabilities we don't support */
765 termios->c_cflag &= ~CMSPAR;
766
767 /* Set status ignore mask */
768 s->port.ignore_status_mask = 0;
769 if (termios->c_iflag & IGNPAR)
770 s->port.ignore_status_mask |= MAX3107_ALL_ERRORS;
771
772 /* Set low latency to immediately handle pushed data */
773 s->port.state->port.tty->low_latency = 1;
774
775 /* Get new baud rate generator configuration */
776 baud = tty_get_baud_rate(tty);
777
778 spin_lock_irqsave(&s->data_lock, flags);
779 new_brg = get_new_brg(baud, s);
780 /* if can't find the corrent config, use previous */
781 if (!new_brg) {
782 baud = s->baud;
783 new_brg = s->brg_cfg;
784 }
785 spin_unlock_irqrestore(&s->data_lock, flags);
786 tty_termios_encode_baud_rate(termios, baud, baud);
787 s->baud = baud;
788
789 /* Update timeout according to new baud rate */
790 uart_update_timeout(port, termios->c_cflag, baud);
791
792 spin_lock_irqsave(&s->data_lock, flags);
793 if (s->lcr_reg != new_lcr) {
794 s->lcr_reg = new_lcr;
795 s->lcr_commit = 1;
796 }
797 if (s->brg_cfg != new_brg) {
798 s->brg_cfg = new_brg;
799 s->brg_commit = 1;
800 }
801 spin_unlock_irqrestore(&s->data_lock, flags);
802
803 /* Trigger work thread for doing the actual configuration change */
804 max3107_dowork(s);
805}
806
807/* Port shutdown function */
808static void max3107_shutdown(struct uart_port *port)
809{
810 struct max3107_port *s = container_of(port, struct max3107_port, port);
811
812 if (s->suspended && s->pdata->hw_suspend)
813 s->pdata->hw_suspend(s, 0);
814
815 /* Free the interrupt */
816 free_irq(s->spi->irq, s);
817
818 if (s->workqueue) {
819 /* Flush and destroy work queue */
820 flush_workqueue(s->workqueue);
821 destroy_workqueue(s->workqueue);
822 s->workqueue = NULL;
823 }
824
825 /* Suspend HW */
826 if (s->pdata->hw_suspend)
827 s->pdata->hw_suspend(s, 1);
828}
829
830/* Port startup function */
831static int max3107_startup(struct uart_port *port)
832{
833 struct max3107_port *s = container_of(port, struct max3107_port, port);
834
835 /* Initialize work queue */
836 s->workqueue = create_freezeable_workqueue("max3107");
837 if (!s->workqueue) {
838 dev_err(&s->spi->dev, "Workqueue creation failed\n");
839 return -EBUSY;
840 }
841 INIT_WORK(&s->work, max3107_work);
842
843 /* Setup IRQ */
844 if (request_irq(s->spi->irq, max3107_irq, IRQF_TRIGGER_FALLING,
845 "max3107", s)) {
846 dev_err(&s->spi->dev, "IRQ reguest failed\n");
847 destroy_workqueue(s->workqueue);
848 s->workqueue = NULL;
849 return -EBUSY;
850 }
851
852 /* Resume HW */
853 if (s->pdata->hw_suspend)
854 s->pdata->hw_suspend(s, 0);
855
856 /* Init registers */
857 max3107_register_init(s);
858
859 return 0;
860}
861
862/* Port type function */
863static const char *max3107_type(struct uart_port *port)
864{
865 struct max3107_port *s = container_of(port, struct max3107_port, port);
866 return s->spi->modalias;
867}
868
869/* Port release function */
870static void max3107_release_port(struct uart_port *port)
871{
872 /* Do nothing */
873}
874
875/* Port request function */
876static int max3107_request_port(struct uart_port *port)
877{
878 /* Do nothing */
879 return 0;
880}
881
882/* Port config function */
883static void max3107_config_port(struct uart_port *port, int flags)
884{
885 struct max3107_port *s = container_of(port, struct max3107_port, port);
886 s->port.type = PORT_MAX3107;
887}
888
889/* Port verify function */
890static int max3107_verify_port(struct uart_port *port,
891 struct serial_struct *ser)
892{
893 if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3107)
894 return 0;
895
896 return -EINVAL;
897}
898
899/* Port stop TX function */
900static void max3107_stop_tx(struct uart_port *port)
901{
902 /* Do nothing */
903}
904
905/* Port break control function */
906static void max3107_break_ctl(struct uart_port *port, int break_state)
907{
908 /* We don't support break control, do nothing */
909}
910
911
912/* Port functions */
913static struct uart_ops max3107_ops = {
914 .tx_empty = max3107_tx_empty,
915 .set_mctrl = max3107_set_mctrl,
916 .get_mctrl = max3107_get_mctrl,
917 .stop_tx = max3107_stop_tx,
918 .start_tx = max3107_start_tx,
919 .stop_rx = max3107_stop_rx,
920 .enable_ms = max3107_enable_ms,
921 .break_ctl = max3107_break_ctl,
922 .startup = max3107_startup,
923 .shutdown = max3107_shutdown,
924 .set_termios = max3107_set_termios,
925 .type = max3107_type,
926 .release_port = max3107_release_port,
927 .request_port = max3107_request_port,
928 .config_port = max3107_config_port,
929 .verify_port = max3107_verify_port,
930};
931
932/* UART driver data */
933static struct uart_driver max3107_uart_driver = {
934 .owner = THIS_MODULE,
935 .driver_name = "ttyMAX",
936 .dev_name = "ttyMAX",
937 .nr = 1,
938};
939
940static int driver_registered = 0;
941
942
943
944/* 'Generic' platform data */
945static struct max3107_plat generic_plat_data = {
946 .loopback = 0,
947 .ext_clk = 1,
948 .hw_suspend = max3107_hw_susp,
949 .polled_mode = 0,
950 .poll_time = 0,
951};
952
953
954/*******************************************************************/
955
956/**
957 * max3107_probe - SPI bus probe entry point
958 * @spi: the spi device
959 *
960 * SPI wants us to probe this device and if appropriate claim it.
961 * Perform any platform specific requirements and then initialise
962 * the device.
963 */
964
965int max3107_probe(struct spi_device *spi, struct max3107_plat *pdata)
966{
967 struct max3107_port *s;
968 u16 buf[2]; /* Buffer for SPI transfers */
969 int retval;
970
971 pr_info("enter max3107 probe\n");
972
973 /* Allocate port structure */
974 s = kzalloc(sizeof(*s), GFP_KERNEL);
975 if (!s) {
976 pr_err("Allocating port structure failed\n");
977 return -ENOMEM;
978 }
979
980 s->pdata = pdata;
981
982 /* SPI Rx buffer
983 * +2 for RX FIFO interrupt
984 * disabling and RX level query
985 */
986 s->rxbuf = kzalloc(sizeof(u16) * (MAX3107_RX_FIFO_SIZE+2), GFP_KERNEL);
987 if (!s->rxbuf) {
988 pr_err("Allocating RX buffer failed\n");
989 return -ENOMEM;
990 }
991 s->rxstr = kzalloc(sizeof(u8) * MAX3107_RX_FIFO_SIZE, GFP_KERNEL);
992 if (!s->rxstr) {
993 pr_err("Allocating RX buffer failed\n");
994 return -ENOMEM;
995 }
996 /* SPI Tx buffer
997 * SPI transfer buffer
998 * +3 for TX FIFO empty
999 * interrupt disabling and
1000 * enabling and TX enabling
1001 */
1002 s->txbuf = kzalloc(sizeof(u16) * MAX3107_TX_FIFO_SIZE + 3, GFP_KERNEL);
1003 if (!s->txbuf) {
1004 pr_err("Allocating TX buffer failed\n");
1005 return -ENOMEM;
1006 }
1007 /* Initialize shared data lock */
1008 spin_lock_init(&s->data_lock);
1009
1010 /* SPI intializations */
1011 dev_set_drvdata(&spi->dev, s);
1012 spi->mode = SPI_MODE_0;
1013 spi->dev.platform_data = pdata;
1014 spi->bits_per_word = 16;
1015 s->ext_clk = pdata->ext_clk;
1016 s->loopback = pdata->loopback;
1017 spi_setup(spi);
1018 s->spi = spi;
1019
1020 /* Check REV ID to ensure we are talking to what we expect */
1021 buf[0] = MAX3107_REVID_REG;
1022 if (max3107_rw(s, (u8 *)buf, (u8 *)buf, 2)) {
1023 dev_err(&s->spi->dev, "SPI transfer for REVID read failed\n");
1024 return -EIO;
1025 }
1026 if ((buf[0] & MAX3107_SPI_RX_DATA_MASK) != MAX3107_REVID1 &&
1027 (buf[0] & MAX3107_SPI_RX_DATA_MASK) != MAX3107_REVID2) {
1028 dev_err(&s->spi->dev, "REVID %x does not match\n",
1029 (buf[0] & MAX3107_SPI_RX_DATA_MASK));
1030 return -ENODEV;
1031 }
1032
1033 /* Disable all interrupts */
1034 buf[0] = (MAX3107_WRITE_BIT | MAX3107_IRQEN_REG | 0x0000);
1035 buf[0] |= 0x0000;
1036
1037 /* Configure clock source */
1038 buf[1] = (MAX3107_WRITE_BIT | MAX3107_CLKSRC_REG);
1039 if (s->ext_clk) {
1040 /* External clock */
1041 buf[1] |= MAX3107_CLKSRC_EXTCLK_BIT;
1042 }
1043
1044 /* PLL bypass ON */
1045 buf[1] |= MAX3107_CLKSRC_PLLBYP_BIT;
1046
1047 /* Perform SPI transfer */
1048 if (max3107_rw(s, (u8 *)buf, NULL, 4)) {
1049 dev_err(&s->spi->dev, "SPI transfer for init failed\n");
1050 return -EIO;
1051 }
1052
1053 /* Register UART driver */
1054 if (!driver_registered) {
1055 retval = uart_register_driver(&max3107_uart_driver);
1056 if (retval) {
1057 dev_err(&s->spi->dev, "Registering UART driver failed\n");
1058 return retval;
1059 }
1060 driver_registered = 1;
1061 }
1062
1063 /* Initialize UART port data */
1064 s->port.fifosize = 128;
1065 s->port.ops = &max3107_ops;
1066 s->port.line = 0;
1067 s->port.dev = &spi->dev;
1068 s->port.uartclk = 9600;
1069 s->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
1070 s->port.irq = s->spi->irq;
1071 s->port.type = PORT_MAX3107;
1072
1073 /* Add UART port */
1074 retval = uart_add_one_port(&max3107_uart_driver, &s->port);
1075 if (retval < 0) {
1076 dev_err(&s->spi->dev, "Adding UART port failed\n");
1077 return retval;
1078 }
1079
1080 if (pdata->configure) {
1081 retval = pdata->configure(s);
1082 if (retval < 0)
1083 return retval;
1084 }
1085
1086 /* Go to suspend mode */
1087 if (pdata->hw_suspend)
1088 pdata->hw_suspend(s, 1);
1089
1090 return 0;
1091}
1092EXPORT_SYMBOL_GPL(max3107_probe);
1093
1094/* Driver remove function */
1095int max3107_remove(struct spi_device *spi)
1096{
1097 struct max3107_port *s = dev_get_drvdata(&spi->dev);
1098
1099 pr_info("enter max3107 remove\n");
1100
1101 /* Remove port */
1102 if (uart_remove_one_port(&max3107_uart_driver, &s->port))
1103 dev_warn(&s->spi->dev, "Removing UART port failed\n");
1104
1105
1106 /* Free TxRx buffer */
1107 kfree(s->rxbuf);
1108 kfree(s->rxstr);
1109 kfree(s->txbuf);
1110
1111 /* Free port structure */
1112 kfree(s);
1113
1114 return 0;
1115}
1116EXPORT_SYMBOL_GPL(max3107_remove);
1117
1118/* Driver suspend function */
1119int max3107_suspend(struct spi_device *spi, pm_message_t state)
1120{
1121#ifdef CONFIG_PM
1122 struct max3107_port *s = dev_get_drvdata(&spi->dev);
1123
1124 pr_debug("enter suspend\n");
1125
1126 /* Suspend UART port */
1127 uart_suspend_port(&max3107_uart_driver, &s->port);
1128
1129 /* Go to suspend mode */
1130 if (s->pdata->hw_suspend)
1131 s->pdata->hw_suspend(s, 1);
1132#endif /* CONFIG_PM */
1133 return 0;
1134}
1135EXPORT_SYMBOL_GPL(max3107_suspend);
1136
1137/* Driver resume function */
1138int max3107_resume(struct spi_device *spi)
1139{
1140#ifdef CONFIG_PM
1141 struct max3107_port *s = dev_get_drvdata(&spi->dev);
1142
1143 pr_debug("enter resume\n");
1144
1145 /* Resume from suspend */
1146 if (s->pdata->hw_suspend)
1147 s->pdata->hw_suspend(s, 0);
1148
1149 /* Resume UART port */
1150 uart_resume_port(&max3107_uart_driver, &s->port);
1151#endif /* CONFIG_PM */
1152 return 0;
1153}
1154EXPORT_SYMBOL_GPL(max3107_resume);
1155
1156static int max3107_probe_generic(struct spi_device *spi)
1157{
1158 return max3107_probe(spi, &generic_plat_data);
1159}
1160
1161/* Spi driver data */
1162static struct spi_driver max3107_driver = {
1163 .driver = {
1164 .name = "max3107",
1165 .bus = &spi_bus_type,
1166 .owner = THIS_MODULE,
1167 },
1168 .probe = max3107_probe_generic,
1169 .remove = __devexit_p(max3107_remove),
1170 .suspend = max3107_suspend,
1171 .resume = max3107_resume,
1172};
1173
1174/* Driver init function */
1175static int __init max3107_init(void)
1176{
1177 pr_info("enter max3107 init\n");
1178 return spi_register_driver(&max3107_driver);
1179}
1180
1181/* Driver exit function */
1182static void __exit max3107_exit(void)
1183{
1184 pr_info("enter max3107 exit\n");
1185 /* Unregister UART driver */
1186 if (driver_registered)
1187 uart_unregister_driver(&max3107_uart_driver);
1188 spi_unregister_driver(&max3107_driver);
1189}
1190
1191module_init(max3107_init);
1192module_exit(max3107_exit);
1193
1194MODULE_DESCRIPTION("MAX3107 driver");
1195MODULE_AUTHOR("Aavamobile");
1196MODULE_ALIAS("max3107-spi");
1197MODULE_LICENSE("GPL v2");
diff --git a/drivers/serial/max3107.h b/drivers/serial/max3107.h
new file mode 100644
index 000000000000..7ab632392502
--- /dev/null
+++ b/drivers/serial/max3107.h
@@ -0,0 +1,441 @@
1/*
2 * max3107.h - spi uart protocol driver header for Maxim 3107
3 *
4 * Copyright (C) Aavamobile 2009
5 * Based on serial_max3100.h by Christian Pellegrin
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#ifndef _MAX3107_H
14#define _MAX3107_H
15
16/* Serial error status definitions */
17#define MAX3107_PARITY_ERROR 1
18#define MAX3107_FRAME_ERROR 2
19#define MAX3107_OVERRUN_ERROR 4
20#define MAX3107_ALL_ERRORS (MAX3107_PARITY_ERROR | \
21 MAX3107_FRAME_ERROR | \
22 MAX3107_OVERRUN_ERROR)
23
24/* GPIO definitions */
25#define MAX3107_GPIO_BASE 88
26#define MAX3107_GPIO_COUNT 4
27
28
29/* GPIO connected to chip's reset pin */
30#define MAX3107_RESET_GPIO 87
31
32
33/* Chip reset delay */
34#define MAX3107_RESET_DELAY 10
35
36/* Chip wakeup delay */
37#define MAX3107_WAKEUP_DELAY 50
38
39
40/* Sleep mode definitions */
41#define MAX3107_DISABLE_FORCED_SLEEP 0
42#define MAX3107_ENABLE_FORCED_SLEEP 1
43#define MAX3107_DISABLE_AUTOSLEEP 2
44#define MAX3107_ENABLE_AUTOSLEEP 3
45
46
47/* Definitions for register access with SPI transfers
48 *
49 * SPI transfer format:
50 *
51 * Master to slave bits xzzzzzzzyyyyyyyy
52 * Slave to master bits aaaaaaaabbbbbbbb
53 *
54 * where:
55 * x = 0 for reads, 1 for writes
56 * z = register address
57 * y = new register value if write, 0 if read
58 * a = unspecified
59 * b = register value if read, unspecified if write
60 */
61
62/* SPI speed */
63#define MAX3107_SPI_SPEED (3125000 * 2)
64
65/* Write bit */
66#define MAX3107_WRITE_BIT (1 << 15)
67
68/* SPI TX data mask */
69#define MAX3107_SPI_RX_DATA_MASK (0x00ff)
70
71/* SPI RX data mask */
72#define MAX3107_SPI_TX_DATA_MASK (0x00ff)
73
74/* Register access masks */
75#define MAX3107_RHR_REG (0x0000) /* RX FIFO */
76#define MAX3107_THR_REG (0x0000) /* TX FIFO */
77#define MAX3107_IRQEN_REG (0x0100) /* IRQ enable */
78#define MAX3107_IRQSTS_REG (0x0200) /* IRQ status */
79#define MAX3107_LSR_IRQEN_REG (0x0300) /* LSR IRQ enable */
80#define MAX3107_LSR_IRQSTS_REG (0x0400) /* LSR IRQ status */
81#define MAX3107_SPCHR_IRQEN_REG (0x0500) /* Special char IRQ enable */
82#define MAX3107_SPCHR_IRQSTS_REG (0x0600) /* Special char IRQ status */
83#define MAX3107_STS_IRQEN_REG (0x0700) /* Status IRQ enable */
84#define MAX3107_STS_IRQSTS_REG (0x0800) /* Status IRQ status */
85#define MAX3107_MODE1_REG (0x0900) /* MODE1 */
86#define MAX3107_MODE2_REG (0x0a00) /* MODE2 */
87#define MAX3107_LCR_REG (0x0b00) /* LCR */
88#define MAX3107_RXTO_REG (0x0c00) /* RX timeout */
89#define MAX3107_HDPIXDELAY_REG (0x0d00) /* Auto transceiver delays */
90#define MAX3107_IRDA_REG (0x0e00) /* IRDA settings */
91#define MAX3107_FLOWLVL_REG (0x0f00) /* Flow control levels */
92#define MAX3107_FIFOTRIGLVL_REG (0x1000) /* FIFO IRQ trigger levels */
93#define MAX3107_TXFIFOLVL_REG (0x1100) /* TX FIFO level */
94#define MAX3107_RXFIFOLVL_REG (0x1200) /* RX FIFO level */
95#define MAX3107_FLOWCTRL_REG (0x1300) /* Flow control */
96#define MAX3107_XON1_REG (0x1400) /* XON1 character */
97#define MAX3107_XON2_REG (0x1500) /* XON2 character */
98#define MAX3107_XOFF1_REG (0x1600) /* XOFF1 character */
99#define MAX3107_XOFF2_REG (0x1700) /* XOFF2 character */
100#define MAX3107_GPIOCFG_REG (0x1800) /* GPIO config */
101#define MAX3107_GPIODATA_REG (0x1900) /* GPIO data */
102#define MAX3107_PLLCFG_REG (0x1a00) /* PLL config */
103#define MAX3107_BRGCFG_REG (0x1b00) /* Baud rate generator conf */
104#define MAX3107_BRGDIVLSB_REG (0x1c00) /* Baud rate divisor LSB */
105#define MAX3107_BRGDIVMSB_REG (0x1d00) /* Baud rate divisor MSB */
106#define MAX3107_CLKSRC_REG (0x1e00) /* Clock source */
107#define MAX3107_REVID_REG (0x1f00) /* Revision identification */
108
109/* IRQ register bits */
110#define MAX3107_IRQ_LSR_BIT (1 << 0) /* LSR interrupt */
111#define MAX3107_IRQ_SPCHR_BIT (1 << 1) /* Special char interrupt */
112#define MAX3107_IRQ_STS_BIT (1 << 2) /* Status interrupt */
113#define MAX3107_IRQ_RXFIFO_BIT (1 << 3) /* RX FIFO interrupt */
114#define MAX3107_IRQ_TXFIFO_BIT (1 << 4) /* TX FIFO interrupt */
115#define MAX3107_IRQ_TXEMPTY_BIT (1 << 5) /* TX FIFO empty interrupt */
116#define MAX3107_IRQ_RXEMPTY_BIT (1 << 6) /* RX FIFO empty interrupt */
117#define MAX3107_IRQ_CTS_BIT (1 << 7) /* CTS interrupt */
118
119/* LSR register bits */
120#define MAX3107_LSR_RXTO_BIT (1 << 0) /* RX timeout */
121#define MAX3107_LSR_RXOVR_BIT (1 << 1) /* RX overrun */
122#define MAX3107_LSR_RXPAR_BIT (1 << 2) /* RX parity error */
123#define MAX3107_LSR_FRERR_BIT (1 << 3) /* Frame error */
124#define MAX3107_LSR_RXBRK_BIT (1 << 4) /* RX break */
125#define MAX3107_LSR_RXNOISE_BIT (1 << 5) /* RX noise */
126#define MAX3107_LSR_UNDEF6_BIT (1 << 6) /* Undefined/not used */
127#define MAX3107_LSR_CTS_BIT (1 << 7) /* CTS pin state */
128
129/* Special character register bits */
130#define MAX3107_SPCHR_XON1_BIT (1 << 0) /* XON1 character */
131#define MAX3107_SPCHR_XON2_BIT (1 << 1) /* XON2 character */
132#define MAX3107_SPCHR_XOFF1_BIT (1 << 2) /* XOFF1 character */
133#define MAX3107_SPCHR_XOFF2_BIT (1 << 3) /* XOFF2 character */
134#define MAX3107_SPCHR_BREAK_BIT (1 << 4) /* RX break */
135#define MAX3107_SPCHR_MULTIDROP_BIT (1 << 5) /* 9-bit multidrop addr char */
136#define MAX3107_SPCHR_UNDEF6_BIT (1 << 6) /* Undefined/not used */
137#define MAX3107_SPCHR_UNDEF7_BIT (1 << 7) /* Undefined/not used */
138
139/* Status register bits */
140#define MAX3107_STS_GPIO0_BIT (1 << 0) /* GPIO 0 interrupt */
141#define MAX3107_STS_GPIO1_BIT (1 << 1) /* GPIO 1 interrupt */
142#define MAX3107_STS_GPIO2_BIT (1 << 2) /* GPIO 2 interrupt */
143#define MAX3107_STS_GPIO3_BIT (1 << 3) /* GPIO 3 interrupt */
144#define MAX3107_STS_UNDEF4_BIT (1 << 4) /* Undefined/not used */
145#define MAX3107_STS_CLKREADY_BIT (1 << 5) /* Clock ready */
146#define MAX3107_STS_SLEEP_BIT (1 << 6) /* Sleep interrupt */
147#define MAX3107_STS_UNDEF7_BIT (1 << 7) /* Undefined/not used */
148
149/* MODE1 register bits */
150#define MAX3107_MODE1_RXDIS_BIT (1 << 0) /* RX disable */
151#define MAX3107_MODE1_TXDIS_BIT (1 << 1) /* TX disable */
152#define MAX3107_MODE1_TXHIZ_BIT (1 << 2) /* TX pin three-state */
153#define MAX3107_MODE1_RTSHIZ_BIT (1 << 3) /* RTS pin three-state */
154#define MAX3107_MODE1_TRNSCVCTRL_BIT (1 << 4) /* Transceiver ctrl enable */
155#define MAX3107_MODE1_FORCESLEEP_BIT (1 << 5) /* Force sleep mode */
156#define MAX3107_MODE1_AUTOSLEEP_BIT (1 << 6) /* Auto sleep enable */
157#define MAX3107_MODE1_IRQSEL_BIT (1 << 7) /* IRQ pin enable */
158
159/* MODE2 register bits */
160#define MAX3107_MODE2_RST_BIT (1 << 0) /* Chip reset */
161#define MAX3107_MODE2_FIFORST_BIT (1 << 1) /* FIFO reset */
162#define MAX3107_MODE2_RXTRIGINV_BIT (1 << 2) /* RX FIFO INT invert */
163#define MAX3107_MODE2_RXEMPTINV_BIT (1 << 3) /* RX FIFO empty INT invert */
164#define MAX3107_MODE2_SPCHR_BIT (1 << 4) /* Special chr detect enable */
165#define MAX3107_MODE2_LOOPBACK_BIT (1 << 5) /* Internal loopback enable */
166#define MAX3107_MODE2_MULTIDROP_BIT (1 << 6) /* 9-bit multidrop enable */
167#define MAX3107_MODE2_ECHOSUPR_BIT (1 << 7) /* ECHO suppression enable */
168
169/* LCR register bits */
170#define MAX3107_LCR_LENGTH0_BIT (1 << 0) /* Word length bit 0 */
171#define MAX3107_LCR_LENGTH1_BIT (1 << 1) /* Word length bit 1
172 *
173 * Word length bits table:
174 * 00 -> 5 bit words
175 * 01 -> 6 bit words
176 * 10 -> 7 bit words
177 * 11 -> 8 bit words
178 */
179#define MAX3107_LCR_STOPLEN_BIT (1 << 2) /* STOP length bit
180 *
181 * STOP length bit table:
182 * 0 -> 1 stop bit
183 * 1 -> 1-1.5 stop bits if
184 * word length is 5,
185 * 2 stop bits otherwise
186 */
187#define MAX3107_LCR_PARITY_BIT (1 << 3) /* Parity bit enable */
188#define MAX3107_LCR_EVENPARITY_BIT (1 << 4) /* Even parity bit enable */
189#define MAX3107_LCR_FORCEPARITY_BIT (1 << 5) /* 9-bit multidrop parity */
190#define MAX3107_LCR_TXBREAK_BIT (1 << 6) /* TX break enable */
191#define MAX3107_LCR_RTS_BIT (1 << 7) /* RTS pin control */
192#define MAX3107_LCR_WORD_LEN_5 (0x0000)
193#define MAX3107_LCR_WORD_LEN_6 (0x0001)
194#define MAX3107_LCR_WORD_LEN_7 (0x0002)
195#define MAX3107_LCR_WORD_LEN_8 (0x0003)
196
197
198/* IRDA register bits */
199#define MAX3107_IRDA_IRDAEN_BIT (1 << 0) /* IRDA mode enable */
200#define MAX3107_IRDA_SIR_BIT (1 << 1) /* SIR mode enable */
201#define MAX3107_IRDA_SHORTIR_BIT (1 << 2) /* Short SIR mode enable */
202#define MAX3107_IRDA_MIR_BIT (1 << 3) /* MIR mode enable */
203#define MAX3107_IRDA_RXINV_BIT (1 << 4) /* RX logic inversion enable */
204#define MAX3107_IRDA_TXINV_BIT (1 << 5) /* TX logic inversion enable */
205#define MAX3107_IRDA_UNDEF6_BIT (1 << 6) /* Undefined/not used */
206#define MAX3107_IRDA_UNDEF7_BIT (1 << 7) /* Undefined/not used */
207
208/* Flow control trigger level register masks */
209#define MAX3107_FLOWLVL_HALT_MASK (0x000f) /* Flow control halt level */
210#define MAX3107_FLOWLVL_RES_MASK (0x00f0) /* Flow control resume level */
211#define MAX3107_FLOWLVL_HALT(words) ((words/8) & 0x000f)
212#define MAX3107_FLOWLVL_RES(words) (((words/8) & 0x000f) << 4)
213
214/* FIFO interrupt trigger level register masks */
215#define MAX3107_FIFOTRIGLVL_TX_MASK (0x000f) /* TX FIFO trigger level */
216#define MAX3107_FIFOTRIGLVL_RX_MASK (0x00f0) /* RX FIFO trigger level */
217#define MAX3107_FIFOTRIGLVL_TX(words) ((words/8) & 0x000f)
218#define MAX3107_FIFOTRIGLVL_RX(words) (((words/8) & 0x000f) << 4)
219
220/* Flow control register bits */
221#define MAX3107_FLOWCTRL_AUTORTS_BIT (1 << 0) /* Auto RTS flow ctrl enable */
222#define MAX3107_FLOWCTRL_AUTOCTS_BIT (1 << 1) /* Auto CTS flow ctrl enable */
223#define MAX3107_FLOWCTRL_GPIADDR_BIT (1 << 2) /* Enables that GPIO inputs
224 * are used in conjunction with
225 * XOFF2 for definition of
226 * special character */
227#define MAX3107_FLOWCTRL_SWFLOWEN_BIT (1 << 3) /* Auto SW flow ctrl enable */
228#define MAX3107_FLOWCTRL_SWFLOW0_BIT (1 << 4) /* SWFLOW bit 0 */
229#define MAX3107_FLOWCTRL_SWFLOW1_BIT (1 << 5) /* SWFLOW bit 1
230 *
231 * SWFLOW bits 1 & 0 table:
232 * 00 -> no transmitter flow
233 * control
234 * 01 -> receiver compares
235 * XON2 and XOFF2
236 * and controls
237 * transmitter
238 * 10 -> receiver compares
239 * XON1 and XOFF1
240 * and controls
241 * transmitter
242 * 11 -> receiver compares
243 * XON1, XON2, XOFF1 and
244 * XOFF2 and controls
245 * transmitter
246 */
247#define MAX3107_FLOWCTRL_SWFLOW2_BIT (1 << 6) /* SWFLOW bit 2 */
248#define MAX3107_FLOWCTRL_SWFLOW3_BIT (1 << 7) /* SWFLOW bit 3
249 *
250 * SWFLOW bits 3 & 2 table:
251 * 00 -> no received flow
252 * control
253 * 01 -> transmitter generates
254 * XON2 and XOFF2
255 * 10 -> transmitter generates
256 * XON1 and XOFF1
257 * 11 -> transmitter generates
258 * XON1, XON2, XOFF1 and
259 * XOFF2
260 */
261
262/* GPIO configuration register bits */
263#define MAX3107_GPIOCFG_GP0OUT_BIT (1 << 0) /* GPIO 0 output enable */
264#define MAX3107_GPIOCFG_GP1OUT_BIT (1 << 1) /* GPIO 1 output enable */
265#define MAX3107_GPIOCFG_GP2OUT_BIT (1 << 2) /* GPIO 2 output enable */
266#define MAX3107_GPIOCFG_GP3OUT_BIT (1 << 3) /* GPIO 3 output enable */
267#define MAX3107_GPIOCFG_GP0OD_BIT (1 << 4) /* GPIO 0 open-drain enable */
268#define MAX3107_GPIOCFG_GP1OD_BIT (1 << 5) /* GPIO 1 open-drain enable */
269#define MAX3107_GPIOCFG_GP2OD_BIT (1 << 6) /* GPIO 2 open-drain enable */
270#define MAX3107_GPIOCFG_GP3OD_BIT (1 << 7) /* GPIO 3 open-drain enable */
271
272/* GPIO DATA register bits */
273#define MAX3107_GPIODATA_GP0OUT_BIT (1 << 0) /* GPIO 0 output value */
274#define MAX3107_GPIODATA_GP1OUT_BIT (1 << 1) /* GPIO 1 output value */
275#define MAX3107_GPIODATA_GP2OUT_BIT (1 << 2) /* GPIO 2 output value */
276#define MAX3107_GPIODATA_GP3OUT_BIT (1 << 3) /* GPIO 3 output value */
277#define MAX3107_GPIODATA_GP0IN_BIT (1 << 4) /* GPIO 0 input value */
278#define MAX3107_GPIODATA_GP1IN_BIT (1 << 5) /* GPIO 1 input value */
279#define MAX3107_GPIODATA_GP2IN_BIT (1 << 6) /* GPIO 2 input value */
280#define MAX3107_GPIODATA_GP3IN_BIT (1 << 7) /* GPIO 3 input value */
281
282/* PLL configuration register masks */
283#define MAX3107_PLLCFG_PREDIV_MASK (0x003f) /* PLL predivision value */
284#define MAX3107_PLLCFG_PLLFACTOR_MASK (0x00c0) /* PLL multiplication factor */
285
286/* Baud rate generator configuration register masks and bits */
287#define MAX3107_BRGCFG_FRACT_MASK (0x000f) /* Fractional portion of
288 * Baud rate generator divisor
289 */
290#define MAX3107_BRGCFG_2XMODE_BIT (1 << 4) /* Double baud rate */
291#define MAX3107_BRGCFG_4XMODE_BIT (1 << 5) /* Quadruple baud rate */
292#define MAX3107_BRGCFG_UNDEF6_BIT (1 << 6) /* Undefined/not used */
293#define MAX3107_BRGCFG_UNDEF7_BIT (1 << 7) /* Undefined/not used */
294
295/* Clock source register bits */
296#define MAX3107_CLKSRC_INTOSC_BIT (1 << 0) /* Internal osc enable */
297#define MAX3107_CLKSRC_CRYST_BIT (1 << 1) /* Crystal osc enable */
298#define MAX3107_CLKSRC_PLL_BIT (1 << 2) /* PLL enable */
299#define MAX3107_CLKSRC_PLLBYP_BIT (1 << 3) /* PLL bypass */
300#define MAX3107_CLKSRC_EXTCLK_BIT (1 << 4) /* External clock enable */
301#define MAX3107_CLKSRC_UNDEF5_BIT (1 << 5) /* Undefined/not used */
302#define MAX3107_CLKSRC_UNDEF6_BIT (1 << 6) /* Undefined/not used */
303#define MAX3107_CLKSRC_CLK2RTS_BIT (1 << 7) /* Baud clk to RTS pin */
304
305
306/* HW definitions */
307#define MAX3107_RX_FIFO_SIZE 128
308#define MAX3107_TX_FIFO_SIZE 128
309#define MAX3107_REVID1 0x00a0
310#define MAX3107_REVID2 0x00a1
311
312
313/* Baud rate generator configuration values for external clock 13MHz */
314#define MAX3107_BRG13_B300 (0x0A9400 | 0x05)
315#define MAX3107_BRG13_B600 (0x054A00 | 0x03)
316#define MAX3107_BRG13_B1200 (0x02A500 | 0x01)
317#define MAX3107_BRG13_B2400 (0x015200 | 0x09)
318#define MAX3107_BRG13_B4800 (0x00A900 | 0x04)
319#define MAX3107_BRG13_B9600 (0x005400 | 0x0A)
320#define MAX3107_BRG13_B19200 (0x002A00 | 0x05)
321#define MAX3107_BRG13_B38400 (0x001500 | 0x03)
322#define MAX3107_BRG13_B57600 (0x000E00 | 0x02)
323#define MAX3107_BRG13_B115200 (0x000700 | 0x01)
324#define MAX3107_BRG13_B230400 (0x000300 | 0x08)
325#define MAX3107_BRG13_B460800 (0x000100 | 0x0c)
326#define MAX3107_BRG13_B921600 (0x000100 | 0x1c)
327
328/* Baud rate generator configuration values for external clock 26MHz */
329#define MAX3107_BRG26_B300 (0x152800 | 0x0A)
330#define MAX3107_BRG26_B600 (0x0A9400 | 0x05)
331#define MAX3107_BRG26_B1200 (0x054A00 | 0x03)
332#define MAX3107_BRG26_B2400 (0x02A500 | 0x01)
333#define MAX3107_BRG26_B4800 (0x015200 | 0x09)
334#define MAX3107_BRG26_B9600 (0x00A900 | 0x04)
335#define MAX3107_BRG26_B19200 (0x005400 | 0x0A)
336#define MAX3107_BRG26_B38400 (0x002A00 | 0x05)
337#define MAX3107_BRG26_B57600 (0x001C00 | 0x03)
338#define MAX3107_BRG26_B115200 (0x000E00 | 0x02)
339#define MAX3107_BRG26_B230400 (0x000700 | 0x01)
340#define MAX3107_BRG26_B460800 (0x000300 | 0x08)
341#define MAX3107_BRG26_B921600 (0x000100 | 0x0C)
342
343/* Baud rate generator configuration values for internal clock */
344#define MAX3107_BRG13_IB300 (0x008000 | 0x00)
345#define MAX3107_BRG13_IB600 (0x004000 | 0x00)
346#define MAX3107_BRG13_IB1200 (0x002000 | 0x00)
347#define MAX3107_BRG13_IB2400 (0x001000 | 0x00)
348#define MAX3107_BRG13_IB4800 (0x000800 | 0x00)
349#define MAX3107_BRG13_IB9600 (0x000400 | 0x00)
350#define MAX3107_BRG13_IB19200 (0x000200 | 0x00)
351#define MAX3107_BRG13_IB38400 (0x000100 | 0x00)
352#define MAX3107_BRG13_IB57600 (0x000000 | 0x0B)
353#define MAX3107_BRG13_IB115200 (0x000000 | 0x05)
354#define MAX3107_BRG13_IB230400 (0x000000 | 0x03)
355#define MAX3107_BRG13_IB460800 (0x000000 | 0x00)
356#define MAX3107_BRG13_IB921600 (0x000000 | 0x00)
357
358
359struct baud_table {
360 int baud;
361 u32 new_brg;
362};
363
364struct max3107_port {
365 /* UART port structure */
366 struct uart_port port;
367
368 /* SPI device structure */
369 struct spi_device *spi;
370
371#if defined(CONFIG_GPIOLIB)
372 /* GPIO chip stucture */
373 struct gpio_chip chip;
374#endif
375
376 /* Workqueue that does all the magic */
377 struct workqueue_struct *workqueue;
378 struct work_struct work;
379
380 /* Lock for shared data */
381 spinlock_t data_lock;
382
383 /* Device configuration */
384 int ext_clk; /* 1 if external clock used */
385 int loopback; /* Current loopback mode state */
386 int baud; /* Current baud rate */
387
388 /* State flags */
389 int suspended; /* Indicates suspend mode */
390 int tx_fifo_empty; /* Flag for TX FIFO state */
391 int rx_enabled; /* Flag for receiver state */
392 int tx_enabled; /* Flag for transmitter state */
393
394 u16 irqen_reg; /* Current IRQ enable register value */
395 /* Shared data */
396 u16 mode1_reg; /* Current mode1 register value*/
397 int mode1_commit; /* Flag for setting new mode1 register value */
398 u16 lcr_reg; /* Current LCR register value */
399 int lcr_commit; /* Flag for setting new LCR register value */
400 u32 brg_cfg; /* Current Baud rate generator config */
401 int brg_commit; /* Flag for setting new baud rate generator
402 * config
403 */
404 struct baud_table *baud_tbl;
405 int handle_irq; /* Indicates that IRQ should be handled */
406
407 /* Rx buffer and str*/
408 u16 *rxbuf;
409 u8 *rxstr;
410 /* Tx buffer*/
411 u16 *txbuf;
412
413 struct max3107_plat *pdata; /* Platform data */
414};
415
416/* Platform data structure */
417struct max3107_plat {
418 /* Loopback mode enable */
419 int loopback;
420 /* External clock enable */
421 int ext_clk;
422 /* Called during the register initialisation */
423 void (*init)(struct max3107_port *s);
424 /* Called when the port is found and configured */
425 int (*configure)(struct max3107_port *s);
426 /* HW suspend function */
427 void (*hw_suspend) (struct max3107_port *s, int suspend);
428 /* Polling mode enable */
429 int polled_mode;
430 /* Polling period if polling mode enabled */
431 int poll_time;
432};
433
434extern int max3107_rw(struct max3107_port *s, u8 *tx, u8 *rx, int len);
435extern void max3107_hw_susp(struct max3107_port *s, int suspend);
436extern int max3107_probe(struct spi_device *spi, struct max3107_plat *pdata);
437extern int max3107_remove(struct spi_device *spi);
438extern int max3107_suspend(struct spi_device *spi, pm_message_t state);
439extern int max3107_resume(struct spi_device *spi);
440
441#endif /* _LINUX_SERIAL_MAX3107_H */
diff --git a/drivers/serial/mcf.c b/drivers/serial/mcf.c
index b5aaef965f24..3394b7cc1722 100644
--- a/drivers/serial/mcf.c
+++ b/drivers/serial/mcf.c
@@ -70,16 +70,14 @@ static unsigned int mcf_tx_empty(struct uart_port *port)
70static unsigned int mcf_get_mctrl(struct uart_port *port) 70static unsigned int mcf_get_mctrl(struct uart_port *port)
71{ 71{
72 struct mcf_uart *pp = container_of(port, struct mcf_uart, port); 72 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
73 unsigned long flags;
74 unsigned int sigs; 73 unsigned int sigs;
75 74
76 spin_lock_irqsave(&port->lock, flags);
77 sigs = (readb(port->membase + MCFUART_UIPR) & MCFUART_UIPR_CTS) ? 75 sigs = (readb(port->membase + MCFUART_UIPR) & MCFUART_UIPR_CTS) ?
78 0 : TIOCM_CTS; 76 0 : TIOCM_CTS;
79 sigs |= (pp->sigs & TIOCM_RTS); 77 sigs |= (pp->sigs & TIOCM_RTS);
80 sigs |= (mcf_getppdcd(port->line) ? TIOCM_CD : 0); 78 sigs |= (mcf_getppdcd(port->line) ? TIOCM_CD : 0);
81 sigs |= (mcf_getppdtr(port->line) ? TIOCM_DTR : 0); 79 sigs |= (mcf_getppdtr(port->line) ? TIOCM_DTR : 0);
82 spin_unlock_irqrestore(&port->lock, flags); 80
83 return sigs; 81 return sigs;
84} 82}
85 83
@@ -88,16 +86,13 @@ static unsigned int mcf_get_mctrl(struct uart_port *port)
88static void mcf_set_mctrl(struct uart_port *port, unsigned int sigs) 86static void mcf_set_mctrl(struct uart_port *port, unsigned int sigs)
89{ 87{
90 struct mcf_uart *pp = container_of(port, struct mcf_uart, port); 88 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
91 unsigned long flags;
92 89
93 spin_lock_irqsave(&port->lock, flags);
94 pp->sigs = sigs; 90 pp->sigs = sigs;
95 mcf_setppdtr(port->line, (sigs & TIOCM_DTR)); 91 mcf_setppdtr(port->line, (sigs & TIOCM_DTR));
96 if (sigs & TIOCM_RTS) 92 if (sigs & TIOCM_RTS)
97 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1); 93 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1);
98 else 94 else
99 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP0); 95 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP0);
100 spin_unlock_irqrestore(&port->lock, flags);
101} 96}
102 97
103/****************************************************************************/ 98/****************************************************************************/
@@ -105,12 +100,9 @@ static void mcf_set_mctrl(struct uart_port *port, unsigned int sigs)
105static void mcf_start_tx(struct uart_port *port) 100static void mcf_start_tx(struct uart_port *port)
106{ 101{
107 struct mcf_uart *pp = container_of(port, struct mcf_uart, port); 102 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
108 unsigned long flags;
109 103
110 spin_lock_irqsave(&port->lock, flags);
111 pp->imr |= MCFUART_UIR_TXREADY; 104 pp->imr |= MCFUART_UIR_TXREADY;
112 writeb(pp->imr, port->membase + MCFUART_UIMR); 105 writeb(pp->imr, port->membase + MCFUART_UIMR);
113 spin_unlock_irqrestore(&port->lock, flags);
114} 106}
115 107
116/****************************************************************************/ 108/****************************************************************************/
@@ -118,12 +110,9 @@ static void mcf_start_tx(struct uart_port *port)
118static void mcf_stop_tx(struct uart_port *port) 110static void mcf_stop_tx(struct uart_port *port)
119{ 111{
120 struct mcf_uart *pp = container_of(port, struct mcf_uart, port); 112 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
121 unsigned long flags;
122 113
123 spin_lock_irqsave(&port->lock, flags);
124 pp->imr &= ~MCFUART_UIR_TXREADY; 114 pp->imr &= ~MCFUART_UIR_TXREADY;
125 writeb(pp->imr, port->membase + MCFUART_UIMR); 115 writeb(pp->imr, port->membase + MCFUART_UIMR);
126 spin_unlock_irqrestore(&port->lock, flags);
127} 116}
128 117
129/****************************************************************************/ 118/****************************************************************************/
@@ -131,12 +120,9 @@ static void mcf_stop_tx(struct uart_port *port)
131static void mcf_stop_rx(struct uart_port *port) 120static void mcf_stop_rx(struct uart_port *port)
132{ 121{
133 struct mcf_uart *pp = container_of(port, struct mcf_uart, port); 122 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
134 unsigned long flags;
135 123
136 spin_lock_irqsave(&port->lock, flags);
137 pp->imr &= ~MCFUART_UIR_RXREADY; 124 pp->imr &= ~MCFUART_UIR_RXREADY;
138 writeb(pp->imr, port->membase + MCFUART_UIMR); 125 writeb(pp->imr, port->membase + MCFUART_UIMR);
139 spin_unlock_irqrestore(&port->lock, flags);
140} 126}
141 127
142/****************************************************************************/ 128/****************************************************************************/
@@ -366,13 +352,22 @@ static irqreturn_t mcf_interrupt(int irq, void *data)
366 struct uart_port *port = data; 352 struct uart_port *port = data;
367 struct mcf_uart *pp = container_of(port, struct mcf_uart, port); 353 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
368 unsigned int isr; 354 unsigned int isr;
355 irqreturn_t ret = IRQ_NONE;
369 356
370 isr = readb(port->membase + MCFUART_UISR) & pp->imr; 357 isr = readb(port->membase + MCFUART_UISR) & pp->imr;
371 if (isr & MCFUART_UIR_RXREADY) 358
359 spin_lock(&port->lock);
360 if (isr & MCFUART_UIR_RXREADY) {
372 mcf_rx_chars(pp); 361 mcf_rx_chars(pp);
373 if (isr & MCFUART_UIR_TXREADY) 362 ret = IRQ_HANDLED;
363 }
364 if (isr & MCFUART_UIR_TXREADY) {
374 mcf_tx_chars(pp); 365 mcf_tx_chars(pp);
375 return IRQ_HANDLED; 366 ret = IRQ_HANDLED;
367 }
368 spin_unlock(&port->lock);
369
370 return ret;
376} 371}
377 372
378/****************************************************************************/ 373/****************************************************************************/
diff --git a/drivers/serial/mfd.c b/drivers/serial/mfd.c
new file mode 100644
index 000000000000..bc9af503907f
--- /dev/null
+++ b/drivers/serial/mfd.c
@@ -0,0 +1,1498 @@
1/*
2 * mfd.c: driver for High Speed UART device of Intel Medfield platform
3 *
4 * Refer pxa.c, 8250.c and some other drivers in drivers/serial/
5 *
6 * (C) Copyright 2010 Intel Corporation
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; version 2
11 * of the License.
12 */
13
14/* Notes:
15 * 1. DMA channel allocation: 0/1 channel are assigned to port 0,
16 * 2/3 chan to port 1, 4/5 chan to port 3. Even number chans
17 * are used for RX, odd chans for TX
18 *
19 * 2. In A0 stepping, UART will not support TX half empty flag
20 *
21 * 3. The RI/DSR/DCD/DTR are not pinned out, DCD & DSR are always
22 * asserted, only when the HW is reset the DDCD and DDSR will
23 * be triggered
24 */
25
26#include <linux/module.h>
27#include <linux/init.h>
28#include <linux/console.h>
29#include <linux/sysrq.h>
30#include <linux/serial_reg.h>
31#include <linux/circ_buf.h>
32#include <linux/delay.h>
33#include <linux/interrupt.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/serial_core.h>
37#include <linux/serial_mfd.h>
38#include <linux/dma-mapping.h>
39#include <linux/pci.h>
40#include <linux/io.h>
41#include <linux/debugfs.h>
42
43#define MFD_HSU_A0_STEPPING 1
44
45#define HSU_DMA_BUF_SIZE 2048
46
47#define chan_readl(chan, offset) readl(chan->reg + offset)
48#define chan_writel(chan, offset, val) writel(val, chan->reg + offset)
49
50#define mfd_readl(obj, offset) readl(obj->reg + offset)
51#define mfd_writel(obj, offset, val) writel(val, obj->reg + offset)
52
53#define HSU_DMA_TIMEOUT_CHECK_FREQ (HZ/10)
54
55struct hsu_dma_buffer {
56 u8 *buf;
57 dma_addr_t dma_addr;
58 u32 dma_size;
59 u32 ofs;
60};
61
62struct hsu_dma_chan {
63 u32 id;
64 enum dma_data_direction dirt;
65 struct uart_hsu_port *uport;
66 void __iomem *reg;
67 struct timer_list rx_timer; /* only needed by RX channel */
68};
69
70struct uart_hsu_port {
71 struct uart_port port;
72 unsigned char ier;
73 unsigned char lcr;
74 unsigned char mcr;
75 unsigned int lsr_break_flag;
76 char name[12];
77 int index;
78 struct device *dev;
79
80 struct hsu_dma_chan *txc;
81 struct hsu_dma_chan *rxc;
82 struct hsu_dma_buffer txbuf;
83 struct hsu_dma_buffer rxbuf;
84 int use_dma; /* flag for DMA/PIO */
85 int running;
86 int dma_tx_on;
87};
88
89/* Top level data structure of HSU */
90struct hsu_port {
91 void __iomem *reg;
92 unsigned long paddr;
93 unsigned long iolen;
94 u32 irq;
95
96 struct uart_hsu_port port[3];
97 struct hsu_dma_chan chans[10];
98
99 struct dentry *debugfs;
100};
101
102static inline unsigned int serial_in(struct uart_hsu_port *up, int offset)
103{
104 unsigned int val;
105
106 if (offset > UART_MSR) {
107 offset <<= 2;
108 val = readl(up->port.membase + offset);
109 } else
110 val = (unsigned int)readb(up->port.membase + offset);
111
112 return val;
113}
114
115static inline void serial_out(struct uart_hsu_port *up, int offset, int value)
116{
117 if (offset > UART_MSR) {
118 offset <<= 2;
119 writel(value, up->port.membase + offset);
120 } else {
121 unsigned char val = value & 0xff;
122 writeb(val, up->port.membase + offset);
123 }
124}
125
126#ifdef CONFIG_DEBUG_FS
127
128#define HSU_REGS_BUFSIZE 1024
129
130static int hsu_show_regs_open(struct inode *inode, struct file *file)
131{
132 file->private_data = inode->i_private;
133 return 0;
134}
135
136static ssize_t port_show_regs(struct file *file, char __user *user_buf,
137 size_t count, loff_t *ppos)
138{
139 struct uart_hsu_port *up = file->private_data;
140 char *buf;
141 u32 len = 0;
142 ssize_t ret;
143
144 buf = kzalloc(HSU_REGS_BUFSIZE, GFP_KERNEL);
145 if (!buf)
146 return 0;
147
148 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
149 "MFD HSU port[%d] regs:\n", up->index);
150
151 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
152 "=================================\n");
153 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
154 "IER: \t\t0x%08x\n", serial_in(up, UART_IER));
155 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
156 "IIR: \t\t0x%08x\n", serial_in(up, UART_IIR));
157 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
158 "LCR: \t\t0x%08x\n", serial_in(up, UART_LCR));
159 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
160 "MCR: \t\t0x%08x\n", serial_in(up, UART_MCR));
161 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
162 "LSR: \t\t0x%08x\n", serial_in(up, UART_LSR));
163 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
164 "MSR: \t\t0x%08x\n", serial_in(up, UART_MSR));
165 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
166 "FOR: \t\t0x%08x\n", serial_in(up, UART_FOR));
167 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
168 "PS: \t\t0x%08x\n", serial_in(up, UART_PS));
169 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
170 "MUL: \t\t0x%08x\n", serial_in(up, UART_MUL));
171 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
172 "DIV: \t\t0x%08x\n", serial_in(up, UART_DIV));
173
174 ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
175 kfree(buf);
176 return ret;
177}
178
179static ssize_t dma_show_regs(struct file *file, char __user *user_buf,
180 size_t count, loff_t *ppos)
181{
182 struct hsu_dma_chan *chan = file->private_data;
183 char *buf;
184 u32 len = 0;
185 ssize_t ret;
186
187 buf = kzalloc(HSU_REGS_BUFSIZE, GFP_KERNEL);
188 if (!buf)
189 return 0;
190
191 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
192 "MFD HSU DMA channel [%d] regs:\n", chan->id);
193
194 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
195 "=================================\n");
196 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
197 "CR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_CR));
198 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
199 "DCR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_DCR));
200 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
201 "BSR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_BSR));
202 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
203 "MOTSR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_MOTSR));
204 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
205 "D0SAR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_D0SAR));
206 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
207 "D0TSR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_D0TSR));
208 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
209 "D0SAR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_D1SAR));
210 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
211 "D0TSR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_D1TSR));
212 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
213 "D0SAR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_D2SAR));
214 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
215 "D0TSR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_D2TSR));
216 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
217 "D0SAR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_D3SAR));
218 len += snprintf(buf + len, HSU_REGS_BUFSIZE - len,
219 "D0TSR: \t\t0x%08x\n", chan_readl(chan, HSU_CH_D3TSR));
220
221 ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
222 kfree(buf);
223 return ret;
224}
225
226static const struct file_operations port_regs_ops = {
227 .owner = THIS_MODULE,
228 .open = hsu_show_regs_open,
229 .read = port_show_regs,
230};
231
232static const struct file_operations dma_regs_ops = {
233 .owner = THIS_MODULE,
234 .open = hsu_show_regs_open,
235 .read = dma_show_regs,
236};
237
238static int hsu_debugfs_init(struct hsu_port *hsu)
239{
240 int i;
241 char name[32];
242
243 hsu->debugfs = debugfs_create_dir("hsu", NULL);
244 if (!hsu->debugfs)
245 return -ENOMEM;
246
247 for (i = 0; i < 3; i++) {
248 snprintf(name, sizeof(name), "port_%d_regs", i);
249 debugfs_create_file(name, S_IFREG | S_IRUGO,
250 hsu->debugfs, (void *)(&hsu->port[i]), &port_regs_ops);
251 }
252
253 for (i = 0; i < 6; i++) {
254 snprintf(name, sizeof(name), "dma_chan_%d_regs", i);
255 debugfs_create_file(name, S_IFREG | S_IRUGO,
256 hsu->debugfs, (void *)&hsu->chans[i], &dma_regs_ops);
257 }
258
259 return 0;
260}
261
262static void hsu_debugfs_remove(struct hsu_port *hsu)
263{
264 if (hsu->debugfs)
265 debugfs_remove_recursive(hsu->debugfs);
266}
267
268#else
269static inline int hsu_debugfs_init(struct hsu_port *hsu)
270{
271 return 0;
272}
273
274static inline void hsu_debugfs_remove(struct hsu_port *hsu)
275{
276}
277#endif /* CONFIG_DEBUG_FS */
278
279static void serial_hsu_enable_ms(struct uart_port *port)
280{
281 struct uart_hsu_port *up =
282 container_of(port, struct uart_hsu_port, port);
283
284 up->ier |= UART_IER_MSI;
285 serial_out(up, UART_IER, up->ier);
286}
287
288void hsu_dma_tx(struct uart_hsu_port *up)
289{
290 struct circ_buf *xmit = &up->port.state->xmit;
291 struct hsu_dma_buffer *dbuf = &up->txbuf;
292 int count;
293
294 /* test_and_set_bit may be better, but anyway it's in lock protected mode */
295 if (up->dma_tx_on)
296 return;
297
298 /* Update the circ buf info */
299 xmit->tail += dbuf->ofs;
300 xmit->tail &= UART_XMIT_SIZE - 1;
301
302 up->port.icount.tx += dbuf->ofs;
303 dbuf->ofs = 0;
304
305 /* Disable the channel */
306 chan_writel(up->txc, HSU_CH_CR, 0x0);
307
308 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&up->port)) {
309 dma_sync_single_for_device(up->port.dev,
310 dbuf->dma_addr,
311 dbuf->dma_size,
312 DMA_TO_DEVICE);
313
314 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
315 dbuf->ofs = count;
316
317 /* Reprogram the channel */
318 chan_writel(up->txc, HSU_CH_D0SAR, dbuf->dma_addr + xmit->tail);
319 chan_writel(up->txc, HSU_CH_D0TSR, count);
320
321 /* Reenable the channel */
322 chan_writel(up->txc, HSU_CH_DCR, 0x1
323 | (0x1 << 8)
324 | (0x1 << 16)
325 | (0x1 << 24));
326 up->dma_tx_on = 1;
327 chan_writel(up->txc, HSU_CH_CR, 0x1);
328 }
329
330 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
331 uart_write_wakeup(&up->port);
332}
333
334/* The buffer is already cache coherent */
335void hsu_dma_start_rx_chan(struct hsu_dma_chan *rxc, struct hsu_dma_buffer *dbuf)
336{
337 dbuf->ofs = 0;
338
339 chan_writel(rxc, HSU_CH_BSR, 32);
340 chan_writel(rxc, HSU_CH_MOTSR, 4);
341
342 chan_writel(rxc, HSU_CH_D0SAR, dbuf->dma_addr);
343 chan_writel(rxc, HSU_CH_D0TSR, dbuf->dma_size);
344 chan_writel(rxc, HSU_CH_DCR, 0x1 | (0x1 << 8)
345 | (0x1 << 16)
346 | (0x1 << 24) /* timeout bit, see HSU Errata 1 */
347 );
348 chan_writel(rxc, HSU_CH_CR, 0x3);
349
350 mod_timer(&rxc->rx_timer, jiffies + HSU_DMA_TIMEOUT_CHECK_FREQ);
351}
352
353/* Protected by spin_lock_irqsave(port->lock) */
354static void serial_hsu_start_tx(struct uart_port *port)
355{
356 struct uart_hsu_port *up =
357 container_of(port, struct uart_hsu_port, port);
358
359 if (up->use_dma) {
360 hsu_dma_tx(up);
361 } else if (!(up->ier & UART_IER_THRI)) {
362 up->ier |= UART_IER_THRI;
363 serial_out(up, UART_IER, up->ier);
364 }
365}
366
367static void serial_hsu_stop_tx(struct uart_port *port)
368{
369 struct uart_hsu_port *up =
370 container_of(port, struct uart_hsu_port, port);
371 struct hsu_dma_chan *txc = up->txc;
372
373 if (up->use_dma)
374 chan_writel(txc, HSU_CH_CR, 0x0);
375 else if (up->ier & UART_IER_THRI) {
376 up->ier &= ~UART_IER_THRI;
377 serial_out(up, UART_IER, up->ier);
378 }
379}
380
381/* This is always called in spinlock protected mode, so
382 * modify timeout timer is safe here */
383void hsu_dma_rx(struct uart_hsu_port *up, u32 int_sts)
384{
385 struct hsu_dma_buffer *dbuf = &up->rxbuf;
386 struct hsu_dma_chan *chan = up->rxc;
387 struct uart_port *port = &up->port;
388 struct tty_struct *tty = port->state->port.tty;
389 int count;
390
391 if (!tty)
392 return;
393
394 /*
395 * First need to know how many is already transferred,
396 * then check if its a timeout DMA irq, and return
397 * the trail bytes out, push them up and reenable the
398 * channel
399 */
400
401 /* Timeout IRQ, need wait some time, see Errata 2 */
402 if (int_sts & 0xf00)
403 udelay(2);
404
405 /* Stop the channel */
406 chan_writel(chan, HSU_CH_CR, 0x0);
407
408 count = chan_readl(chan, HSU_CH_D0SAR) - dbuf->dma_addr;
409 if (!count) {
410 /* Restart the channel before we leave */
411 chan_writel(chan, HSU_CH_CR, 0x3);
412 return;
413 }
414 del_timer(&chan->rx_timer);
415
416 dma_sync_single_for_cpu(port->dev, dbuf->dma_addr,
417 dbuf->dma_size, DMA_FROM_DEVICE);
418
419 /*
420 * Head will only wrap around when we recycle
421 * the DMA buffer, and when that happens, we
422 * explicitly set tail to 0. So head will
423 * always be greater than tail.
424 */
425 tty_insert_flip_string(tty, dbuf->buf, count);
426 port->icount.rx += count;
427
428 dma_sync_single_for_device(up->port.dev, dbuf->dma_addr,
429 dbuf->dma_size, DMA_FROM_DEVICE);
430
431 /* Reprogram the channel */
432 chan_writel(chan, HSU_CH_D0SAR, dbuf->dma_addr);
433 chan_writel(chan, HSU_CH_D0TSR, dbuf->dma_size);
434 chan_writel(chan, HSU_CH_DCR, 0x1
435 | (0x1 << 8)
436 | (0x1 << 16)
437 | (0x1 << 24) /* timeout bit, see HSU Errata 1 */
438 );
439 tty_flip_buffer_push(tty);
440
441 chan_writel(chan, HSU_CH_CR, 0x3);
442 chan->rx_timer.expires = jiffies + HSU_DMA_TIMEOUT_CHECK_FREQ;
443 add_timer(&chan->rx_timer);
444
445}
446
447static void serial_hsu_stop_rx(struct uart_port *port)
448{
449 struct uart_hsu_port *up =
450 container_of(port, struct uart_hsu_port, port);
451 struct hsu_dma_chan *chan = up->rxc;
452
453 if (up->use_dma)
454 chan_writel(chan, HSU_CH_CR, 0x2);
455 else {
456 up->ier &= ~UART_IER_RLSI;
457 up->port.read_status_mask &= ~UART_LSR_DR;
458 serial_out(up, UART_IER, up->ier);
459 }
460}
461
462static inline void receive_chars(struct uart_hsu_port *up, int *status)
463{
464 struct tty_struct *tty = up->port.state->port.tty;
465 unsigned int ch, flag;
466 unsigned int max_count = 256;
467
468 if (!tty)
469 return;
470
471 do {
472 ch = serial_in(up, UART_RX);
473 flag = TTY_NORMAL;
474 up->port.icount.rx++;
475
476 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
477 UART_LSR_FE | UART_LSR_OE))) {
478
479 dev_warn(up->dev, "We really rush into ERR/BI case"
480 "status = 0x%02x", *status);
481 /* For statistics only */
482 if (*status & UART_LSR_BI) {
483 *status &= ~(UART_LSR_FE | UART_LSR_PE);
484 up->port.icount.brk++;
485 /*
486 * We do the SysRQ and SAK checking
487 * here because otherwise the break
488 * may get masked by ignore_status_mask
489 * or read_status_mask.
490 */
491 if (uart_handle_break(&up->port))
492 goto ignore_char;
493 } else if (*status & UART_LSR_PE)
494 up->port.icount.parity++;
495 else if (*status & UART_LSR_FE)
496 up->port.icount.frame++;
497 if (*status & UART_LSR_OE)
498 up->port.icount.overrun++;
499
500 /* Mask off conditions which should be ignored. */
501 *status &= up->port.read_status_mask;
502
503#ifdef CONFIG_SERIAL_MFD_HSU_CONSOLE
504 if (up->port.cons &&
505 up->port.cons->index == up->port.line) {
506 /* Recover the break flag from console xmit */
507 *status |= up->lsr_break_flag;
508 up->lsr_break_flag = 0;
509 }
510#endif
511 if (*status & UART_LSR_BI) {
512 flag = TTY_BREAK;
513 } else if (*status & UART_LSR_PE)
514 flag = TTY_PARITY;
515 else if (*status & UART_LSR_FE)
516 flag = TTY_FRAME;
517 }
518
519 if (uart_handle_sysrq_char(&up->port, ch))
520 goto ignore_char;
521
522 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
523 ignore_char:
524 *status = serial_in(up, UART_LSR);
525 } while ((*status & UART_LSR_DR) && max_count--);
526 tty_flip_buffer_push(tty);
527}
528
529static void transmit_chars(struct uart_hsu_port *up)
530{
531 struct circ_buf *xmit = &up->port.state->xmit;
532 int count;
533
534 if (up->port.x_char) {
535 serial_out(up, UART_TX, up->port.x_char);
536 up->port.icount.tx++;
537 up->port.x_char = 0;
538 return;
539 }
540 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
541 serial_hsu_stop_tx(&up->port);
542 return;
543 }
544
545#ifndef MFD_HSU_A0_STEPPING
546 count = up->port.fifosize / 2;
547#else
548 /*
549 * A0 only supports fully empty IRQ, and the first char written
550 * into it won't clear the EMPT bit, so we may need be cautious
551 * by useing a shorter buffer
552 */
553 count = up->port.fifosize - 4;
554#endif
555 do {
556 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
557 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
558
559 up->port.icount.tx++;
560 if (uart_circ_empty(xmit))
561 break;
562 } while (--count > 0);
563
564 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
565 uart_write_wakeup(&up->port);
566
567 if (uart_circ_empty(xmit))
568 serial_hsu_stop_tx(&up->port);
569}
570
571static inline void check_modem_status(struct uart_hsu_port *up)
572{
573 int status;
574
575 status = serial_in(up, UART_MSR);
576
577 if ((status & UART_MSR_ANY_DELTA) == 0)
578 return;
579
580 if (status & UART_MSR_TERI)
581 up->port.icount.rng++;
582 if (status & UART_MSR_DDSR)
583 up->port.icount.dsr++;
584 /* We may only get DDCD when HW init and reset */
585 if (status & UART_MSR_DDCD)
586 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
587 /* Will start/stop_tx accordingly */
588 if (status & UART_MSR_DCTS)
589 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
590
591 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
592}
593
594/*
595 * This handles the interrupt from one port.
596 */
597static irqreturn_t port_irq(int irq, void *dev_id)
598{
599 struct uart_hsu_port *up = dev_id;
600 unsigned int iir, lsr;
601 unsigned long flags;
602
603 if (unlikely(!up->running))
604 return IRQ_NONE;
605
606 spin_lock_irqsave(&up->port.lock, flags);
607 if (up->use_dma) {
608 lsr = serial_in(up, UART_LSR);
609 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |
610 UART_LSR_FE | UART_LSR_OE)))
611 dev_warn(up->dev,
612 "Got lsr irq while using DMA, lsr = 0x%2x\n",
613 lsr);
614 check_modem_status(up);
615 spin_unlock_irqrestore(&up->port.lock, flags);
616 return IRQ_HANDLED;
617 }
618
619 iir = serial_in(up, UART_IIR);
620 if (iir & UART_IIR_NO_INT) {
621 spin_unlock_irqrestore(&up->port.lock, flags);
622 return IRQ_NONE;
623 }
624
625 lsr = serial_in(up, UART_LSR);
626 if (lsr & UART_LSR_DR)
627 receive_chars(up, &lsr);
628 check_modem_status(up);
629
630 /* lsr will be renewed during the receive_chars */
631 if (lsr & UART_LSR_THRE)
632 transmit_chars(up);
633
634 spin_unlock_irqrestore(&up->port.lock, flags);
635 return IRQ_HANDLED;
636}
637
638static inline void dma_chan_irq(struct hsu_dma_chan *chan)
639{
640 struct uart_hsu_port *up = chan->uport;
641 unsigned long flags;
642 u32 int_sts;
643
644 spin_lock_irqsave(&up->port.lock, flags);
645
646 if (!up->use_dma || !up->running)
647 goto exit;
648
649 /*
650 * No matter what situation, need read clear the IRQ status
651 * There is a bug, see Errata 5, HSD 2900918
652 */
653 int_sts = chan_readl(chan, HSU_CH_SR);
654
655 /* Rx channel */
656 if (chan->dirt == DMA_FROM_DEVICE)
657 hsu_dma_rx(up, int_sts);
658
659 /* Tx channel */
660 if (chan->dirt == DMA_TO_DEVICE) {
661 chan_writel(chan, HSU_CH_CR, 0x0);
662 up->dma_tx_on = 0;
663 hsu_dma_tx(up);
664 }
665
666exit:
667 spin_unlock_irqrestore(&up->port.lock, flags);
668 return;
669}
670
671static irqreturn_t dma_irq(int irq, void *dev_id)
672{
673 struct hsu_port *hsu = dev_id;
674 u32 int_sts, i;
675
676 int_sts = mfd_readl(hsu, HSU_GBL_DMAISR);
677
678 /* Currently we only have 6 channels may be used */
679 for (i = 0; i < 6; i++) {
680 if (int_sts & 0x1)
681 dma_chan_irq(&hsu->chans[i]);
682 int_sts >>= 1;
683 }
684
685 return IRQ_HANDLED;
686}
687
688static unsigned int serial_hsu_tx_empty(struct uart_port *port)
689{
690 struct uart_hsu_port *up =
691 container_of(port, struct uart_hsu_port, port);
692 unsigned long flags;
693 unsigned int ret;
694
695 spin_lock_irqsave(&up->port.lock, flags);
696 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
697 spin_unlock_irqrestore(&up->port.lock, flags);
698
699 return ret;
700}
701
702static unsigned int serial_hsu_get_mctrl(struct uart_port *port)
703{
704 struct uart_hsu_port *up =
705 container_of(port, struct uart_hsu_port, port);
706 unsigned char status;
707 unsigned int ret;
708
709 status = serial_in(up, UART_MSR);
710
711 ret = 0;
712 if (status & UART_MSR_DCD)
713 ret |= TIOCM_CAR;
714 if (status & UART_MSR_RI)
715 ret |= TIOCM_RNG;
716 if (status & UART_MSR_DSR)
717 ret |= TIOCM_DSR;
718 if (status & UART_MSR_CTS)
719 ret |= TIOCM_CTS;
720 return ret;
721}
722
723static void serial_hsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
724{
725 struct uart_hsu_port *up =
726 container_of(port, struct uart_hsu_port, port);
727 unsigned char mcr = 0;
728
729 if (mctrl & TIOCM_RTS)
730 mcr |= UART_MCR_RTS;
731 if (mctrl & TIOCM_DTR)
732 mcr |= UART_MCR_DTR;
733 if (mctrl & TIOCM_OUT1)
734 mcr |= UART_MCR_OUT1;
735 if (mctrl & TIOCM_OUT2)
736 mcr |= UART_MCR_OUT2;
737 if (mctrl & TIOCM_LOOP)
738 mcr |= UART_MCR_LOOP;
739
740 mcr |= up->mcr;
741
742 serial_out(up, UART_MCR, mcr);
743}
744
745static void serial_hsu_break_ctl(struct uart_port *port, int break_state)
746{
747 struct uart_hsu_port *up =
748 container_of(port, struct uart_hsu_port, port);
749 unsigned long flags;
750
751 spin_lock_irqsave(&up->port.lock, flags);
752 if (break_state == -1)
753 up->lcr |= UART_LCR_SBC;
754 else
755 up->lcr &= ~UART_LCR_SBC;
756 serial_out(up, UART_LCR, up->lcr);
757 spin_unlock_irqrestore(&up->port.lock, flags);
758}
759
760/*
761 * What special to do:
762 * 1. chose the 64B fifo mode
763 * 2. make sure not to select half empty mode for A0 stepping
764 * 3. start dma or pio depends on configuration
765 * 4. we only allocate dma memory when needed
766 */
767static int serial_hsu_startup(struct uart_port *port)
768{
769 struct uart_hsu_port *up =
770 container_of(port, struct uart_hsu_port, port);
771 unsigned long flags;
772
773 /*
774 * Clear the FIFO buffers and disable them.
775 * (they will be reenabled in set_termios())
776 */
777 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
778 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
779 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
780 serial_out(up, UART_FCR, 0);
781
782 /* Clear the interrupt registers. */
783 (void) serial_in(up, UART_LSR);
784 (void) serial_in(up, UART_RX);
785 (void) serial_in(up, UART_IIR);
786 (void) serial_in(up, UART_MSR);
787
788 /* Now, initialize the UART, default is 8n1 */
789 serial_out(up, UART_LCR, UART_LCR_WLEN8);
790
791 spin_lock_irqsave(&up->port.lock, flags);
792
793 up->port.mctrl |= TIOCM_OUT2;
794 serial_hsu_set_mctrl(&up->port, up->port.mctrl);
795
796 /*
797 * Finally, enable interrupts. Note: Modem status interrupts
798 * are set via set_termios(), which will be occurring imminently
799 * anyway, so we don't enable them here.
800 */
801 if (!up->use_dma)
802 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE;
803 else
804 up->ier = 0;
805 serial_out(up, UART_IER, up->ier);
806
807 spin_unlock_irqrestore(&up->port.lock, flags);
808
809 /* DMA init */
810 if (up->use_dma) {
811 struct hsu_dma_buffer *dbuf;
812 struct circ_buf *xmit = &port->state->xmit;
813
814 up->dma_tx_on = 0;
815
816 /* First allocate the RX buffer */
817 dbuf = &up->rxbuf;
818 dbuf->buf = kzalloc(HSU_DMA_BUF_SIZE, GFP_KERNEL);
819 if (!dbuf->buf) {
820 up->use_dma = 0;
821 goto exit;
822 }
823 dbuf->dma_addr = dma_map_single(port->dev,
824 dbuf->buf,
825 HSU_DMA_BUF_SIZE,
826 DMA_FROM_DEVICE);
827 dbuf->dma_size = HSU_DMA_BUF_SIZE;
828
829 /* Start the RX channel right now */
830 hsu_dma_start_rx_chan(up->rxc, dbuf);
831
832 /* Next init the TX DMA */
833 dbuf = &up->txbuf;
834 dbuf->buf = xmit->buf;
835 dbuf->dma_addr = dma_map_single(port->dev,
836 dbuf->buf,
837 UART_XMIT_SIZE,
838 DMA_TO_DEVICE);
839 dbuf->dma_size = UART_XMIT_SIZE;
840
841 /* This should not be changed all around */
842 chan_writel(up->txc, HSU_CH_BSR, 32);
843 chan_writel(up->txc, HSU_CH_MOTSR, 4);
844 dbuf->ofs = 0;
845 }
846
847exit:
848 /* And clear the interrupt registers again for luck. */
849 (void) serial_in(up, UART_LSR);
850 (void) serial_in(up, UART_RX);
851 (void) serial_in(up, UART_IIR);
852 (void) serial_in(up, UART_MSR);
853
854 up->running = 1;
855 return 0;
856}
857
858static void serial_hsu_shutdown(struct uart_port *port)
859{
860 struct uart_hsu_port *up =
861 container_of(port, struct uart_hsu_port, port);
862 unsigned long flags;
863
864 del_timer_sync(&up->rxc->rx_timer);
865
866 /* Disable interrupts from this port */
867 up->ier = 0;
868 serial_out(up, UART_IER, 0);
869 up->running = 0;
870
871 spin_lock_irqsave(&up->port.lock, flags);
872 up->port.mctrl &= ~TIOCM_OUT2;
873 serial_hsu_set_mctrl(&up->port, up->port.mctrl);
874 spin_unlock_irqrestore(&up->port.lock, flags);
875
876 /* Disable break condition and FIFOs */
877 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
878 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
879 UART_FCR_CLEAR_RCVR |
880 UART_FCR_CLEAR_XMIT);
881 serial_out(up, UART_FCR, 0);
882}
883
884static void
885serial_hsu_set_termios(struct uart_port *port, struct ktermios *termios,
886 struct ktermios *old)
887{
888 struct uart_hsu_port *up =
889 container_of(port, struct uart_hsu_port, port);
890 struct tty_struct *tty = port->state->port.tty;
891 unsigned char cval, fcr = 0;
892 unsigned long flags;
893 unsigned int baud, quot;
894 u32 mul = 0x3600;
895 u32 ps = 0x10;
896
897 switch (termios->c_cflag & CSIZE) {
898 case CS5:
899 cval = UART_LCR_WLEN5;
900 break;
901 case CS6:
902 cval = UART_LCR_WLEN6;
903 break;
904 case CS7:
905 cval = UART_LCR_WLEN7;
906 break;
907 default:
908 case CS8:
909 cval = UART_LCR_WLEN8;
910 break;
911 }
912
913 /* CMSPAR isn't supported by this driver */
914 if (tty)
915 tty->termios->c_cflag &= ~CMSPAR;
916
917 if (termios->c_cflag & CSTOPB)
918 cval |= UART_LCR_STOP;
919 if (termios->c_cflag & PARENB)
920 cval |= UART_LCR_PARITY;
921 if (!(termios->c_cflag & PARODD))
922 cval |= UART_LCR_EPAR;
923
924 /*
925 * For those basic low baud rate we can get the direct
926 * scalar from 2746800, like 115200 = 2746800/24, for those
927 * higher baud rate, we have to handle them case by case,
928 * but DIV reg is never touched as its default value 0x3d09
929 */
930 baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
931 quot = uart_get_divisor(port, baud);
932
933 switch (baud) {
934 case 3500000:
935 mul = 0x3345;
936 ps = 0xC;
937 quot = 1;
938 break;
939 case 2500000:
940 mul = 0x2710;
941 ps = 0x10;
942 quot = 1;
943 break;
944 case 18432000:
945 mul = 0x2400;
946 ps = 0x10;
947 quot = 1;
948 break;
949 case 1500000:
950 mul = 0x1D4C;
951 ps = 0xc;
952 quot = 1;
953 break;
954 default:
955 ;
956 }
957
958 if ((up->port.uartclk / quot) < (2400 * 16))
959 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_HSU_64_1B;
960 else if ((up->port.uartclk / quot) < (230400 * 16))
961 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_HSU_64_16B;
962 else
963 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_HSU_64_32B;
964
965 fcr |= UART_FCR_HSU_64B_FIFO;
966#ifdef MFD_HSU_A0_STEPPING
967 /* A0 doesn't support half empty IRQ */
968 fcr |= UART_FCR_FULL_EMPT_TXI;
969#endif
970
971 /*
972 * Ok, we're now changing the port state. Do it with
973 * interrupts disabled.
974 */
975 spin_lock_irqsave(&up->port.lock, flags);
976
977 /* Update the per-port timeout */
978 uart_update_timeout(port, termios->c_cflag, baud);
979
980 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
981 if (termios->c_iflag & INPCK)
982 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
983 if (termios->c_iflag & (BRKINT | PARMRK))
984 up->port.read_status_mask |= UART_LSR_BI;
985
986 /* Characters to ignore */
987 up->port.ignore_status_mask = 0;
988 if (termios->c_iflag & IGNPAR)
989 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
990 if (termios->c_iflag & IGNBRK) {
991 up->port.ignore_status_mask |= UART_LSR_BI;
992 /*
993 * If we're ignoring parity and break indicators,
994 * ignore overruns too (for real raw support).
995 */
996 if (termios->c_iflag & IGNPAR)
997 up->port.ignore_status_mask |= UART_LSR_OE;
998 }
999
1000 /* Ignore all characters if CREAD is not set */
1001 if ((termios->c_cflag & CREAD) == 0)
1002 up->port.ignore_status_mask |= UART_LSR_DR;
1003
1004 /*
1005 * CTS flow control flag and modem status interrupts, disable
1006 * MSI by default
1007 */
1008 up->ier &= ~UART_IER_MSI;
1009 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
1010 up->ier |= UART_IER_MSI;
1011
1012 serial_out(up, UART_IER, up->ier);
1013
1014 if (termios->c_cflag & CRTSCTS)
1015 up->mcr |= UART_MCR_AFE | UART_MCR_RTS;
1016 else
1017 up->mcr &= ~UART_MCR_AFE;
1018
1019 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
1020 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
1021 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
1022 serial_out(up, UART_LCR, cval); /* reset DLAB */
1023 serial_out(up, UART_MUL, mul); /* set MUL */
1024 serial_out(up, UART_PS, ps); /* set PS */
1025 up->lcr = cval; /* Save LCR */
1026 serial_hsu_set_mctrl(&up->port, up->port.mctrl);
1027 serial_out(up, UART_FCR, fcr);
1028 spin_unlock_irqrestore(&up->port.lock, flags);
1029}
1030
1031static void
1032serial_hsu_pm(struct uart_port *port, unsigned int state,
1033 unsigned int oldstate)
1034{
1035}
1036
1037static void serial_hsu_release_port(struct uart_port *port)
1038{
1039}
1040
1041static int serial_hsu_request_port(struct uart_port *port)
1042{
1043 return 0;
1044}
1045
1046static void serial_hsu_config_port(struct uart_port *port, int flags)
1047{
1048 struct uart_hsu_port *up =
1049 container_of(port, struct uart_hsu_port, port);
1050 up->port.type = PORT_MFD;
1051}
1052
1053static int
1054serial_hsu_verify_port(struct uart_port *port, struct serial_struct *ser)
1055{
1056 /* We don't want the core code to modify any port params */
1057 return -EINVAL;
1058}
1059
1060static const char *
1061serial_hsu_type(struct uart_port *port)
1062{
1063 struct uart_hsu_port *up =
1064 container_of(port, struct uart_hsu_port, port);
1065 return up->name;
1066}
1067
1068/* Mainly for uart console use */
1069static struct uart_hsu_port *serial_hsu_ports[3];
1070static struct uart_driver serial_hsu_reg;
1071
1072#ifdef CONFIG_SERIAL_MFD_HSU_CONSOLE
1073
1074#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1075
1076/* Wait for transmitter & holding register to empty */
1077static inline void wait_for_xmitr(struct uart_hsu_port *up)
1078{
1079 unsigned int status, tmout = 1000;
1080
1081 /* Wait up to 1ms for the character to be sent. */
1082 do {
1083 status = serial_in(up, UART_LSR);
1084
1085 if (status & UART_LSR_BI)
1086 up->lsr_break_flag = UART_LSR_BI;
1087
1088 if (--tmout == 0)
1089 break;
1090 udelay(1);
1091 } while (!(status & BOTH_EMPTY));
1092
1093 /* Wait up to 1s for flow control if necessary */
1094 if (up->port.flags & UPF_CONS_FLOW) {
1095 tmout = 1000000;
1096 while (--tmout &&
1097 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1098 udelay(1);
1099 }
1100}
1101
1102static void serial_hsu_console_putchar(struct uart_port *port, int ch)
1103{
1104 struct uart_hsu_port *up =
1105 container_of(port, struct uart_hsu_port, port);
1106
1107 wait_for_xmitr(up);
1108 serial_out(up, UART_TX, ch);
1109}
1110
1111/*
1112 * Print a string to the serial port trying not to disturb
1113 * any possible real use of the port...
1114 *
1115 * The console_lock must be held when we get here.
1116 */
1117static void
1118serial_hsu_console_write(struct console *co, const char *s, unsigned int count)
1119{
1120 struct uart_hsu_port *up = serial_hsu_ports[co->index];
1121 unsigned long flags;
1122 unsigned int ier;
1123 int locked = 1;
1124
1125 local_irq_save(flags);
1126 if (up->port.sysrq)
1127 locked = 0;
1128 else if (oops_in_progress) {
1129 locked = spin_trylock(&up->port.lock);
1130 } else
1131 spin_lock(&up->port.lock);
1132
1133 /* First save the IER then disable the interrupts */
1134 ier = serial_in(up, UART_IER);
1135 serial_out(up, UART_IER, 0);
1136
1137 uart_console_write(&up->port, s, count, serial_hsu_console_putchar);
1138
1139 /*
1140 * Finally, wait for transmitter to become empty
1141 * and restore the IER
1142 */
1143 wait_for_xmitr(up);
1144 serial_out(up, UART_IER, ier);
1145
1146 if (locked)
1147 spin_unlock(&up->port.lock);
1148 local_irq_restore(flags);
1149}
1150
1151static struct console serial_hsu_console;
1152
1153static int __init
1154serial_hsu_console_setup(struct console *co, char *options)
1155{
1156 struct uart_hsu_port *up;
1157 int baud = 115200;
1158 int bits = 8;
1159 int parity = 'n';
1160 int flow = 'n';
1161 int ret;
1162
1163 if (co->index == -1 || co->index >= serial_hsu_reg.nr)
1164 co->index = 0;
1165 up = serial_hsu_ports[co->index];
1166 if (!up)
1167 return -ENODEV;
1168
1169 if (options)
1170 uart_parse_options(options, &baud, &parity, &bits, &flow);
1171
1172 ret = uart_set_options(&up->port, co, baud, parity, bits, flow);
1173
1174 return ret;
1175}
1176
1177static struct console serial_hsu_console = {
1178 .name = "ttyMFD",
1179 .write = serial_hsu_console_write,
1180 .device = uart_console_device,
1181 .setup = serial_hsu_console_setup,
1182 .flags = CON_PRINTBUFFER,
1183 .index = 2,
1184 .data = &serial_hsu_reg,
1185};
1186#endif
1187
1188struct uart_ops serial_hsu_pops = {
1189 .tx_empty = serial_hsu_tx_empty,
1190 .set_mctrl = serial_hsu_set_mctrl,
1191 .get_mctrl = serial_hsu_get_mctrl,
1192 .stop_tx = serial_hsu_stop_tx,
1193 .start_tx = serial_hsu_start_tx,
1194 .stop_rx = serial_hsu_stop_rx,
1195 .enable_ms = serial_hsu_enable_ms,
1196 .break_ctl = serial_hsu_break_ctl,
1197 .startup = serial_hsu_startup,
1198 .shutdown = serial_hsu_shutdown,
1199 .set_termios = serial_hsu_set_termios,
1200 .pm = serial_hsu_pm,
1201 .type = serial_hsu_type,
1202 .release_port = serial_hsu_release_port,
1203 .request_port = serial_hsu_request_port,
1204 .config_port = serial_hsu_config_port,
1205 .verify_port = serial_hsu_verify_port,
1206};
1207
1208static struct uart_driver serial_hsu_reg = {
1209 .owner = THIS_MODULE,
1210 .driver_name = "MFD serial",
1211 .dev_name = "ttyMFD",
1212 .major = TTY_MAJOR,
1213 .minor = 128,
1214 .nr = 3,
1215};
1216
1217#ifdef CONFIG_PM
1218static int serial_hsu_suspend(struct pci_dev *pdev, pm_message_t state)
1219{
1220 void *priv = pci_get_drvdata(pdev);
1221 struct uart_hsu_port *up;
1222
1223 /* Make sure this is not the internal dma controller */
1224 if (priv && (pdev->device != 0x081E)) {
1225 up = priv;
1226 uart_suspend_port(&serial_hsu_reg, &up->port);
1227 }
1228
1229 pci_save_state(pdev);
1230 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1231 return 0;
1232}
1233
1234static int serial_hsu_resume(struct pci_dev *pdev)
1235{
1236 void *priv = pci_get_drvdata(pdev);
1237 struct uart_hsu_port *up;
1238 int ret;
1239
1240 pci_set_power_state(pdev, PCI_D0);
1241 pci_restore_state(pdev);
1242
1243 ret = pci_enable_device(pdev);
1244 if (ret)
1245 dev_warn(&pdev->dev,
1246 "HSU: can't re-enable device, try to continue\n");
1247
1248 if (priv && (pdev->device != 0x081E)) {
1249 up = priv;
1250 uart_resume_port(&serial_hsu_reg, &up->port);
1251 }
1252 return 0;
1253}
1254#else
1255#define serial_hsu_suspend NULL
1256#define serial_hsu_resume NULL
1257#endif
1258
1259/* temp global pointer before we settle down on using one or four PCI dev */
1260static struct hsu_port *phsu;
1261
1262static int serial_hsu_probe(struct pci_dev *pdev,
1263 const struct pci_device_id *ent)
1264{
1265 struct uart_hsu_port *uport;
1266 int index, ret;
1267
1268 printk(KERN_INFO "HSU: found PCI Serial controller(ID: %04x:%04x)\n",
1269 pdev->vendor, pdev->device);
1270
1271 switch (pdev->device) {
1272 case 0x081B:
1273 index = 0;
1274 break;
1275 case 0x081C:
1276 index = 1;
1277 break;
1278 case 0x081D:
1279 index = 2;
1280 break;
1281 case 0x081E:
1282 /* internal DMA controller */
1283 index = 3;
1284 break;
1285 default:
1286 dev_err(&pdev->dev, "HSU: out of index!");
1287 return -ENODEV;
1288 }
1289
1290 ret = pci_enable_device(pdev);
1291 if (ret)
1292 return ret;
1293
1294 if (index == 3) {
1295 /* DMA controller */
1296 ret = request_irq(pdev->irq, dma_irq, 0, "hsu_dma", phsu);
1297 if (ret) {
1298 dev_err(&pdev->dev, "can not get IRQ\n");
1299 goto err_disable;
1300 }
1301 pci_set_drvdata(pdev, phsu);
1302 } else {
1303 /* UART port 0~2 */
1304 uport = &phsu->port[index];
1305 uport->port.irq = pdev->irq;
1306 uport->port.dev = &pdev->dev;
1307 uport->dev = &pdev->dev;
1308
1309 ret = request_irq(pdev->irq, port_irq, 0, uport->name, uport);
1310 if (ret) {
1311 dev_err(&pdev->dev, "can not get IRQ\n");
1312 goto err_disable;
1313 }
1314 uart_add_one_port(&serial_hsu_reg, &uport->port);
1315
1316#ifdef CONFIG_SERIAL_MFD_HSU_CONSOLE
1317 if (index == 2) {
1318 register_console(&serial_hsu_console);
1319 uport->port.cons = &serial_hsu_console;
1320 }
1321#endif
1322 pci_set_drvdata(pdev, uport);
1323 }
1324
1325 return 0;
1326
1327err_disable:
1328 pci_disable_device(pdev);
1329 return ret;
1330}
1331
1332static void hsu_dma_rx_timeout(unsigned long data)
1333{
1334 struct hsu_dma_chan *chan = (void *)data;
1335 struct uart_hsu_port *up = chan->uport;
1336 struct hsu_dma_buffer *dbuf = &up->rxbuf;
1337 int count = 0;
1338 unsigned long flags;
1339
1340 spin_lock_irqsave(&up->port.lock, flags);
1341
1342 count = chan_readl(chan, HSU_CH_D0SAR) - dbuf->dma_addr;
1343
1344 if (!count) {
1345 mod_timer(&chan->rx_timer, jiffies + HSU_DMA_TIMEOUT_CHECK_FREQ);
1346 goto exit;
1347 }
1348
1349 hsu_dma_rx(up, 0);
1350exit:
1351 spin_unlock_irqrestore(&up->port.lock, flags);
1352}
1353
1354static void hsu_global_init(void)
1355{
1356 struct hsu_port *hsu;
1357 struct uart_hsu_port *uport;
1358 struct hsu_dma_chan *dchan;
1359 int i, ret;
1360
1361 hsu = kzalloc(sizeof(struct hsu_port), GFP_KERNEL);
1362 if (!hsu)
1363 return;
1364
1365 /* Get basic io resource and map it */
1366 hsu->paddr = 0xffa28000;
1367 hsu->iolen = 0x1000;
1368
1369 if (!(request_mem_region(hsu->paddr, hsu->iolen, "HSU global")))
1370 pr_warning("HSU: error in request mem region\n");
1371
1372 hsu->reg = ioremap_nocache((unsigned long)hsu->paddr, hsu->iolen);
1373 if (!hsu->reg) {
1374 pr_err("HSU: error in ioremap\n");
1375 ret = -ENOMEM;
1376 goto err_free_region;
1377 }
1378
1379 /* Initialise the 3 UART ports */
1380 uport = hsu->port;
1381 for (i = 0; i < 3; i++) {
1382 uport->port.type = PORT_MFD;
1383 uport->port.iotype = UPIO_MEM;
1384 uport->port.mapbase = (resource_size_t)hsu->paddr
1385 + HSU_PORT_REG_OFFSET
1386 + i * HSU_PORT_REG_LENGTH;
1387 uport->port.membase = hsu->reg + HSU_PORT_REG_OFFSET
1388 + i * HSU_PORT_REG_LENGTH;
1389
1390 sprintf(uport->name, "hsu_port%d", i);
1391 uport->port.fifosize = 64;
1392 uport->port.ops = &serial_hsu_pops;
1393 uport->port.line = i;
1394 uport->port.flags = UPF_IOREMAP;
1395 /* set the scalable maxim support rate to 2746800 bps */
1396 uport->port.uartclk = 115200 * 24 * 16;
1397
1398 uport->running = 0;
1399 uport->txc = &hsu->chans[i * 2];
1400 uport->rxc = &hsu->chans[i * 2 + 1];
1401
1402 serial_hsu_ports[i] = uport;
1403 uport->index = i;
1404 uport++;
1405 }
1406
1407 /* Initialise 6 dma channels */
1408 dchan = hsu->chans;
1409 for (i = 0; i < 6; i++) {
1410 dchan->id = i;
1411 dchan->dirt = (i & 0x1) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
1412 dchan->uport = &hsu->port[i/2];
1413 dchan->reg = hsu->reg + HSU_DMA_CHANS_REG_OFFSET +
1414 i * HSU_DMA_CHANS_REG_LENGTH;
1415
1416 /* Work around for RX */
1417 if (dchan->dirt == DMA_FROM_DEVICE) {
1418 init_timer(&dchan->rx_timer);
1419 dchan->rx_timer.function = hsu_dma_rx_timeout;
1420 dchan->rx_timer.data = (unsigned long)dchan;
1421 }
1422 dchan++;
1423 }
1424
1425 phsu = hsu;
1426
1427 hsu_debugfs_init(hsu);
1428 return;
1429
1430err_free_region:
1431 release_mem_region(hsu->paddr, hsu->iolen);
1432 kfree(hsu);
1433 return;
1434}
1435
1436static void serial_hsu_remove(struct pci_dev *pdev)
1437{
1438 struct hsu_port *hsu;
1439 int i;
1440
1441 hsu = pci_get_drvdata(pdev);
1442 if (!hsu)
1443 return;
1444
1445 for (i = 0; i < 3; i++)
1446 uart_remove_one_port(&serial_hsu_reg, &hsu->port[i].port);
1447
1448 pci_set_drvdata(pdev, NULL);
1449 free_irq(hsu->irq, hsu);
1450 pci_disable_device(pdev);
1451}
1452
1453/* First 3 are UART ports, and the 4th is the DMA */
1454static const struct pci_device_id pci_ids[] __devinitdata = {
1455 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081B) },
1456 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081C) },
1457 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081D) },
1458 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081E) },
1459 {},
1460};
1461
1462static struct pci_driver hsu_pci_driver = {
1463 .name = "HSU serial",
1464 .id_table = pci_ids,
1465 .probe = serial_hsu_probe,
1466 .remove = __devexit_p(serial_hsu_remove),
1467 .suspend = serial_hsu_suspend,
1468 .resume = serial_hsu_resume,
1469};
1470
1471static int __init hsu_pci_init(void)
1472{
1473 int ret;
1474
1475 hsu_global_init();
1476
1477 ret = uart_register_driver(&serial_hsu_reg);
1478 if (ret)
1479 return ret;
1480
1481 return pci_register_driver(&hsu_pci_driver);
1482}
1483
1484static void __exit hsu_pci_exit(void)
1485{
1486 pci_unregister_driver(&hsu_pci_driver);
1487 uart_unregister_driver(&serial_hsu_reg);
1488
1489 hsu_debugfs_remove(phsu);
1490
1491 kfree(phsu);
1492}
1493
1494module_init(hsu_pci_init);
1495module_exit(hsu_pci_exit);
1496
1497MODULE_LICENSE("GPL v2");
1498MODULE_ALIAS("platform:medfield-hsu");
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 84a35f699016..8dedb266f143 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -113,7 +113,9 @@ struct psc_ops {
113 unsigned char (*read_char)(struct uart_port *port); 113 unsigned char (*read_char)(struct uart_port *port);
114 void (*cw_disable_ints)(struct uart_port *port); 114 void (*cw_disable_ints)(struct uart_port *port);
115 void (*cw_restore_ints)(struct uart_port *port); 115 void (*cw_restore_ints)(struct uart_port *port);
116 unsigned long (*getuartclk)(void *p); 116 unsigned int (*set_baudrate)(struct uart_port *port,
117 struct ktermios *new,
118 struct ktermios *old);
117 int (*clock)(struct uart_port *port, int enable); 119 int (*clock)(struct uart_port *port, int enable);
118 int (*fifoc_init)(void); 120 int (*fifoc_init)(void);
119 void (*fifoc_uninit)(void); 121 void (*fifoc_uninit)(void);
@@ -121,6 +123,16 @@ struct psc_ops {
121 irqreturn_t (*handle_irq)(struct uart_port *port); 123 irqreturn_t (*handle_irq)(struct uart_port *port);
122}; 124};
123 125
126/* setting the prescaler and divisor reg is common for all chips */
127static inline void mpc52xx_set_divisor(struct mpc52xx_psc __iomem *psc,
128 u16 prescaler, unsigned int divisor)
129{
130 /* select prescaler */
131 out_be16(&psc->mpc52xx_psc_clock_select, prescaler);
132 out_8(&psc->ctur, divisor >> 8);
133 out_8(&psc->ctlr, divisor & 0xff);
134}
135
124#ifdef CONFIG_PPC_MPC52xx 136#ifdef CONFIG_PPC_MPC52xx
125#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1)) 137#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
126static void mpc52xx_psc_fifo_init(struct uart_port *port) 138static void mpc52xx_psc_fifo_init(struct uart_port *port)
@@ -128,9 +140,6 @@ static void mpc52xx_psc_fifo_init(struct uart_port *port)
128 struct mpc52xx_psc __iomem *psc = PSC(port); 140 struct mpc52xx_psc __iomem *psc = PSC(port);
129 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port); 141 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
130 142
131 /* /32 prescaler */
132 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
133
134 out_8(&fifo->rfcntl, 0x00); 143 out_8(&fifo->rfcntl, 0x00);
135 out_be16(&fifo->rfalarm, 0x1ff); 144 out_be16(&fifo->rfalarm, 0x1ff);
136 out_8(&fifo->tfcntl, 0x07); 145 out_8(&fifo->tfcntl, 0x07);
@@ -219,15 +228,47 @@ static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
219 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); 228 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
220} 229}
221 230
222/* Search for bus-frequency property in this node or a parent */ 231static unsigned int mpc5200_psc_set_baudrate(struct uart_port *port,
223static unsigned long mpc52xx_getuartclk(void *p) 232 struct ktermios *new,
233 struct ktermios *old)
224{ 234{
225 /* 235 unsigned int baud;
226 * 5200 UARTs have a / 32 prescaler 236 unsigned int divisor;
227 * but the generic serial code assumes 16 237
228 * so return ipb freq / 2 238 /* The 5200 has a fixed /32 prescaler, uartclk contains the ipb freq */
229 */ 239 baud = uart_get_baud_rate(port, new, old,
230 return mpc5xxx_get_bus_frequency(p) / 2; 240 port->uartclk / (32 * 0xffff) + 1,
241 port->uartclk / 32);
242 divisor = (port->uartclk + 16 * baud) / (32 * baud);
243
244 /* enable the /32 prescaler and set the divisor */
245 mpc52xx_set_divisor(PSC(port), 0xdd00, divisor);
246 return baud;
247}
248
249static unsigned int mpc5200b_psc_set_baudrate(struct uart_port *port,
250 struct ktermios *new,
251 struct ktermios *old)
252{
253 unsigned int baud;
254 unsigned int divisor;
255 u16 prescaler;
256
257 /* The 5200B has a selectable /4 or /32 prescaler, uartclk contains the
258 * ipb freq */
259 baud = uart_get_baud_rate(port, new, old,
260 port->uartclk / (32 * 0xffff) + 1,
261 port->uartclk / 4);
262 divisor = (port->uartclk + 2 * baud) / (4 * baud);
263
264 /* select the proper prescaler and set the divisor */
265 if (divisor > 0xffff) {
266 divisor = (divisor + 4) / 8;
267 prescaler = 0xdd00; /* /32 */
268 } else
269 prescaler = 0xff00; /* /4 */
270 mpc52xx_set_divisor(PSC(port), prescaler, divisor);
271 return baud;
231} 272}
232 273
233static void mpc52xx_psc_get_irq(struct uart_port *port, struct device_node *np) 274static void mpc52xx_psc_get_irq(struct uart_port *port, struct device_node *np)
@@ -258,7 +299,28 @@ static struct psc_ops mpc52xx_psc_ops = {
258 .read_char = mpc52xx_psc_read_char, 299 .read_char = mpc52xx_psc_read_char,
259 .cw_disable_ints = mpc52xx_psc_cw_disable_ints, 300 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
260 .cw_restore_ints = mpc52xx_psc_cw_restore_ints, 301 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
261 .getuartclk = mpc52xx_getuartclk, 302 .set_baudrate = mpc5200_psc_set_baudrate,
303 .get_irq = mpc52xx_psc_get_irq,
304 .handle_irq = mpc52xx_psc_handle_irq,
305};
306
307static struct psc_ops mpc5200b_psc_ops = {
308 .fifo_init = mpc52xx_psc_fifo_init,
309 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
310 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
311 .rx_rdy = mpc52xx_psc_rx_rdy,
312 .tx_rdy = mpc52xx_psc_tx_rdy,
313 .tx_empty = mpc52xx_psc_tx_empty,
314 .stop_rx = mpc52xx_psc_stop_rx,
315 .start_tx = mpc52xx_psc_start_tx,
316 .stop_tx = mpc52xx_psc_stop_tx,
317 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
318 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
319 .write_char = mpc52xx_psc_write_char,
320 .read_char = mpc52xx_psc_read_char,
321 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
322 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
323 .set_baudrate = mpc5200b_psc_set_baudrate,
262 .get_irq = mpc52xx_psc_get_irq, 324 .get_irq = mpc52xx_psc_get_irq,
263 .handle_irq = mpc52xx_psc_handle_irq, 325 .handle_irq = mpc52xx_psc_handle_irq,
264}; 326};
@@ -392,9 +454,35 @@ static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
392 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f); 454 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
393} 455}
394 456
395static unsigned long mpc512x_getuartclk(void *p) 457static unsigned int mpc512x_psc_set_baudrate(struct uart_port *port,
458 struct ktermios *new,
459 struct ktermios *old)
396{ 460{
397 return mpc5xxx_get_bus_frequency(p); 461 unsigned int baud;
462 unsigned int divisor;
463
464 /*
465 * The "MPC5121e Microcontroller Reference Manual, Rev. 3" says on
466 * pg. 30-10 that the chip supports a /32 and a /10 prescaler.
467 * Furthermore, it states that "After reset, the prescaler by 10
468 * for the UART mode is selected", but the reset register value is
469 * 0x0000 which means a /32 prescaler. This is wrong.
470 *
471 * In reality using /32 prescaler doesn't work, as it is not supported!
472 * Use /16 or /10 prescaler, see "MPC5121e Hardware Design Guide",
473 * Chapter 4.1 PSC in UART Mode.
474 * Calculate with a /16 prescaler here.
475 */
476
477 /* uartclk contains the ips freq */
478 baud = uart_get_baud_rate(port, new, old,
479 port->uartclk / (16 * 0xffff) + 1,
480 port->uartclk / 16);
481 divisor = (port->uartclk + 8 * baud) / (16 * baud);
482
483 /* enable the /16 prescaler and set the divisor */
484 mpc52xx_set_divisor(PSC(port), 0xdd00, divisor);
485 return baud;
398} 486}
399 487
400/* Init PSC FIFO Controller */ 488/* Init PSC FIFO Controller */
@@ -498,7 +586,7 @@ static struct psc_ops mpc512x_psc_ops = {
498 .read_char = mpc512x_psc_read_char, 586 .read_char = mpc512x_psc_read_char,
499 .cw_disable_ints = mpc512x_psc_cw_disable_ints, 587 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
500 .cw_restore_ints = mpc512x_psc_cw_restore_ints, 588 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
501 .getuartclk = mpc512x_getuartclk, 589 .set_baudrate = mpc512x_psc_set_baudrate,
502 .clock = mpc512x_psc_clock, 590 .clock = mpc512x_psc_clock,
503 .fifoc_init = mpc512x_psc_fifoc_init, 591 .fifoc_init = mpc512x_psc_fifoc_init,
504 .fifoc_uninit = mpc512x_psc_fifoc_uninit, 592 .fifoc_uninit = mpc512x_psc_fifoc_uninit,
@@ -666,8 +754,8 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
666 struct mpc52xx_psc __iomem *psc = PSC(port); 754 struct mpc52xx_psc __iomem *psc = PSC(port);
667 unsigned long flags; 755 unsigned long flags;
668 unsigned char mr1, mr2; 756 unsigned char mr1, mr2;
669 unsigned short ctr; 757 unsigned int j;
670 unsigned int j, baud, quot; 758 unsigned int baud;
671 759
672 /* Prepare what we're gonna write */ 760 /* Prepare what we're gonna write */
673 mr1 = 0; 761 mr1 = 0;
@@ -704,16 +792,9 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
704 mr2 |= MPC52xx_PSC_MODE_TXCTS; 792 mr2 |= MPC52xx_PSC_MODE_TXCTS;
705 } 793 }
706 794
707 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
708 quot = uart_get_divisor(port, baud);
709 ctr = quot & 0xffff;
710
711 /* Get the lock */ 795 /* Get the lock */
712 spin_lock_irqsave(&port->lock, flags); 796 spin_lock_irqsave(&port->lock, flags);
713 797
714 /* Update the per-port timeout */
715 uart_update_timeout(port, new->c_cflag, baud);
716
717 /* Do our best to flush TX & RX, so we don't lose anything */ 798 /* Do our best to flush TX & RX, so we don't lose anything */
718 /* But we don't wait indefinitely ! */ 799 /* But we don't wait indefinitely ! */
719 j = 5000000; /* Maximum wait */ 800 j = 5000000; /* Maximum wait */
@@ -737,8 +818,10 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
737 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); 818 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
738 out_8(&psc->mode, mr1); 819 out_8(&psc->mode, mr1);
739 out_8(&psc->mode, mr2); 820 out_8(&psc->mode, mr2);
740 out_8(&psc->ctur, ctr >> 8); 821 baud = psc_ops->set_baudrate(port, new, old);
741 out_8(&psc->ctlr, ctr & 0xff); 822
823 /* Update the per-port timeout */
824 uart_update_timeout(port, new->c_cflag, baud);
742 825
743 if (UART_ENABLE_MS(port, new->c_cflag)) 826 if (UART_ENABLE_MS(port, new->c_cflag))
744 mpc52xx_uart_enable_ms(port); 827 mpc52xx_uart_enable_ms(port);
@@ -1118,7 +1201,7 @@ mpc52xx_console_setup(struct console *co, char *options)
1118 return ret; 1201 return ret;
1119 } 1202 }
1120 1203
1121 uartclk = psc_ops->getuartclk(np); 1204 uartclk = mpc5xxx_get_bus_frequency(np);
1122 if (uartclk == 0) { 1205 if (uartclk == 0) {
1123 pr_debug("Could not find uart clock frequency!\n"); 1206 pr_debug("Could not find uart clock frequency!\n");
1124 return -EINVAL; 1207 return -EINVAL;
@@ -1201,6 +1284,7 @@ static struct uart_driver mpc52xx_uart_driver = {
1201 1284
1202static struct of_device_id mpc52xx_uart_of_match[] = { 1285static struct of_device_id mpc52xx_uart_of_match[] = {
1203#ifdef CONFIG_PPC_MPC52xx 1286#ifdef CONFIG_PPC_MPC52xx
1287 { .compatible = "fsl,mpc5200b-psc-uart", .data = &mpc5200b_psc_ops, },
1204 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, }, 1288 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1205 /* binding used by old lite5200 device trees: */ 1289 /* binding used by old lite5200 device trees: */
1206 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, }, 1290 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
@@ -1214,7 +1298,7 @@ static struct of_device_id mpc52xx_uart_of_match[] = {
1214}; 1298};
1215 1299
1216static int __devinit 1300static int __devinit
1217mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match) 1301mpc52xx_uart_of_probe(struct platform_device *op, const struct of_device_id *match)
1218{ 1302{
1219 int idx = -1; 1303 int idx = -1;
1220 unsigned int uartclk; 1304 unsigned int uartclk;
@@ -1233,7 +1317,10 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1233 pr_debug("Found %s assigned to ttyPSC%x\n", 1317 pr_debug("Found %s assigned to ttyPSC%x\n",
1234 mpc52xx_uart_nodes[idx]->full_name, idx); 1318 mpc52xx_uart_nodes[idx]->full_name, idx);
1235 1319
1236 uartclk = psc_ops->getuartclk(op->dev.of_node); 1320 /* set the uart clock to the input clock of the psc, the different
1321 * prescalers are taken into account in the set_baudrate() methods
1322 * of the respective chip */
1323 uartclk = mpc5xxx_get_bus_frequency(op->dev.of_node);
1237 if (uartclk == 0) { 1324 if (uartclk == 0) {
1238 dev_dbg(&op->dev, "Could not find uart clock frequency!\n"); 1325 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
1239 return -EINVAL; 1326 return -EINVAL;
@@ -1282,7 +1369,7 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1282} 1369}
1283 1370
1284static int 1371static int
1285mpc52xx_uart_of_remove(struct of_device *op) 1372mpc52xx_uart_of_remove(struct platform_device *op)
1286{ 1373{
1287 struct uart_port *port = dev_get_drvdata(&op->dev); 1374 struct uart_port *port = dev_get_drvdata(&op->dev);
1288 dev_set_drvdata(&op->dev, NULL); 1375 dev_set_drvdata(&op->dev, NULL);
@@ -1295,7 +1382,7 @@ mpc52xx_uart_of_remove(struct of_device *op)
1295 1382
1296#ifdef CONFIG_PM 1383#ifdef CONFIG_PM
1297static int 1384static int
1298mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state) 1385mpc52xx_uart_of_suspend(struct platform_device *op, pm_message_t state)
1299{ 1386{
1300 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev); 1387 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1301 1388
@@ -1306,7 +1393,7 @@ mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1306} 1393}
1307 1394
1308static int 1395static int
1309mpc52xx_uart_of_resume(struct of_device *op) 1396mpc52xx_uart_of_resume(struct platform_device *op)
1310{ 1397{
1311 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev); 1398 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1312 1399
diff --git a/drivers/serial/mrst_max3110.c b/drivers/serial/mrst_max3110.c
new file mode 100644
index 000000000000..f6ad1ecbff79
--- /dev/null
+++ b/drivers/serial/mrst_max3110.c
@@ -0,0 +1,844 @@
1/*
2 * max3110.c - spi uart protocol driver for Maxim 3110 on Moorestown
3 *
4 * Copyright (C) Intel 2008 Feng Tang <feng.tang@intel.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 */
19
20/*
21 * Note:
22 * 1. From Max3110 spec, the Rx FIFO has 8 words, while the Tx FIFO only has
23 * 1 word. If SPI master controller doesn't support sclk frequency change,
24 * then the char need be sent out one by one with some delay
25 *
26 * 2. Currently only RX availabe interrrupt is used, no need for waiting TXE
27 * interrupt for a low speed UART device
28 */
29
30#include <linux/module.h>
31#include <linux/ioport.h>
32#include <linux/init.h>
33#include <linux/console.h>
34#include <linux/sysrq.h>
35#include <linux/platform_device.h>
36#include <linux/tty.h>
37#include <linux/tty_flip.h>
38#include <linux/serial_core.h>
39#include <linux/serial_reg.h>
40
41#include <linux/kthread.h>
42#include <linux/delay.h>
43#include <asm/atomic.h>
44#include <linux/spi/spi.h>
45#include <linux/spi/dw_spi.h>
46
47#include "mrst_max3110.h"
48
49#define PR_FMT "mrst_max3110: "
50
51#define UART_TX_NEEDED 1
52#define CON_TX_NEEDED 2
53#define BIT_IRQ_PENDING 3
54
55struct uart_max3110 {
56 struct uart_port port;
57 struct spi_device *spi;
58 char *name;
59
60 wait_queue_head_t wq;
61 struct task_struct *main_thread;
62 struct task_struct *read_thread;
63 struct mutex thread_mutex;;
64
65 u32 baud;
66 u16 cur_conf;
67 u8 clock;
68 u8 parity, word_7bits;
69
70 unsigned long uart_flags;
71
72 /* console related */
73 struct circ_buf con_xmit;
74
75 /* irq related */
76 u16 irq;
77};
78
79/* global data structure, may need be removed */
80struct uart_max3110 *pmax;
81static inline void receive_char(struct uart_max3110 *max, u8 ch);
82static void receive_chars(struct uart_max3110 *max,
83 unsigned char *str, int len);
84static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf);
85static void max3110_console_receive(struct uart_max3110 *max);
86
87int max3110_write_then_read(struct uart_max3110 *max,
88 const u8 *txbuf, u8 *rxbuf, unsigned len, int always_fast)
89{
90 struct spi_device *spi = max->spi;
91 struct spi_message message;
92 struct spi_transfer x;
93 int ret;
94
95 if (!txbuf || !rxbuf)
96 return -EINVAL;
97
98 spi_message_init(&message);
99 memset(&x, 0, sizeof x);
100 x.len = len;
101 x.tx_buf = txbuf;
102 x.rx_buf = rxbuf;
103 spi_message_add_tail(&x, &message);
104
105 if (always_fast)
106 x.speed_hz = 3125000;
107 else if (max->baud)
108 x.speed_hz = max->baud;
109
110 /* Do the i/o */
111 ret = spi_sync(spi, &message);
112 return ret;
113}
114
115/* Write a u16 to the device, and return one u16 read back */
116int max3110_out(struct uart_max3110 *max, const u16 out)
117{
118 u16 tmp;
119 int ret;
120
121 ret = max3110_write_then_read(max, (u8 *)&out, (u8 *)&tmp, 2, 1);
122 if (ret)
123 return ret;
124
125 /* If some valid data is read back */
126 if (tmp & MAX3110_READ_DATA_AVAILABLE)
127 receive_char(max, (tmp & 0xff));
128
129 return ret;
130}
131
132#define MAX_READ_LEN 20
133/*
134 * This is usually used to read data from SPIC RX FIFO, which doesn't
135 * need any delay like flushing character out. It returns how many
136 * valide bytes are read back
137 */
138static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf)
139{
140 u16 out[MAX_READ_LEN], in[MAX_READ_LEN];
141 u8 *pbuf, valid_str[MAX_READ_LEN];
142 int i, j, bytelen;
143
144 if (len > MAX_READ_LEN) {
145 pr_err(PR_FMT "read len %d is too large\n", len);
146 return 0;
147 }
148
149 bytelen = len * 2;
150 memset(out, 0, bytelen);
151 memset(in, 0, bytelen);
152
153 if (max3110_write_then_read(max, (u8 *)out, (u8 *)in, bytelen, 1))
154 return 0;
155
156 /* If caller don't provide a buffer, then handle received char */
157 pbuf = buf ? buf : valid_str;
158
159 for (i = 0, j = 0; i < len; i++) {
160 if (in[i] & MAX3110_READ_DATA_AVAILABLE)
161 pbuf[j++] = (u8)(in[i] & 0xff);
162 }
163
164 if (j && (pbuf == valid_str))
165 receive_chars(max, valid_str, j);
166
167 return j;
168}
169
170static void serial_m3110_con_putchar(struct uart_port *port, int ch)
171{
172 struct uart_max3110 *max =
173 container_of(port, struct uart_max3110, port);
174 struct circ_buf *xmit = &max->con_xmit;
175
176 if (uart_circ_chars_free(xmit)) {
177 xmit->buf[xmit->head] = (char)ch;
178 xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1);
179 }
180
181
182 if (!test_and_set_bit(CON_TX_NEEDED, &max->uart_flags))
183 wake_up_process(max->main_thread);
184}
185
186/*
187 * Print a string to the serial port trying not to disturb
188 * any possible real use of the port...
189 *
190 * The console_lock must be held when we get here.
191 */
192static void serial_m3110_con_write(struct console *co,
193 const char *s, unsigned int count)
194{
195 if (!pmax)
196 return;
197
198 uart_console_write(&pmax->port, s, count, serial_m3110_con_putchar);
199}
200
201static int __init
202serial_m3110_con_setup(struct console *co, char *options)
203{
204 struct uart_max3110 *max = pmax;
205 int baud = 115200;
206 int bits = 8;
207 int parity = 'n';
208 int flow = 'n';
209
210 pr_info(PR_FMT "setting up console\n");
211
212 if (!max) {
213 pr_err(PR_FMT "pmax is NULL, return");
214 return -ENODEV;
215 }
216
217 if (options)
218 uart_parse_options(options, &baud, &parity, &bits, &flow);
219
220 return uart_set_options(&max->port, co, baud, parity, bits, flow);
221}
222
223static struct tty_driver *serial_m3110_con_device(struct console *co,
224 int *index)
225{
226 struct uart_driver *p = co->data;
227 *index = co->index;
228 return p->tty_driver;
229}
230
231static struct uart_driver serial_m3110_reg;
232static struct console serial_m3110_console = {
233 .name = "ttyS",
234 .write = serial_m3110_con_write,
235 .device = serial_m3110_con_device,
236 .setup = serial_m3110_con_setup,
237 .flags = CON_PRINTBUFFER,
238 .index = -1,
239 .data = &serial_m3110_reg,
240};
241
242#define MRST_CONSOLE (&serial_m3110_console)
243
244static unsigned int serial_m3110_tx_empty(struct uart_port *port)
245{
246 return 1;
247}
248
249static void serial_m3110_stop_tx(struct uart_port *port)
250{
251 return;
252}
253
254/* stop_rx will be called in spin_lock env */
255static void serial_m3110_stop_rx(struct uart_port *port)
256{
257 return;
258}
259
260#define WORDS_PER_XFER 128
261static inline void send_circ_buf(struct uart_max3110 *max,
262 struct circ_buf *xmit)
263{
264 int len, left = 0;
265 u16 obuf[WORDS_PER_XFER], ibuf[WORDS_PER_XFER];
266 u8 valid_str[WORDS_PER_XFER];
267 int i, j;
268
269 while (!uart_circ_empty(xmit)) {
270 left = uart_circ_chars_pending(xmit);
271 while (left) {
272 len = (left >= WORDS_PER_XFER) ? WORDS_PER_XFER : left;
273
274 memset(obuf, 0, len * 2);
275 memset(ibuf, 0, len * 2);
276 for (i = 0; i < len; i++) {
277 obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG;
278 xmit->tail = (xmit->tail + 1) &
279 (UART_XMIT_SIZE - 1);
280 }
281 max3110_write_then_read(max, (u8 *)obuf,
282 (u8 *)ibuf, len * 2, 0);
283
284 for (i = 0, j = 0; i < len; i++) {
285 if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE)
286 valid_str[j++] = (u8)(ibuf[i] & 0xff);
287 }
288
289 if (j)
290 receive_chars(max, valid_str, j);
291
292 max->port.icount.tx += len;
293 left -= len;
294 }
295 }
296}
297
298static void transmit_char(struct uart_max3110 *max)
299{
300 struct uart_port *port = &max->port;
301 struct circ_buf *xmit = &port->state->xmit;
302
303 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
304 return;
305
306 send_circ_buf(max, xmit);
307
308 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
309 uart_write_wakeup(port);
310
311 if (uart_circ_empty(xmit))
312 serial_m3110_stop_tx(port);
313}
314
315/* This will be called by uart_write() and tty_write, can't
316 * go to sleep */
317static void serial_m3110_start_tx(struct uart_port *port)
318{
319 struct uart_max3110 *max =
320 container_of(port, struct uart_max3110, port);
321
322 if (!test_and_set_bit(UART_TX_NEEDED, &max->uart_flags))
323 wake_up_process(max->main_thread);
324}
325
326static void receive_chars(struct uart_max3110 *max, unsigned char *str, int len)
327{
328 struct uart_port *port = &max->port;
329 struct tty_struct *tty;
330 int usable;
331
332 /* If uart is not opened, just return */
333 if (!port->state)
334 return;
335
336 tty = port->state->port.tty;
337 if (!tty)
338 return; /* receive some char before the tty is opened */
339
340 while (len) {
341 usable = tty_buffer_request_room(tty, len);
342 if (usable) {
343 tty_insert_flip_string(tty, str, usable);
344 str += usable;
345 port->icount.rx += usable;
346 tty_flip_buffer_push(tty);
347 }
348 len -= usable;
349 }
350}
351
352static inline void receive_char(struct uart_max3110 *max, u8 ch)
353{
354 receive_chars(max, &ch, 1);
355}
356
357static void max3110_console_receive(struct uart_max3110 *max)
358{
359 int loop = 1, num, total = 0;
360 u8 recv_buf[512], *pbuf;
361
362 pbuf = recv_buf;
363 do {
364 num = max3110_read_multi(max, 8, pbuf);
365
366 if (num) {
367 loop = 10;
368 pbuf += num;
369 total += num;
370
371 if (total >= 500) {
372 receive_chars(max, recv_buf, total);
373 pbuf = recv_buf;
374 total = 0;
375 }
376 }
377 } while (--loop);
378
379 if (total)
380 receive_chars(max, recv_buf, total);
381}
382
383static int max3110_main_thread(void *_max)
384{
385 struct uart_max3110 *max = _max;
386 wait_queue_head_t *wq = &max->wq;
387 int ret = 0;
388 struct circ_buf *xmit = &max->con_xmit;
389
390 init_waitqueue_head(wq);
391 pr_info(PR_FMT "start main thread\n");
392
393 do {
394 wait_event_interruptible(*wq, max->uart_flags || kthread_should_stop());
395
396 mutex_lock(&max->thread_mutex);
397
398 if (test_and_clear_bit(BIT_IRQ_PENDING, &max->uart_flags))
399 max3110_console_receive(max);
400
401 /* first handle console output */
402 if (test_and_clear_bit(CON_TX_NEEDED, &max->uart_flags))
403 send_circ_buf(max, xmit);
404
405 /* handle uart output */
406 if (test_and_clear_bit(UART_TX_NEEDED, &max->uart_flags))
407 transmit_char(max);
408
409 mutex_unlock(&max->thread_mutex);
410
411 } while (!kthread_should_stop());
412
413 return ret;
414}
415
416#ifdef CONFIG_MRST_MAX3110_IRQ
417static irqreturn_t serial_m3110_irq(int irq, void *dev_id)
418{
419 struct uart_max3110 *max = dev_id;
420
421 /* max3110's irq is a falling edge, not level triggered,
422 * so no need to disable the irq */
423 if (!test_and_set_bit(BIT_IRQ_PENDING, &max->uart_flags))
424 wake_up_process(max->main_thread);
425
426 return IRQ_HANDLED;
427}
428#else
429/* if don't use RX IRQ, then need a thread to polling read */
430static int max3110_read_thread(void *_max)
431{
432 struct uart_max3110 *max = _max;
433
434 pr_info(PR_FMT "start read thread\n");
435 do {
436 mutex_lock(&max->thread_mutex);
437 max3110_console_receive(max);
438 mutex_unlock(&max->thread_mutex);
439
440 set_current_state(TASK_INTERRUPTIBLE);
441 schedule_timeout(HZ / 20);
442 } while (!kthread_should_stop());
443
444 return 0;
445}
446#endif
447
448static int serial_m3110_startup(struct uart_port *port)
449{
450 struct uart_max3110 *max =
451 container_of(port, struct uart_max3110, port);
452 u16 config = 0;
453 int ret = 0;
454
455 if (port->line != 0)
456 pr_err(PR_FMT "uart port startup failed\n");
457
458 /* firstly disable all IRQ and config it to 115200, 8n1 */
459 config = WC_TAG | WC_FIFO_ENABLE
460 | WC_1_STOPBITS
461 | WC_8BIT_WORD
462 | WC_BAUD_DR2;
463 ret = max3110_out(max, config);
464
465 /* as we use thread to handle tx/rx, need set low latency */
466 port->state->port.tty->low_latency = 1;
467
468#ifdef CONFIG_MRST_MAX3110_IRQ
469 ret = request_irq(max->irq, serial_m3110_irq,
470 IRQ_TYPE_EDGE_FALLING, "max3110", max);
471 if (ret)
472 return ret;
473
474 /* enable RX IRQ only */
475 config |= WC_RXA_IRQ_ENABLE;
476 max3110_out(max, config);
477#else
478 /* if IRQ is disabled, start a read thread for input data */
479 max->read_thread =
480 kthread_run(max3110_read_thread, max, "max3110_read");
481#endif
482
483 max->cur_conf = config;
484 return 0;
485}
486
487static void serial_m3110_shutdown(struct uart_port *port)
488{
489 struct uart_max3110 *max =
490 container_of(port, struct uart_max3110, port);
491 u16 config;
492
493 if (max->read_thread) {
494 kthread_stop(max->read_thread);
495 max->read_thread = NULL;
496 }
497
498#ifdef CONFIG_MRST_MAX3110_IRQ
499 free_irq(max->irq, max);
500#endif
501
502 /* Disable interrupts from this port */
503 config = WC_TAG | WC_SW_SHDI;
504 max3110_out(max, config);
505}
506
507static void serial_m3110_release_port(struct uart_port *port)
508{
509}
510
511static int serial_m3110_request_port(struct uart_port *port)
512{
513 return 0;
514}
515
516static void serial_m3110_config_port(struct uart_port *port, int flags)
517{
518 /* give it fake type */
519 port->type = PORT_PXA;
520}
521
522static int
523serial_m3110_verify_port(struct uart_port *port, struct serial_struct *ser)
524{
525 /* we don't want the core code to modify any port params */
526 return -EINVAL;
527}
528
529
530static const char *serial_m3110_type(struct uart_port *port)
531{
532 struct uart_max3110 *max =
533 container_of(port, struct uart_max3110, port);
534 return max->name;
535}
536
537static void
538serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios,
539 struct ktermios *old)
540{
541 struct uart_max3110 *max =
542 container_of(port, struct uart_max3110, port);
543 unsigned char cval;
544 unsigned int baud, parity = 0;
545 int clk_div = -1;
546 u16 new_conf = max->cur_conf;
547
548 switch (termios->c_cflag & CSIZE) {
549 case CS7:
550 cval = UART_LCR_WLEN7;
551 new_conf |= WC_7BIT_WORD;
552 break;
553 default:
554 case CS8:
555 cval = UART_LCR_WLEN8;
556 new_conf |= WC_8BIT_WORD;
557 break;
558 }
559
560 baud = uart_get_baud_rate(port, termios, old, 0, 230400);
561
562 /* first calc the div for 1.8MHZ clock case */
563 switch (baud) {
564 case 300:
565 clk_div = WC_BAUD_DR384;
566 break;
567 case 600:
568 clk_div = WC_BAUD_DR192;
569 break;
570 case 1200:
571 clk_div = WC_BAUD_DR96;
572 break;
573 case 2400:
574 clk_div = WC_BAUD_DR48;
575 break;
576 case 4800:
577 clk_div = WC_BAUD_DR24;
578 break;
579 case 9600:
580 clk_div = WC_BAUD_DR12;
581 break;
582 case 19200:
583 clk_div = WC_BAUD_DR6;
584 break;
585 case 38400:
586 clk_div = WC_BAUD_DR3;
587 break;
588 case 57600:
589 clk_div = WC_BAUD_DR2;
590 break;
591 case 115200:
592 clk_div = WC_BAUD_DR1;
593 break;
594 case 230400:
595 if (max->clock & MAX3110_HIGH_CLK)
596 break;
597 default:
598 /* pick the previous baud rate */
599 baud = max->baud;
600 clk_div = max->cur_conf & WC_BAUD_DIV_MASK;
601 tty_termios_encode_baud_rate(termios, baud, baud);
602 }
603
604 if (max->clock & MAX3110_HIGH_CLK) {
605 clk_div += 1;
606 /* high clk version max3110 doesn't support B300 */
607 if (baud == 300)
608 baud = 600;
609 if (baud == 230400)
610 clk_div = WC_BAUD_DR1;
611 tty_termios_encode_baud_rate(termios, baud, baud);
612 }
613
614 new_conf = (new_conf & ~WC_BAUD_DIV_MASK) | clk_div;
615 if (termios->c_cflag & CSTOPB)
616 new_conf |= WC_2_STOPBITS;
617 else
618 new_conf &= ~WC_2_STOPBITS;
619
620 if (termios->c_cflag & PARENB) {
621 new_conf |= WC_PARITY_ENABLE;
622 parity |= UART_LCR_PARITY;
623 } else
624 new_conf &= ~WC_PARITY_ENABLE;
625
626 if (!(termios->c_cflag & PARODD))
627 parity |= UART_LCR_EPAR;
628 max->parity = parity;
629
630 uart_update_timeout(port, termios->c_cflag, baud);
631
632 new_conf |= WC_TAG;
633 if (new_conf != max->cur_conf) {
634 max3110_out(max, new_conf);
635 max->cur_conf = new_conf;
636 max->baud = baud;
637 }
638}
639
640/* don't handle hw handshaking */
641static unsigned int serial_m3110_get_mctrl(struct uart_port *port)
642{
643 return TIOCM_DSR | TIOCM_CAR | TIOCM_DSR;
644}
645
646static void serial_m3110_set_mctrl(struct uart_port *port, unsigned int mctrl)
647{
648}
649
650static void serial_m3110_break_ctl(struct uart_port *port, int break_state)
651{
652}
653
654static void serial_m3110_pm(struct uart_port *port, unsigned int state,
655 unsigned int oldstate)
656{
657}
658
659static void serial_m3110_enable_ms(struct uart_port *port)
660{
661}
662
663struct uart_ops serial_m3110_ops = {
664 .tx_empty = serial_m3110_tx_empty,
665 .set_mctrl = serial_m3110_set_mctrl,
666 .get_mctrl = serial_m3110_get_mctrl,
667 .stop_tx = serial_m3110_stop_tx,
668 .start_tx = serial_m3110_start_tx,
669 .stop_rx = serial_m3110_stop_rx,
670 .enable_ms = serial_m3110_enable_ms,
671 .break_ctl = serial_m3110_break_ctl,
672 .startup = serial_m3110_startup,
673 .shutdown = serial_m3110_shutdown,
674 .set_termios = serial_m3110_set_termios, /* must have */
675 .pm = serial_m3110_pm,
676 .type = serial_m3110_type,
677 .release_port = serial_m3110_release_port,
678 .request_port = serial_m3110_request_port,
679 .config_port = serial_m3110_config_port,
680 .verify_port = serial_m3110_verify_port,
681};
682
683static struct uart_driver serial_m3110_reg = {
684 .owner = THIS_MODULE,
685 .driver_name = "MRST serial",
686 .dev_name = "ttyS",
687 .major = TTY_MAJOR,
688 .minor = 64,
689 .nr = 1,
690 .cons = MRST_CONSOLE,
691};
692
693static int serial_m3110_suspend(struct spi_device *spi, pm_message_t state)
694{
695 return 0;
696}
697
698static int serial_m3110_resume(struct spi_device *spi)
699{
700 return 0;
701}
702
703static struct dw_spi_chip spi0_uart = {
704 .poll_mode = 1,
705 .enable_dma = 0,
706 .type = SPI_FRF_SPI,
707};
708
709static int serial_m3110_probe(struct spi_device *spi)
710{
711 struct uart_max3110 *max;
712 int ret;
713 unsigned char *buffer;
714 u16 res;
715 max = kzalloc(sizeof(*max), GFP_KERNEL);
716 if (!max)
717 return -ENOMEM;
718
719 /* set spi info */
720 spi->mode = SPI_MODE_0;
721 spi->bits_per_word = 16;
722 max->clock = MAX3110_HIGH_CLK;
723 spi->controller_data = &spi0_uart;
724
725 spi_setup(spi);
726
727 max->port.type = PORT_PXA; /* need apply for a max3110 type */
728 max->port.fifosize = 2; /* only have 16b buffer */
729 max->port.ops = &serial_m3110_ops;
730 max->port.line = 0;
731 max->port.dev = &spi->dev;
732 max->port.uartclk = 115200;
733
734 max->spi = spi;
735 max->name = spi->modalias; /* use spi name as the name */
736 max->irq = (u16)spi->irq;
737
738 mutex_init(&max->thread_mutex);
739
740 max->word_7bits = 0;
741 max->parity = 0;
742 max->baud = 0;
743
744 max->cur_conf = 0;
745 max->uart_flags = 0;
746
747 /* Check if reading configuration register returns something sane */
748
749 res = RC_TAG;
750 ret = max3110_write_then_read(max, (u8 *)&res, (u8 *)&res, 2, 0);
751 if (ret < 0 || res == 0 || res == 0xffff) {
752 printk(KERN_ERR "MAX3111 deemed not present (conf reg %04x)",
753 res);
754 ret = -ENODEV;
755 goto err_get_page;
756 }
757 buffer = (unsigned char *)__get_free_page(GFP_KERNEL);
758 if (!buffer) {
759 ret = -ENOMEM;
760 goto err_get_page;
761 }
762 max->con_xmit.buf = (unsigned char *)buffer;
763 max->con_xmit.head = max->con_xmit.tail = 0;
764
765 max->main_thread = kthread_run(max3110_main_thread,
766 max, "max3110_main");
767 if (IS_ERR(max->main_thread)) {
768 ret = PTR_ERR(max->main_thread);
769 goto err_kthread;
770 }
771
772 pmax = max;
773 /* give membase a psudo value to pass serial_core's check */
774 max->port.membase = (void *)0xff110000;
775 uart_add_one_port(&serial_m3110_reg, &max->port);
776
777 return 0;
778
779err_kthread:
780 free_page((unsigned long)buffer);
781err_get_page:
782 pmax = NULL;
783 kfree(max);
784 return ret;
785}
786
787static int max3110_remove(struct spi_device *dev)
788{
789 struct uart_max3110 *max = pmax;
790
791 if (!pmax)
792 return 0;
793
794 pmax = NULL;
795 uart_remove_one_port(&serial_m3110_reg, &max->port);
796
797 free_page((unsigned long)max->con_xmit.buf);
798
799 if (max->main_thread)
800 kthread_stop(max->main_thread);
801
802 kfree(max);
803 return 0;
804}
805
806static struct spi_driver uart_max3110_driver = {
807 .driver = {
808 .name = "spi_max3111",
809 .bus = &spi_bus_type,
810 .owner = THIS_MODULE,
811 },
812 .probe = serial_m3110_probe,
813 .remove = __devexit_p(max3110_remove),
814 .suspend = serial_m3110_suspend,
815 .resume = serial_m3110_resume,
816};
817
818
819int __init serial_m3110_init(void)
820{
821 int ret = 0;
822
823 ret = uart_register_driver(&serial_m3110_reg);
824 if (ret)
825 return ret;
826
827 ret = spi_register_driver(&uart_max3110_driver);
828 if (ret)
829 uart_unregister_driver(&serial_m3110_reg);
830
831 return ret;
832}
833
834void __exit serial_m3110_exit(void)
835{
836 spi_unregister_driver(&uart_max3110_driver);
837 uart_unregister_driver(&serial_m3110_reg);
838}
839
840module_init(serial_m3110_init);
841module_exit(serial_m3110_exit);
842
843MODULE_LICENSE("GPL");
844MODULE_ALIAS("max3110-uart");
diff --git a/drivers/serial/mrst_max3110.h b/drivers/serial/mrst_max3110.h
new file mode 100644
index 000000000000..363478acb2c3
--- /dev/null
+++ b/drivers/serial/mrst_max3110.h
@@ -0,0 +1,59 @@
1#ifndef _MRST_MAX3110_H
2#define _MRST_MAX3110_H
3
4#define MAX3110_HIGH_CLK 0x1 /* 3.6864 MHZ */
5#define MAX3110_LOW_CLK 0x0 /* 1.8432 MHZ */
6
7/* status bits for all 4 MAX3110 operate modes */
8#define MAX3110_READ_DATA_AVAILABLE (1 << 15)
9#define MAX3110_WRITE_BUF_EMPTY (1 << 14)
10
11#define WC_TAG (3 << 14)
12#define RC_TAG (1 << 14)
13#define WD_TAG (2 << 14)
14#define RD_TAG (0 << 14)
15
16/* bits def for write configuration */
17#define WC_FIFO_ENABLE_MASK (1 << 13)
18#define WC_FIFO_ENABLE (0 << 13)
19
20#define WC_SW_SHDI (1 << 12)
21
22#define WC_IRQ_MASK (0xF << 8)
23#define WC_TXE_IRQ_ENABLE (1 << 11) /* TX empty irq */
24#define WC_RXA_IRQ_ENABLE (1 << 10) /* RX availabe irq */
25#define WC_PAR_HIGH_IRQ_ENABLE (1 << 9)
26#define WC_REC_ACT_IRQ_ENABLE (1 << 8)
27
28#define WC_IRDA_ENABLE (1 << 7)
29
30#define WC_STOPBITS_MASK (1 << 6)
31#define WC_2_STOPBITS (1 << 6)
32#define WC_1_STOPBITS (0 << 6)
33
34#define WC_PARITY_ENABLE_MASK (1 << 5)
35#define WC_PARITY_ENABLE (1 << 5)
36
37#define WC_WORDLEN_MASK (1 << 4)
38#define WC_7BIT_WORD (1 << 4)
39#define WC_8BIT_WORD (0 << 4)
40
41#define WC_BAUD_DIV_MASK (0xF)
42#define WC_BAUD_DR1 (0x0)
43#define WC_BAUD_DR2 (0x1)
44#define WC_BAUD_DR4 (0x2)
45#define WC_BAUD_DR8 (0x3)
46#define WC_BAUD_DR16 (0x4)
47#define WC_BAUD_DR32 (0x5)
48#define WC_BAUD_DR64 (0x6)
49#define WC_BAUD_DR128 (0x7)
50#define WC_BAUD_DR3 (0x8)
51#define WC_BAUD_DR6 (0x9)
52#define WC_BAUD_DR12 (0xA)
53#define WC_BAUD_DR24 (0xB)
54#define WC_BAUD_DR48 (0xC)
55#define WC_BAUD_DR96 (0xD)
56#define WC_BAUD_DR192 (0xE)
57#define WC_BAUD_DR384 (0xF)
58
59#endif
diff --git a/drivers/serial/nwpserial.c b/drivers/serial/nwpserial.c
index 3c02fa96f282..de173671e3d0 100644
--- a/drivers/serial/nwpserial.c
+++ b/drivers/serial/nwpserial.c
@@ -81,7 +81,7 @@ nwpserial_console_write(struct console *co, const char *s, unsigned int count)
81 81
82 uart_console_write(&up->port, s, count, nwpserial_console_putchar); 82 uart_console_write(&up->port, s, count, nwpserial_console_putchar);
83 83
84 /* wait for transmitter to become emtpy */ 84 /* wait for transmitter to become empty */
85 while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0) 85 while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0)
86 cpu_relax(); 86 cpu_relax();
87 87
@@ -344,7 +344,7 @@ int nwpserial_register_port(struct uart_port *port)
344 344
345 mutex_lock(&nwpserial_mutex); 345 mutex_lock(&nwpserial_mutex);
346 346
347 dn = to_of_device(port->dev)->dev.of_node; 347 dn = port->dev->of_node;
348 if (dn == NULL) 348 if (dn == NULL)
349 goto out; 349 goto out;
350 350
diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c
index a48d9080f552..659a695bdad6 100644
--- a/drivers/serial/of_serial.c
+++ b/drivers/serial/of_serial.c
@@ -27,7 +27,7 @@ struct of_serial_info {
27/* 27/*
28 * Fill a struct uart_port for a given device node 28 * Fill a struct uart_port for a given device node
29 */ 29 */
30static int __devinit of_platform_serial_setup(struct of_device *ofdev, 30static int __devinit of_platform_serial_setup(struct platform_device *ofdev,
31 int type, struct uart_port *port) 31 int type, struct uart_port *port)
32{ 32{
33 struct resource resource; 33 struct resource resource;
@@ -80,7 +80,7 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev,
80/* 80/*
81 * Try to register a serial port 81 * Try to register a serial port
82 */ 82 */
83static int __devinit of_platform_serial_probe(struct of_device *ofdev, 83static int __devinit of_platform_serial_probe(struct platform_device *ofdev,
84 const struct of_device_id *id) 84 const struct of_device_id *id)
85{ 85{
86 struct of_serial_info *info; 86 struct of_serial_info *info;
@@ -134,7 +134,7 @@ out:
134/* 134/*
135 * Release a line 135 * Release a line
136 */ 136 */
137static int of_platform_serial_remove(struct of_device *ofdev) 137static int of_platform_serial_remove(struct platform_device *ofdev)
138{ 138{
139 struct of_serial_info *info = dev_get_drvdata(&ofdev->dev); 139 struct of_serial_info *info = dev_get_drvdata(&ofdev->dev);
140 switch (info->type) { 140 switch (info->type) {
diff --git a/drivers/serial/s5pv210.c b/drivers/serial/s5pv210.c
index 4a789e5361a4..6ebccd70a707 100644
--- a/drivers/serial/s5pv210.c
+++ b/drivers/serial/s5pv210.c
@@ -28,8 +28,12 @@
28static int s5pv210_serial_setsource(struct uart_port *port, 28static int s5pv210_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk) 29 struct s3c24xx_uart_clksrc *clk)
30{ 30{
31 struct s3c2410_uartcfg *cfg = port->dev->platform_data;
31 unsigned long ucon = rd_regl(port, S3C2410_UCON); 32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32 33
34 if ((cfg->clocks_size) == 1)
35 return 0;
36
33 if (strcmp(clk->name, "pclk") == 0) 37 if (strcmp(clk->name, "pclk") == 0)
34 ucon &= ~S5PV210_UCON_CLKMASK; 38 ucon &= ~S5PV210_UCON_CLKMASK;
35 else if (strcmp(clk->name, "uclk1") == 0) 39 else if (strcmp(clk->name, "uclk1") == 0)
@@ -47,10 +51,14 @@ static int s5pv210_serial_setsource(struct uart_port *port,
47static int s5pv210_serial_getsource(struct uart_port *port, 51static int s5pv210_serial_getsource(struct uart_port *port,
48 struct s3c24xx_uart_clksrc *clk) 52 struct s3c24xx_uart_clksrc *clk)
49{ 53{
54 struct s3c2410_uartcfg *cfg = port->dev->platform_data;
50 u32 ucon = rd_regl(port, S3C2410_UCON); 55 u32 ucon = rd_regl(port, S3C2410_UCON);
51 56
52 clk->divisor = 1; 57 clk->divisor = 1;
53 58
59 if ((cfg->clocks_size) == 1)
60 return 0;
61
54 switch (ucon & S5PV210_UCON_CLKMASK) { 62 switch (ucon & S5PV210_UCON_CLKMASK) {
55 case S5PV210_UCON_PCLK: 63 case S5PV210_UCON_PCLK:
56 clk->name = "pclk"; 64 clk->name = "pclk";
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index a9d6c5626a0a..b1156ba8ad14 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -705,8 +705,13 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
705 if (ourport->info->has_divslot) { 705 if (ourport->info->has_divslot) {
706 unsigned int div = ourport->baudclk_rate / baud; 706 unsigned int div = ourport->baudclk_rate / baud;
707 707
708 udivslot = udivslot_table[div & 15]; 708 if (cfg->has_fracval) {
709 dbg("udivslot = %04x (div %d)\n", udivslot, div & 15); 709 udivslot = (div & 15);
710 dbg("fracval = %04x\n", udivslot);
711 } else {
712 udivslot = udivslot_table[div & 15];
713 dbg("udivslot = %04x (div %d)\n", udivslot, div & 15);
714 }
710 } 715 }
711 716
712 switch (termios->c_cflag & CSIZE) { 717 switch (termios->c_cflag & CSIZE) {
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index 7f2830709512..cd8511298bcb 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -58,9 +58,9 @@ static struct lock_class_key port_lock_key;
58#define uart_console(port) (0) 58#define uart_console(port) (0)
59#endif 59#endif
60 60
61static void uart_change_speed(struct uart_state *state, 61static void uart_change_speed(struct tty_struct *tty, struct uart_state *state,
62 struct ktermios *old_termios); 62 struct ktermios *old_termios);
63static void uart_wait_until_sent(struct tty_struct *tty, int timeout); 63static void __uart_wait_until_sent(struct uart_port *port, int timeout);
64static void uart_change_pm(struct uart_state *state, int pm_state); 64static void uart_change_pm(struct uart_state *state, int pm_state);
65 65
66/* 66/*
@@ -137,7 +137,7 @@ uart_update_mctrl(struct uart_port *port, unsigned int set, unsigned int clear)
137 * Startup the port. This will be called once per open. All calls 137 * Startup the port. This will be called once per open. All calls
138 * will be serialised by the per-port mutex. 138 * will be serialised by the per-port mutex.
139 */ 139 */
140static int uart_startup(struct uart_state *state, int init_hw) 140static int uart_startup(struct tty_struct *tty, struct uart_state *state, int init_hw)
141{ 141{
142 struct uart_port *uport = state->uart_port; 142 struct uart_port *uport = state->uart_port;
143 struct tty_port *port = &state->port; 143 struct tty_port *port = &state->port;
@@ -152,7 +152,7 @@ static int uart_startup(struct uart_state *state, int init_hw)
152 * once we have successfully opened the port. Also set 152 * once we have successfully opened the port. Also set
153 * up the tty->alt_speed kludge 153 * up the tty->alt_speed kludge
154 */ 154 */
155 set_bit(TTY_IO_ERROR, &port->tty->flags); 155 set_bit(TTY_IO_ERROR, &tty->flags);
156 156
157 if (uport->type == PORT_UNKNOWN) 157 if (uport->type == PORT_UNKNOWN)
158 return 0; 158 return 0;
@@ -177,26 +177,26 @@ static int uart_startup(struct uart_state *state, int init_hw)
177 /* 177 /*
178 * Initialise the hardware port settings. 178 * Initialise the hardware port settings.
179 */ 179 */
180 uart_change_speed(state, NULL); 180 uart_change_speed(tty, state, NULL);
181 181
182 /* 182 /*
183 * Setup the RTS and DTR signals once the 183 * Setup the RTS and DTR signals once the
184 * port is open and ready to respond. 184 * port is open and ready to respond.
185 */ 185 */
186 if (port->tty->termios->c_cflag & CBAUD) 186 if (tty->termios->c_cflag & CBAUD)
187 uart_set_mctrl(uport, TIOCM_RTS | TIOCM_DTR); 187 uart_set_mctrl(uport, TIOCM_RTS | TIOCM_DTR);
188 } 188 }
189 189
190 if (port->flags & ASYNC_CTS_FLOW) { 190 if (port->flags & ASYNC_CTS_FLOW) {
191 spin_lock_irq(&uport->lock); 191 spin_lock_irq(&uport->lock);
192 if (!(uport->ops->get_mctrl(uport) & TIOCM_CTS)) 192 if (!(uport->ops->get_mctrl(uport) & TIOCM_CTS))
193 port->tty->hw_stopped = 1; 193 tty->hw_stopped = 1;
194 spin_unlock_irq(&uport->lock); 194 spin_unlock_irq(&uport->lock);
195 } 195 }
196 196
197 set_bit(ASYNCB_INITIALIZED, &port->flags); 197 set_bit(ASYNCB_INITIALIZED, &port->flags);
198 198
199 clear_bit(TTY_IO_ERROR, &port->tty->flags); 199 clear_bit(TTY_IO_ERROR, &tty->flags);
200 } 200 }
201 201
202 if (retval && capable(CAP_SYS_ADMIN)) 202 if (retval && capable(CAP_SYS_ADMIN))
@@ -210,11 +210,10 @@ static int uart_startup(struct uart_state *state, int init_hw)
210 * DTR is dropped if the hangup on close termio flag is on. Calls to 210 * DTR is dropped if the hangup on close termio flag is on. Calls to
211 * uart_shutdown are serialised by the per-port semaphore. 211 * uart_shutdown are serialised by the per-port semaphore.
212 */ 212 */
213static void uart_shutdown(struct uart_state *state) 213static void uart_shutdown(struct tty_struct *tty, struct uart_state *state)
214{ 214{
215 struct uart_port *uport = state->uart_port; 215 struct uart_port *uport = state->uart_port;
216 struct tty_port *port = &state->port; 216 struct tty_port *port = &state->port;
217 struct tty_struct *tty = port->tty;
218 217
219 /* 218 /*
220 * Set the TTY IO error marker 219 * Set the TTY IO error marker
@@ -430,11 +429,10 @@ uart_get_divisor(struct uart_port *port, unsigned int baud)
430EXPORT_SYMBOL(uart_get_divisor); 429EXPORT_SYMBOL(uart_get_divisor);
431 430
432/* FIXME: Consistent locking policy */ 431/* FIXME: Consistent locking policy */
433static void 432static void uart_change_speed(struct tty_struct *tty, struct uart_state *state,
434uart_change_speed(struct uart_state *state, struct ktermios *old_termios) 433 struct ktermios *old_termios)
435{ 434{
436 struct tty_port *port = &state->port; 435 struct tty_port *port = &state->port;
437 struct tty_struct *tty = port->tty;
438 struct uart_port *uport = state->uart_port; 436 struct uart_port *uport = state->uart_port;
439 struct ktermios *termios; 437 struct ktermios *termios;
440 438
@@ -463,8 +461,8 @@ uart_change_speed(struct uart_state *state, struct ktermios *old_termios)
463 uport->ops->set_termios(uport, termios, old_termios); 461 uport->ops->set_termios(uport, termios, old_termios);
464} 462}
465 463
466static inline int 464static inline int __uart_put_char(struct uart_port *port,
467__uart_put_char(struct uart_port *port, struct circ_buf *circ, unsigned char c) 465 struct circ_buf *circ, unsigned char c)
468{ 466{
469 unsigned long flags; 467 unsigned long flags;
470 int ret = 0; 468 int ret = 0;
@@ -494,8 +492,8 @@ static void uart_flush_chars(struct tty_struct *tty)
494 uart_start(tty); 492 uart_start(tty);
495} 493}
496 494
497static int 495static int uart_write(struct tty_struct *tty,
498uart_write(struct tty_struct *tty, const unsigned char *buf, int count) 496 const unsigned char *buf, int count)
499{ 497{
500 struct uart_state *state = tty->driver_data; 498 struct uart_state *state = tty->driver_data;
501 struct uart_port *port; 499 struct uart_port *port;
@@ -675,7 +673,7 @@ static int uart_get_info(struct uart_state *state,
675 return 0; 673 return 0;
676} 674}
677 675
678static int uart_set_info(struct uart_state *state, 676static int uart_set_info(struct tty_struct *tty, struct uart_state *state,
679 struct serial_struct __user *newinfo) 677 struct serial_struct __user *newinfo)
680{ 678{
681 struct serial_struct new_serial; 679 struct serial_struct new_serial;
@@ -770,7 +768,7 @@ static int uart_set_info(struct uart_state *state,
770 * We need to shutdown the serial port at the old 768 * We need to shutdown the serial port at the old
771 * port/type/irq combination. 769 * port/type/irq combination.
772 */ 770 */
773 uart_shutdown(state); 771 uart_shutdown(tty, state);
774 } 772 }
775 773
776 if (change_port) { 774 if (change_port) {
@@ -869,25 +867,27 @@ static int uart_set_info(struct uart_state *state,
869 "is deprecated.\n", current->comm, 867 "is deprecated.\n", current->comm,
870 tty_name(port->tty, buf)); 868 tty_name(port->tty, buf));
871 } 869 }
872 uart_change_speed(state, NULL); 870 uart_change_speed(tty, state, NULL);
873 } 871 }
874 } else 872 } else
875 retval = uart_startup(state, 1); 873 retval = uart_startup(tty, state, 1);
876 exit: 874 exit:
877 mutex_unlock(&port->mutex); 875 mutex_unlock(&port->mutex);
878 return retval; 876 return retval;
879} 877}
880 878
881 879/**
882/* 880 * uart_get_lsr_info - get line status register info
883 * uart_get_lsr_info - get line status register info. 881 * @tty: tty associated with the UART
884 * Note: uart_ioctl protects us against hangups. 882 * @state: UART being queried
883 * @value: returned modem value
884 *
885 * Note: uart_ioctl protects us against hangups.
885 */ 886 */
886static int uart_get_lsr_info(struct uart_state *state, 887static int uart_get_lsr_info(struct tty_struct *tty,
887 unsigned int __user *value) 888 struct uart_state *state, unsigned int __user *value)
888{ 889{
889 struct uart_port *uport = state->uart_port; 890 struct uart_port *uport = state->uart_port;
890 struct tty_port *port = &state->port;
891 unsigned int result; 891 unsigned int result;
892 892
893 result = uport->ops->tx_empty(uport); 893 result = uport->ops->tx_empty(uport);
@@ -900,7 +900,7 @@ static int uart_get_lsr_info(struct uart_state *state,
900 */ 900 */
901 if (uport->x_char || 901 if (uport->x_char ||
902 ((uart_circ_chars_pending(&state->xmit) > 0) && 902 ((uart_circ_chars_pending(&state->xmit) > 0) &&
903 !port->tty->stopped && !port->tty->hw_stopped)) 903 !tty->stopped && !tty->hw_stopped))
904 result &= ~TIOCSER_TEMT; 904 result &= ~TIOCSER_TEMT;
905 905
906 return put_user(result, value); 906 return put_user(result, value);
@@ -961,7 +961,7 @@ static int uart_break_ctl(struct tty_struct *tty, int break_state)
961 return 0; 961 return 0;
962} 962}
963 963
964static int uart_do_autoconfig(struct uart_state *state) 964static int uart_do_autoconfig(struct tty_struct *tty,struct uart_state *state)
965{ 965{
966 struct uart_port *uport = state->uart_port; 966 struct uart_port *uport = state->uart_port;
967 struct tty_port *port = &state->port; 967 struct tty_port *port = &state->port;
@@ -980,7 +980,7 @@ static int uart_do_autoconfig(struct uart_state *state)
980 980
981 ret = -EBUSY; 981 ret = -EBUSY;
982 if (tty_port_users(port) == 1) { 982 if (tty_port_users(port) == 1) {
983 uart_shutdown(state); 983 uart_shutdown(tty, state);
984 984
985 /* 985 /*
986 * If we already have a port type configured, 986 * If we already have a port type configured,
@@ -999,7 +999,7 @@ static int uart_do_autoconfig(struct uart_state *state)
999 */ 999 */
1000 uport->ops->config_port(uport, flags); 1000 uport->ops->config_port(uport, flags);
1001 1001
1002 ret = uart_startup(state, 1); 1002 ret = uart_startup(tty, state, 1);
1003 } 1003 }
1004 mutex_unlock(&port->mutex); 1004 mutex_unlock(&port->mutex);
1005 return ret; 1005 return ret;
@@ -1122,11 +1122,11 @@ uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd,
1122 break; 1122 break;
1123 1123
1124 case TIOCSSERIAL: 1124 case TIOCSSERIAL:
1125 ret = uart_set_info(state, uarg); 1125 ret = uart_set_info(tty, state, uarg);
1126 break; 1126 break;
1127 1127
1128 case TIOCSERCONFIG: 1128 case TIOCSERCONFIG:
1129 ret = uart_do_autoconfig(state); 1129 ret = uart_do_autoconfig(tty, state);
1130 break; 1130 break;
1131 1131
1132 case TIOCSERGWILD: /* obsolete */ 1132 case TIOCSERGWILD: /* obsolete */
@@ -1172,7 +1172,7 @@ uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd,
1172 */ 1172 */
1173 switch (cmd) { 1173 switch (cmd) {
1174 case TIOCSERGETLSR: /* Get line status register */ 1174 case TIOCSERGETLSR: /* Get line status register */
1175 ret = uart_get_lsr_info(state, uarg); 1175 ret = uart_get_lsr_info(tty, state, uarg);
1176 break; 1176 break;
1177 1177
1178 default: { 1178 default: {
@@ -1194,7 +1194,7 @@ static void uart_set_ldisc(struct tty_struct *tty)
1194 struct uart_port *uport = state->uart_port; 1194 struct uart_port *uport = state->uart_port;
1195 1195
1196 if (uport->ops->set_ldisc) 1196 if (uport->ops->set_ldisc)
1197 uport->ops->set_ldisc(uport); 1197 uport->ops->set_ldisc(uport, tty->termios->c_line);
1198} 1198}
1199 1199
1200static void uart_set_termios(struct tty_struct *tty, 1200static void uart_set_termios(struct tty_struct *tty,
@@ -1219,7 +1219,7 @@ static void uart_set_termios(struct tty_struct *tty,
1219 return; 1219 return;
1220 } 1220 }
1221 1221
1222 uart_change_speed(state, old_termios); 1222 uart_change_speed(tty, state, old_termios);
1223 1223
1224 /* Handle transition to B0 status */ 1224 /* Handle transition to B0 status */
1225 if ((old_termios->c_cflag & CBAUD) && !(cflag & CBAUD)) 1225 if ((old_termios->c_cflag & CBAUD) && !(cflag & CBAUD))
@@ -1272,8 +1272,9 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1272 struct uart_state *state = tty->driver_data; 1272 struct uart_state *state = tty->driver_data;
1273 struct tty_port *port; 1273 struct tty_port *port;
1274 struct uart_port *uport; 1274 struct uart_port *uport;
1275 unsigned long flags;
1275 1276
1276 BUG_ON(!kernel_locked()); 1277 BUG_ON(!tty_locked());
1277 1278
1278 if (!state) 1279 if (!state)
1279 return; 1280 return;
@@ -1284,9 +1285,12 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1284 pr_debug("uart_close(%d) called\n", uport->line); 1285 pr_debug("uart_close(%d) called\n", uport->line);
1285 1286
1286 mutex_lock(&port->mutex); 1287 mutex_lock(&port->mutex);
1288 spin_lock_irqsave(&port->lock, flags);
1287 1289
1288 if (tty_hung_up_p(filp)) 1290 if (tty_hung_up_p(filp)) {
1291 spin_unlock_irqrestore(&port->lock, flags);
1289 goto done; 1292 goto done;
1293 }
1290 1294
1291 if ((tty->count == 1) && (port->count != 1)) { 1295 if ((tty->count == 1) && (port->count != 1)) {
1292 /* 1296 /*
@@ -1305,8 +1309,10 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1305 tty->name, port->count); 1309 tty->name, port->count);
1306 port->count = 0; 1310 port->count = 0;
1307 } 1311 }
1308 if (port->count) 1312 if (port->count) {
1313 spin_unlock_irqrestore(&port->lock, flags);
1309 goto done; 1314 goto done;
1315 }
1310 1316
1311 /* 1317 /*
1312 * Now we wait for the transmit buffer to clear; and we notify 1318 * Now we wait for the transmit buffer to clear; and we notify
@@ -1314,9 +1320,18 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1314 * setting tty->closing. 1320 * setting tty->closing.
1315 */ 1321 */
1316 tty->closing = 1; 1322 tty->closing = 1;
1323 spin_unlock_irqrestore(&port->lock, flags);
1317 1324
1318 if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE) 1325 if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
1319 tty_wait_until_sent(tty, msecs_to_jiffies(port->closing_wait)); 1326 /*
1327 * hack: open-coded tty_wait_until_sent to avoid
1328 * recursive tty_lock
1329 */
1330 long timeout = msecs_to_jiffies(port->closing_wait);
1331 if (wait_event_interruptible_timeout(tty->write_wait,
1332 !tty_chars_in_buffer(tty), timeout) >= 0)
1333 __uart_wait_until_sent(uport, timeout);
1334 }
1320 1335
1321 /* 1336 /*
1322 * At this point, we stop accepting input. To do this, we 1337 * At this point, we stop accepting input. To do this, we
@@ -1332,45 +1347,47 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1332 * has completely drained; this is especially 1347 * has completely drained; this is especially
1333 * important if there is a transmit FIFO! 1348 * important if there is a transmit FIFO!
1334 */ 1349 */
1335 uart_wait_until_sent(tty, uport->timeout); 1350 __uart_wait_until_sent(uport, uport->timeout);
1336 } 1351 }
1337 1352
1338 uart_shutdown(state); 1353 uart_shutdown(tty, state);
1339 uart_flush_buffer(tty); 1354 uart_flush_buffer(tty);
1340 1355
1341 tty_ldisc_flush(tty); 1356 tty_ldisc_flush(tty);
1342 1357
1343 tty->closing = 0;
1344 tty_port_tty_set(port, NULL); 1358 tty_port_tty_set(port, NULL);
1359 spin_lock_irqsave(&port->lock, flags);
1360 tty->closing = 0;
1345 1361
1346 if (port->blocked_open) { 1362 if (port->blocked_open) {
1363 spin_unlock_irqrestore(&port->lock, flags);
1347 if (port->close_delay) 1364 if (port->close_delay)
1348 msleep_interruptible(port->close_delay); 1365 msleep_interruptible(port->close_delay);
1366 spin_lock_irqsave(&port->lock, flags);
1349 } else if (!uart_console(uport)) { 1367 } else if (!uart_console(uport)) {
1368 spin_unlock_irqrestore(&port->lock, flags);
1350 uart_change_pm(state, 3); 1369 uart_change_pm(state, 3);
1370 spin_lock_irqsave(&port->lock, flags);
1351 } 1371 }
1352 1372
1353 /* 1373 /*
1354 * Wake up anyone trying to open this port. 1374 * Wake up anyone trying to open this port.
1355 */ 1375 */
1356 clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags); 1376 clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
1377 spin_unlock_irqrestore(&port->lock, flags);
1357 wake_up_interruptible(&port->open_wait); 1378 wake_up_interruptible(&port->open_wait);
1358 1379
1359done: 1380done:
1360 mutex_unlock(&port->mutex); 1381 mutex_unlock(&port->mutex);
1361} 1382}
1362 1383
1363static void uart_wait_until_sent(struct tty_struct *tty, int timeout) 1384static void __uart_wait_until_sent(struct uart_port *port, int timeout)
1364{ 1385{
1365 struct uart_state *state = tty->driver_data;
1366 struct uart_port *port = state->uart_port;
1367 unsigned long char_time, expire; 1386 unsigned long char_time, expire;
1368 1387
1369 if (port->type == PORT_UNKNOWN || port->fifosize == 0) 1388 if (port->type == PORT_UNKNOWN || port->fifosize == 0)
1370 return; 1389 return;
1371 1390
1372 lock_kernel();
1373
1374 /* 1391 /*
1375 * Set the check interval to be 1/5 of the estimated time to 1392 * Set the check interval to be 1/5 of the estimated time to
1376 * send a single character, and make it at least 1. The check 1393 * send a single character, and make it at least 1. The check
@@ -1416,7 +1433,16 @@ static void uart_wait_until_sent(struct tty_struct *tty, int timeout)
1416 break; 1433 break;
1417 } 1434 }
1418 set_current_state(TASK_RUNNING); /* might not be needed */ 1435 set_current_state(TASK_RUNNING); /* might not be needed */
1419 unlock_kernel(); 1436}
1437
1438static void uart_wait_until_sent(struct tty_struct *tty, int timeout)
1439{
1440 struct uart_state *state = tty->driver_data;
1441 struct uart_port *port = state->uart_port;
1442
1443 tty_lock();
1444 __uart_wait_until_sent(port, timeout);
1445 tty_unlock();
1420} 1446}
1421 1447
1422/* 1448/*
@@ -1429,16 +1455,19 @@ static void uart_hangup(struct tty_struct *tty)
1429{ 1455{
1430 struct uart_state *state = tty->driver_data; 1456 struct uart_state *state = tty->driver_data;
1431 struct tty_port *port = &state->port; 1457 struct tty_port *port = &state->port;
1458 unsigned long flags;
1432 1459
1433 BUG_ON(!kernel_locked()); 1460 BUG_ON(!tty_locked());
1434 pr_debug("uart_hangup(%d)\n", state->uart_port->line); 1461 pr_debug("uart_hangup(%d)\n", state->uart_port->line);
1435 1462
1436 mutex_lock(&port->mutex); 1463 mutex_lock(&port->mutex);
1437 if (port->flags & ASYNC_NORMAL_ACTIVE) { 1464 if (port->flags & ASYNC_NORMAL_ACTIVE) {
1438 uart_flush_buffer(tty); 1465 uart_flush_buffer(tty);
1439 uart_shutdown(state); 1466 uart_shutdown(tty, state);
1467 spin_lock_irqsave(&port->lock, flags);
1440 port->count = 0; 1468 port->count = 0;
1441 clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags); 1469 clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
1470 spin_unlock_irqrestore(&port->lock, flags);
1442 tty_port_tty_set(port, NULL); 1471 tty_port_tty_set(port, NULL);
1443 wake_up_interruptible(&port->open_wait); 1472 wake_up_interruptible(&port->open_wait);
1444 wake_up_interruptible(&port->delta_msr_wait); 1473 wake_up_interruptible(&port->delta_msr_wait);
@@ -1446,15 +1475,19 @@ static void uart_hangup(struct tty_struct *tty)
1446 mutex_unlock(&port->mutex); 1475 mutex_unlock(&port->mutex);
1447} 1476}
1448 1477
1449/* 1478/**
1450 * Copy across the serial console cflag setting into the termios settings 1479 * uart_update_termios - update the terminal hw settings
1451 * for the initial open of the port. This allows continuity between the 1480 * @tty: tty associated with UART
1452 * kernel settings, and the settings init adopts when it opens the port 1481 * @state: UART to update
1453 * for the first time. 1482 *
1483 * Copy across the serial console cflag setting into the termios settings
1484 * for the initial open of the port. This allows continuity between the
1485 * kernel settings, and the settings init adopts when it opens the port
1486 * for the first time.
1454 */ 1487 */
1455static void uart_update_termios(struct uart_state *state) 1488static void uart_update_termios(struct tty_struct *tty,
1489 struct uart_state *state)
1456{ 1490{
1457 struct tty_struct *tty = state->port.tty;
1458 struct uart_port *port = state->uart_port; 1491 struct uart_port *port = state->uart_port;
1459 1492
1460 if (uart_console(port) && port->cons->cflag) { 1493 if (uart_console(port) && port->cons->cflag) {
@@ -1471,7 +1504,7 @@ static void uart_update_termios(struct uart_state *state)
1471 /* 1504 /*
1472 * Make termios settings take effect. 1505 * Make termios settings take effect.
1473 */ 1506 */
1474 uart_change_speed(state, NULL); 1507 uart_change_speed(tty, state, NULL);
1475 1508
1476 /* 1509 /*
1477 * And finally enable the RTS and DTR signals. 1510 * And finally enable the RTS and DTR signals.
@@ -1481,90 +1514,37 @@ static void uart_update_termios(struct uart_state *state)
1481 } 1514 }
1482} 1515}
1483 1516
1484/* 1517static int uart_carrier_raised(struct tty_port *port)
1485 * Block the open until the port is ready. We must be called with
1486 * the per-port semaphore held.
1487 */
1488static int
1489uart_block_til_ready(struct file *filp, struct uart_state *state)
1490{ 1518{
1491 DECLARE_WAITQUEUE(wait, current); 1519 struct uart_state *state = container_of(port, struct uart_state, port);
1492 struct uart_port *uport = state->uart_port; 1520 struct uart_port *uport = state->uart_port;
1493 struct tty_port *port = &state->port; 1521 int mctrl;
1494 unsigned int mctrl; 1522 spin_lock_irq(&uport->lock);
1495 1523 uport->ops->enable_ms(uport);
1496 port->blocked_open++; 1524 mctrl = uport->ops->get_mctrl(uport);
1497 port->count--; 1525 spin_unlock_irq(&uport->lock);
1498 1526 if (mctrl & TIOCM_CAR)
1499 add_wait_queue(&port->open_wait, &wait); 1527 return 1;
1500 while (1) { 1528 return 0;
1501 set_current_state(TASK_INTERRUPTIBLE); 1529}
1502
1503 /*
1504 * If we have been hung up, tell userspace/restart open.
1505 */
1506 if (tty_hung_up_p(filp) || port->tty == NULL)
1507 break;
1508
1509 /*
1510 * If the port has been closed, tell userspace/restart open.
1511 */
1512 if (!(port->flags & ASYNC_INITIALIZED))
1513 break;
1514 1530
1515 /* 1531static void uart_dtr_rts(struct tty_port *port, int onoff)
1516 * If non-blocking mode is set, or CLOCAL mode is set, 1532{
1517 * we don't want to wait for the modem status lines to 1533 struct uart_state *state = container_of(port, struct uart_state, port);
1518 * indicate that the port is ready. 1534 struct uart_port *uport = state->uart_port;
1519 *
1520 * Also, if the port is not enabled/configured, we want
1521 * to allow the open to succeed here. Note that we will
1522 * have set TTY_IO_ERROR for a non-existant port.
1523 */
1524 if ((filp->f_flags & O_NONBLOCK) ||
1525 (port->tty->termios->c_cflag & CLOCAL) ||
1526 (port->tty->flags & (1 << TTY_IO_ERROR)))
1527 break;
1528 1535
1529 /* 1536 if (onoff) {
1530 * Set DTR to allow modem to know we're waiting. Do 1537 uart_set_mctrl(uport, TIOCM_DTR | TIOCM_RTS);
1531 * not set RTS here - we want to make sure we catch
1532 * the data from the modem.
1533 */
1534 if (port->tty->termios->c_cflag & CBAUD)
1535 uart_set_mctrl(uport, TIOCM_DTR);
1536 1538
1537 /* 1539 /*
1538 * and wait for the carrier to indicate that the 1540 * If this is the first open to succeed,
1539 * modem is ready for us. 1541 * adjust things to suit.
1540 */ 1542 */
1541 spin_lock_irq(&uport->lock); 1543 if (!test_and_set_bit(ASYNCB_NORMAL_ACTIVE, &port->flags))
1542 uport->ops->enable_ms(uport); 1544 uart_update_termios(port->tty, state);
1543 mctrl = uport->ops->get_mctrl(uport);
1544 spin_unlock_irq(&uport->lock);
1545 if (mctrl & TIOCM_CAR)
1546 break;
1547
1548 mutex_unlock(&port->mutex);
1549 schedule();
1550 mutex_lock(&port->mutex);
1551
1552 if (signal_pending(current))
1553 break;
1554 } 1545 }
1555 set_current_state(TASK_RUNNING); 1546 else
1556 remove_wait_queue(&port->open_wait, &wait); 1547 uart_clear_mctrl(uport, TIOCM_DTR | TIOCM_RTS);
1557
1558 port->count++;
1559 port->blocked_open--;
1560
1561 if (signal_pending(current))
1562 return -ERESTARTSYS;
1563
1564 if (!port->tty || tty_hung_up_p(filp))
1565 return -EAGAIN;
1566
1567 return 0;
1568} 1548}
1569 1549
1570static struct uart_state *uart_get(struct uart_driver *drv, int line) 1550static struct uart_state *uart_get(struct uart_driver *drv, int line)
@@ -1611,7 +1591,7 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
1611 struct tty_port *port; 1591 struct tty_port *port;
1612 int retval, line = tty->index; 1592 int retval, line = tty->index;
1613 1593
1614 BUG_ON(!kernel_locked()); 1594 BUG_ON(!tty_locked());
1615 pr_debug("uart_open(%d) called\n", line); 1595 pr_debug("uart_open(%d) called\n", line);
1616 1596
1617 /* 1597 /*
@@ -1668,23 +1648,14 @@ static int uart_open(struct tty_struct *tty, struct file *filp)
1668 /* 1648 /*
1669 * Start up the serial port. 1649 * Start up the serial port.
1670 */ 1650 */
1671 retval = uart_startup(state, 0); 1651 retval = uart_startup(tty, state, 0);
1672 1652
1673 /* 1653 /*
1674 * If we succeeded, wait until the port is ready. 1654 * If we succeeded, wait until the port is ready.
1675 */ 1655 */
1676 if (retval == 0)
1677 retval = uart_block_til_ready(filp, state);
1678 mutex_unlock(&port->mutex); 1656 mutex_unlock(&port->mutex);
1679 1657 if (retval == 0)
1680 /* 1658 retval = tty_port_block_til_ready(port, tty, filp);
1681 * If this is the first open to succeed, adjust things to suit.
1682 */
1683 if (retval == 0 && !(port->flags & ASYNC_NORMAL_ACTIVE)) {
1684 set_bit(ASYNCB_NORMAL_ACTIVE, &port->flags);
1685
1686 uart_update_termios(state);
1687 }
1688 1659
1689fail: 1660fail:
1690 return retval; 1661 return retval;
@@ -2010,9 +1981,13 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
2010 struct tty_port *port = &state->port; 1981 struct tty_port *port = &state->port;
2011 struct device *tty_dev; 1982 struct device *tty_dev;
2012 struct uart_match match = {uport, drv}; 1983 struct uart_match match = {uport, drv};
1984 struct tty_struct *tty;
2013 1985
2014 mutex_lock(&port->mutex); 1986 mutex_lock(&port->mutex);
2015 1987
1988 /* Must be inside the mutex lock until we convert to tty_port */
1989 tty = port->tty;
1990
2016 tty_dev = device_find_child(uport->dev, &match, serial_match_port); 1991 tty_dev = device_find_child(uport->dev, &match, serial_match_port);
2017 if (device_may_wakeup(tty_dev)) { 1992 if (device_may_wakeup(tty_dev)) {
2018 enable_irq_wake(uport->irq); 1993 enable_irq_wake(uport->irq);
@@ -2105,9 +2080,12 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *uport)
2105 ops->set_mctrl(uport, 0); 2080 ops->set_mctrl(uport, 0);
2106 spin_unlock_irq(&uport->lock); 2081 spin_unlock_irq(&uport->lock);
2107 if (console_suspend_enabled || !uart_console(uport)) { 2082 if (console_suspend_enabled || !uart_console(uport)) {
2083 /* Protected by port mutex for now */
2084 struct tty_struct *tty = port->tty;
2108 ret = ops->startup(uport); 2085 ret = ops->startup(uport);
2109 if (ret == 0) { 2086 if (ret == 0) {
2110 uart_change_speed(state, NULL); 2087 if (tty)
2088 uart_change_speed(tty, state, NULL);
2111 spin_lock_irq(&uport->lock); 2089 spin_lock_irq(&uport->lock);
2112 ops->set_mctrl(uport, uport->mctrl); 2090 ops->set_mctrl(uport, uport->mctrl);
2113 ops->start_tx(uport); 2091 ops->start_tx(uport);
@@ -2119,7 +2097,7 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *uport)
2119 * Clear the "initialized" flag so we won't try 2097 * Clear the "initialized" flag so we won't try
2120 * to call the low level drivers shutdown method. 2098 * to call the low level drivers shutdown method.
2121 */ 2099 */
2122 uart_shutdown(state); 2100 uart_shutdown(tty, state);
2123 } 2101 }
2124 } 2102 }
2125 2103
@@ -2312,6 +2290,11 @@ static const struct tty_operations uart_ops = {
2312#endif 2290#endif
2313}; 2291};
2314 2292
2293static const struct tty_port_operations uart_port_ops = {
2294 .carrier_raised = uart_carrier_raised,
2295 .dtr_rts = uart_dtr_rts,
2296};
2297
2315/** 2298/**
2316 * uart_register_driver - register a driver with the uart core layer 2299 * uart_register_driver - register a driver with the uart core layer
2317 * @drv: low level driver structure 2300 * @drv: low level driver structure
@@ -2368,6 +2351,7 @@ int uart_register_driver(struct uart_driver *drv)
2368 struct tty_port *port = &state->port; 2351 struct tty_port *port = &state->port;
2369 2352
2370 tty_port_init(port); 2353 tty_port_init(port);
2354 port->ops = &uart_port_ops;
2371 port->close_delay = 500; /* .5 seconds */ 2355 port->close_delay = 500; /* .5 seconds */
2372 port->closing_wait = 30000; /* 30 seconds */ 2356 port->closing_wait = 30000; /* 30 seconds */
2373 tasklet_init(&state->tlet, uart_tasklet_action, 2357 tasklet_init(&state->tlet, uart_tasklet_action,
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c
index ab17c08ddc03..141c69554bd4 100644
--- a/drivers/serial/serial_cs.c
+++ b/drivers/serial/serial_cs.c
@@ -45,7 +45,6 @@
45#include <asm/io.h> 45#include <asm/io.h>
46#include <asm/system.h> 46#include <asm/system.h>
47 47
48#include <pcmcia/cs_types.h>
49#include <pcmcia/cs.h> 48#include <pcmcia/cs.h>
50#include <pcmcia/cistpl.h> 49#include <pcmcia/cistpl.h>
51#include <pcmcia/ciscode.h> 50#include <pcmcia/ciscode.h>
@@ -115,16 +114,14 @@ static void quirk_setup_brainboxes_0104(struct pcmcia_device *link, struct uart_
115 114
116static int quirk_post_ibm(struct pcmcia_device *link) 115static int quirk_post_ibm(struct pcmcia_device *link)
117{ 116{
118 conf_reg_t reg = { 0, CS_READ, 0x800, 0 }; 117 u8 val;
119 int ret; 118 int ret;
120 119
121 ret = pcmcia_access_configuration_register(link, &reg); 120 ret = pcmcia_read_config_byte(link, 0x800, &val);
122 if (ret) 121 if (ret)
123 goto failed; 122 goto failed;
124 123
125 reg.Action = CS_WRITE; 124 ret = pcmcia_write_config_byte(link, 0x800, val | 1);
126 reg.Value = reg.Value | 1;
127 ret = pcmcia_access_configuration_register(link, &reg);
128 if (ret) 125 if (ret)
129 goto failed; 126 goto failed;
130 return 0; 127 return 0;
@@ -338,8 +335,8 @@ static int serial_probe(struct pcmcia_device *link)
338 info->p_dev = link; 335 info->p_dev = link;
339 link->priv = info; 336 link->priv = info;
340 337
341 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8; 338 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_8;
342 link->io.NumPorts1 = 8; 339 link->resource[0]->end = 8;
343 link->conf.Attributes = CONF_ENABLE_IRQ; 340 link->conf.Attributes = CONF_ENABLE_IRQ;
344 if (do_sound) { 341 if (do_sound) {
345 link->conf.Attributes |= CONF_ENABLE_SPKR; 342 link->conf.Attributes |= CONF_ENABLE_SPKR;
@@ -427,12 +424,13 @@ static int simple_config_check(struct pcmcia_device *p_dev,
427 p_dev->conf.Vpp = 424 p_dev->conf.Vpp =
428 cf->vpp1.param[CISTPL_POWER_VNOM] / 10000; 425 cf->vpp1.param[CISTPL_POWER_VNOM] / 10000;
429 426
427 p_dev->io_lines = ((*try & 0x1) == 0) ?
428 16 : cf->io.flags & CISTPL_IO_LINES_MASK;
429
430 if ((cf->io.nwin > 0) && (cf->io.win[0].len == size_table[(*try >> 1)]) 430 if ((cf->io.nwin > 0) && (cf->io.win[0].len == size_table[(*try >> 1)])
431 && (cf->io.win[0].base != 0)) { 431 && (cf->io.win[0].base != 0)) {
432 p_dev->io.BasePort1 = cf->io.win[0].base; 432 p_dev->resource[0]->start = cf->io.win[0].base;
433 p_dev->io.IOAddrLines = ((*try & 0x1) == 0) ? 433 if (!pcmcia_request_io(p_dev))
434 16 : cf->io.flags & CISTPL_IO_LINES_MASK;
435 if (!pcmcia_request_io(p_dev, &p_dev->io))
436 return 0; 434 return 0;
437 } 435 }
438 return -EINVAL; 436 return -EINVAL;
@@ -449,9 +447,9 @@ static int simple_config_check_notpicky(struct pcmcia_device *p_dev,
449 447
450 if ((cf->io.nwin > 0) && ((cf->io.flags & CISTPL_IO_LINES_MASK) <= 3)) { 448 if ((cf->io.nwin > 0) && ((cf->io.flags & CISTPL_IO_LINES_MASK) <= 3)) {
451 for (j = 0; j < 5; j++) { 449 for (j = 0; j < 5; j++) {
452 p_dev->io.BasePort1 = base[j]; 450 p_dev->resource[0]->start = base[j];
453 p_dev->io.IOAddrLines = base[j] ? 16 : 3; 451 p_dev->io_lines = base[j] ? 16 : 3;
454 if (!pcmcia_request_io(p_dev, &p_dev->io)) 452 if (!pcmcia_request_io(p_dev))
455 return 0; 453 return 0;
456 } 454 }
457 } 455 }
@@ -466,13 +464,13 @@ static int simple_config(struct pcmcia_device *link)
466 /* If the card is already configured, look up the port and irq */ 464 /* If the card is already configured, look up the port and irq */
467 if (link->function_config) { 465 if (link->function_config) {
468 unsigned int port = 0; 466 unsigned int port = 0;
469 if ((link->io.BasePort2 != 0) && 467 if ((link->resource[1]->end != 0) &&
470 (link->io.NumPorts2 == 8)) { 468 (resource_size(link->resource[1]) == 8)) {
471 port = link->io.BasePort2; 469 port = link->resource[1]->end;
472 info->slave = 1; 470 info->slave = 1;
473 } else if ((info->manfid == MANFID_OSITECH) && 471 } else if ((info->manfid == MANFID_OSITECH) &&
474 (link->io.NumPorts1 == 0x40)) { 472 (resource_size(link->resource[0]) == 0x40)) {
475 port = link->io.BasePort1 + 0x28; 473 port = link->resource[0]->start + 0x28;
476 info->slave = 1; 474 info->slave = 1;
477 } 475 }
478 if (info->slave) { 476 if (info->slave) {
@@ -510,7 +508,7 @@ found_port:
510 i = pcmcia_request_configuration(link, &link->conf); 508 i = pcmcia_request_configuration(link, &link->conf);
511 if (i != 0) 509 if (i != 0)
512 return -1; 510 return -1;
513 return setup_serial(link, info, link->io.BasePort1, link->irq); 511 return setup_serial(link, info, link->resource[0]->start, link->irq);
514} 512}
515 513
516static int multi_config_check(struct pcmcia_device *p_dev, 514static int multi_config_check(struct pcmcia_device *p_dev,
@@ -524,10 +522,10 @@ static int multi_config_check(struct pcmcia_device *p_dev,
524 /* The quad port cards have bad CIS's, so just look for a 522 /* The quad port cards have bad CIS's, so just look for a
525 window larger than 8 ports and assume it will be right */ 523 window larger than 8 ports and assume it will be right */
526 if ((cf->io.nwin == 1) && (cf->io.win[0].len > 8)) { 524 if ((cf->io.nwin == 1) && (cf->io.win[0].len > 8)) {
527 p_dev->io.BasePort1 = cf->io.win[0].base; 525 p_dev->resource[0]->start = cf->io.win[0].base;
528 p_dev->io.IOAddrLines = cf->io.flags & CISTPL_IO_LINES_MASK; 526 p_dev->io_lines = cf->io.flags & CISTPL_IO_LINES_MASK;
529 if (!pcmcia_request_io(p_dev, &p_dev->io)) { 527 if (!pcmcia_request_io(p_dev)) {
530 *base2 = p_dev->io.BasePort1 + 8; 528 *base2 = p_dev->resource[0]->start + 8;
531 return 0; 529 return 0;
532 } 530 }
533 } 531 }
@@ -543,11 +541,11 @@ static int multi_config_check_notpicky(struct pcmcia_device *p_dev,
543 int *base2 = priv_data; 541 int *base2 = priv_data;
544 542
545 if (cf->io.nwin == 2) { 543 if (cf->io.nwin == 2) {
546 p_dev->io.BasePort1 = cf->io.win[0].base; 544 p_dev->resource[0]->start = cf->io.win[0].base;
547 p_dev->io.BasePort2 = cf->io.win[1].base; 545 p_dev->resource[1]->start = cf->io.win[1].base;
548 p_dev->io.IOAddrLines = cf->io.flags & CISTPL_IO_LINES_MASK; 546 p_dev->io_lines = cf->io.flags & CISTPL_IO_LINES_MASK;
549 if (!pcmcia_request_io(p_dev, &p_dev->io)) { 547 if (!pcmcia_request_io(p_dev)) {
550 *base2 = p_dev->io.BasePort2; 548 *base2 = p_dev->resource[1]->start;
551 return 0; 549 return 0;
552 } 550 }
553 } 551 }
@@ -560,10 +558,10 @@ static int multi_config(struct pcmcia_device *link)
560 int i, base2 = 0; 558 int i, base2 = 0;
561 559
562 /* First, look for a generic full-sized window */ 560 /* First, look for a generic full-sized window */
563 link->io.NumPorts1 = info->multi * 8; 561 link->resource[0]->end = info->multi * 8;
564 if (pcmcia_loop_config(link, multi_config_check, &base2)) { 562 if (pcmcia_loop_config(link, multi_config_check, &base2)) {
565 /* If that didn't work, look for two windows */ 563 /* If that didn't work, look for two windows */
566 link->io.NumPorts1 = link->io.NumPorts2 = 8; 564 link->resource[0]->end = link->resource[1]->end = 8;
567 info->multi = 2; 565 info->multi = 2;
568 if (pcmcia_loop_config(link, multi_config_check_notpicky, 566 if (pcmcia_loop_config(link, multi_config_check_notpicky,
569 &base2)) { 567 &base2)) {
@@ -599,9 +597,9 @@ static int multi_config(struct pcmcia_device *link)
599 link->conf.ConfigIndex == 3) { 597 link->conf.ConfigIndex == 3) {
600 err = setup_serial(link, info, base2, 598 err = setup_serial(link, info, base2,
601 link->irq); 599 link->irq);
602 base2 = link->io.BasePort1; 600 base2 = link->resource[0]->start;;
603 } else { 601 } else {
604 err = setup_serial(link, info, link->io.BasePort1, 602 err = setup_serial(link, info, link->resource[0]->start,
605 link->irq); 603 link->irq);
606 } 604 }
607 info->c950ctrl = base2; 605 info->c950ctrl = base2;
@@ -616,7 +614,7 @@ static int multi_config(struct pcmcia_device *link)
616 return 0; 614 return 0;
617 } 615 }
618 616
619 setup_serial(link, info, link->io.BasePort1, link->irq); 617 setup_serial(link, info, link->resource[0]->start, link->irq);
620 for (i = 0; i < info->multi - 1; i++) 618 for (i = 0; i < info->multi - 1; i++)
621 setup_serial(link, info, base2 + (8 * i), 619 setup_serial(link, info, base2 + (8 * i),
622 link->irq); 620 link->irq);
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 5f90fcd7d107..c291b3add1d2 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -346,6 +346,27 @@ static int scif_rxfill(struct uart_port *port)
346 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; 346 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
347 } 347 }
348} 348}
349#elif defined(CONFIG_ARCH_SH7372)
350static int scif_txfill(struct uart_port *port)
351{
352 if (port->type == PORT_SCIFA)
353 return sci_in(port, SCFDR) >> 8;
354 else
355 return sci_in(port, SCTFDR);
356}
357
358static int scif_txroom(struct uart_port *port)
359{
360 return port->fifosize - scif_txfill(port);
361}
362
363static int scif_rxfill(struct uart_port *port)
364{
365 if (port->type == PORT_SCIFA)
366 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
367 else
368 return sci_in(port, SCRFDR);
369}
349#else 370#else
350static int scif_txfill(struct uart_port *port) 371static int scif_txfill(struct uart_port *port)
351{ 372{
@@ -683,7 +704,7 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
683 u16 ssr = sci_in(port, SCxSR); 704 u16 ssr = sci_in(port, SCxSR);
684 705
685 /* Disable future Rx interrupts */ 706 /* Disable future Rx interrupts */
686 if (port->type == PORT_SCIFA) { 707 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
687 disable_irq_nosync(irq); 708 disable_irq_nosync(irq);
688 scr |= 0x4000; 709 scr |= 0x4000;
689 } else { 710 } else {
@@ -928,7 +949,7 @@ static void sci_dma_tx_complete(void *arg)
928 949
929 if (!uart_circ_empty(xmit)) { 950 if (!uart_circ_empty(xmit)) {
930 schedule_work(&s->work_tx); 951 schedule_work(&s->work_tx);
931 } else if (port->type == PORT_SCIFA) { 952 } else if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
932 u16 ctrl = sci_in(port, SCSCR); 953 u16 ctrl = sci_in(port, SCSCR);
933 sci_out(port, SCSCR, ctrl & ~SCI_CTRL_FLAGS_TIE); 954 sci_out(port, SCSCR, ctrl & ~SCI_CTRL_FLAGS_TIE);
934 } 955 }
@@ -1184,7 +1205,7 @@ static void sci_start_tx(struct uart_port *port)
1184 unsigned short ctrl; 1205 unsigned short ctrl;
1185 1206
1186#ifdef CONFIG_SERIAL_SH_SCI_DMA 1207#ifdef CONFIG_SERIAL_SH_SCI_DMA
1187 if (port->type == PORT_SCIFA) { 1208 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1188 u16 new, scr = sci_in(port, SCSCR); 1209 u16 new, scr = sci_in(port, SCSCR);
1189 if (s->chan_tx) 1210 if (s->chan_tx)
1190 new = scr | 0x8000; 1211 new = scr | 0x8000;
@@ -1197,7 +1218,7 @@ static void sci_start_tx(struct uart_port *port)
1197 s->cookie_tx < 0) 1218 s->cookie_tx < 0)
1198 schedule_work(&s->work_tx); 1219 schedule_work(&s->work_tx);
1199#endif 1220#endif
1200 if (!s->chan_tx || port->type == PORT_SCIFA) { 1221 if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1201 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ 1222 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
1202 ctrl = sci_in(port, SCSCR); 1223 ctrl = sci_in(port, SCSCR);
1203 sci_out(port, SCSCR, ctrl | SCI_CTRL_FLAGS_TIE); 1224 sci_out(port, SCSCR, ctrl | SCI_CTRL_FLAGS_TIE);
@@ -1210,7 +1231,7 @@ static void sci_stop_tx(struct uart_port *port)
1210 1231
1211 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ 1232 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
1212 ctrl = sci_in(port, SCSCR); 1233 ctrl = sci_in(port, SCSCR);
1213 if (port->type == PORT_SCIFA) 1234 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1214 ctrl &= ~0x8000; 1235 ctrl &= ~0x8000;
1215 ctrl &= ~SCI_CTRL_FLAGS_TIE; 1236 ctrl &= ~SCI_CTRL_FLAGS_TIE;
1216 sci_out(port, SCSCR, ctrl); 1237 sci_out(port, SCSCR, ctrl);
@@ -1222,7 +1243,7 @@ static void sci_start_rx(struct uart_port *port)
1222 1243
1223 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ 1244 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
1224 ctrl |= sci_in(port, SCSCR); 1245 ctrl |= sci_in(port, SCSCR);
1225 if (port->type == PORT_SCIFA) 1246 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1226 ctrl &= ~0x4000; 1247 ctrl &= ~0x4000;
1227 sci_out(port, SCSCR, ctrl); 1248 sci_out(port, SCSCR, ctrl);
1228} 1249}
@@ -1233,7 +1254,7 @@ static void sci_stop_rx(struct uart_port *port)
1233 1254
1234 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ 1255 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
1235 ctrl = sci_in(port, SCSCR); 1256 ctrl = sci_in(port, SCSCR);
1236 if (port->type == PORT_SCIFA) 1257 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1237 ctrl &= ~0x4000; 1258 ctrl &= ~0x4000;
1238 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); 1259 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
1239 sci_out(port, SCSCR, ctrl); 1260 sci_out(port, SCSCR, ctrl);
@@ -1271,7 +1292,7 @@ static void rx_timer_fn(unsigned long arg)
1271 struct uart_port *port = &s->port; 1292 struct uart_port *port = &s->port;
1272 u16 scr = sci_in(port, SCSCR); 1293 u16 scr = sci_in(port, SCSCR);
1273 1294
1274 if (port->type == PORT_SCIFA) { 1295 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1275 scr &= ~0x4000; 1296 scr &= ~0x4000;
1276 enable_irq(s->irqs[1]); 1297 enable_irq(s->irqs[1]);
1277 } 1298 }
@@ -1524,6 +1545,8 @@ static const char *sci_type(struct uart_port *port)
1524 return "scif"; 1545 return "scif";
1525 case PORT_SCIFA: 1546 case PORT_SCIFA:
1526 return "scifa"; 1547 return "scifa";
1548 case PORT_SCIFB:
1549 return "scifb";
1527 } 1550 }
1528 1551
1529 return NULL; 1552 return NULL;
@@ -1612,6 +1635,9 @@ static int __devinit sci_init_single(struct platform_device *dev,
1612 port->line = index; 1635 port->line = index;
1613 1636
1614 switch (p->type) { 1637 switch (p->type) {
1638 case PORT_SCIFB:
1639 port->fifosize = 256;
1640 break;
1615 case PORT_SCIFA: 1641 case PORT_SCIFA:
1616 port->fifosize = 64; 1642 port->fifosize = 64;
1617 break; 1643 break;
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index eb7ef4951e07..d2352ac437c5 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -330,7 +330,7 @@
330#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\ 330#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\
331 static inline unsigned int sci_##name##_in(struct uart_port *port) \ 331 static inline unsigned int sci_##name##_in(struct uart_port *port) \
332 { \ 332 { \
333 if (port->type == PORT_SCIF) { \ 333 if (port->type == PORT_SCIF || port->type == PORT_SCIFB) { \
334 SCI_IN(scif_size, scif_offset) \ 334 SCI_IN(scif_size, scif_offset) \
335 } else { /* PORT_SCI or PORT_SCIFA */ \ 335 } else { /* PORT_SCI or PORT_SCIFA */ \
336 SCI_IN(sci_size, sci_offset); \ 336 SCI_IN(sci_size, sci_offset); \
@@ -338,7 +338,7 @@
338 } \ 338 } \
339 static inline void sci_##name##_out(struct uart_port *port, unsigned int value) \ 339 static inline void sci_##name##_out(struct uart_port *port, unsigned int value) \
340 { \ 340 { \
341 if (port->type == PORT_SCIF) { \ 341 if (port->type == PORT_SCIF || port->type == PORT_SCIFB) { \
342 SCI_OUT(scif_size, scif_offset, value) \ 342 SCI_OUT(scif_size, scif_offset, value) \
343 } else { /* PORT_SCI or PORT_SCIFA */ \ 343 } else { /* PORT_SCI or PORT_SCIFA */ \
344 SCI_OUT(sci_size, sci_offset, value); \ 344 SCI_OUT(sci_size, sci_offset, value); \
@@ -392,8 +392,12 @@
392 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 392 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
393 defined(CONFIG_CPU_SUBTYPE_SH7721) || \ 393 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
394 defined(CONFIG_ARCH_SH7367) || \ 394 defined(CONFIG_ARCH_SH7367) || \
395 defined(CONFIG_ARCH_SH7377) || \ 395 defined(CONFIG_ARCH_SH7377)
396 defined(CONFIG_ARCH_SH7372) 396#define SCIF_FNS(name, scif_offset, scif_size) \
397 CPU_SCIF_FNS(name, scif_offset, scif_size)
398#elif defined(CONFIG_ARCH_SH7372)
399#define SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scifb_offset, sh4_scifb_size) \
400 CPU_SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scifb_offset, sh4_scifb_size)
397#define SCIF_FNS(name, scif_offset, scif_size) \ 401#define SCIF_FNS(name, scif_offset, scif_size) \
398 CPU_SCIF_FNS(name, scif_offset, scif_size) 402 CPU_SCIF_FNS(name, scif_offset, scif_size)
399#else 403#else
@@ -430,8 +434,7 @@
430 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 434 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
431 defined(CONFIG_CPU_SUBTYPE_SH7721) || \ 435 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
432 defined(CONFIG_ARCH_SH7367) || \ 436 defined(CONFIG_ARCH_SH7367) || \
433 defined(CONFIG_ARCH_SH7377) || \ 437 defined(CONFIG_ARCH_SH7377)
434 defined(CONFIG_ARCH_SH7372)
435 438
436SCIF_FNS(SCSMR, 0x00, 16) 439SCIF_FNS(SCSMR, 0x00, 16)
437SCIF_FNS(SCBRR, 0x04, 8) 440SCIF_FNS(SCBRR, 0x04, 8)
@@ -444,6 +447,20 @@ SCIF_FNS(SCFDR, 0x1c, 16)
444SCIF_FNS(SCxTDR, 0x20, 8) 447SCIF_FNS(SCxTDR, 0x20, 8)
445SCIF_FNS(SCxRDR, 0x24, 8) 448SCIF_FNS(SCxRDR, 0x24, 8)
446SCIF_FNS(SCLSR, 0x00, 0) 449SCIF_FNS(SCLSR, 0x00, 0)
450#elif defined(CONFIG_ARCH_SH7372)
451SCIF_FNS(SCSMR, 0x00, 16)
452SCIF_FNS(SCBRR, 0x04, 8)
453SCIF_FNS(SCSCR, 0x08, 16)
454SCIF_FNS(SCTDSR, 0x0c, 16)
455SCIF_FNS(SCFER, 0x10, 16)
456SCIF_FNS(SCxSR, 0x14, 16)
457SCIF_FNS(SCFCR, 0x18, 16)
458SCIF_FNS(SCFDR, 0x1c, 16)
459SCIF_FNS(SCTFDR, 0x38, 16)
460SCIF_FNS(SCRFDR, 0x3c, 16)
461SCIx_FNS(SCxTDR, 0x20, 8, 0x40, 8)
462SCIx_FNS(SCxRDR, 0x24, 8, 0x60, 8)
463SCIF_FNS(SCLSR, 0x00, 0)
447#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ 464#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
448 defined(CONFIG_CPU_SUBTYPE_SH7724) 465 defined(CONFIG_CPU_SUBTYPE_SH7724)
449SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16) 466SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16)
diff --git a/drivers/serial/sn_console.c b/drivers/serial/sn_console.c
index 9794e0cd3dcc..7e5e5efea4e2 100644
--- a/drivers/serial/sn_console.c
+++ b/drivers/serial/sn_console.c
@@ -470,7 +470,7 @@ sn_receive_chars(struct sn_cons_port *port, unsigned long flags)
470 } 470 }
471 471
472 if (port->sc_port.state) { 472 if (port->sc_port.state) {
473 /* The serial_core stuffs are initilized, use them */ 473 /* The serial_core stuffs are initialized, use them */
474 tty = port->sc_port.state->port.tty; 474 tty = port->sc_port.state->port.tty;
475 } 475 }
476 else { 476 else {
@@ -551,11 +551,11 @@ static void sn_transmit_chars(struct sn_cons_port *port, int raw)
551 BUG_ON(!port->sc_is_asynch); 551 BUG_ON(!port->sc_is_asynch);
552 552
553 if (port->sc_port.state) { 553 if (port->sc_port.state) {
554 /* We're initilized, using serial core infrastructure */ 554 /* We're initialized, using serial core infrastructure */
555 xmit = &port->sc_port.state->xmit; 555 xmit = &port->sc_port.state->xmit;
556 } else { 556 } else {
557 /* Probably sn_sal_switch_to_asynch has been run but serial core isn't 557 /* Probably sn_sal_switch_to_asynch has been run but serial core isn't
558 * initilized yet. Just return. Writes are going through 558 * initialized yet. Just return. Writes are going through
559 * sn_sal_console_write (due to register_console) at this time. 559 * sn_sal_console_write (due to register_console) at this time.
560 */ 560 */
561 return; 561 return;
diff --git a/drivers/serial/sunhv.c b/drivers/serial/sunhv.c
index 890f91742962..c9014868297d 100644
--- a/drivers/serial/sunhv.c
+++ b/drivers/serial/sunhv.c
@@ -519,13 +519,13 @@ static struct console sunhv_console = {
519 .data = &sunhv_reg, 519 .data = &sunhv_reg,
520}; 520};
521 521
522static int __devinit hv_probe(struct of_device *op, const struct of_device_id *match) 522static int __devinit hv_probe(struct platform_device *op, const struct of_device_id *match)
523{ 523{
524 struct uart_port *port; 524 struct uart_port *port;
525 unsigned long minor; 525 unsigned long minor;
526 int err; 526 int err;
527 527
528 if (op->irqs[0] == 0xffffffff) 528 if (op->archdata.irqs[0] == 0xffffffff)
529 return -ENODEV; 529 return -ENODEV;
530 530
531 port = kzalloc(sizeof(struct uart_port), GFP_KERNEL); 531 port = kzalloc(sizeof(struct uart_port), GFP_KERNEL);
@@ -557,7 +557,7 @@ static int __devinit hv_probe(struct of_device *op, const struct of_device_id *m
557 557
558 port->membase = (unsigned char __iomem *) __pa(port); 558 port->membase = (unsigned char __iomem *) __pa(port);
559 559
560 port->irq = op->irqs[0]; 560 port->irq = op->archdata.irqs[0];
561 561
562 port->dev = &op->dev; 562 port->dev = &op->dev;
563 563
@@ -598,7 +598,7 @@ out_free_port:
598 return err; 598 return err;
599} 599}
600 600
601static int __devexit hv_remove(struct of_device *dev) 601static int __devexit hv_remove(struct platform_device *dev)
602{ 602{
603 struct uart_port *port = dev_get_drvdata(&dev->dev); 603 struct uart_port *port = dev_get_drvdata(&dev->dev);
604 604
@@ -644,12 +644,12 @@ static int __init sunhv_init(void)
644 if (tlb_type != hypervisor) 644 if (tlb_type != hypervisor)
645 return -ENODEV; 645 return -ENODEV;
646 646
647 return of_register_driver(&hv_driver, &of_bus_type); 647 return of_register_platform_driver(&hv_driver);
648} 648}
649 649
650static void __exit sunhv_exit(void) 650static void __exit sunhv_exit(void)
651{ 651{
652 of_unregister_driver(&hv_driver); 652 of_unregister_platform_driver(&hv_driver);
653} 653}
654 654
655module_init(sunhv_init); 655module_init(sunhv_init);
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c
index 5e81bc6b48b0..5b246b18f42f 100644
--- a/drivers/serial/sunsab.c
+++ b/drivers/serial/sunsab.c
@@ -883,7 +883,7 @@ static int sunsab_console_setup(struct console *con, char *options)
883 printk("Console: ttyS%d (SAB82532)\n", 883 printk("Console: ttyS%d (SAB82532)\n",
884 (sunsab_reg.minor - 64) + con->index); 884 (sunsab_reg.minor - 64) + con->index);
885 885
886 sunserial_console_termios(con, to_of_device(up->port.dev)->dev.of_node); 886 sunserial_console_termios(con, up->port.dev->of_node);
887 887
888 switch (con->cflag & CBAUD) { 888 switch (con->cflag & CBAUD) {
889 case B150: baud = 150; break; 889 case B150: baud = 150; break;
@@ -954,7 +954,7 @@ static inline struct console *SUNSAB_CONSOLE(void)
954#endif 954#endif
955 955
956static int __devinit sunsab_init_one(struct uart_sunsab_port *up, 956static int __devinit sunsab_init_one(struct uart_sunsab_port *up,
957 struct of_device *op, 957 struct platform_device *op,
958 unsigned long offset, 958 unsigned long offset,
959 int line) 959 int line)
960{ 960{
@@ -969,7 +969,7 @@ static int __devinit sunsab_init_one(struct uart_sunsab_port *up,
969 return -ENOMEM; 969 return -ENOMEM;
970 up->regs = (union sab82532_async_regs __iomem *) up->port.membase; 970 up->regs = (union sab82532_async_regs __iomem *) up->port.membase;
971 971
972 up->port.irq = op->irqs[0]; 972 up->port.irq = op->archdata.irqs[0];
973 973
974 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE; 974 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
975 up->port.iotype = UPIO_MEM; 975 up->port.iotype = UPIO_MEM;
@@ -1006,7 +1006,7 @@ static int __devinit sunsab_init_one(struct uart_sunsab_port *up,
1006 return 0; 1006 return 0;
1007} 1007}
1008 1008
1009static int __devinit sab_probe(struct of_device *op, const struct of_device_id *match) 1009static int __devinit sab_probe(struct platform_device *op, const struct of_device_id *match)
1010{ 1010{
1011 static int inst; 1011 static int inst;
1012 struct uart_sunsab_port *up; 1012 struct uart_sunsab_port *up;
@@ -1062,7 +1062,7 @@ out:
1062 return err; 1062 return err;
1063} 1063}
1064 1064
1065static int __devexit sab_remove(struct of_device *op) 1065static int __devexit sab_remove(struct platform_device *op)
1066{ 1066{
1067 struct uart_sunsab_port *up = dev_get_drvdata(&op->dev); 1067 struct uart_sunsab_port *up = dev_get_drvdata(&op->dev);
1068 1068
@@ -1130,12 +1130,12 @@ static int __init sunsab_init(void)
1130 } 1130 }
1131 } 1131 }
1132 1132
1133 return of_register_driver(&sab_driver, &of_bus_type); 1133 return of_register_platform_driver(&sab_driver);
1134} 1134}
1135 1135
1136static void __exit sunsab_exit(void) 1136static void __exit sunsab_exit(void)
1137{ 1137{
1138 of_unregister_driver(&sab_driver); 1138 of_unregister_platform_driver(&sab_driver);
1139 if (sunsab_reg.nr) { 1139 if (sunsab_reg.nr) {
1140 sunserial_unregister_minors(&sunsab_reg, sunsab_reg.nr); 1140 sunserial_unregister_minors(&sunsab_reg, sunsab_reg.nr);
1141 } 1141 }
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index ffbf4553f665..551ebfe3ccbb 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -1200,7 +1200,7 @@ static int __devinit sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1200 return -ENODEV; 1200 return -ENODEV;
1201 1201
1202 printk("%s: %s port at %llx, irq %u\n", 1202 printk("%s: %s port at %llx, irq %u\n",
1203 to_of_device(up->port.dev)->dev.of_node->full_name, 1203 up->port.dev->of_node->full_name,
1204 (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse", 1204 (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1205 (unsigned long long) up->port.mapbase, 1205 (unsigned long long) up->port.mapbase,
1206 up->port.irq); 1206 up->port.irq);
@@ -1352,7 +1352,7 @@ static int __init sunsu_console_setup(struct console *co, char *options)
1352 spin_lock_init(&port->lock); 1352 spin_lock_init(&port->lock);
1353 1353
1354 /* Get firmware console settings. */ 1354 /* Get firmware console settings. */
1355 sunserial_console_termios(co, to_of_device(port->dev)->dev.of_node); 1355 sunserial_console_termios(co, port->dev->of_node);
1356 1356
1357 memset(&termios, 0, sizeof(struct ktermios)); 1357 memset(&termios, 0, sizeof(struct ktermios));
1358 termios.c_cflag = co->cflag; 1358 termios.c_cflag = co->cflag;
@@ -1406,7 +1406,7 @@ static enum su_type __devinit su_get_type(struct device_node *dp)
1406 return SU_PORT_PORT; 1406 return SU_PORT_PORT;
1407} 1407}
1408 1408
1409static int __devinit su_probe(struct of_device *op, const struct of_device_id *match) 1409static int __devinit su_probe(struct platform_device *op, const struct of_device_id *match)
1410{ 1410{
1411 static int inst; 1411 static int inst;
1412 struct device_node *dp = op->dev.of_node; 1412 struct device_node *dp = op->dev.of_node;
@@ -1443,7 +1443,7 @@ static int __devinit su_probe(struct of_device *op, const struct of_device_id *m
1443 return -ENOMEM; 1443 return -ENOMEM;
1444 } 1444 }
1445 1445
1446 up->port.irq = op->irqs[0]; 1446 up->port.irq = op->archdata.irqs[0];
1447 1447
1448 up->port.dev = &op->dev; 1448 up->port.dev = &op->dev;
1449 1449
@@ -1497,7 +1497,7 @@ out_unmap:
1497 return err; 1497 return err;
1498} 1498}
1499 1499
1500static int __devexit su_remove(struct of_device *op) 1500static int __devexit su_remove(struct platform_device *op)
1501{ 1501{
1502 struct uart_sunsu_port *up = dev_get_drvdata(&op->dev); 1502 struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
1503 bool kbdms = false; 1503 bool kbdms = false;
@@ -1586,7 +1586,7 @@ static int __init sunsu_init(void)
1586 return err; 1586 return err;
1587 } 1587 }
1588 1588
1589 err = of_register_driver(&su_driver, &of_bus_type); 1589 err = of_register_platform_driver(&su_driver);
1590 if (err && num_uart) 1590 if (err && num_uart)
1591 sunserial_unregister_minors(&sunsu_reg, num_uart); 1591 sunserial_unregister_minors(&sunsu_reg, num_uart);
1592 1592
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c
index f9a24f4ebb34..c1967ac1c07f 100644
--- a/drivers/serial/sunzilog.c
+++ b/drivers/serial/sunzilog.c
@@ -1230,7 +1230,7 @@ static int __init sunzilog_console_setup(struct console *con, char *options)
1230 (sunzilog_reg.minor - 64) + con->index, con->index); 1230 (sunzilog_reg.minor - 64) + con->index, con->index);
1231 1231
1232 /* Get firmware console settings. */ 1232 /* Get firmware console settings. */
1233 sunserial_console_termios(con, to_of_device(up->port.dev)->dev.of_node); 1233 sunserial_console_termios(con, up->port.dev->of_node);
1234 1234
1235 /* Firmware console speed is limited to 150-->38400 baud so 1235 /* Firmware console speed is limited to 150-->38400 baud so
1236 * this hackish cflag thing is OK. 1236 * this hackish cflag thing is OK.
@@ -1399,7 +1399,7 @@ static void __devinit sunzilog_init_hw(struct uart_sunzilog_port *up)
1399 1399
1400static int zilog_irq = -1; 1400static int zilog_irq = -1;
1401 1401
1402static int __devinit zs_probe(struct of_device *op, const struct of_device_id *match) 1402static int __devinit zs_probe(struct platform_device *op, const struct of_device_id *match)
1403{ 1403{
1404 static int kbm_inst, uart_inst; 1404 static int kbm_inst, uart_inst;
1405 int inst; 1405 int inst;
@@ -1426,7 +1426,7 @@ static int __devinit zs_probe(struct of_device *op, const struct of_device_id *m
1426 rp = sunzilog_chip_regs[inst]; 1426 rp = sunzilog_chip_regs[inst];
1427 1427
1428 if (zilog_irq == -1) 1428 if (zilog_irq == -1)
1429 zilog_irq = op->irqs[0]; 1429 zilog_irq = op->archdata.irqs[0];
1430 1430
1431 up = &sunzilog_port_table[inst * 2]; 1431 up = &sunzilog_port_table[inst * 2];
1432 1432
@@ -1434,7 +1434,7 @@ static int __devinit zs_probe(struct of_device *op, const struct of_device_id *m
1434 up[0].port.mapbase = op->resource[0].start + 0x00; 1434 up[0].port.mapbase = op->resource[0].start + 0x00;
1435 up[0].port.membase = (void __iomem *) &rp->channelA; 1435 up[0].port.membase = (void __iomem *) &rp->channelA;
1436 up[0].port.iotype = UPIO_MEM; 1436 up[0].port.iotype = UPIO_MEM;
1437 up[0].port.irq = op->irqs[0]; 1437 up[0].port.irq = op->archdata.irqs[0];
1438 up[0].port.uartclk = ZS_CLOCK; 1438 up[0].port.uartclk = ZS_CLOCK;
1439 up[0].port.fifosize = 1; 1439 up[0].port.fifosize = 1;
1440 up[0].port.ops = &sunzilog_pops; 1440 up[0].port.ops = &sunzilog_pops;
@@ -1451,7 +1451,7 @@ static int __devinit zs_probe(struct of_device *op, const struct of_device_id *m
1451 up[1].port.mapbase = op->resource[0].start + 0x04; 1451 up[1].port.mapbase = op->resource[0].start + 0x04;
1452 up[1].port.membase = (void __iomem *) &rp->channelB; 1452 up[1].port.membase = (void __iomem *) &rp->channelB;
1453 up[1].port.iotype = UPIO_MEM; 1453 up[1].port.iotype = UPIO_MEM;
1454 up[1].port.irq = op->irqs[0]; 1454 up[1].port.irq = op->archdata.irqs[0];
1455 up[1].port.uartclk = ZS_CLOCK; 1455 up[1].port.uartclk = ZS_CLOCK;
1456 up[1].port.fifosize = 1; 1456 up[1].port.fifosize = 1;
1457 up[1].port.ops = &sunzilog_pops; 1457 up[1].port.ops = &sunzilog_pops;
@@ -1492,12 +1492,12 @@ static int __devinit zs_probe(struct of_device *op, const struct of_device_id *m
1492 "is a %s\n", 1492 "is a %s\n",
1493 dev_name(&op->dev), 1493 dev_name(&op->dev),
1494 (unsigned long long) up[0].port.mapbase, 1494 (unsigned long long) up[0].port.mapbase,
1495 op->irqs[0], sunzilog_type(&up[0].port)); 1495 op->archdata.irqs[0], sunzilog_type(&up[0].port));
1496 printk(KERN_INFO "%s: Mouse at MMIO 0x%llx (irq = %d) " 1496 printk(KERN_INFO "%s: Mouse at MMIO 0x%llx (irq = %d) "
1497 "is a %s\n", 1497 "is a %s\n",
1498 dev_name(&op->dev), 1498 dev_name(&op->dev),
1499 (unsigned long long) up[1].port.mapbase, 1499 (unsigned long long) up[1].port.mapbase,
1500 op->irqs[0], sunzilog_type(&up[1].port)); 1500 op->archdata.irqs[0], sunzilog_type(&up[1].port));
1501 kbm_inst++; 1501 kbm_inst++;
1502 } 1502 }
1503 1503
@@ -1516,7 +1516,7 @@ static void __devexit zs_remove_one(struct uart_sunzilog_port *up)
1516 uart_remove_one_port(&sunzilog_reg, &up->port); 1516 uart_remove_one_port(&sunzilog_reg, &up->port);
1517} 1517}
1518 1518
1519static int __devexit zs_remove(struct of_device *op) 1519static int __devexit zs_remove(struct platform_device *op)
1520{ 1520{
1521 struct uart_sunzilog_port *up = dev_get_drvdata(&op->dev); 1521 struct uart_sunzilog_port *up = dev_get_drvdata(&op->dev);
1522 struct zilog_layout __iomem *regs; 1522 struct zilog_layout __iomem *regs;
@@ -1576,7 +1576,7 @@ static int __init sunzilog_init(void)
1576 goto out_free_tables; 1576 goto out_free_tables;
1577 } 1577 }
1578 1578
1579 err = of_register_driver(&zs_driver, &of_bus_type); 1579 err = of_register_platform_driver(&zs_driver);
1580 if (err) 1580 if (err)
1581 goto out_unregister_uart; 1581 goto out_unregister_uart;
1582 1582
@@ -1604,7 +1604,7 @@ out:
1604 return err; 1604 return err;
1605 1605
1606out_unregister_driver: 1606out_unregister_driver:
1607 of_unregister_driver(&zs_driver); 1607 of_unregister_platform_driver(&zs_driver);
1608 1608
1609out_unregister_uart: 1609out_unregister_uart:
1610 if (num_sunzilog) { 1610 if (num_sunzilog) {
@@ -1619,7 +1619,7 @@ out_free_tables:
1619 1619
1620static void __exit sunzilog_exit(void) 1620static void __exit sunzilog_exit(void)
1621{ 1621{
1622 of_unregister_driver(&zs_driver); 1622 of_unregister_platform_driver(&zs_driver);
1623 1623
1624 if (zilog_irq != -1) { 1624 if (zilog_irq != -1) {
1625 struct uart_sunzilog_port *up = sunzilog_irq_chain; 1625 struct uart_sunzilog_port *up = sunzilog_irq_chain;
diff --git a/drivers/serial/timbuart.c b/drivers/serial/timbuart.c
index 67ca642713b8..1f36b7eb7351 100644
--- a/drivers/serial/timbuart.c
+++ b/drivers/serial/timbuart.c
@@ -423,7 +423,7 @@ static struct uart_driver timbuart_driver = {
423 .nr = 1 423 .nr = 1
424}; 424};
425 425
426static int timbuart_probe(struct platform_device *dev) 426static int __devinit timbuart_probe(struct platform_device *dev)
427{ 427{
428 int err, irq; 428 int err, irq;
429 struct timbuart_port *uart; 429 struct timbuart_port *uart;
@@ -489,7 +489,7 @@ err_mem:
489 return err; 489 return err;
490} 490}
491 491
492static int timbuart_remove(struct platform_device *dev) 492static int __devexit timbuart_remove(struct platform_device *dev)
493{ 493{
494 struct timbuart_port *uart = platform_get_drvdata(dev); 494 struct timbuart_port *uart = platform_get_drvdata(dev);
495 495
@@ -507,7 +507,7 @@ static struct platform_driver timbuart_platform_driver = {
507 .owner = THIS_MODULE, 507 .owner = THIS_MODULE,
508 }, 508 },
509 .probe = timbuart_probe, 509 .probe = timbuart_probe,
510 .remove = timbuart_remove, 510 .remove = __devexit_p(timbuart_remove),
511}; 511};
512 512
513/*--------------------------------------------------------------------------*/ 513/*--------------------------------------------------------------------------*/
diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
index 8acccd564378..9b03d7b3e456 100644
--- a/drivers/serial/uartlite.c
+++ b/drivers/serial/uartlite.c
@@ -21,6 +21,7 @@
21#include <asm/io.h> 21#include <asm/io.h>
22#if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE)) 22#if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
23#include <linux/of.h> 23#include <linux/of.h>
24#include <linux/of_address.h>
24#include <linux/of_device.h> 25#include <linux/of_device.h>
25#include <linux/of_platform.h> 26#include <linux/of_platform.h>
26 27
@@ -583,7 +584,7 @@ static struct platform_driver ulite_platform_driver = {
583 */ 584 */
584#if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE)) 585#if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
585static int __devinit 586static int __devinit
586ulite_of_probe(struct of_device *op, const struct of_device_id *match) 587ulite_of_probe(struct platform_device *op, const struct of_device_id *match)
587{ 588{
588 struct resource res; 589 struct resource res;
589 const unsigned int *id; 590 const unsigned int *id;
@@ -604,7 +605,7 @@ ulite_of_probe(struct of_device *op, const struct of_device_id *match)
604 return ulite_assign(&op->dev, id ? *id : -1, res.start, irq); 605 return ulite_assign(&op->dev, id ? *id : -1, res.start, irq);
605} 606}
606 607
607static int __devexit ulite_of_remove(struct of_device *op) 608static int __devexit ulite_of_remove(struct platform_device *op)
608{ 609{
609 return ulite_release(&op->dev); 610 return ulite_release(&op->dev);
610} 611}
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c
index 907b06f5c447..3f4848e2174a 100644
--- a/drivers/serial/ucc_uart.c
+++ b/drivers/serial/ucc_uart.c
@@ -1194,7 +1194,7 @@ static void uart_firmware_cont(const struct firmware *fw, void *context)
1194 release_firmware(fw); 1194 release_firmware(fw);
1195} 1195}
1196 1196
1197static int ucc_uart_probe(struct of_device *ofdev, 1197static int ucc_uart_probe(struct platform_device *ofdev,
1198 const struct of_device_id *match) 1198 const struct of_device_id *match)
1199{ 1199{
1200 struct device_node *np = ofdev->dev.of_node; 1200 struct device_node *np = ofdev->dev.of_node;
@@ -1462,7 +1462,7 @@ static int ucc_uart_probe(struct of_device *ofdev,
1462 return 0; 1462 return 0;
1463} 1463}
1464 1464
1465static int ucc_uart_remove(struct of_device *ofdev) 1465static int ucc_uart_remove(struct platform_device *ofdev)
1466{ 1466{
1467 struct uart_qe_port *qe_port = dev_get_drvdata(&ofdev->dev); 1467 struct uart_qe_port *qe_port = dev_get_drvdata(&ofdev->dev);
1468 1468
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-02 15:38:17 -0400