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-rw-r--r--drivers/serial/8250.c26
-rw-r--r--drivers/serial/omap-serial.c40
2 files changed, 33 insertions, 33 deletions
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 09a550860dcf..ee74c934de89 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -653,13 +653,13 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
653{ 653{
654 if (p->capabilities & UART_CAP_SLEEP) { 654 if (p->capabilities & UART_CAP_SLEEP) {
655 if (p->capabilities & UART_CAP_EFR) { 655 if (p->capabilities & UART_CAP_EFR) {
656 serial_outp(p, UART_LCR, 0xBF); 656 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
657 serial_outp(p, UART_EFR, UART_EFR_ECB); 657 serial_outp(p, UART_EFR, UART_EFR_ECB);
658 serial_outp(p, UART_LCR, 0); 658 serial_outp(p, UART_LCR, 0);
659 } 659 }
660 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0); 660 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
661 if (p->capabilities & UART_CAP_EFR) { 661 if (p->capabilities & UART_CAP_EFR) {
662 serial_outp(p, UART_LCR, 0xBF); 662 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
663 serial_outp(p, UART_EFR, 0); 663 serial_outp(p, UART_EFR, 0);
664 serial_outp(p, UART_LCR, 0); 664 serial_outp(p, UART_LCR, 0);
665 } 665 }
@@ -752,7 +752,7 @@ static int size_fifo(struct uart_8250_port *up)
752 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | 752 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
753 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 753 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
754 serial_outp(up, UART_MCR, UART_MCR_LOOP); 754 serial_outp(up, UART_MCR, UART_MCR_LOOP);
755 serial_outp(up, UART_LCR, UART_LCR_DLAB); 755 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
756 old_dl = serial_dl_read(up); 756 old_dl = serial_dl_read(up);
757 serial_dl_write(up, 0x0001); 757 serial_dl_write(up, 0x0001);
758 serial_outp(up, UART_LCR, 0x03); 758 serial_outp(up, UART_LCR, 0x03);
@@ -764,7 +764,7 @@ static int size_fifo(struct uart_8250_port *up)
764 serial_inp(up, UART_RX); 764 serial_inp(up, UART_RX);
765 serial_outp(up, UART_FCR, old_fcr); 765 serial_outp(up, UART_FCR, old_fcr);
766 serial_outp(up, UART_MCR, old_mcr); 766 serial_outp(up, UART_MCR, old_mcr);
767 serial_outp(up, UART_LCR, UART_LCR_DLAB); 767 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
768 serial_dl_write(up, old_dl); 768 serial_dl_write(up, old_dl);
769 serial_outp(up, UART_LCR, old_lcr); 769 serial_outp(up, UART_LCR, old_lcr);
770 770
@@ -782,7 +782,7 @@ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
782 unsigned int id; 782 unsigned int id;
783 783
784 old_lcr = serial_inp(p, UART_LCR); 784 old_lcr = serial_inp(p, UART_LCR);
785 serial_outp(p, UART_LCR, UART_LCR_DLAB); 785 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_A);
786 786
787 old_dll = serial_inp(p, UART_DLL); 787 old_dll = serial_inp(p, UART_DLL);
788 old_dlm = serial_inp(p, UART_DLM); 788 old_dlm = serial_inp(p, UART_DLM);
@@ -836,7 +836,7 @@ static void autoconfig_has_efr(struct uart_8250_port *up)
836 * recommended for new designs). 836 * recommended for new designs).
837 */ 837 */
838 up->acr = 0; 838 up->acr = 0;
839 serial_out(up, UART_LCR, 0xBF); 839 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
840 serial_out(up, UART_EFR, UART_EFR_ECB); 840 serial_out(up, UART_EFR, UART_EFR_ECB);
841 serial_out(up, UART_LCR, 0x00); 841 serial_out(up, UART_LCR, 0x00);
842 id1 = serial_icr_read(up, UART_ID1); 842 id1 = serial_icr_read(up, UART_ID1);
@@ -945,7 +945,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
945 * Check for presence of the EFR when DLAB is set. 945 * Check for presence of the EFR when DLAB is set.
946 * Only ST16C650V1 UARTs pass this test. 946 * Only ST16C650V1 UARTs pass this test.
947 */ 947 */
948 serial_outp(up, UART_LCR, UART_LCR_DLAB); 948 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
949 if (serial_in(up, UART_EFR) == 0) { 949 if (serial_in(up, UART_EFR) == 0) {
950 serial_outp(up, UART_EFR, 0xA8); 950 serial_outp(up, UART_EFR, 0xA8);
951 if (serial_in(up, UART_EFR) != 0) { 951 if (serial_in(up, UART_EFR) != 0) {
@@ -963,7 +963,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
963 * Maybe it requires 0xbf to be written to the LCR. 963 * Maybe it requires 0xbf to be written to the LCR.
964 * (other ST16C650V2 UARTs, TI16C752A, etc) 964 * (other ST16C650V2 UARTs, TI16C752A, etc)
965 */ 965 */
966 serial_outp(up, UART_LCR, 0xBF); 966 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
967 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) { 967 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
968 DEBUG_AUTOCONF("EFRv2 "); 968 DEBUG_AUTOCONF("EFRv2 ");
969 autoconfig_has_efr(up); 969 autoconfig_has_efr(up);
@@ -1024,7 +1024,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
1024 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 1024 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1025 status1 = serial_in(up, UART_IIR) >> 5; 1025 status1 = serial_in(up, UART_IIR) >> 5;
1026 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 1026 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1027 serial_outp(up, UART_LCR, UART_LCR_DLAB); 1027 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
1028 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 1028 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1029 status2 = serial_in(up, UART_IIR) >> 5; 1029 status2 = serial_in(up, UART_IIR) >> 5;
1030 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 1030 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
@@ -1183,7 +1183,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1183 * We also initialise the EFR (if any) to zero for later. The 1183 * We also initialise the EFR (if any) to zero for later. The
1184 * EFR occupies the same register location as the FCR and IIR. 1184 * EFR occupies the same register location as the FCR and IIR.
1185 */ 1185 */
1186 serial_outp(up, UART_LCR, 0xBF); 1186 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
1187 serial_outp(up, UART_EFR, 0); 1187 serial_outp(up, UART_EFR, 0);
1188 serial_outp(up, UART_LCR, 0); 1188 serial_outp(up, UART_LCR, 0);
1189 1189
@@ -1952,7 +1952,7 @@ static int serial8250_startup(struct uart_port *port)
1952 if (up->port.type == PORT_16C950) { 1952 if (up->port.type == PORT_16C950) {
1953 /* Wake up and initialize UART */ 1953 /* Wake up and initialize UART */
1954 up->acr = 0; 1954 up->acr = 0;
1955 serial_outp(up, UART_LCR, 0xBF); 1955 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
1956 serial_outp(up, UART_EFR, UART_EFR_ECB); 1956 serial_outp(up, UART_EFR, UART_EFR_ECB);
1957 serial_outp(up, UART_IER, 0); 1957 serial_outp(up, UART_IER, 0);
1958 serial_outp(up, UART_LCR, 0); 1958 serial_outp(up, UART_LCR, 0);
@@ -2002,7 +2002,7 @@ static int serial8250_startup(struct uart_port *port)
2002 if (up->port.type == PORT_16850) { 2002 if (up->port.type == PORT_16850) {
2003 unsigned char fctr; 2003 unsigned char fctr;
2004 2004
2005 serial_outp(up, UART_LCR, 0xbf); 2005 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
2006 2006
2007 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX); 2007 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2008 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX); 2008 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
@@ -2363,7 +2363,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2363 if (termios->c_cflag & CRTSCTS) 2363 if (termios->c_cflag & CRTSCTS)
2364 efr |= UART_EFR_CTS; 2364 efr |= UART_EFR_CTS;
2365 2365
2366 serial_outp(up, UART_LCR, 0xBF); 2366 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
2367 serial_outp(up, UART_EFR, efr); 2367 serial_outp(up, UART_EFR, efr);
2368 } 2368 }
2369 2369
diff --git a/drivers/serial/omap-serial.c b/drivers/serial/omap-serial.c
index 14365f72b664..1201eff1831e 100644
--- a/drivers/serial/omap-serial.c
+++ b/drivers/serial/omap-serial.c
@@ -570,7 +570,7 @@ serial_omap_configure_xonxoff
570 unsigned char efr = 0; 570 unsigned char efr = 0;
571 571
572 up->lcr = serial_in(up, UART_LCR); 572 up->lcr = serial_in(up, UART_LCR);
573 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 573 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
574 up->efr = serial_in(up, UART_EFR); 574 up->efr = serial_in(up, UART_EFR);
575 serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB); 575 serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
576 576
@@ -598,7 +598,7 @@ serial_omap_configure_xonxoff
598 efr |= OMAP_UART_SW_RX; 598 efr |= OMAP_UART_SW_RX;
599 599
600 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 600 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
601 serial_out(up, UART_LCR, UART_LCR_DLAB); 601 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
602 602
603 up->mcr = serial_in(up, UART_MCR); 603 up->mcr = serial_in(up, UART_MCR);
604 604
@@ -612,14 +612,14 @@ serial_omap_configure_xonxoff
612 up->mcr |= UART_MCR_XONANY; 612 up->mcr |= UART_MCR_XONANY;
613 613
614 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 614 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
615 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 615 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
616 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 616 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
617 /* Enable special char function UARTi.EFR_REG[5] and 617 /* Enable special char function UARTi.EFR_REG[5] and
618 * load the new software flow control mode IXON or IXOFF 618 * load the new software flow control mode IXON or IXOFF
619 * and restore the UARTi.EFR_REG[4] ENHANCED_EN value. 619 * and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
620 */ 620 */
621 serial_out(up, UART_EFR, efr | UART_EFR_SCD); 621 serial_out(up, UART_EFR, efr | UART_EFR_SCD);
622 serial_out(up, UART_LCR, UART_LCR_DLAB); 622 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
623 623
624 serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR); 624 serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
625 serial_out(up, UART_LCR, up->lcr); 625 serial_out(up, UART_LCR, up->lcr);
@@ -724,22 +724,22 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
724 * baud clock is not running 724 * baud clock is not running
725 * DLL_REG and DLH_REG set to 0. 725 * DLL_REG and DLH_REG set to 0.
726 */ 726 */
727 serial_out(up, UART_LCR, UART_LCR_DLAB); 727 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
728 serial_out(up, UART_DLL, 0); 728 serial_out(up, UART_DLL, 0);
729 serial_out(up, UART_DLM, 0); 729 serial_out(up, UART_DLM, 0);
730 serial_out(up, UART_LCR, 0); 730 serial_out(up, UART_LCR, 0);
731 731
732 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 732 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
733 733
734 up->efr = serial_in(up, UART_EFR); 734 up->efr = serial_in(up, UART_EFR);
735 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 735 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
736 736
737 serial_out(up, UART_LCR, UART_LCR_DLAB); 737 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
738 up->mcr = serial_in(up, UART_MCR); 738 up->mcr = serial_in(up, UART_MCR);
739 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 739 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
740 /* FIFO ENABLE, DMA MODE */ 740 /* FIFO ENABLE, DMA MODE */
741 serial_out(up, UART_FCR, up->fcr); 741 serial_out(up, UART_FCR, up->fcr);
742 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 742 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
743 743
744 if (up->use_dma) { 744 if (up->use_dma) {
745 serial_out(up, UART_TI752_TLR, 0); 745 serial_out(up, UART_TI752_TLR, 0);
@@ -748,52 +748,52 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
748 } 748 }
749 749
750 serial_out(up, UART_EFR, up->efr); 750 serial_out(up, UART_EFR, up->efr);
751 serial_out(up, UART_LCR, UART_LCR_DLAB); 751 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
752 serial_out(up, UART_MCR, up->mcr); 752 serial_out(up, UART_MCR, up->mcr);
753 753
754 /* Protocol, Baud Rate, and Interrupt Settings */ 754 /* Protocol, Baud Rate, and Interrupt Settings */
755 755
756 serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_DISABLE); 756 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
757 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 757 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
758 758
759 up->efr = serial_in(up, UART_EFR); 759 up->efr = serial_in(up, UART_EFR);
760 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 760 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
761 761
762 serial_out(up, UART_LCR, 0); 762 serial_out(up, UART_LCR, 0);
763 serial_out(up, UART_IER, 0); 763 serial_out(up, UART_IER, 0);
764 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 764 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
765 765
766 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 766 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
767 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 767 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
768 768
769 serial_out(up, UART_LCR, 0); 769 serial_out(up, UART_LCR, 0);
770 serial_out(up, UART_IER, up->ier); 770 serial_out(up, UART_IER, up->ier);
771 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 771 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
772 772
773 serial_out(up, UART_EFR, up->efr); 773 serial_out(up, UART_EFR, up->efr);
774 serial_out(up, UART_LCR, cval); 774 serial_out(up, UART_LCR, cval);
775 775
776 if (baud > 230400 && baud != 3000000) 776 if (baud > 230400 && baud != 3000000)
777 serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE13X); 777 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE);
778 else 778 else
779 serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE16X); 779 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
780 780
781 /* Hardware Flow Control Configuration */ 781 /* Hardware Flow Control Configuration */
782 782
783 if (termios->c_cflag & CRTSCTS) { 783 if (termios->c_cflag & CRTSCTS) {
784 efr |= (UART_EFR_CTS | UART_EFR_RTS); 784 efr |= (UART_EFR_CTS | UART_EFR_RTS);
785 serial_out(up, UART_LCR, UART_LCR_DLAB); 785 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
786 786
787 up->mcr = serial_in(up, UART_MCR); 787 up->mcr = serial_in(up, UART_MCR);
788 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 788 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
789 789
790 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 790 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
791 up->efr = serial_in(up, UART_EFR); 791 up->efr = serial_in(up, UART_EFR);
792 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 792 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
793 793
794 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 794 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
795 serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */ 795 serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */
796 serial_out(up, UART_LCR, UART_LCR_DLAB); 796 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
797 serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS); 797 serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS);
798 serial_out(up, UART_LCR, cval); 798 serial_out(up, UART_LCR, cval);
799 } 799 }
@@ -815,13 +815,13 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
815 unsigned char efr; 815 unsigned char efr;
816 816
817 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id); 817 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
818 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 818 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
819 efr = serial_in(up, UART_EFR); 819 efr = serial_in(up, UART_EFR);
820 serial_out(up, UART_EFR, efr | UART_EFR_ECB); 820 serial_out(up, UART_EFR, efr | UART_EFR_ECB);
821 serial_out(up, UART_LCR, 0); 821 serial_out(up, UART_LCR, 0);
822 822
823 serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 823 serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
824 serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); 824 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
825 serial_out(up, UART_EFR, efr); 825 serial_out(up, UART_EFR, efr);
826 serial_out(up, UART_LCR, 0); 826 serial_out(up, UART_LCR, 0);
827 /* Enable module level wake up */ 827 /* Enable module level wake up */