diff options
Diffstat (limited to 'drivers/serial/timbuart.c')
-rw-r--r-- | drivers/serial/timbuart.c | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/drivers/serial/timbuart.c b/drivers/serial/timbuart.c index 786ba85c170b..67ca642713b8 100644 --- a/drivers/serial/timbuart.c +++ b/drivers/serial/timbuart.c | |||
@@ -68,12 +68,22 @@ static void timbuart_start_tx(struct uart_port *port) | |||
68 | tasklet_schedule(&uart->tasklet); | 68 | tasklet_schedule(&uart->tasklet); |
69 | } | 69 | } |
70 | 70 | ||
71 | static unsigned int timbuart_tx_empty(struct uart_port *port) | ||
72 | { | ||
73 | u32 isr = ioread32(port->membase + TIMBUART_ISR); | ||
74 | |||
75 | return (isr & TXBE) ? TIOCSER_TEMT : 0; | ||
76 | } | ||
77 | |||
71 | static void timbuart_flush_buffer(struct uart_port *port) | 78 | static void timbuart_flush_buffer(struct uart_port *port) |
72 | { | 79 | { |
73 | u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | TIMBUART_CTRL_FLSHTX; | 80 | if (!timbuart_tx_empty(port)) { |
81 | u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | | ||
82 | TIMBUART_CTRL_FLSHTX; | ||
74 | 83 | ||
75 | iowrite8(ctl, port->membase + TIMBUART_CTRL); | 84 | iowrite8(ctl, port->membase + TIMBUART_CTRL); |
76 | iowrite32(TXBF, port->membase + TIMBUART_ISR); | 85 | iowrite32(TXBF, port->membase + TIMBUART_ISR); |
86 | } | ||
77 | } | 87 | } |
78 | 88 | ||
79 | static void timbuart_rx_chars(struct uart_port *port) | 89 | static void timbuart_rx_chars(struct uart_port *port) |
@@ -195,13 +205,6 @@ void timbuart_tasklet(unsigned long arg) | |||
195 | dev_dbg(uart->port.dev, "%s leaving\n", __func__); | 205 | dev_dbg(uart->port.dev, "%s leaving\n", __func__); |
196 | } | 206 | } |
197 | 207 | ||
198 | static unsigned int timbuart_tx_empty(struct uart_port *port) | ||
199 | { | ||
200 | u32 isr = ioread32(port->membase + TIMBUART_ISR); | ||
201 | |||
202 | return (isr & TXBE) ? TIOCSER_TEMT : 0; | ||
203 | } | ||
204 | |||
205 | static unsigned int timbuart_get_mctrl(struct uart_port *port) | 208 | static unsigned int timbuart_get_mctrl(struct uart_port *port) |
206 | { | 209 | { |
207 | u8 cts = ioread8(port->membase + TIMBUART_CTRL); | 210 | u8 cts = ioread8(port->membase + TIMBUART_CTRL); |
@@ -220,7 +223,7 @@ static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl) | |||
220 | if (mctrl & TIOCM_RTS) | 223 | if (mctrl & TIOCM_RTS) |
221 | iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL); | 224 | iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL); |
222 | else | 225 | else |
223 | iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL); | 226 | iowrite8(0, port->membase + TIMBUART_CTRL); |
224 | } | 227 | } |
225 | 228 | ||
226 | static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier) | 229 | static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier) |