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Diffstat (limited to 'drivers/serial/sh-sci.h')
-rw-r--r--drivers/serial/sh-sci.h23
1 files changed, 13 insertions, 10 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 8a0749e34ca3..7cd28b226800 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -320,18 +320,16 @@
320#define SCI_EVENT_WRITE_WAKEUP 0 320#define SCI_EVENT_WRITE_WAKEUP 0
321 321
322#define SCI_IN(size, offset) \ 322#define SCI_IN(size, offset) \
323 unsigned int addr = port->mapbase + (offset); \
324 if ((size) == 8) { \ 323 if ((size) == 8) { \
325 return ctrl_inb(addr); \ 324 return ioread8(port->membase + (offset)); \
326 } else { \ 325 } else { \
327 return ctrl_inw(addr); \ 326 return ioread16(port->membase + (offset)); \
328 } 327 }
329#define SCI_OUT(size, offset, value) \ 328#define SCI_OUT(size, offset, value) \
330 unsigned int addr = port->mapbase + (offset); \
331 if ((size) == 8) { \ 329 if ((size) == 8) { \
332 ctrl_outb(value, addr); \ 330 iowrite8(value, port->membase + (offset)); \
333 } else if ((size) == 16) { \ 331 } else if ((size) == 16) { \
334 ctrl_outw(value, addr); \ 332 iowrite16(value, port->membase + (offset)); \
335 } 333 }
336 334
337#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\ 335#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\
@@ -791,11 +789,16 @@ static inline int sci_rxd_in(struct uart_port *port)
791 defined(CONFIG_CPU_SUBTYPE_SH7721) 789 defined(CONFIG_CPU_SUBTYPE_SH7721)
792#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) 790#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
793#elif defined(CONFIG_CPU_SUBTYPE_SH7723) 791#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
794#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(16*bps)-1) 792static inline int scbrr_calc(struct uart_port *port, int bps, int clk)
793{
794 if (port->type == PORT_SCIF)
795 return (clk+16*bps)/(32*bps)-1;
796 else
797 return ((clk*2)+16*bps)/(16*bps)-1;
798}
799#define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk)
795#elif defined(__H8300H__) || defined(__H8300S__) 800#elif defined(__H8300H__) || defined(__H8300S__)
796#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1) 801#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
797#elif defined(CONFIG_SUPERH64)
798#define SCBRR_VALUE(bps) ((current_cpu_data.module_clock+16*bps)/(32*bps)-1)
799#else /* Generic SH */ 802#else /* Generic SH */
800#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) 803#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
801#endif 804#endif