diff options
Diffstat (limited to 'drivers/serial/sh-sci.h')
-rw-r--r-- | drivers/serial/sh-sci.h | 29 |
1 files changed, 22 insertions, 7 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index fad67d33b0bd..be6e1d2317a4 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -31,7 +31,9 @@ | |||
31 | # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 | 31 | # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 |
32 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 32 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
33 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ | 33 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
34 | defined(CONFIG_ARCH_SHMOBILE) | 34 | defined(CONFIG_ARCH_SH7367) || \ |
35 | defined(CONFIG_ARCH_SH7377) || \ | ||
36 | defined(CONFIG_ARCH_SH7372) | ||
35 | # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ | 37 | # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ |
36 | # define PORT_PTCR 0xA405011EUL | 38 | # define PORT_PTCR 0xA405011EUL |
37 | # define PORT_PVCR 0xA4050122UL | 39 | # define PORT_PVCR 0xA4050122UL |
@@ -230,7 +232,9 @@ | |||
230 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 232 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
231 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 233 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
232 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ | 234 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
233 | defined(CONFIG_ARCH_SHMOBILE) | 235 | defined(CONFIG_ARCH_SH7367) || \ |
236 | defined(CONFIG_ARCH_SH7377) || \ | ||
237 | defined(CONFIG_ARCH_SH7372) | ||
234 | # define SCIF_ORER 0x0200 | 238 | # define SCIF_ORER 0x0200 |
235 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) | 239 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) |
236 | # define SCIF_RFDC_MASK 0x007f | 240 | # define SCIF_RFDC_MASK 0x007f |
@@ -264,7 +268,9 @@ | |||
264 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 268 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
265 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 269 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
266 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ | 270 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
267 | defined(CONFIG_ARCH_SHMOBILE) | 271 | defined(CONFIG_ARCH_SH7367) || \ |
272 | defined(CONFIG_ARCH_SH7377) || \ | ||
273 | defined(CONFIG_ARCH_SH7372) | ||
268 | # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) | 274 | # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) |
269 | # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) | 275 | # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) |
270 | # define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) | 276 | # define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) |
@@ -359,7 +365,10 @@ | |||
359 | SCI_OUT(sci_size, sci_offset, value); \ | 365 | SCI_OUT(sci_size, sci_offset, value); \ |
360 | } | 366 | } |
361 | 367 | ||
362 | #if defined(CONFIG_CPU_SH3) || defined(CONFIG_ARCH_SHMOBILE) | 368 | #if defined(CONFIG_CPU_SH3) || \ |
369 | defined(CONFIG_ARCH_SH7367) || \ | ||
370 | defined(CONFIG_ARCH_SH7377) || \ | ||
371 | defined(CONFIG_ARCH_SH7372) | ||
363 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | 372 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
364 | #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ | 373 | #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ |
365 | sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ | 374 | sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ |
@@ -370,7 +379,9 @@ | |||
370 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 379 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
371 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 380 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
372 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ | 381 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
373 | defined(CONFIG_ARCH_SHMOBILE) | 382 | defined(CONFIG_ARCH_SH7367) || \ |
383 | defined(CONFIG_ARCH_SH7377) || \ | ||
384 | defined(CONFIG_ARCH_SH7372) | ||
374 | #define SCIF_FNS(name, scif_offset, scif_size) \ | 385 | #define SCIF_FNS(name, scif_offset, scif_size) \ |
375 | CPU_SCIF_FNS(name, scif_offset, scif_size) | 386 | CPU_SCIF_FNS(name, scif_offset, scif_size) |
376 | #else | 387 | #else |
@@ -406,7 +417,9 @@ | |||
406 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 417 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
407 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 418 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
408 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ | 419 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
409 | defined(CONFIG_ARCH_SHMOBILE) | 420 | defined(CONFIG_ARCH_SH7367) || \ |
421 | defined(CONFIG_ARCH_SH7377) || \ | ||
422 | defined(CONFIG_ARCH_SH7372) | ||
410 | 423 | ||
411 | SCIF_FNS(SCSMR, 0x00, 16) | 424 | SCIF_FNS(SCSMR, 0x00, 16) |
412 | SCIF_FNS(SCBRR, 0x04, 8) | 425 | SCIF_FNS(SCBRR, 0x04, 8) |
@@ -589,7 +602,9 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
589 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 602 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
590 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 603 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
591 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ | 604 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
592 | defined(CONFIG_ARCH_SHMOBILE) | 605 | defined(CONFIG_ARCH_SH7367) || \ |
606 | defined(CONFIG_ARCH_SH7377) || \ | ||
607 | defined(CONFIG_ARCH_SH7372) | ||
593 | #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) | 608 | #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) |
594 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ | 609 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ |
595 | defined(CONFIG_CPU_SUBTYPE_SH7724) | 610 | defined(CONFIG_CPU_SUBTYPE_SH7724) |