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Diffstat (limited to 'drivers/serial/sh-sci.h')
-rw-r--r--drivers/serial/sh-sci.h43
1 files changed, 32 insertions, 11 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 854153a1d60a..fb04fb5f9843 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -73,9 +73,13 @@
73# define SCPDR 0xA4050136 /* 16 bit SCIF */ 73# define SCPDR 0xA4050136 /* 16 bit SCIF */
74# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ 74# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
75# define SCIF_ONLY 75# define SCIF_ONLY
76#elif defined(CONFIG_CPU_SUBTYPE_SH7710) 76#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
77# define SCSPTR0 0xA4400000 /* 16 bit SCIF */ 77# define SCSPTR0 0xA4400000 /* 16 bit SCIF */
78# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ 78# define SCI_NPORTS 2
79# define SCIF_ORER 0x0001 /* overrun error bit */
80# define PACR 0xa4050100
81# define PBCR 0xa4050102
82# define SCSCR_INIT(port) 0x3B
79# define SCIF_ONLY 83# define SCIF_ONLY
80#elif defined(CONFIG_CPU_SUBTYPE_SH73180) 84#elif defined(CONFIG_CPU_SUBTYPE_SH73180)
81# define SCPDR 0xA4050138 /* 16 bit SCIF */ 85# define SCPDR 0xA4050138 /* 16 bit SCIF */
@@ -346,9 +350,15 @@
346 } 350 }
347 351
348#ifdef CONFIG_CPU_SH3 352#ifdef CONFIG_CPU_SH3
349#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ 353#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
350 defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 354#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
351 defined(CONFIG_CPU_SUBTYPE_SH7710) 355 sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
356 h8_sci_offset, h8_sci_size) \
357 CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size)
358#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
359 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
360#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
361 defined(CONFIG_CPU_SUBTYPE_SH7705)
352#define SCIF_FNS(name, scif_offset, scif_size) \ 362#define SCIF_FNS(name, scif_offset, scif_size) \
353 CPU_SCIF_FNS(name, scif_offset, scif_size) 363 CPU_SCIF_FNS(name, scif_offset, scif_size)
354#else 364#else
@@ -375,8 +385,8 @@
375#endif 385#endif
376 386
377#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ 387#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
378 defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 388 defined(CONFIG_CPU_SUBTYPE_SH7705)
379 defined(CONFIG_CPU_SUBTYPE_SH7710) 389
380SCIF_FNS(SCSMR, 0x00, 16) 390SCIF_FNS(SCSMR, 0x00, 16)
381SCIF_FNS(SCBRR, 0x04, 8) 391SCIF_FNS(SCBRR, 0x04, 8)
382SCIF_FNS(SCSCR, 0x08, 16) 392SCIF_FNS(SCSCR, 0x08, 16)
@@ -486,13 +496,24 @@ static inline int sci_rxd_in(struct uart_port *port)
486 return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ 496 return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
487 return 1; 497 return 1;
488} 498}
489#elif defined(CONFIG_CPU_SUBTYPE_SH7710) 499#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
490static inline int sci_rxd_in(struct uart_port *port) 500static inline int sci_rxd_in(struct uart_port *port)
491{ 501{
492 if (port->mapbase == SCSPTR0) 502 return sci_in(port,SCxSR)&0x0010 ? 1 : 0;
493 return ctrl_inw(SCSPTR0 + 0x10) & 0x01 ? 1 : 0; 503}
494 return 1; 504static inline void set_sh771x_scif_pfc(struct uart_port *port)
505{
506 if (port->mapbase == 0xA4400000){
507 ctrl_outw(ctrl_inw(PACR)&0xffc0,PACR);
508 ctrl_outw(ctrl_inw(PBCR)&0x0fff,PBCR);
509 return;
510 }
511 if (port->mapbase == 0xA4410000){
512 ctrl_outw(ctrl_inw(PBCR)&0xf003,PBCR);
513 return;
514 }
495} 515}
516
496#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ 517#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
497 defined(CONFIG_CPU_SUBTYPE_SH7751) || \ 518 defined(CONFIG_CPU_SUBTYPE_SH7751) || \
498 defined(CONFIG_CPU_SUBTYPE_SH4_202) 519 defined(CONFIG_CPU_SUBTYPE_SH4_202)