diff options
Diffstat (limited to 'drivers/serial/sh-sci.h')
-rw-r--r-- | drivers/serial/sh-sci.h | 27 |
1 files changed, 22 insertions, 5 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index fa8700a968fc..eb84833233fd 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -76,12 +76,13 @@ | |||
76 | # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ | 76 | # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ |
77 | # define SCIF_ONLY | 77 | # define SCIF_ONLY |
78 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | 78 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
79 | # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ | 79 | # define PADR 0xA4050120 |
80 | # define SCSPTR0 SCPDR0 | 80 | # define PSDR 0xA405013e |
81 | # define PWDR 0xA4050166 | ||
82 | # define PSCR 0xA405011E | ||
81 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 83 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
82 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 84 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
83 | # define SCIF_ONLY | 85 | # define SCIF_ONLY |
84 | # define PORT_PSCR 0xA405011E | ||
85 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) | 86 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) |
86 | # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ | 87 | # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ |
87 | # define SCSPTR0 SCPDR0 | 88 | # define SCSPTR0 SCPDR0 |
@@ -320,7 +321,7 @@ | |||
320 | unsigned int addr = port->mapbase + (offset); \ | 321 | unsigned int addr = port->mapbase + (offset); \ |
321 | if ((size) == 8) { \ | 322 | if ((size) == 8) { \ |
322 | ctrl_outb(value, addr); \ | 323 | ctrl_outb(value, addr); \ |
323 | } else { \ | 324 | } else if ((size) == 16) { \ |
324 | ctrl_outw(value, addr); \ | 325 | ctrl_outw(value, addr); \ |
325 | } | 326 | } |
326 | 327 | ||
@@ -451,7 +452,11 @@ SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) | |||
451 | SCIF_FNS(SCLSR, 0, 0, 0x28, 16) | 452 | SCIF_FNS(SCLSR, 0, 0, 0x28, 16) |
452 | #else | 453 | #else |
453 | SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) | 454 | SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) |
455 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
456 | SCIF_FNS(SCSPTR, 0, 0, 0, 0) | ||
457 | #else | ||
454 | SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) | 458 | SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) |
459 | #endif | ||
455 | SCIF_FNS(SCLSR, 0, 0, 0x24, 16) | 460 | SCIF_FNS(SCLSR, 0, 0, 0x24, 16) |
456 | #endif | 461 | #endif |
457 | #endif | 462 | #endif |
@@ -593,13 +598,25 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
593 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 598 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
594 | return 1; | 599 | return 1; |
595 | } | 600 | } |
596 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366) | 601 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) |
597 | static inline int sci_rxd_in(struct uart_port *port) | 602 | static inline int sci_rxd_in(struct uart_port *port) |
598 | { | 603 | { |
599 | if (port->mapbase == 0xffe00000) | 604 | if (port->mapbase == 0xffe00000) |
600 | return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ | 605 | return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ |
601 | return 1; | 606 | return 1; |
602 | } | 607 | } |
608 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
609 | static inline int sci_rxd_in(struct uart_port *port) | ||
610 | { | ||
611 | if (port->mapbase == 0xffe00000) | ||
612 | return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */ | ||
613 | if (port->mapbase == 0xffe10000) | ||
614 | return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */ | ||
615 | if (port->mapbase == 0xffe20000) | ||
616 | return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */ | ||
617 | |||
618 | return 1; | ||
619 | } | ||
603 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) | 620 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) |
604 | static inline int sci_rxd_in(struct uart_port *port) | 621 | static inline int sci_rxd_in(struct uart_port *port) |
605 | { | 622 | { |