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-rw-r--r--drivers/serial/sh-sci.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 7ee992146ae9..e4557cc4f74b 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -133,6 +133,20 @@
133# define SCIF_ORER 0x0001 /* Overrun error bit */ 133# define SCIF_ORER 0x0001 /* Overrun error bit */
134# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 134# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
135# define SCIF_ONLY 135# define SCIF_ONLY
136#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
137# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
138# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
139# define SCSPTR2 0xfffe9020 /* 16 bit SCIF */
140# define SCSPTR3 0xfffe9820 /* 16 bit SCIF */
141# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
142# define SCIF_ONLY
143#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
144# define SCSPTR0 0xf8400020 /* 16 bit SCIF */
145# define SCSPTR1 0xf8410020 /* 16 bit SCIF */
146# define SCSPTR2 0xf8420020 /* 16 bit SCIF */
147# define SCIF_ORER 0x0001 /* overrun error bit */
148# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
149# define SCIF_ONLY
136#else 150#else
137# error CPU subtype not defined 151# error CPU subtype not defined
138#endif 152#endif
@@ -365,6 +379,7 @@ SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8)
365SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) 379SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8)
366SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) 380SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
367#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) 381#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
382SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
368SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) 383SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16)
369SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) 384SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16)
370SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) 385SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)
@@ -544,6 +559,28 @@ static inline int sci_rxd_in(struct uart_port *port)
544 if (port->mapbase == 0xffe10000) 559 if (port->mapbase == 0xffe10000)
545 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 560 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
546} 561}
562#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
563static inline int sci_rxd_in(struct uart_port *port)
564{
565 if (port->mapbase == 0xfffe8000)
566 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
567 if (port->mapbase == 0xfffe8800)
568 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
569 if (port->mapbase == 0xfffe9000)
570 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
571 if (port->mapbase == 0xfffe9800)
572 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
573}
574#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
575static inline int sci_rxd_in(struct uart_port *port)
576{
577 if (port->mapbase == 0xf8400000)
578 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
579 if (port->mapbase == 0xf8410000)
580 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
581 if (port->mapbase == 0xf8420000)
582 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
583}
547#endif 584#endif
548 585
549/* 586/*