1 files changed, 362 insertions, 69 deletions

diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 3c4d29e59b2c..821facd10bbc 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -16,6 +16,9 @@
  * Some of the code has been inspired/copied from the 2.4 code written
  * by Dale Farnsworth <dfarnsworth@mvista.com>.
  *
+ * Copyright (C) 2008 Freescale Semiconductor Inc.
+ *                    John Rigby <jrigby@gmail.com>
+ * Added support for MPC5121
  * Copyright (C) 2006 Secret Lab Technologies Ltd.
  *                    Grant Likely <grant.likely@secretlab.ca>
  * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
@@ -67,7 +70,6 @@
 #include <linux/serial.h>
 #include <linux/sysrq.h>
 #include <linux/console.h>
-
 #include <linux/delay.h>
 #include <linux/io.h>
 
@@ -79,6 +81,7 @@
 #endif
 
 #include <asm/mpc52xx.h>
+#include <asm/mpc512x.h>
 #include <asm/mpc52xx_psc.h>
 
 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
@@ -111,8 +114,8 @@ static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
 static void mpc52xx_uart_of_enumerate(void);
 #endif
 
+
 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
-#define FIFO(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
 
 
 /* Forward declaration of the interruption handling routine */
@@ -130,13 +133,324 @@ static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
 
 #if defined(CONFIG_PPC_MERGE)
 static struct of_device_id mpc52xx_uart_of_match[] = {
-        { .type = "serial", .compatible = "fsl,mpc5200-psc-uart", },
-        { .type = "serial", .compatible = "mpc5200-psc-uart", }, /* lite5200 */
-        { .type = "serial", .compatible = "mpc5200-serial", }, /* efika */
+#ifdef CONFIG_PPC_MPC52xx
+        { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
+        /* binding used by old lite5200 device trees: */
+        { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
+        /* binding used by efika: */
+        { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
+#endif
+#ifdef CONFIG_PPC_MPC512x
+        { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
+        {},
+#endif
+};
+#if defined(CONFIG_PPC_MERGE)
+static const struct of_device_id mpc52xx_uart_of_match[] = {
+        {.type = "serial",
+         .compatible = "mpc5200-psc-uart",
+#endif
         {},
 };
 #endif
 
+#endif
+
+/* ======================================================================== */
+/* PSC fifo operations for isolating differences between 52xx and 512x      */
+/* ======================================================================== */
+
+struct psc_ops {
+        void            (*fifo_init)(struct uart_port *port);
+        int             (*raw_rx_rdy)(struct uart_port *port);
+        int             (*raw_tx_rdy)(struct uart_port *port);
+        int             (*rx_rdy)(struct uart_port *port);
+        int             (*tx_rdy)(struct uart_port *port);
+        int             (*tx_empty)(struct uart_port *port);
+        void            (*stop_rx)(struct uart_port *port);
+        void            (*start_tx)(struct uart_port *port);
+        void            (*stop_tx)(struct uart_port *port);
+        void            (*rx_clr_irq)(struct uart_port *port);
+        void            (*tx_clr_irq)(struct uart_port *port);
+        void            (*write_char)(struct uart_port *port, unsigned char c);
+        unsigned char   (*read_char)(struct uart_port *port);
+        void            (*cw_disable_ints)(struct uart_port *port);
+        void            (*cw_restore_ints)(struct uart_port *port);
+        unsigned long   (*getuartclk)(void *p);
+};
+
+#ifdef CONFIG_PPC_MPC52xx
+#define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
+static void mpc52xx_psc_fifo_init(struct uart_port *port)
+{
+        struct mpc52xx_psc __iomem *psc = PSC(port);
+        struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
+
+        /* /32 prescaler */
+        out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
+
+        out_8(&fifo->rfcntl, 0x00);
+        out_be16(&fifo->rfalarm, 0x1ff);
+        out_8(&fifo->tfcntl, 0x07);
+        out_be16(&fifo->tfalarm, 0x80);
+
+        port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
+        out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
+{
+        return in_be16(&PSC(port)->mpc52xx_psc_status)
+            & MPC52xx_PSC_SR_RXRDY;
+}
+
+static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
+{
+        return in_be16(&PSC(port)->mpc52xx_psc_status)
+            & MPC52xx_PSC_SR_TXRDY;
+}
+
+
+static int mpc52xx_psc_rx_rdy(struct uart_port *port)
+{
+        return in_be16(&PSC(port)->mpc52xx_psc_isr)
+            & port->read_status_mask
+            & MPC52xx_PSC_IMR_RXRDY;
+}
+
+static int mpc52xx_psc_tx_rdy(struct uart_port *port)
+{
+        return in_be16(&PSC(port)->mpc52xx_psc_isr)
+            & port->read_status_mask
+            & MPC52xx_PSC_IMR_TXRDY;
+}
+
+static int mpc52xx_psc_tx_empty(struct uart_port *port)
+{
+        return in_be16(&PSC(port)->mpc52xx_psc_status)
+            & MPC52xx_PSC_SR_TXEMP;
+}
+
+static void mpc52xx_psc_start_tx(struct uart_port *port)
+{
+        port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
+        out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+static void mpc52xx_psc_stop_tx(struct uart_port *port)
+{
+        port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
+        out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+static void mpc52xx_psc_stop_rx(struct uart_port *port)
+{
+        port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
+        out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
+{
+}
+
+static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
+{
+}
+
+static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
+{
+        out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
+}
+
+static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
+{
+        return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
+}
+
+static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
+{
+        out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
+}
+
+static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
+{
+        out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+}
+
+/* Search for bus-frequency property in this node or a parent */
+static unsigned long mpc52xx_getuartclk(void *p)
+{
+#if defined(CONFIG_PPC_MERGE)
+        /*
+         * 5200 UARTs have a / 32 prescaler
+         * but the generic serial code assumes 16
+         * so return ipb freq / 2
+         */
+        return mpc52xx_find_ipb_freq(p) / 2;
+#else
+        pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
+        return NULL;
+#endif
+}
+
+static struct psc_ops mpc52xx_psc_ops = {
+        .fifo_init = mpc52xx_psc_fifo_init,
+        .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
+        .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
+        .rx_rdy = mpc52xx_psc_rx_rdy,
+        .tx_rdy = mpc52xx_psc_tx_rdy,
+        .tx_empty = mpc52xx_psc_tx_empty,
+        .stop_rx = mpc52xx_psc_stop_rx,
+        .start_tx = mpc52xx_psc_start_tx,
+        .stop_tx = mpc52xx_psc_stop_tx,
+        .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
+        .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
+        .write_char = mpc52xx_psc_write_char,
+        .read_char = mpc52xx_psc_read_char,
+        .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
+        .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
+        .getuartclk = mpc52xx_getuartclk,
+};
+
+#endif /* CONFIG_MPC52xx */
+
+#ifdef CONFIG_PPC_MPC512x
+#define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
+static void mpc512x_psc_fifo_init(struct uart_port *port)
+{
+        out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
+        out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
+        out_be32(&FIFO_512x(port)->txalarm, 1);
+        out_be32(&FIFO_512x(port)->tximr, 0);
+
+        out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
+        out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
+        out_be32(&FIFO_512x(port)->rxalarm, 1);
+        out_be32(&FIFO_512x(port)->rximr, 0);
+
+        out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
+        out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
+}
+
+static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
+{
+        return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
+}
+
+static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
+{
+        return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
+}
+
+static int mpc512x_psc_rx_rdy(struct uart_port *port)
+{
+        return in_be32(&FIFO_512x(port)->rxsr)
+            & in_be32(&FIFO_512x(port)->rximr)
+            & MPC512x_PSC_FIFO_ALARM;
+}
+
+static int mpc512x_psc_tx_rdy(struct uart_port *port)
+{
+        return in_be32(&FIFO_512x(port)->txsr)
+            & in_be32(&FIFO_512x(port)->tximr)
+            & MPC512x_PSC_FIFO_ALARM;
+}
+
+static int mpc512x_psc_tx_empty(struct uart_port *port)
+{
+        return in_be32(&FIFO_512x(port)->txsr)
+            & MPC512x_PSC_FIFO_EMPTY;
+}
+
+static void mpc512x_psc_stop_rx(struct uart_port *port)
+{
+        unsigned long rx_fifo_imr;
+
+        rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
+        rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
+        out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
+}
+
+static void mpc512x_psc_start_tx(struct uart_port *port)
+{
+        unsigned long tx_fifo_imr;
+
+        tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
+        tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
+        out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
+}
+
+static void mpc512x_psc_stop_tx(struct uart_port *port)
+{
+        unsigned long tx_fifo_imr;
+
+        tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
+        tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
+        out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
+}
+
+static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
+{
+        out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
+}
+
+static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
+{
+        out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
+}
+
+static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
+{
+        out_8(&FIFO_512x(port)->txdata_8, c);
+}
+
+static unsigned char mpc512x_psc_read_char(struct uart_port *port)
+{
+        return in_8(&FIFO_512x(port)->rxdata_8);
+}
+
+static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
+{
+        port->read_status_mask =
+                in_be32(&FIFO_512x(port)->tximr) << 16 |
+                in_be32(&FIFO_512x(port)->rximr);
+        out_be32(&FIFO_512x(port)->tximr, 0);
+        out_be32(&FIFO_512x(port)->rximr, 0);
+}
+
+static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
+{
+        out_be32(&FIFO_512x(port)->tximr,
+                (port->read_status_mask >> 16) & 0x7f);
+        out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
+}
+
+static unsigned long mpc512x_getuartclk(void *p)
+{
+        return mpc512x_find_ips_freq(p);
+}
+
+static struct psc_ops mpc512x_psc_ops = {
+        .fifo_init = mpc512x_psc_fifo_init,
+        .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
+        .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
+        .rx_rdy = mpc512x_psc_rx_rdy,
+        .tx_rdy = mpc512x_psc_tx_rdy,
+        .tx_empty = mpc512x_psc_tx_empty,
+        .stop_rx = mpc512x_psc_stop_rx,
+        .start_tx = mpc512x_psc_start_tx,
+        .stop_tx = mpc512x_psc_stop_tx,
+        .rx_clr_irq = mpc512x_psc_rx_clr_irq,
+        .tx_clr_irq = mpc512x_psc_tx_clr_irq,
+        .write_char = mpc512x_psc_write_char,
+        .read_char = mpc512x_psc_read_char,
+        .cw_disable_ints = mpc512x_psc_cw_disable_ints,
+        .cw_restore_ints = mpc512x_psc_cw_restore_ints,
+        .getuartclk = mpc512x_getuartclk,
+};
+#endif
+
+static struct psc_ops *psc_ops;
 
 /* ======================================================================== */
 /* UART operations                                                          */
@@ -145,8 +459,7 @@ static struct of_device_id mpc52xx_uart_of_match[] = {
 static unsigned int
 mpc52xx_uart_tx_empty(struct uart_port *port)
 {
-        int status = in_be16(&PSC(port)->mpc52xx_psc_status);
-        return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
+        return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
 }
 
 static void
@@ -166,16 +479,14 @@ static void
 mpc52xx_uart_stop_tx(struct uart_port *port)
 {
         /* port->lock taken by caller */
-        port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
-        out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+        psc_ops->stop_tx(port);
 }
 
 static void
 mpc52xx_uart_start_tx(struct uart_port *port)
 {
         /* port->lock taken by caller */
-        port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
-        out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+        psc_ops->start_tx(port);
 }
 
 static void
@@ -188,8 +499,7 @@ mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
         if (ch) {
                 /* Make sure tx interrupts are on */
                 /* Truly necessary ??? They should be anyway */
-                port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
-                out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+                psc_ops->start_tx(port);
         }
 
         spin_unlock_irqrestore(&port->lock, flags);
@@ -199,8 +509,7 @@ static void
 mpc52xx_uart_stop_rx(struct uart_port *port)
 {
         /* port->lock taken by caller */
-        port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
-        out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
+        psc_ops->stop_rx(port);
 }
 
 static void
@@ -227,12 +536,12 @@ static int
 mpc52xx_uart_startup(struct uart_port *port)
 {
         struct mpc52xx_psc __iomem *psc = PSC(port);
-        struct mpc52xx_psc_fifo __iomem *fifo = FIFO(port);
         int ret;
 
         /* Request IRQ */
         ret = request_irq(port->irq, mpc52xx_uart_int,
-                IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
+                IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
+                "mpc52xx_psc_uart", port);
         if (ret)
                 return ret;
 
@@ -242,15 +551,7 @@ mpc52xx_uart_startup(struct uart_port *port)
 
         out_be32(&psc->sicr, 0);        /* UART mode DCD ignored */
 
-        out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
-
-        out_8(&fifo->rfcntl, 0x00);
-        out_be16(&fifo->rfalarm, 0x1ff);
-        out_8(&fifo->tfcntl, 0x07);
-        out_be16(&fifo->tfalarm, 0x80);
-
-        port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
-        out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
+        psc_ops->fifo_init(port);
 
         out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
         out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
@@ -333,8 +634,7 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
          * boot for the console, all stuff is not yet ready to receive at that
          * time and that just makes the kernel oops */
         /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
-        while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
-               --j)
+        while (!mpc52xx_uart_tx_empty(port) && --j)
                 udelay(1);
 
         if (!j)
@@ -462,11 +762,9 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
         unsigned short status;
 
         /* While we can read, do so ! */
-        while ((status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
-                MPC52xx_PSC_SR_RXRDY) {
-
+        while (psc_ops->raw_rx_rdy(port)) {
                 /* Get the char */
-                ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
+                ch = psc_ops->read_char(port);
 
                 /* Handle sysreq char */
 #ifdef SUPPORT_SYSRQ
@@ -481,6 +779,8 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
                 flag = TTY_NORMAL;
                 port->icount.rx++;
 
+                status = in_be16(&PSC(port)->mpc52xx_psc_status);
+
                 if (status & (MPC52xx_PSC_SR_PE |
                               MPC52xx_PSC_SR_FE |
                               MPC52xx_PSC_SR_RB)) {
@@ -510,7 +810,7 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
 
         tty_flip_buffer_push(tty);
 
-        return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
+        return psc_ops->raw_rx_rdy(port);
 }
 
 static inline int
@@ -520,7 +820,7 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port)
 
         /* Process out of band chars */
         if (port->x_char) {
-                out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
+                psc_ops->write_char(port, port->x_char);
                 port->icount.tx++;
                 port->x_char = 0;
                 return 1;
@@ -533,8 +833,8 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port)
         }
 
         /* Send chars */
-        while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
-                out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
+        while (psc_ops->raw_tx_rdy(port)) {
+                psc_ops->write_char(port, xmit->buf[xmit->tail]);
                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
                 port->icount.tx++;
                 if (uart_circ_empty(xmit))
@@ -560,7 +860,6 @@ mpc52xx_uart_int(int irq, void *dev_id)
         struct uart_port *port = dev_id;
         unsigned long pass = ISR_PASS_LIMIT;
         unsigned int keepgoing;
-        unsigned short status;
 
         spin_lock(&port->lock);
 
@@ -569,18 +868,12 @@ mpc52xx_uart_int(int irq, void *dev_id)
                 /* If we don't find anything to do, we stop */
                 keepgoing = 0;
 
-                /* Read status */
-                status = in_be16(&PSC(port)->mpc52xx_psc_isr);
-                status &= port->read_status_mask;
-
-                /* Do we need to receive chars ? */
-                /* For this RX interrupts must be on and some chars waiting */
-                if (status & MPC52xx_PSC_IMR_RXRDY)
+                psc_ops->rx_clr_irq(port);
+                if (psc_ops->rx_rdy(port))
                         keepgoing |= mpc52xx_uart_int_rx_chars(port);
 
-                /* Do we need to send chars ? */
-                /* For this, TX must be ready and TX interrupt enabled */
-                if (status & MPC52xx_PSC_IMR_TXRDY)
+                psc_ops->tx_clr_irq(port);
+                if (psc_ops->tx_rdy(port))
                         keepgoing |= mpc52xx_uart_int_tx_chars(port);
 
                 /* Limit number of iteration */
@@ -647,36 +940,33 @@ static void
 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
 {
         struct uart_port *port = &mpc52xx_uart_ports[co->index];
-        struct mpc52xx_psc __iomem *psc = PSC(port);
         unsigned int i, j;
 
         /* Disable interrupts */
-        out_be16(&psc->mpc52xx_psc_imr, 0);
+        psc_ops->cw_disable_ints(port);
 
         /* Wait the TX buffer to be empty */
         j = 5000000;    /* Maximum wait */
-        while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
-               --j)
+        while (!mpc52xx_uart_tx_empty(port) && --j)
                 udelay(1);
 
         /* Write all the chars */
         for (i = 0; i < count; i++, s++) {
                 /* Line return handling */
                 if (*s == '\n')
-                        out_8(&psc->mpc52xx_psc_buffer_8, '\r');
+                        psc_ops->write_char(port, '\r');
 
                 /* Send the char */
-                out_8(&psc->mpc52xx_psc_buffer_8, *s);
+                psc_ops->write_char(port, *s);
 
                 /* Wait the TX buffer to be empty */
                 j = 20000;      /* Maximum wait */
-                while (!(in_be16(&psc->mpc52xx_psc_status) &
-                         MPC52xx_PSC_SR_TXEMP) && --j)
+                while (!mpc52xx_uart_tx_empty(port) && --j)
                         udelay(1);
         }
 
         /* Restore interrupt state */
-        out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
+        psc_ops->cw_restore_ints(port);
 }
 
 #if !defined(CONFIG_PPC_MERGE)
@@ -721,7 +1011,7 @@ mpc52xx_console_setup(struct console *co, char *options)
 {
         struct uart_port *port = &mpc52xx_uart_ports[co->index];
         struct device_node *np = mpc52xx_uart_nodes[co->index];
-        unsigned int ipb_freq;
+        unsigned int uartclk;
         struct resource res;
         int ret;
 
@@ -753,17 +1043,16 @@ mpc52xx_console_setup(struct console *co, char *options)
                 return ret;
         }
 
-        /* Search for bus-frequency property in this node or a parent */
-        ipb_freq = mpc52xx_find_ipb_freq(np);
-        if (ipb_freq == 0) {
-                pr_debug("Could not find IPB bus frequency!\n");
+        uartclk = psc_ops->getuartclk(np);
+        if (uartclk == 0) {
+                pr_debug("Could not find uart clock frequency!\n");
                 return -EINVAL;
         }
 
         /* Basic port init. Needed since we use some uart_??? func before
          * real init for early access */
         spin_lock_init(&port->lock);
-        port->uartclk   = ipb_freq / 2;
+        port->uartclk = uartclk;
         port->ops       = &mpc52xx_uart_ops;
         port->mapbase = res.start;
         port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
@@ -949,7 +1238,7 @@ static int __devinit
 mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
 {
         int idx = -1;
-        unsigned int ipb_freq;
+        unsigned int uartclk;
         struct uart_port *port = NULL;
         struct resource res;
         int ret;
@@ -965,10 +1254,9 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
         pr_debug("Found %s assigned to ttyPSC%x\n",
                  mpc52xx_uart_nodes[idx]->full_name, idx);
 
-        /* Search for bus-frequency property in this node or a parent */
-        ipb_freq = mpc52xx_find_ipb_freq(op->node);
-        if (ipb_freq == 0) {
-                dev_dbg(&op->dev, "Could not find IPB bus frequency!\n");
+        uartclk = psc_ops->getuartclk(op->node);
+        if (uartclk == 0) {
+                dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
                 return -EINVAL;
         }
 
@@ -976,7 +1264,7 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
         port = &mpc52xx_uart_ports[idx];
 
         spin_lock_init(&port->lock);
-        port->uartclk   = ipb_freq / 2;
+        port->uartclk = uartclk;
         port->fifosize  = 512;
         port->iotype    = UPIO_MEM;
         port->flags     = UPF_BOOT_AUTOCONF |
@@ -1080,15 +1368,19 @@ mpc52xx_uart_of_enumerate(void)
         static int enum_done;
         struct device_node *np;
         const unsigned int *devno;
+        const struct  of_device_id *match;
         int i;
 
         if (enum_done)
                 return;
 
         for_each_node_by_type(np, "serial") {
-                if (!of_match_node(mpc52xx_uart_of_match, np))
+                match = of_match_node(mpc52xx_uart_of_match, np);
+                if (!match)
                         continue;
 
+                psc_ops = match->data;
+
                 /* Is a particular device number requested? */
                 devno = of_get_property(np, "port-number", NULL);
                 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
@@ -1149,6 +1441,7 @@ mpc52xx_uart_init(void)
                 return ret;
         }
 #else
+        psc_ops = &mpc52xx_psc_ops;
         ret = platform_driver_register(&mpc52xx_uart_platform_driver);
         if (ret) {
                 printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",