diff options
Diffstat (limited to 'drivers/serial/imx.c')
| -rw-r--r-- | drivers/serial/imx.c | 318 |
1 files changed, 206 insertions, 112 deletions
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 5a375bf0ebf4..64acb39a51ba 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | #include <linux/tty_flip.h> | 40 | #include <linux/tty_flip.h> |
| 41 | #include <linux/serial_core.h> | 41 | #include <linux/serial_core.h> |
| 42 | #include <linux/serial.h> | 42 | #include <linux/serial.h> |
| 43 | #include <linux/clk.h> | ||
| 43 | 44 | ||
| 44 | #include <asm/io.h> | 45 | #include <asm/io.h> |
| 45 | #include <asm/irq.h> | 46 | #include <asm/irq.h> |
| @@ -61,6 +62,11 @@ | |||
| 61 | #define UBIR 0xa4 /* BRM Incremental Register */ | 62 | #define UBIR 0xa4 /* BRM Incremental Register */ |
| 62 | #define UBMR 0xa8 /* BRM Modulator Register */ | 63 | #define UBMR 0xa8 /* BRM Modulator Register */ |
| 63 | #define UBRC 0xac /* Baud Rate Count Register */ | 64 | #define UBRC 0xac /* Baud Rate Count Register */ |
| 65 | #if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2 | ||
| 66 | #define ONEMS 0xb0 /* One Millisecond register */ | ||
| 67 | #define UTS 0xb4 /* UART Test Register */ | ||
| 68 | #endif | ||
| 69 | #ifdef CONFIG_ARCH_IMX | ||
| 64 | #define BIPR1 0xb0 /* Incremental Preset Register 1 */ | 70 | #define BIPR1 0xb0 /* Incremental Preset Register 1 */ |
| 65 | #define BIPR2 0xb4 /* Incremental Preset Register 2 */ | 71 | #define BIPR2 0xb4 /* Incremental Preset Register 2 */ |
| 66 | #define BIPR3 0xb8 /* Incremental Preset Register 3 */ | 72 | #define BIPR3 0xb8 /* Incremental Preset Register 3 */ |
| @@ -70,6 +76,7 @@ | |||
| 70 | #define BMPR3 0xc8 /* BRM Modulator Register 3 */ | 76 | #define BMPR3 0xc8 /* BRM Modulator Register 3 */ |
| 71 | #define BMPR4 0xcc /* BRM Modulator Register 4 */ | 77 | #define BMPR4 0xcc /* BRM Modulator Register 4 */ |
| 72 | #define UTS 0xd0 /* UART Test Register */ | 78 | #define UTS 0xd0 /* UART Test Register */ |
| 79 | #endif | ||
| 73 | 80 | ||
| 74 | /* UART Control Register Bit Fields.*/ | 81 | /* UART Control Register Bit Fields.*/ |
| 75 | #define URXD_CHARRDY (1<<15) | 82 | #define URXD_CHARRDY (1<<15) |
| @@ -89,7 +96,12 @@ | |||
| 89 | #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ | 96 | #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ |
| 90 | #define UCR1_SNDBRK (1<<4) /* Send break */ | 97 | #define UCR1_SNDBRK (1<<4) /* Send break */ |
| 91 | #define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ | 98 | #define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ |
| 99 | #ifdef CONFIG_ARCH_IMX | ||
| 92 | #define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */ | 100 | #define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */ |
| 101 | #endif | ||
| 102 | #if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2 | ||
| 103 | #define UCR1_UARTCLKEN (0) /* not present on mx2/mx3 */ | ||
| 104 | #endif | ||
| 93 | #define UCR1_DOZE (1<<1) /* Doze */ | 105 | #define UCR1_DOZE (1<<1) /* Doze */ |
| 94 | #define UCR1_UARTEN (1<<0) /* UART enabled */ | 106 | #define UCR1_UARTEN (1<<0) /* UART enabled */ |
| 95 | #define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ | 107 | #define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ |
| @@ -163,8 +175,19 @@ | |||
| 163 | #define UTS_SOFTRST (1<<0) /* Software reset */ | 175 | #define UTS_SOFTRST (1<<0) /* Software reset */ |
| 164 | 176 | ||
| 165 | /* We've been assigned a range on the "Low-density serial ports" major */ | 177 | /* We've been assigned a range on the "Low-density serial ports" major */ |
| 178 | #ifdef CONFIG_ARCH_IMX | ||
| 166 | #define SERIAL_IMX_MAJOR 204 | 179 | #define SERIAL_IMX_MAJOR 204 |
| 167 | #define MINOR_START 41 | 180 | #define MINOR_START 41 |
| 181 | #define DEV_NAME "ttySMX" | ||
| 182 | #define MAX_INTERNAL_IRQ IMX_IRQS | ||
| 183 | #endif | ||
| 184 | |||
| 185 | #if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2 | ||
| 186 | #define SERIAL_IMX_MAJOR 207 | ||
| 187 | #define MINOR_START 16 | ||
| 188 | #define DEV_NAME "ttymxc" | ||
| 189 | #define MAX_INTERNAL_IRQ MXC_MAX_INT_LINES | ||
| 190 | #endif | ||
| 168 | 191 | ||
| 169 | /* | 192 | /* |
| 170 | * This determines how often we check the modem status signals | 193 | * This determines how often we check the modem status signals |
| @@ -176,12 +199,15 @@ | |||
| 176 | 199 | ||
| 177 | #define DRIVER_NAME "IMX-uart" | 200 | #define DRIVER_NAME "IMX-uart" |
| 178 | 201 | ||
| 202 | #define UART_NR 8 | ||
| 203 | |||
| 179 | struct imx_port { | 204 | struct imx_port { |
| 180 | struct uart_port port; | 205 | struct uart_port port; |
| 181 | struct timer_list timer; | 206 | struct timer_list timer; |
| 182 | unsigned int old_status; | 207 | unsigned int old_status; |
| 183 | int txirq,rxirq,rtsirq; | 208 | int txirq,rxirq,rtsirq; |
| 184 | int have_rtscts:1; | 209 | int have_rtscts:1; |
| 210 | struct clk *clk; | ||
| 185 | }; | 211 | }; |
| 186 | 212 | ||
| 187 | /* | 213 | /* |
| @@ -405,6 +431,26 @@ out: | |||
| 405 | return IRQ_HANDLED; | 431 | return IRQ_HANDLED; |
| 406 | } | 432 | } |
| 407 | 433 | ||
| 434 | static irqreturn_t imx_int(int irq, void *dev_id) | ||
| 435 | { | ||
| 436 | struct imx_port *sport = dev_id; | ||
| 437 | unsigned int sts; | ||
| 438 | |||
| 439 | sts = readl(sport->port.membase + USR1); | ||
| 440 | |||
| 441 | if (sts & USR1_RRDY) | ||
| 442 | imx_rxint(irq, dev_id); | ||
| 443 | |||
| 444 | if (sts & USR1_TRDY && | ||
| 445 | readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) | ||
| 446 | imx_txint(irq, dev_id); | ||
| 447 | |||
| 448 | if (sts & USR1_RTSS) | ||
| 449 | imx_rtsint(irq, dev_id); | ||
| 450 | |||
| 451 | return IRQ_HANDLED; | ||
| 452 | } | ||
| 453 | |||
| 408 | /* | 454 | /* |
| 409 | * Return TIOCSER_TEMT when transmitter is not busy. | 455 | * Return TIOCSER_TEMT when transmitter is not busy. |
| 410 | */ | 456 | */ |
| @@ -477,7 +523,8 @@ static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) | |||
| 477 | * RFDIV is set such way to satisfy requested uartclk value | 523 | * RFDIV is set such way to satisfy requested uartclk value |
| 478 | */ | 524 | */ |
| 479 | val = TXTL << 10 | RXTL; | 525 | val = TXTL << 10 | RXTL; |
| 480 | ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk; | 526 | ufcr_rfdiv = (clk_get_rate(sport->clk) + sport->port.uartclk / 2) |
| 527 | / sport->port.uartclk; | ||
| 481 | 528 | ||
| 482 | if(!ufcr_rfdiv) | 529 | if(!ufcr_rfdiv) |
| 483 | ufcr_rfdiv = 1; | 530 | ufcr_rfdiv = 1; |
| @@ -509,21 +556,34 @@ static int imx_startup(struct uart_port *port) | |||
| 509 | writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); | 556 | writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); |
| 510 | 557 | ||
| 511 | /* | 558 | /* |
| 512 | * Allocate the IRQ | 559 | * Allocate the IRQ(s) i.MX1 has three interrupts whereas later |
| 560 | * chips only have one interrupt. | ||
| 513 | */ | 561 | */ |
| 514 | retval = request_irq(sport->rxirq, imx_rxint, 0, | 562 | if (sport->txirq > 0) { |
| 515 | DRIVER_NAME, sport); | 563 | retval = request_irq(sport->rxirq, imx_rxint, 0, |
| 516 | if (retval) goto error_out1; | 564 | DRIVER_NAME, sport); |
| 517 | 565 | if (retval) | |
| 518 | retval = request_irq(sport->txirq, imx_txint, 0, | 566 | goto error_out1; |
| 519 | DRIVER_NAME, sport); | 567 | |
| 520 | if (retval) goto error_out2; | 568 | retval = request_irq(sport->txirq, imx_txint, 0, |
| 521 | 569 | DRIVER_NAME, sport); | |
| 522 | retval = request_irq(sport->rtsirq, imx_rtsint, | 570 | if (retval) |
| 523 | (sport->rtsirq < IMX_IRQS) ? 0 : | 571 | goto error_out2; |
| 572 | |||
| 573 | retval = request_irq(sport->rtsirq, imx_rtsint, | ||
| 574 | (sport->rtsirq < MAX_INTERNAL_IRQ) ? 0 : | ||
| 524 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, | 575 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, |
| 525 | DRIVER_NAME, sport); | 576 | DRIVER_NAME, sport); |
| 526 | if (retval) goto error_out3; | 577 | if (retval) |
| 578 | goto error_out3; | ||
| 579 | } else { | ||
| 580 | retval = request_irq(sport->port.irq, imx_int, 0, | ||
| 581 | DRIVER_NAME, sport); | ||
| 582 | if (retval) { | ||
| 583 | free_irq(sport->port.irq, sport); | ||
| 584 | goto error_out1; | ||
| 585 | } | ||
| 586 | } | ||
| 527 | 587 | ||
| 528 | /* | 588 | /* |
| 529 | * Finally, clear and enable interrupts | 589 | * Finally, clear and enable interrupts |
| @@ -548,9 +608,11 @@ static int imx_startup(struct uart_port *port) | |||
| 548 | return 0; | 608 | return 0; |
| 549 | 609 | ||
| 550 | error_out3: | 610 | error_out3: |
| 551 | free_irq(sport->txirq, sport); | 611 | if (sport->txirq) |
| 612 | free_irq(sport->txirq, sport); | ||
| 552 | error_out2: | 613 | error_out2: |
| 553 | free_irq(sport->rxirq, sport); | 614 | if (sport->rxirq) |
| 615 | free_irq(sport->rxirq, sport); | ||
| 554 | error_out1: | 616 | error_out1: |
| 555 | return retval; | 617 | return retval; |
| 556 | } | 618 | } |
| @@ -568,9 +630,12 @@ static void imx_shutdown(struct uart_port *port) | |||
| 568 | /* | 630 | /* |
| 569 | * Free the interrupts | 631 | * Free the interrupts |
| 570 | */ | 632 | */ |
| 571 | free_irq(sport->rtsirq, sport); | 633 | if (sport->txirq > 0) { |
| 572 | free_irq(sport->txirq, sport); | 634 | free_irq(sport->rtsirq, sport); |
| 573 | free_irq(sport->rxirq, sport); | 635 | free_irq(sport->txirq, sport); |
| 636 | free_irq(sport->rxirq, sport); | ||
| 637 | } else | ||
| 638 | free_irq(sport->port.irq, sport); | ||
| 574 | 639 | ||
| 575 | /* | 640 | /* |
| 576 | * Disable all interrupts, port and break condition. | 641 | * Disable all interrupts, port and break condition. |
| @@ -589,6 +654,7 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 589 | unsigned long flags; | 654 | unsigned long flags; |
| 590 | unsigned int ucr2, old_ucr1, old_txrxen, baud, quot; | 655 | unsigned int ucr2, old_ucr1, old_txrxen, baud, quot; |
| 591 | unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; | 656 | unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; |
| 657 | unsigned int div, num, denom, ufcr; | ||
| 592 | 658 | ||
| 593 | /* | 659 | /* |
| 594 | * If we don't support modem control lines, don't allow | 660 | * If we don't support modem control lines, don't allow |
| @@ -634,7 +700,7 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 634 | /* | 700 | /* |
| 635 | * Ask the core to calculate the divisor for us. | 701 | * Ask the core to calculate the divisor for us. |
| 636 | */ | 702 | */ |
| 637 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | 703 | baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16); |
| 638 | quot = uart_get_divisor(port, baud); | 704 | quot = uart_get_divisor(port, baud); |
| 639 | 705 | ||
| 640 | spin_lock_irqsave(&sport->port.lock, flags); | 706 | spin_lock_irqsave(&sport->port.lock, flags); |
| @@ -684,14 +750,41 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 684 | sport->port.membase + UCR2); | 750 | sport->port.membase + UCR2); |
| 685 | old_txrxen &= (UCR2_TXEN | UCR2_RXEN); | 751 | old_txrxen &= (UCR2_TXEN | UCR2_RXEN); |
| 686 | 752 | ||
| 687 | /* set the baud rate. We assume uartclk = 16 MHz | 753 | div = sport->port.uartclk / (baud * 16); |
| 688 | * | 754 | if (div > 7) |
| 689 | * baud * 16 UBIR - 1 | 755 | div = 7; |
| 690 | * --------- = -------- | 756 | if (!div) |
| 691 | * uartclk UBMR - 1 | 757 | div = 1; |
| 692 | */ | 758 | |
| 693 | writel((baud / 100) - 1, sport->port.membase + UBIR); | 759 | num = baud; |
| 694 | writel(10000 - 1, sport->port.membase + UBMR); | 760 | denom = port->uartclk / div / 16; |
| 761 | |||
| 762 | /* shift num and denom right until they fit into 16 bits */ | ||
| 763 | while (num > 0x10000 || denom > 0x10000) { | ||
| 764 | num >>= 1; | ||
| 765 | denom >>= 1; | ||
| 766 | } | ||
| 767 | if (num > 0) | ||
| 768 | num -= 1; | ||
| 769 | if (denom > 0) | ||
| 770 | denom -= 1; | ||
| 771 | |||
| 772 | writel(num, sport->port.membase + UBIR); | ||
| 773 | writel(denom, sport->port.membase + UBMR); | ||
| 774 | |||
| 775 | if (div == 7) | ||
| 776 | div = 6; /* 6 in RFDIV means divide by 7 */ | ||
| 777 | else | ||
| 778 | div = 6 - div; | ||
| 779 | |||
| 780 | ufcr = readl(sport->port.membase + UFCR); | ||
| 781 | ufcr = (ufcr & (~UFCR_RFDIV)) | | ||
| 782 | (div << 7); | ||
| 783 | writel(ufcr, sport->port.membase + UFCR); | ||
| 784 | |||
| 785 | #ifdef ONEMS | ||
| 786 | writel(sport->port.uartclk / div / 1000, sport->port.membase + ONEMS); | ||
| 787 | #endif | ||
| 695 | 788 | ||
| 696 | writel(old_ucr1, sport->port.membase + UCR1); | 789 | writel(old_ucr1, sport->port.membase + UCR1); |
| 697 | 790 | ||
| @@ -801,65 +894,7 @@ static struct uart_ops imx_pops = { | |||
| 801 | .verify_port = imx_verify_port, | 894 | .verify_port = imx_verify_port, |
| 802 | }; | 895 | }; |
| 803 | 896 | ||
| 804 | static struct imx_port imx_ports[] = { | 897 | static struct imx_port *imx_ports[UART_NR]; |
| 805 | { | ||
| 806 | .txirq = UART1_MINT_TX, | ||
| 807 | .rxirq = UART1_MINT_RX, | ||
| 808 | .rtsirq = UART1_MINT_RTS, | ||
| 809 | .port = { | ||
| 810 | .type = PORT_IMX, | ||
| 811 | .iotype = UPIO_MEM, | ||
| 812 | .membase = (void *)IMX_UART1_BASE, | ||
| 813 | .mapbase = 0x00206000, | ||
| 814 | .irq = UART1_MINT_RX, | ||
| 815 | .uartclk = 16000000, | ||
| 816 | .fifosize = 32, | ||
| 817 | .flags = UPF_BOOT_AUTOCONF, | ||
| 818 | .ops = &imx_pops, | ||
| 819 | .line = 0, | ||
| 820 | }, | ||
| 821 | }, { | ||
| 822 | .txirq = UART2_MINT_TX, | ||
| 823 | .rxirq = UART2_MINT_RX, | ||
| 824 | .rtsirq = UART2_MINT_RTS, | ||
| 825 | .port = { | ||
| 826 | .type = PORT_IMX, | ||
| 827 | .iotype = UPIO_MEM, | ||
| 828 | .membase = (void *)IMX_UART2_BASE, | ||
| 829 | .mapbase = 0x00207000, | ||
| 830 | .irq = UART2_MINT_RX, | ||
| 831 | .uartclk = 16000000, | ||
| 832 | .fifosize = 32, | ||
| 833 | .flags = UPF_BOOT_AUTOCONF, | ||
| 834 | .ops = &imx_pops, | ||
| 835 | .line = 1, | ||
| 836 | }, | ||
| 837 | } | ||
| 838 | }; | ||
| 839 | |||
| 840 | /* | ||
| 841 | * Setup the IMX serial ports. | ||
| 842 | * Note also that we support "console=ttySMXx" where "x" is either 0 or 1. | ||
| 843 | * Which serial port this ends up being depends on the machine you're | ||
| 844 | * running this kernel on. I'm not convinced that this is a good idea, | ||
| 845 | * but that's the way it traditionally works. | ||
| 846 | * | ||
| 847 | */ | ||
| 848 | static void __init imx_init_ports(void) | ||
| 849 | { | ||
| 850 | static int first = 1; | ||
| 851 | int i; | ||
| 852 | |||
| 853 | if (!first) | ||
| 854 | return; | ||
| 855 | first = 0; | ||
| 856 | |||
| 857 | for (i = 0; i < ARRAY_SIZE(imx_ports); i++) { | ||
| 858 | init_timer(&imx_ports[i].timer); | ||
| 859 | imx_ports[i].timer.function = imx_timeout; | ||
| 860 | imx_ports[i].timer.data = (unsigned long)&imx_ports[i]; | ||
| 861 | } | ||
| 862 | } | ||
| 863 | 898 | ||
| 864 | #ifdef CONFIG_SERIAL_IMX_CONSOLE | 899 | #ifdef CONFIG_SERIAL_IMX_CONSOLE |
| 865 | static void imx_console_putchar(struct uart_port *port, int ch) | 900 | static void imx_console_putchar(struct uart_port *port, int ch) |
| @@ -878,7 +913,7 @@ static void imx_console_putchar(struct uart_port *port, int ch) | |||
| 878 | static void | 913 | static void |
| 879 | imx_console_write(struct console *co, const char *s, unsigned int count) | 914 | imx_console_write(struct console *co, const char *s, unsigned int count) |
| 880 | { | 915 | { |
| 881 | struct imx_port *sport = &imx_ports[co->index]; | 916 | struct imx_port *sport = imx_ports[co->index]; |
| 882 | unsigned int old_ucr1, old_ucr2; | 917 | unsigned int old_ucr1, old_ucr2; |
| 883 | 918 | ||
| 884 | /* | 919 | /* |
| @@ -944,7 +979,7 @@ imx_console_get_options(struct imx_port *sport, int *baud, | |||
| 944 | else | 979 | else |
| 945 | ucfr_rfdiv = 6 - ucfr_rfdiv; | 980 | ucfr_rfdiv = 6 - ucfr_rfdiv; |
| 946 | 981 | ||
| 947 | uartclk = imx_get_perclk1(); | 982 | uartclk = clk_get_rate(sport->clk); |
| 948 | uartclk /= ucfr_rfdiv; | 983 | uartclk /= ucfr_rfdiv; |
| 949 | 984 | ||
| 950 | { /* | 985 | { /* |
| @@ -984,7 +1019,7 @@ imx_console_setup(struct console *co, char *options) | |||
| 984 | */ | 1019 | */ |
| 985 | if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports)) | 1020 | if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports)) |
| 986 | co->index = 0; | 1021 | co->index = 0; |
| 987 | sport = &imx_ports[co->index]; | 1022 | sport = imx_ports[co->index]; |
| 988 | 1023 | ||
| 989 | if (options) | 1024 | if (options) |
| 990 | uart_parse_options(options, &baud, &parity, &bits, &flow); | 1025 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| @@ -998,7 +1033,7 @@ imx_console_setup(struct console *co, char *options) | |||
| 998 | 1033 | ||
| 999 | static struct uart_driver imx_reg; | 1034 | static struct uart_driver imx_reg; |
| 1000 | static struct console imx_console = { | 1035 | static struct console imx_console = { |
| 1001 | .name = "ttySMX", | 1036 | .name = DEV_NAME, |
| 1002 | .write = imx_console_write, | 1037 | .write = imx_console_write, |
| 1003 | .device = uart_console_device, | 1038 | .device = uart_console_device, |
| 1004 | .setup = imx_console_setup, | 1039 | .setup = imx_console_setup, |
| @@ -1007,14 +1042,6 @@ static struct console imx_console = { | |||
| 1007 | .data = &imx_reg, | 1042 | .data = &imx_reg, |
| 1008 | }; | 1043 | }; |
| 1009 | 1044 | ||
| 1010 | static int __init imx_rs_console_init(void) | ||
| 1011 | { | ||
| 1012 | imx_init_ports(); | ||
| 1013 | register_console(&imx_console); | ||
| 1014 | return 0; | ||
| 1015 | } | ||
| 1016 | console_initcall(imx_rs_console_init); | ||
| 1017 | |||
| 1018 | #define IMX_CONSOLE &imx_console | 1045 | #define IMX_CONSOLE &imx_console |
| 1019 | #else | 1046 | #else |
| 1020 | #define IMX_CONSOLE NULL | 1047 | #define IMX_CONSOLE NULL |
| @@ -1023,7 +1050,7 @@ console_initcall(imx_rs_console_init); | |||
| 1023 | static struct uart_driver imx_reg = { | 1050 | static struct uart_driver imx_reg = { |
| 1024 | .owner = THIS_MODULE, | 1051 | .owner = THIS_MODULE, |
| 1025 | .driver_name = DRIVER_NAME, | 1052 | .driver_name = DRIVER_NAME, |
| 1026 | .dev_name = "ttySMX", | 1053 | .dev_name = DEV_NAME, |
| 1027 | .major = SERIAL_IMX_MAJOR, | 1054 | .major = SERIAL_IMX_MAJOR, |
| 1028 | .minor = MINOR_START, | 1055 | .minor = MINOR_START, |
| 1029 | .nr = ARRAY_SIZE(imx_ports), | 1056 | .nr = ARRAY_SIZE(imx_ports), |
| @@ -1050,29 +1077,98 @@ static int serial_imx_resume(struct platform_device *dev) | |||
| 1050 | return 0; | 1077 | return 0; |
| 1051 | } | 1078 | } |
| 1052 | 1079 | ||
| 1053 | static int serial_imx_probe(struct platform_device *dev) | 1080 | static int serial_imx_probe(struct platform_device *pdev) |
| 1054 | { | 1081 | { |
| 1082 | struct imx_port *sport; | ||
| 1055 | struct imxuart_platform_data *pdata; | 1083 | struct imxuart_platform_data *pdata; |
| 1084 | void __iomem *base; | ||
| 1085 | int ret = 0; | ||
| 1086 | struct resource *res; | ||
| 1087 | |||
| 1088 | sport = kzalloc(sizeof(*sport), GFP_KERNEL); | ||
| 1089 | if (!sport) | ||
| 1090 | return -ENOMEM; | ||
| 1056 | 1091 | ||
| 1057 | imx_ports[dev->id].port.dev = &dev->dev; | 1092 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1093 | if (!res) { | ||
| 1094 | ret = -ENODEV; | ||
| 1095 | goto free; | ||
| 1096 | } | ||
| 1097 | |||
| 1098 | base = ioremap(res->start, PAGE_SIZE); | ||
| 1099 | if (!base) { | ||
| 1100 | ret = -ENOMEM; | ||
| 1101 | goto free; | ||
| 1102 | } | ||
| 1103 | |||
| 1104 | sport->port.dev = &pdev->dev; | ||
| 1105 | sport->port.mapbase = res->start; | ||
| 1106 | sport->port.membase = base; | ||
| 1107 | sport->port.type = PORT_IMX, | ||
| 1108 | sport->port.iotype = UPIO_MEM; | ||
| 1109 | sport->port.irq = platform_get_irq(pdev, 0); | ||
| 1110 | sport->rxirq = platform_get_irq(pdev, 0); | ||
| 1111 | sport->txirq = platform_get_irq(pdev, 1); | ||
| 1112 | sport->rtsirq = platform_get_irq(pdev, 2); | ||
| 1113 | sport->port.fifosize = 32; | ||
| 1114 | sport->port.ops = &imx_pops; | ||
| 1115 | sport->port.flags = UPF_BOOT_AUTOCONF; | ||
| 1116 | sport->port.line = pdev->id; | ||
| 1117 | init_timer(&sport->timer); | ||
| 1118 | sport->timer.function = imx_timeout; | ||
| 1119 | sport->timer.data = (unsigned long)sport; | ||
| 1120 | |||
| 1121 | sport->clk = clk_get(&pdev->dev, "uart_clk"); | ||
| 1122 | if (IS_ERR(sport->clk)) { | ||
| 1123 | ret = PTR_ERR(sport->clk); | ||
| 1124 | goto unmap; | ||
| 1125 | } | ||
| 1126 | clk_enable(sport->clk); | ||
| 1058 | 1127 | ||
| 1059 | pdata = (struct imxuart_platform_data *)dev->dev.platform_data; | 1128 | sport->port.uartclk = clk_get_rate(sport->clk); |
| 1129 | |||
| 1130 | imx_ports[pdev->id] = sport; | ||
| 1131 | |||
| 1132 | pdata = pdev->dev.platform_data; | ||
| 1060 | if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS)) | 1133 | if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS)) |
| 1061 | imx_ports[dev->id].have_rtscts = 1; | 1134 | sport->have_rtscts = 1; |
| 1135 | |||
| 1136 | if (pdata->init) | ||
| 1137 | pdata->init(pdev); | ||
| 1138 | |||
| 1139 | uart_add_one_port(&imx_reg, &sport->port); | ||
| 1140 | platform_set_drvdata(pdev, &sport->port); | ||
| 1062 | 1141 | ||
| 1063 | uart_add_one_port(&imx_reg, &imx_ports[dev->id].port); | ||
| 1064 | platform_set_drvdata(dev, &imx_ports[dev->id]); | ||
| 1065 | return 0; | 1142 | return 0; |
| 1143 | unmap: | ||
| 1144 | iounmap(sport->port.membase); | ||
| 1145 | free: | ||
| 1146 | kfree(sport); | ||
| 1147 | |||
| 1148 | return ret; | ||
| 1066 | } | 1149 | } |
| 1067 | 1150 | ||
| 1068 | static int serial_imx_remove(struct platform_device *dev) | 1151 | static int serial_imx_remove(struct platform_device *pdev) |
| 1069 | { | 1152 | { |
| 1070 | struct imx_port *sport = platform_get_drvdata(dev); | 1153 | struct imxuart_platform_data *pdata; |
| 1154 | struct imx_port *sport = platform_get_drvdata(pdev); | ||
| 1071 | 1155 | ||
| 1072 | platform_set_drvdata(dev, NULL); | 1156 | pdata = pdev->dev.platform_data; |
| 1073 | 1157 | ||
| 1074 | if (sport) | 1158 | platform_set_drvdata(pdev, NULL); |
| 1159 | |||
| 1160 | if (sport) { | ||
| 1075 | uart_remove_one_port(&imx_reg, &sport->port); | 1161 | uart_remove_one_port(&imx_reg, &sport->port); |
| 1162 | clk_put(sport->clk); | ||
| 1163 | } | ||
| 1164 | |||
| 1165 | clk_disable(sport->clk); | ||
| 1166 | |||
| 1167 | if (pdata->exit) | ||
| 1168 | pdata->exit(pdev); | ||
| 1169 | |||
| 1170 | iounmap(sport->port.membase); | ||
| 1171 | kfree(sport); | ||
| 1076 | 1172 | ||
| 1077 | return 0; | 1173 | return 0; |
| 1078 | } | 1174 | } |
| @@ -1095,8 +1191,6 @@ static int __init imx_serial_init(void) | |||
| 1095 | 1191 | ||
| 1096 | printk(KERN_INFO "Serial: IMX driver\n"); | 1192 | printk(KERN_INFO "Serial: IMX driver\n"); |
| 1097 | 1193 | ||
| 1098 | imx_init_ports(); | ||
| 1099 | |||
| 1100 | ret = uart_register_driver(&imx_reg); | 1194 | ret = uart_register_driver(&imx_reg); |
| 1101 | if (ret) | 1195 | if (ret) |
| 1102 | return ret; | 1196 | return ret; |
