diff options
Diffstat (limited to 'drivers/serial/imx.c')
-rw-r--r-- | drivers/serial/imx.c | 27 |
1 files changed, 22 insertions, 5 deletions
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 6a29f9330a73..3f90f1bbbbcd 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c | |||
@@ -127,8 +127,13 @@ | |||
127 | #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ | 127 | #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ |
128 | #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ | 128 | #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ |
129 | #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ | 129 | #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ |
130 | #define UCR3_REF25 (1<<3) /* Ref freq 25 MHz */ | 130 | #ifdef CONFIG_ARCH_IMX |
131 | #define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz */ | 131 | #define UCR3_REF25 (1<<3) /* Ref freq 25 MHz, only on mx1 */ |
132 | #define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz, only on mx1 */ | ||
133 | #endif | ||
134 | #if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3 | ||
135 | #define UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ | ||
136 | #endif | ||
132 | #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ | 137 | #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ |
133 | #define UCR3_BPEN (1<<0) /* Preset registers enable */ | 138 | #define UCR3_BPEN (1<<0) /* Preset registers enable */ |
134 | #define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ | 139 | #define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ |
@@ -445,7 +450,7 @@ static irqreturn_t imx_int(int irq, void *dev_id) | |||
445 | readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) | 450 | readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) |
446 | imx_txint(irq, dev_id); | 451 | imx_txint(irq, dev_id); |
447 | 452 | ||
448 | if (sts & USR1_RTSS) | 453 | if (sts & USR1_RTSD) |
449 | imx_rtsint(irq, dev_id); | 454 | imx_rtsint(irq, dev_id); |
450 | 455 | ||
451 | return IRQ_HANDLED; | 456 | return IRQ_HANDLED; |
@@ -598,6 +603,12 @@ static int imx_startup(struct uart_port *port) | |||
598 | temp |= (UCR2_RXEN | UCR2_TXEN); | 603 | temp |= (UCR2_RXEN | UCR2_TXEN); |
599 | writel(temp, sport->port.membase + UCR2); | 604 | writel(temp, sport->port.membase + UCR2); |
600 | 605 | ||
606 | #if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3 | ||
607 | temp = readl(sport->port.membase + UCR3); | ||
608 | temp |= UCR3_RXDMUXSEL; | ||
609 | writel(temp, sport->port.membase + UCR3); | ||
610 | #endif | ||
611 | |||
601 | /* | 612 | /* |
602 | * Enable modem status interrupts | 613 | * Enable modem status interrupts |
603 | */ | 614 | */ |
@@ -1133,13 +1144,19 @@ static int serial_imx_probe(struct platform_device *pdev) | |||
1133 | if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS)) | 1144 | if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS)) |
1134 | sport->have_rtscts = 1; | 1145 | sport->have_rtscts = 1; |
1135 | 1146 | ||
1136 | if (pdata->init) | 1147 | if (pdata->init) { |
1137 | pdata->init(pdev); | 1148 | ret = pdata->init(pdev); |
1149 | if (ret) | ||
1150 | goto clkput; | ||
1151 | } | ||
1138 | 1152 | ||
1139 | uart_add_one_port(&imx_reg, &sport->port); | 1153 | uart_add_one_port(&imx_reg, &sport->port); |
1140 | platform_set_drvdata(pdev, &sport->port); | 1154 | platform_set_drvdata(pdev, &sport->port); |
1141 | 1155 | ||
1142 | return 0; | 1156 | return 0; |
1157 | clkput: | ||
1158 | clk_put(sport->clk); | ||
1159 | clk_disable(sport->clk); | ||
1143 | unmap: | 1160 | unmap: |
1144 | iounmap(sport->port.membase); | 1161 | iounmap(sport->port.membase); |
1145 | free: | 1162 | free: |