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-rw-r--r--drivers/serial/atmel_serial.c981
1 files changed, 981 insertions, 0 deletions
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
new file mode 100644
index 000000000000..3b420aeafc24
--- /dev/null
+++ b/drivers/serial/atmel_serial.c
@@ -0,0 +1,981 @@
1/*
2 * linux/drivers/char/at91_serial.c
3 *
4 * Driver for Atmel AT91RM9200 Serial ports
5 * Copyright (C) 2003 Rick Bronson
6 *
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25#include <linux/module.h>
26#include <linux/tty.h>
27#include <linux/ioport.h>
28#include <linux/slab.h>
29#include <linux/init.h>
30#include <linux/serial.h>
31#include <linux/clk.h>
32#include <linux/console.h>
33#include <linux/sysrq.h>
34#include <linux/tty_flip.h>
35#include <linux/platform_device.h>
36
37#include <asm/io.h>
38
39#include <asm/arch/at91rm9200_pdc.h>
40#include <asm/mach/serial_at91.h>
41#include <asm/arch/board.h>
42#include <asm/arch/system.h>
43#include <asm/arch/gpio.h>
44
45#include "atmel_serial.h"
46
47#if defined(CONFIG_SERIAL_AT91_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
48#define SUPPORT_SYSRQ
49#endif
50
51#include <linux/serial_core.h>
52
53#ifdef CONFIG_SERIAL_AT91_TTYAT
54
55/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
56 * should coexist with the 8250 driver, such as if we have an external 16C550
57 * UART. */
58#define SERIAL_AT91_MAJOR 204
59#define MINOR_START 154
60#define AT91_DEVICENAME "ttyAT"
61
62#else
63
64/* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
65 * name, but it is legally reserved for the 8250 driver. */
66#define SERIAL_AT91_MAJOR TTY_MAJOR
67#define MINOR_START 64
68#define AT91_DEVICENAME "ttyS"
69
70#endif
71
72#define AT91_ISR_PASS_LIMIT 256
73
74#define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR)
75#define UART_GET_MR(port) readl((port)->membase + AT91_US_MR)
76#define UART_PUT_MR(port,v) writel(v, (port)->membase + AT91_US_MR)
77#define UART_PUT_IER(port,v) writel(v, (port)->membase + AT91_US_IER)
78#define UART_PUT_IDR(port,v) writel(v, (port)->membase + AT91_US_IDR)
79#define UART_GET_IMR(port) readl((port)->membase + AT91_US_IMR)
80#define UART_GET_CSR(port) readl((port)->membase + AT91_US_CSR)
81#define UART_GET_CHAR(port) readl((port)->membase + AT91_US_RHR)
82#define UART_PUT_CHAR(port,v) writel(v, (port)->membase + AT91_US_THR)
83#define UART_GET_BRGR(port) readl((port)->membase + AT91_US_BRGR)
84#define UART_PUT_BRGR(port,v) writel(v, (port)->membase + AT91_US_BRGR)
85#define UART_PUT_RTOR(port,v) writel(v, (port)->membase + AT91_US_RTOR)
86
87// #define UART_GET_CR(port) readl((port)->membase + AT91_US_CR) // is write-only
88
89 /* PDC registers */
90#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR)
91#define UART_GET_PTSR(port) readl((port)->membase + AT91_PDC_PTSR)
92
93#define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR)
94#define UART_GET_RPR(port) readl((port)->membase + AT91_PDC_RPR)
95#define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR)
96#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR)
97#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR)
98
99#define UART_PUT_TPR(port,v) writel(v, (port)->membase + AT91_PDC_TPR)
100#define UART_PUT_TCR(port,v) writel(v, (port)->membase + AT91_PDC_TCR)
101//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + AT91_PDC_TNPR)
102//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + AT91_PDC_TNCR)
103
104static int (*at91_open)(struct uart_port *);
105static void (*at91_close)(struct uart_port *);
106
107/*
108 * We wrap our port structure around the generic uart_port.
109 */
110struct at91_uart_port {
111 struct uart_port uart; /* uart */
112 struct clk *clk; /* uart clock */
113 unsigned short suspended; /* is port suspended? */
114};
115
116static struct at91_uart_port at91_ports[AT91_NR_UART];
117
118#ifdef SUPPORT_SYSRQ
119static struct console at91_console;
120#endif
121
122/*
123 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
124 */
125static u_int at91_tx_empty(struct uart_port *port)
126{
127 return (UART_GET_CSR(port) & AT91_US_TXEMPTY) ? TIOCSER_TEMT : 0;
128}
129
130/*
131 * Set state of the modem control output lines
132 */
133static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
134{
135 unsigned int control = 0;
136 unsigned int mode;
137
138 if (arch_identify() == ARCH_ID_AT91RM9200) {
139 /*
140 * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
141 * We need to drive the pin manually.
142 */
143 if (port->mapbase == AT91RM9200_BASE_US0) {
144 if (mctrl & TIOCM_RTS)
145 at91_set_gpio_value(AT91_PIN_PA21, 0);
146 else
147 at91_set_gpio_value(AT91_PIN_PA21, 1);
148 }
149 }
150
151 if (mctrl & TIOCM_RTS)
152 control |= AT91_US_RTSEN;
153 else
154 control |= AT91_US_RTSDIS;
155
156 if (mctrl & TIOCM_DTR)
157 control |= AT91_US_DTREN;
158 else
159 control |= AT91_US_DTRDIS;
160
161 UART_PUT_CR(port, control);
162
163 /* Local loopback mode? */
164 mode = UART_GET_MR(port) & ~AT91_US_CHMODE;
165 if (mctrl & TIOCM_LOOP)
166 mode |= AT91_US_CHMODE_LOC_LOOP;
167 else
168 mode |= AT91_US_CHMODE_NORMAL;
169 UART_PUT_MR(port, mode);
170}
171
172/*
173 * Get state of the modem control input lines
174 */
175static u_int at91_get_mctrl(struct uart_port *port)
176{
177 unsigned int status, ret = 0;
178
179 status = UART_GET_CSR(port);
180
181 /*
182 * The control signals are active low.
183 */
184 if (!(status & AT91_US_DCD))
185 ret |= TIOCM_CD;
186 if (!(status & AT91_US_CTS))
187 ret |= TIOCM_CTS;
188 if (!(status & AT91_US_DSR))
189 ret |= TIOCM_DSR;
190 if (!(status & AT91_US_RI))
191 ret |= TIOCM_RI;
192
193 return ret;
194}
195
196/*
197 * Stop transmitting.
198 */
199static void at91_stop_tx(struct uart_port *port)
200{
201 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
202
203 UART_PUT_IDR(port, AT91_US_TXRDY);
204}
205
206/*
207 * Start transmitting.
208 */
209static void at91_start_tx(struct uart_port *port)
210{
211 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
212
213 UART_PUT_IER(port, AT91_US_TXRDY);
214}
215
216/*
217 * Stop receiving - port is in process of being closed.
218 */
219static void at91_stop_rx(struct uart_port *port)
220{
221 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
222
223 UART_PUT_IDR(port, AT91_US_RXRDY);
224}
225
226/*
227 * Enable modem status interrupts
228 */
229static void at91_enable_ms(struct uart_port *port)
230{
231 UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC);
232}
233
234/*
235 * Control the transmission of a break signal
236 */
237static void at91_break_ctl(struct uart_port *port, int break_state)
238{
239 if (break_state != 0)
240 UART_PUT_CR(port, AT91_US_STTBRK); /* start break */
241 else
242 UART_PUT_CR(port, AT91_US_STPBRK); /* stop break */
243}
244
245/*
246 * Characters received (called from interrupt handler)
247 */
248static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
249{
250 struct tty_struct *tty = port->info->tty;
251 unsigned int status, ch, flg;
252
253 status = UART_GET_CSR(port);
254 while (status & AT91_US_RXRDY) {
255 ch = UART_GET_CHAR(port);
256
257 port->icount.rx++;
258
259 flg = TTY_NORMAL;
260
261 /*
262 * note that the error handling code is
263 * out of the main execution path
264 */
265 if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE | AT91_US_RXBRK))) {
266 UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */
267 if (status & AT91_US_RXBRK) {
268 status &= ~(AT91_US_PARE | AT91_US_FRAME); /* ignore side-effect */
269 port->icount.brk++;
270 if (uart_handle_break(port))
271 goto ignore_char;
272 }
273 if (status & AT91_US_PARE)
274 port->icount.parity++;
275 if (status & AT91_US_FRAME)
276 port->icount.frame++;
277 if (status & AT91_US_OVRE)
278 port->icount.overrun++;
279
280 status &= port->read_status_mask;
281
282 if (status & AT91_US_RXBRK)
283 flg = TTY_BREAK;
284 else if (status & AT91_US_PARE)
285 flg = TTY_PARITY;
286 else if (status & AT91_US_FRAME)
287 flg = TTY_FRAME;
288 }
289
290 if (uart_handle_sysrq_char(port, ch, regs))
291 goto ignore_char;
292
293 uart_insert_char(port, status, AT91_US_OVRE, ch, flg);
294
295 ignore_char:
296 status = UART_GET_CSR(port);
297 }
298
299 tty_flip_buffer_push(tty);
300}
301
302/*
303 * Transmit characters (called from interrupt handler)
304 */
305static void at91_tx_chars(struct uart_port *port)
306{
307 struct circ_buf *xmit = &port->info->xmit;
308
309 if (port->x_char) {
310 UART_PUT_CHAR(port, port->x_char);
311 port->icount.tx++;
312 port->x_char = 0;
313 return;
314 }
315 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
316 at91_stop_tx(port);
317 return;
318 }
319
320 while (UART_GET_CSR(port) & AT91_US_TXRDY) {
321 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
322 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
323 port->icount.tx++;
324 if (uart_circ_empty(xmit))
325 break;
326 }
327
328 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
329 uart_write_wakeup(port);
330
331 if (uart_circ_empty(xmit))
332 at91_stop_tx(port);
333}
334
335/*
336 * Interrupt handler
337 */
338static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs)
339{
340 struct uart_port *port = dev_id;
341 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
342 unsigned int status, pending, pass_counter = 0;
343
344 status = UART_GET_CSR(port);
345 pending = status & UART_GET_IMR(port);
346 while (pending) {
347 /* Interrupt receive */
348 if (pending & AT91_US_RXRDY)
349 at91_rx_chars(port, regs);
350
351 // TODO: All reads to CSR will clear these interrupts!
352 if (pending & AT91_US_RIIC) port->icount.rng++;
353 if (pending & AT91_US_DSRIC) port->icount.dsr++;
354 if (pending & AT91_US_DCDIC)
355 uart_handle_dcd_change(port, !(status & AT91_US_DCD));
356 if (pending & AT91_US_CTSIC)
357 uart_handle_cts_change(port, !(status & AT91_US_CTS));
358 if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC))
359 wake_up_interruptible(&port->info->delta_msr_wait);
360
361 /* Interrupt transmit */
362 if (pending & AT91_US_TXRDY)
363 at91_tx_chars(port);
364
365 if (pass_counter++ > AT91_ISR_PASS_LIMIT)
366 break;
367
368 status = UART_GET_CSR(port);
369 pending = status & UART_GET_IMR(port);
370 }
371 return IRQ_HANDLED;
372}
373
374/*
375 * Perform initialization and enable port for reception
376 */
377static int at91_startup(struct uart_port *port)
378{
379 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
380 int retval;
381
382 /*
383 * Ensure that no interrupts are enabled otherwise when
384 * request_irq() is called we could get stuck trying to
385 * handle an unexpected interrupt
386 */
387 UART_PUT_IDR(port, -1);
388
389 /*
390 * Allocate the IRQ
391 */
392 retval = request_irq(port->irq, at91_interrupt, IRQF_SHARED, "at91_serial", port);
393 if (retval) {
394 printk("at91_serial: at91_startup - Can't get irq\n");
395 return retval;
396 }
397
398 /*
399 * If there is a specific "open" function (to register
400 * control line interrupts)
401 */
402 if (at91_open) {
403 retval = at91_open(port);
404 if (retval) {
405 free_irq(port->irq, port);
406 return retval;
407 }
408 }
409
410 /*
411 * Finally, enable the serial port
412 */
413 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
414 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */
415
416 UART_PUT_IER(port, AT91_US_RXRDY); /* enable receive only */
417
418 return 0;
419}
420
421/*
422 * Disable the port
423 */
424static void at91_shutdown(struct uart_port *port)
425{
426 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
427
428 /*
429 * Disable all interrupts, port and break condition.
430 */
431 UART_PUT_CR(port, AT91_US_RSTSTA);
432 UART_PUT_IDR(port, -1);
433
434 /*
435 * Free the interrupt
436 */
437 free_irq(port->irq, port);
438
439 /*
440 * If there is a specific "close" function (to unregister
441 * control line interrupts)
442 */
443 if (at91_close)
444 at91_close(port);
445}
446
447/*
448 * Power / Clock management.
449 */
450static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
451{
452 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
453
454 switch (state) {
455 case 0:
456 /*
457 * Enable the peripheral clock for this serial port.
458 * This is called on uart_open() or a resume event.
459 */
460 clk_enable(at91_port->clk);
461 break;
462 case 3:
463 /*
464 * Disable the peripheral clock for this serial port.
465 * This is called on uart_close() or a suspend event.
466 */
467 clk_disable(at91_port->clk);
468 break;
469 default:
470 printk(KERN_ERR "at91_serial: unknown pm %d\n", state);
471 }
472}
473
474/*
475 * Change the port parameters
476 */
477static void at91_set_termios(struct uart_port *port, struct termios * termios, struct termios * old)
478{
479 unsigned long flags;
480 unsigned int mode, imr, quot, baud;
481
482 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
483 quot = uart_get_divisor(port, baud);
484
485 /* Get current mode register */
486 mode = UART_GET_MR(port) & ~(AT91_US_CHRL | AT91_US_NBSTOP | AT91_US_PAR);
487
488 /* byte size */
489 switch (termios->c_cflag & CSIZE) {
490 case CS5:
491 mode |= AT91_US_CHRL_5;
492 break;
493 case CS6:
494 mode |= AT91_US_CHRL_6;
495 break;
496 case CS7:
497 mode |= AT91_US_CHRL_7;
498 break;
499 default:
500 mode |= AT91_US_CHRL_8;
501 break;
502 }
503
504 /* stop bits */
505 if (termios->c_cflag & CSTOPB)
506 mode |= AT91_US_NBSTOP_2;
507
508 /* parity */
509 if (termios->c_cflag & PARENB) {
510 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
511 if (termios->c_cflag & PARODD)
512 mode |= AT91_US_PAR_MARK;
513 else
514 mode |= AT91_US_PAR_SPACE;
515 }
516 else if (termios->c_cflag & PARODD)
517 mode |= AT91_US_PAR_ODD;
518 else
519 mode |= AT91_US_PAR_EVEN;
520 }
521 else
522 mode |= AT91_US_PAR_NONE;
523
524 spin_lock_irqsave(&port->lock, flags);
525
526 port->read_status_mask = AT91_US_OVRE;
527 if (termios->c_iflag & INPCK)
528 port->read_status_mask |= (AT91_US_FRAME | AT91_US_PARE);
529 if (termios->c_iflag & (BRKINT | PARMRK))
530 port->read_status_mask |= AT91_US_RXBRK;
531
532 /*
533 * Characters to ignore
534 */
535 port->ignore_status_mask = 0;
536 if (termios->c_iflag & IGNPAR)
537 port->ignore_status_mask |= (AT91_US_FRAME | AT91_US_PARE);
538 if (termios->c_iflag & IGNBRK) {
539 port->ignore_status_mask |= AT91_US_RXBRK;
540 /*
541 * If we're ignoring parity and break indicators,
542 * ignore overruns too (for real raw support).
543 */
544 if (termios->c_iflag & IGNPAR)
545 port->ignore_status_mask |= AT91_US_OVRE;
546 }
547
548 // TODO: Ignore all characters if CREAD is set.
549
550 /* update the per-port timeout */
551 uart_update_timeout(port, termios->c_cflag, baud);
552
553 /* disable interrupts and drain transmitter */
554 imr = UART_GET_IMR(port); /* get interrupt mask */
555 UART_PUT_IDR(port, -1); /* disable all interrupts */
556 while (!(UART_GET_CSR(port) & AT91_US_TXEMPTY)) { barrier(); }
557
558 /* disable receiver and transmitter */
559 UART_PUT_CR(port, AT91_US_TXDIS | AT91_US_RXDIS);
560
561 /* set the parity, stop bits and data size */
562 UART_PUT_MR(port, mode);
563
564 /* set the baud rate */
565 UART_PUT_BRGR(port, quot);
566 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
567 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
568
569 /* restore interrupts */
570 UART_PUT_IER(port, imr);
571
572 /* CTS flow-control and modem-status interrupts */
573 if (UART_ENABLE_MS(port, termios->c_cflag))
574 port->ops->enable_ms(port);
575
576 spin_unlock_irqrestore(&port->lock, flags);
577}
578
579/*
580 * Return string describing the specified port
581 */
582static const char *at91_type(struct uart_port *port)
583{
584 return (port->type == PORT_AT91) ? "AT91_SERIAL" : NULL;
585}
586
587/*
588 * Release the memory region(s) being used by 'port'.
589 */
590static void at91_release_port(struct uart_port *port)
591{
592 struct platform_device *pdev = to_platform_device(port->dev);
593 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
594
595 release_mem_region(port->mapbase, size);
596
597 if (port->flags & UPF_IOREMAP) {
598 iounmap(port->membase);
599 port->membase = NULL;
600 }
601}
602
603/*
604 * Request the memory region(s) being used by 'port'.
605 */
606static int at91_request_port(struct uart_port *port)
607{
608 struct platform_device *pdev = to_platform_device(port->dev);
609 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
610
611 if (!request_mem_region(port->mapbase, size, "at91_serial"))
612 return -EBUSY;
613
614 if (port->flags & UPF_IOREMAP) {
615 port->membase = ioremap(port->mapbase, size);
616 if (port->membase == NULL) {
617 release_mem_region(port->mapbase, size);
618 return -ENOMEM;
619 }
620 }
621
622 return 0;
623}
624
625/*
626 * Configure/autoconfigure the port.
627 */
628static void at91_config_port(struct uart_port *port, int flags)
629{
630 if (flags & UART_CONFIG_TYPE) {
631 port->type = PORT_AT91;
632 at91_request_port(port);
633 }
634}
635
636/*
637 * Verify the new serial_struct (for TIOCSSERIAL).
638 */
639static int at91_verify_port(struct uart_port *port, struct serial_struct *ser)
640{
641 int ret = 0;
642 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91)
643 ret = -EINVAL;
644 if (port->irq != ser->irq)
645 ret = -EINVAL;
646 if (ser->io_type != SERIAL_IO_MEM)
647 ret = -EINVAL;
648 if (port->uartclk / 16 != ser->baud_base)
649 ret = -EINVAL;
650 if ((void *)port->mapbase != ser->iomem_base)
651 ret = -EINVAL;
652 if (port->iobase != ser->port)
653 ret = -EINVAL;
654 if (ser->hub6 != 0)
655 ret = -EINVAL;
656 return ret;
657}
658
659static struct uart_ops at91_pops = {
660 .tx_empty = at91_tx_empty,
661 .set_mctrl = at91_set_mctrl,
662 .get_mctrl = at91_get_mctrl,
663 .stop_tx = at91_stop_tx,
664 .start_tx = at91_start_tx,
665 .stop_rx = at91_stop_rx,
666 .enable_ms = at91_enable_ms,
667 .break_ctl = at91_break_ctl,
668 .startup = at91_startup,
669 .shutdown = at91_shutdown,
670 .set_termios = at91_set_termios,
671 .type = at91_type,
672 .release_port = at91_release_port,
673 .request_port = at91_request_port,
674 .config_port = at91_config_port,
675 .verify_port = at91_verify_port,
676 .pm = at91_serial_pm,
677};
678
679/*
680 * Configure the port from the platform device resource info.
681 */
682static void __devinit at91_init_port(struct at91_uart_port *at91_port, struct platform_device *pdev)
683{
684 struct uart_port *port = &at91_port->uart;
685 struct at91_uart_data *data = pdev->dev.platform_data;
686
687 port->iotype = UPIO_MEM;
688 port->flags = UPF_BOOT_AUTOCONF;
689 port->ops = &at91_pops;
690 port->fifosize = 1;
691 port->line = pdev->id;
692 port->dev = &pdev->dev;
693
694 port->mapbase = pdev->resource[0].start;
695 port->irq = pdev->resource[1].start;
696
697 if (port->mapbase == AT91_VA_BASE_SYS + AT91_DBGU) /* Part of system perpherals - already mapped */
698 port->membase = (void __iomem *) port->mapbase;
699 else {
700 port->flags |= UPF_IOREMAP;
701 port->membase = NULL;
702 }
703
704 if (!at91_port->clk) { /* for console, the clock could already be configured */
705 at91_port->clk = clk_get(&pdev->dev, "usart");
706 clk_enable(at91_port->clk);
707 port->uartclk = clk_get_rate(at91_port->clk);
708 }
709}
710
711/*
712 * Register board-specific modem-control line handlers.
713 */
714void __init at91_register_uart_fns(struct at91_port_fns *fns)
715{
716 if (fns->enable_ms)
717 at91_pops.enable_ms = fns->enable_ms;
718 if (fns->get_mctrl)
719 at91_pops.get_mctrl = fns->get_mctrl;
720 if (fns->set_mctrl)
721 at91_pops.set_mctrl = fns->set_mctrl;
722 at91_open = fns->open;
723 at91_close = fns->close;
724 at91_pops.pm = fns->pm;
725 at91_pops.set_wake = fns->set_wake;
726}
727
728
729#ifdef CONFIG_SERIAL_AT91_CONSOLE
730static void at91_console_putchar(struct uart_port *port, int ch)
731{
732 while (!(UART_GET_CSR(port) & AT91_US_TXRDY))
733 barrier();
734 UART_PUT_CHAR(port, ch);
735}
736
737/*
738 * Interrupts are disabled on entering
739 */
740static void at91_console_write(struct console *co, const char *s, u_int count)
741{
742 struct uart_port *port = &at91_ports[co->index].uart;
743 unsigned int status, imr;
744
745 /*
746 * First, save IMR and then disable interrupts
747 */
748 imr = UART_GET_IMR(port); /* get interrupt mask */
749 UART_PUT_IDR(port, AT91_US_RXRDY | AT91_US_TXRDY);
750
751 uart_console_write(port, s, count, at91_console_putchar);
752
753 /*
754 * Finally, wait for transmitter to become empty
755 * and restore IMR
756 */
757 do {
758 status = UART_GET_CSR(port);
759 } while (!(status & AT91_US_TXRDY));
760 UART_PUT_IER(port, imr); /* set interrupts back the way they were */
761}
762
763/*
764 * If the port was already initialised (eg, by a boot loader), try to determine
765 * the current setup.
766 */
767static void __init at91_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
768{
769 unsigned int mr, quot;
770
771// TODO: CR is a write-only register
772// unsigned int cr;
773//
774// cr = UART_GET_CR(port) & (AT91_US_RXEN | AT91_US_TXEN);
775// if (cr == (AT91_US_RXEN | AT91_US_TXEN)) {
776// /* ok, the port was enabled */
777// }
778
779 mr = UART_GET_MR(port) & AT91_US_CHRL;
780 if (mr == AT91_US_CHRL_8)
781 *bits = 8;
782 else
783 *bits = 7;
784
785 mr = UART_GET_MR(port) & AT91_US_PAR;
786 if (mr == AT91_US_PAR_EVEN)
787 *parity = 'e';
788 else if (mr == AT91_US_PAR_ODD)
789 *parity = 'o';
790
791 quot = UART_GET_BRGR(port);
792 *baud = port->uartclk / (16 * (quot));
793}
794
795static int __init at91_console_setup(struct console *co, char *options)
796{
797 struct uart_port *port = &at91_ports[co->index].uart;
798 int baud = 115200;
799 int bits = 8;
800 int parity = 'n';
801 int flow = 'n';
802
803 if (port->membase == 0) /* Port not initialized yet - delay setup */
804 return -ENODEV;
805
806 UART_PUT_IDR(port, -1); /* disable interrupts */
807 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
808 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
809
810 if (options)
811 uart_parse_options(options, &baud, &parity, &bits, &flow);
812 else
813 at91_console_get_options(port, &baud, &parity, &bits);
814
815 return uart_set_options(port, co, baud, parity, bits, flow);
816}
817
818static struct uart_driver at91_uart;
819
820static struct console at91_console = {
821 .name = AT91_DEVICENAME,
822 .write = at91_console_write,
823 .device = uart_console_device,
824 .setup = at91_console_setup,
825 .flags = CON_PRINTBUFFER,
826 .index = -1,
827 .data = &at91_uart,
828};
829
830#define AT91_CONSOLE_DEVICE &at91_console
831
832/*
833 * Early console initialization (before VM subsystem initialized).
834 */
835static int __init at91_console_init(void)
836{
837 if (at91_default_console_device) {
838 add_preferred_console(AT91_DEVICENAME, at91_default_console_device->id, NULL);
839 at91_init_port(&(at91_ports[at91_default_console_device->id]), at91_default_console_device);
840 register_console(&at91_console);
841 }
842
843 return 0;
844}
845console_initcall(at91_console_init);
846
847/*
848 * Late console initialization.
849 */
850static int __init at91_late_console_init(void)
851{
852 if (at91_default_console_device && !(at91_console.flags & CON_ENABLED))
853 register_console(&at91_console);
854
855 return 0;
856}
857core_initcall(at91_late_console_init);
858
859#else
860#define AT91_CONSOLE_DEVICE NULL
861#endif
862
863static struct uart_driver at91_uart = {
864 .owner = THIS_MODULE,
865 .driver_name = "at91_serial",
866 .dev_name = AT91_DEVICENAME,
867 .major = SERIAL_AT91_MAJOR,
868 .minor = MINOR_START,
869 .nr = AT91_NR_UART,
870 .cons = AT91_CONSOLE_DEVICE,
871};
872
873#ifdef CONFIG_PM
874static int at91_serial_suspend(struct platform_device *pdev, pm_message_t state)
875{
876 struct uart_port *port = platform_get_drvdata(pdev);
877 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
878
879 if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
880 enable_irq_wake(port->irq);
881 else {
882 disable_irq_wake(port->irq);
883 uart_suspend_port(&at91_uart, port);
884 at91_port->suspended = 1;
885 }
886
887 return 0;
888}
889
890static int at91_serial_resume(struct platform_device *pdev)
891{
892 struct uart_port *port = platform_get_drvdata(pdev);
893 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
894
895 if (at91_port->suspended) {
896 uart_resume_port(&at91_uart, port);
897 at91_port->suspended = 0;
898 }
899
900 return 0;
901}
902#else
903#define at91_serial_suspend NULL
904#define at91_serial_resume NULL
905#endif
906
907static int __devinit at91_serial_probe(struct platform_device *pdev)
908{
909 struct at91_uart_port *port;
910 int ret;
911
912 port = &at91_ports[pdev->id];
913 at91_init_port(port, pdev);
914
915 ret = uart_add_one_port(&at91_uart, &port->uart);
916 if (!ret) {
917 device_init_wakeup(&pdev->dev, 1);
918 platform_set_drvdata(pdev, port);
919 }
920
921 return ret;
922}
923
924static int __devexit at91_serial_remove(struct platform_device *pdev)
925{
926 struct uart_port *port = platform_get_drvdata(pdev);
927 struct at91_uart_port *at91_port = (struct at91_uart_port *) port;
928 int ret = 0;
929
930 clk_disable(at91_port->clk);
931 clk_put(at91_port->clk);
932
933 device_init_wakeup(&pdev->dev, 0);
934 platform_set_drvdata(pdev, NULL);
935
936 if (port) {
937 ret = uart_remove_one_port(&at91_uart, port);
938 kfree(port);
939 }
940
941 return ret;
942}
943
944static struct platform_driver at91_serial_driver = {
945 .probe = at91_serial_probe,
946 .remove = __devexit_p(at91_serial_remove),
947 .suspend = at91_serial_suspend,
948 .resume = at91_serial_resume,
949 .driver = {
950 .name = "at91_usart",
951 .owner = THIS_MODULE,
952 },
953};
954
955static int __init at91_serial_init(void)
956{
957 int ret;
958
959 ret = uart_register_driver(&at91_uart);
960 if (ret)
961 return ret;
962
963 ret = platform_driver_register(&at91_serial_driver);
964 if (ret)
965 uart_unregister_driver(&at91_uart);
966
967 return ret;
968}
969
970static void __exit at91_serial_exit(void)
971{
972 platform_driver_unregister(&at91_serial_driver);
973 uart_unregister_driver(&at91_uart);
974}
975
976module_init(at91_serial_init);
977module_exit(at91_serial_exit);
978
979MODULE_AUTHOR("Rick Bronson");
980MODULE_DESCRIPTION("AT91 generic serial port driver");
981MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 14:12:32 -0500