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Diffstat (limited to 'drivers/serial/at91_serial.c')
-rw-r--r--drivers/serial/at91_serial.c894
1 files changed, 894 insertions, 0 deletions
diff --git a/drivers/serial/at91_serial.c b/drivers/serial/at91_serial.c
new file mode 100644
index 000000000000..0e206063d685
--- /dev/null
+++ b/drivers/serial/at91_serial.c
@@ -0,0 +1,894 @@
1/*
2 * linux/drivers/char/at91_serial.c
3 *
4 * Driver for Atmel AT91RM9200 Serial ports
5 *
6 * Copyright (C) 2003 Rick Bronson
7 *
8 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
9 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26#include <linux/config.h>
27#include <linux/module.h>
28#include <linux/tty.h>
29#include <linux/ioport.h>
30#include <linux/slab.h>
31#include <linux/init.h>
32#include <linux/serial.h>
33#include <linux/console.h>
34#include <linux/sysrq.h>
35#include <linux/tty_flip.h>
36
37#include <asm/io.h>
38
39#include <asm/arch/at91rm9200_usart.h>
40#include <asm/mach/serial_at91rm9200.h>
41#include <asm/arch/board.h>
42#include <asm/arch/pio.h>
43
44
45#if defined(CONFIG_SERIAL_AT91_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
46#define SUPPORT_SYSRQ
47#endif
48
49#include <linux/serial_core.h>
50
51#ifdef CONFIG_SERIAL_AT91_TTYAT
52
53/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
54 * should coexist with the 8250 driver, such as if we have an external 16C550
55 * UART. */
56#define SERIAL_AT91_MAJOR 204
57#define MINOR_START 154
58#define AT91_DEVICENAME "ttyAT"
59
60#else
61
62/* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
63 * name, but it is legally reserved for the 8250 driver. */
64#define SERIAL_AT91_MAJOR TTY_MAJOR
65#define MINOR_START 64
66#define AT91_DEVICENAME "ttyS"
67
68#endif
69
70#define AT91_VA_BASE_DBGU ((unsigned long) AT91_VA_BASE_SYS + AT91_DBGU)
71#define AT91_ISR_PASS_LIMIT 256
72
73#define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR)
74#define UART_GET_MR(port) readl((port)->membase + AT91_US_MR)
75#define UART_PUT_MR(port,v) writel(v, (port)->membase + AT91_US_MR)
76#define UART_PUT_IER(port,v) writel(v, (port)->membase + AT91_US_IER)
77#define UART_PUT_IDR(port,v) writel(v, (port)->membase + AT91_US_IDR)
78#define UART_GET_IMR(port) readl((port)->membase + AT91_US_IMR)
79#define UART_GET_CSR(port) readl((port)->membase + AT91_US_CSR)
80#define UART_GET_CHAR(port) readl((port)->membase + AT91_US_RHR)
81#define UART_PUT_CHAR(port,v) writel(v, (port)->membase + AT91_US_THR)
82#define UART_GET_BRGR(port) readl((port)->membase + AT91_US_BRGR)
83#define UART_PUT_BRGR(port,v) writel(v, (port)->membase + AT91_US_BRGR)
84#define UART_PUT_RTOR(port,v) writel(v, (port)->membase + AT91_US_RTOR)
85
86// #define UART_GET_CR(port) readl((port)->membase + AT91_US_CR) // is write-only
87
88 /* PDC registers */
89#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR)
90#define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR)
91#define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR)
92#define UART_GET_RCR(port) readl((port)->membase + AT91_PDC_RCR)
93#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR)
94#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR)
95
96
97static int (*at91_open)(struct uart_port *);
98static void (*at91_close)(struct uart_port *);
99
100#ifdef SUPPORT_SYSRQ
101static struct console at91_console;
102#endif
103
104/*
105 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
106 */
107static u_int at91_tx_empty(struct uart_port *port)
108{
109 return (UART_GET_CSR(port) & AT91_US_TXEMPTY) ? TIOCSER_TEMT : 0;
110}
111
112/*
113 * Set state of the modem control output lines
114 */
115static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
116{
117 unsigned int control = 0;
118
119 /*
120 * Errata #39: RTS0 is not internally connected to PA21. We need to drive
121 * the pin manually.
122 */
123 if (port->mapbase == AT91_VA_BASE_US0) {
124 if (mctrl & TIOCM_RTS)
125 at91_sys_write(AT91_PIOA + PIO_CODR, AT91_PA21_RTS0);
126 else
127 at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0);
128 }
129
130 if (mctrl & TIOCM_RTS)
131 control |= AT91_US_RTSEN;
132 else
133 control |= AT91_US_RTSDIS;
134
135 if (mctrl & TIOCM_DTR)
136 control |= AT91_US_DTREN;
137 else
138 control |= AT91_US_DTRDIS;
139
140 UART_PUT_CR(port,control);
141}
142
143/*
144 * Get state of the modem control input lines
145 */
146static u_int at91_get_mctrl(struct uart_port *port)
147{
148 unsigned int status, ret = 0;
149
150 status = UART_GET_CSR(port);
151
152 /*
153 * The control signals are active low.
154 */
155 if (!(status & AT91_US_DCD))
156 ret |= TIOCM_CD;
157 if (!(status & AT91_US_CTS))
158 ret |= TIOCM_CTS;
159 if (!(status & AT91_US_DSR))
160 ret |= TIOCM_DSR;
161 if (!(status & AT91_US_RI))
162 ret |= TIOCM_RI;
163
164 return ret;
165}
166
167/*
168 * Stop transmitting.
169 */
170static void at91_stop_tx(struct uart_port *port)
171{
172 UART_PUT_IDR(port, AT91_US_TXRDY);
173 port->read_status_mask &= ~AT91_US_TXRDY;
174}
175
176/*
177 * Start transmitting.
178 */
179static void at91_start_tx(struct uart_port *port)
180{
181 port->read_status_mask |= AT91_US_TXRDY;
182 UART_PUT_IER(port, AT91_US_TXRDY);
183}
184
185/*
186 * Stop receiving - port is in process of being closed.
187 */
188static void at91_stop_rx(struct uart_port *port)
189{
190 UART_PUT_IDR(port, AT91_US_RXRDY);
191}
192
193/*
194 * Enable modem status interrupts
195 */
196static void at91_enable_ms(struct uart_port *port)
197{
198 port->read_status_mask |= (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC);
199 UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC);
200}
201
202/*
203 * Control the transmission of a break signal
204 */
205static void at91_break_ctl(struct uart_port *port, int break_state)
206{
207 if (break_state != 0)
208 UART_PUT_CR(port, AT91_US_STTBRK); /* start break */
209 else
210 UART_PUT_CR(port, AT91_US_STPBRK); /* stop break */
211}
212
213/*
214 * Characters received (called from interrupt handler)
215 */
216static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
217{
218 struct tty_struct *tty = port->info->tty;
219 unsigned int status, ch, flg;
220
221 status = UART_GET_CSR(port) & port->read_status_mask;
222 while (status & (AT91_US_RXRDY)) {
223 ch = UART_GET_CHAR(port);
224
225 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
226 goto ignore_char;
227 port->icount.rx++;
228
229 flg = TTY_NORMAL;
230
231 /*
232 * note that the error handling code is
233 * out of the main execution path
234 */
235 if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE))) {
236 UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */
237 if (status & (AT91_US_PARE))
238 port->icount.parity++;
239 if (status & (AT91_US_FRAME))
240 port->icount.frame++;
241 if (status & (AT91_US_OVRE))
242 port->icount.overrun++;
243
244 if (status & AT91_US_PARE)
245 flg = TTY_PARITY;
246 else if (status & AT91_US_FRAME)
247 flg = TTY_FRAME;
248 if (status & AT91_US_OVRE) {
249 /*
250 * overrun does *not* affect the character
251 * we read from the FIFO
252 */
253 tty_insert_flip_char(tty, ch, flg);
254 ch = 0;
255 flg = TTY_OVERRUN;
256 }
257#ifdef SUPPORT_SYSRQ
258 port->sysrq = 0;
259#endif
260 }
261
262 if (uart_handle_sysrq_char(port, ch, regs))
263 goto ignore_char;
264
265 tty_insert_flip_char(tty, ch, flg);
266
267 ignore_char:
268 status = UART_GET_CSR(port) & port->read_status_mask;
269 }
270
271 tty_flip_buffer_push(tty);
272}
273
274/*
275 * Transmit characters (called from interrupt handler)
276 */
277static void at91_tx_chars(struct uart_port *port)
278{
279 struct circ_buf *xmit = &port->info->xmit;
280
281 if (port->x_char) {
282 UART_PUT_CHAR(port, port->x_char);
283 port->icount.tx++;
284 port->x_char = 0;
285 return;
286 }
287 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
288 at91_stop_tx(port);
289 return;
290 }
291
292 while (UART_GET_CSR(port) & AT91_US_TXRDY) {
293 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
294 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
295 port->icount.tx++;
296 if (uart_circ_empty(xmit))
297 break;
298 }
299
300 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
301 uart_write_wakeup(port);
302
303 if (uart_circ_empty(xmit))
304 at91_stop_tx(port);
305}
306
307/*
308 * Interrupt handler
309 */
310static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs)
311{
312 struct uart_port *port = dev_id;
313 unsigned int status, pending, pass_counter = 0;
314
315 status = UART_GET_CSR(port);
316 pending = status & port->read_status_mask;
317 if (pending) {
318 do {
319 if (pending & AT91_US_RXRDY)
320 at91_rx_chars(port, regs);
321
322 /* Clear the relevent break bits */
323 if (pending & AT91_US_RXBRK) {
324 UART_PUT_CR(port, AT91_US_RSTSTA);
325 port->icount.brk++;
326 uart_handle_break(port);
327 }
328
329 // TODO: All reads to CSR will clear these interrupts!
330 if (pending & AT91_US_RIIC) port->icount.rng++;
331 if (pending & AT91_US_DSRIC) port->icount.dsr++;
332 if (pending & AT91_US_DCDIC)
333 uart_handle_dcd_change(port, !(status & AT91_US_DCD));
334 if (pending & AT91_US_CTSIC)
335 uart_handle_cts_change(port, !(status & AT91_US_CTS));
336 if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC))
337 wake_up_interruptible(&port->info->delta_msr_wait);
338
339 if (pending & AT91_US_TXRDY)
340 at91_tx_chars(port);
341 if (pass_counter++ > AT91_ISR_PASS_LIMIT)
342 break;
343
344 status = UART_GET_CSR(port);
345 pending = status & port->read_status_mask;
346 } while (pending);
347 }
348 return IRQ_HANDLED;
349}
350
351/*
352 * Perform initialization and enable port for reception
353 */
354static int at91_startup(struct uart_port *port)
355{
356 int retval;
357
358 /*
359 * Ensure that no interrupts are enabled otherwise when
360 * request_irq() is called we could get stuck trying to
361 * handle an unexpected interrupt
362 */
363 UART_PUT_IDR(port, -1);
364
365 /*
366 * Allocate the IRQ
367 */
368 retval = request_irq(port->irq, at91_interrupt, SA_SHIRQ, "at91_serial", port);
369 if (retval) {
370 printk("at91_serial: at91_startup - Can't get irq\n");
371 return retval;
372 }
373
374 /*
375 * If there is a specific "open" function (to register
376 * control line interrupts)
377 */
378 if (at91_open) {
379 retval = at91_open(port);
380 if (retval) {
381 free_irq(port->irq, port);
382 return retval;
383 }
384 }
385
386 port->read_status_mask = AT91_US_RXRDY | AT91_US_TXRDY | AT91_US_OVRE
387 | AT91_US_FRAME | AT91_US_PARE | AT91_US_RXBRK;
388 /*
389 * Finally, enable the serial port
390 */
391 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
392 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */
393 UART_PUT_IER(port, AT91_US_RXRDY); /* do receive only */
394 return 0;
395}
396
397/*
398 * Disable the port
399 */
400static void at91_shutdown(struct uart_port *port)
401{
402 /*
403 * Disable all interrupts, port and break condition.
404 */
405 UART_PUT_CR(port, AT91_US_RSTSTA);
406 UART_PUT_IDR(port, -1);
407
408 /*
409 * Free the interrupt
410 */
411 free_irq(port->irq, port);
412
413 /*
414 * If there is a specific "close" function (to unregister
415 * control line interrupts)
416 */
417 if (at91_close)
418 at91_close(port);
419}
420
421/*
422 * Power / Clock management.
423 */
424static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
425{
426 switch (state) {
427 case 0:
428 /*
429 * Enable the peripheral clock for this serial port.
430 * This is called on uart_open() or a resume event.
431 */
432 at91_sys_write(AT91_PMC_PCER, 1 << port->irq);
433 break;
434 case 3:
435 /*
436 * Disable the peripheral clock for this serial port.
437 * This is called on uart_close() or a suspend event.
438 */
439 if (port->irq != AT91_ID_SYS) /* is this a shared clock? */
440 at91_sys_write(AT91_PMC_PCDR, 1 << port->irq);
441 break;
442 default:
443 printk(KERN_ERR "at91_serial: unknown pm %d\n", state);
444 }
445}
446
447/*
448 * Change the port parameters
449 */
450static void at91_set_termios(struct uart_port *port, struct termios * termios, struct termios * old)
451{
452 unsigned long flags;
453 unsigned int mode, imr, quot, baud;
454
455 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
456 quot = uart_get_divisor(port, baud);
457
458 /* Get current mode register */
459 mode = UART_GET_MR(port) & ~(AT91_US_CHRL | AT91_US_NBSTOP | AT91_US_PAR);
460
461 /* byte size */
462 switch (termios->c_cflag & CSIZE) {
463 case CS5:
464 mode |= AT91_US_CHRL_5;
465 break;
466 case CS6:
467 mode |= AT91_US_CHRL_6;
468 break;
469 case CS7:
470 mode |= AT91_US_CHRL_7;
471 break;
472 default:
473 mode |= AT91_US_CHRL_8;
474 break;
475 }
476
477 /* stop bits */
478 if (termios->c_cflag & CSTOPB)
479 mode |= AT91_US_NBSTOP_2;
480
481 /* parity */
482 if (termios->c_cflag & PARENB) {
483 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
484 if (termios->c_cflag & PARODD)
485 mode |= AT91_US_PAR_MARK;
486 else
487 mode |= AT91_US_PAR_SPACE;
488 }
489 else if (termios->c_cflag & PARODD)
490 mode |= AT91_US_PAR_ODD;
491 else
492 mode |= AT91_US_PAR_EVEN;
493 }
494 else
495 mode |= AT91_US_PAR_NONE;
496
497 spin_lock_irqsave(&port->lock, flags);
498
499 port->read_status_mask |= AT91_US_OVRE;
500 if (termios->c_iflag & INPCK)
501 port->read_status_mask |= AT91_US_FRAME | AT91_US_PARE;
502 if (termios->c_iflag & (BRKINT | PARMRK))
503 port->read_status_mask |= AT91_US_RXBRK;
504
505 /*
506 * Characters to ignore
507 */
508 port->ignore_status_mask = 0;
509 if (termios->c_iflag & IGNPAR)
510 port->ignore_status_mask |= (AT91_US_FRAME | AT91_US_PARE);
511 if (termios->c_iflag & IGNBRK) {
512 port->ignore_status_mask |= AT91_US_RXBRK;
513 /*
514 * If we're ignoring parity and break indicators,
515 * ignore overruns too (for real raw support).
516 */
517 if (termios->c_iflag & IGNPAR)
518 port->ignore_status_mask |= AT91_US_OVRE;
519 }
520
521 // TODO: Ignore all characters if CREAD is set.
522
523 /* update the per-port timeout */
524 uart_update_timeout(port, termios->c_cflag, baud);
525
526 /* disable interrupts and drain transmitter */
527 imr = UART_GET_IMR(port); /* get interrupt mask */
528 UART_PUT_IDR(port, -1); /* disable all interrupts */
529 while (!(UART_GET_CSR(port) & AT91_US_TXEMPTY)) { barrier(); }
530
531 /* disable receiver and transmitter */
532 UART_PUT_CR(port, AT91_US_TXDIS | AT91_US_RXDIS);
533
534 /* set the parity, stop bits and data size */
535 UART_PUT_MR(port, mode);
536
537 /* set the baud rate */
538 UART_PUT_BRGR(port, quot);
539 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
540 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
541
542 /* restore interrupts */
543 UART_PUT_IER(port, imr);
544
545 /* CTS flow-control and modem-status interrupts */
546 if (UART_ENABLE_MS(port, termios->c_cflag))
547 port->ops->enable_ms(port);
548
549 spin_unlock_irqrestore(&port->lock, flags);
550}
551
552/*
553 * Return string describing the specified port
554 */
555static const char *at91_type(struct uart_port *port)
556{
557 return (port->type == PORT_AT91RM9200) ? "AT91_SERIAL" : NULL;
558}
559
560/*
561 * Release the memory region(s) being used by 'port'.
562 */
563static void at91_release_port(struct uart_port *port)
564{
565 release_mem_region(port->mapbase,
566 (port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K);
567}
568
569/*
570 * Request the memory region(s) being used by 'port'.
571 */
572static int at91_request_port(struct uart_port *port)
573{
574 return request_mem_region(port->mapbase,
575 (port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K,
576 "at91_serial") != NULL ? 0 : -EBUSY;
577
578}
579
580/*
581 * Configure/autoconfigure the port.
582 */
583static void at91_config_port(struct uart_port *port, int flags)
584{
585 if (flags & UART_CONFIG_TYPE) {
586 port->type = PORT_AT91RM9200;
587 at91_request_port(port);
588 }
589}
590
591/*
592 * Verify the new serial_struct (for TIOCSSERIAL).
593 */
594static int at91_verify_port(struct uart_port *port, struct serial_struct *ser)
595{
596 int ret = 0;
597 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91RM9200)
598 ret = -EINVAL;
599 if (port->irq != ser->irq)
600 ret = -EINVAL;
601 if (ser->io_type != SERIAL_IO_MEM)
602 ret = -EINVAL;
603 if (port->uartclk / 16 != ser->baud_base)
604 ret = -EINVAL;
605 if ((void *)port->mapbase != ser->iomem_base)
606 ret = -EINVAL;
607 if (port->iobase != ser->port)
608 ret = -EINVAL;
609 if (ser->hub6 != 0)
610 ret = -EINVAL;
611 return ret;
612}
613
614static struct uart_ops at91_pops = {
615 .tx_empty = at91_tx_empty,
616 .set_mctrl = at91_set_mctrl,
617 .get_mctrl = at91_get_mctrl,
618 .stop_tx = at91_stop_tx,
619 .start_tx = at91_start_tx,
620 .stop_rx = at91_stop_rx,
621 .enable_ms = at91_enable_ms,
622 .break_ctl = at91_break_ctl,
623 .startup = at91_startup,
624 .shutdown = at91_shutdown,
625 .set_termios = at91_set_termios,
626 .type = at91_type,
627 .release_port = at91_release_port,
628 .request_port = at91_request_port,
629 .config_port = at91_config_port,
630 .verify_port = at91_verify_port,
631 .pm = at91_serial_pm,
632};
633
634static struct uart_port at91_ports[AT91_NR_UART];
635
636void __init at91_init_ports(void)
637{
638 static int first = 1;
639 int i;
640
641 if (!first)
642 return;
643 first = 0;
644
645 for (i = 0; i < AT91_NR_UART; i++) {
646 at91_ports[i].iotype = UPIO_MEM;
647 at91_ports[i].flags = UPF_BOOT_AUTOCONF;
648 at91_ports[i].uartclk = at91_master_clock;
649 at91_ports[i].ops = &at91_pops;
650 at91_ports[i].fifosize = 1;
651 at91_ports[i].line = i;
652 }
653}
654
655void __init at91_register_uart_fns(struct at91rm9200_port_fns *fns)
656{
657 if (fns->enable_ms)
658 at91_pops.enable_ms = fns->enable_ms;
659 if (fns->get_mctrl)
660 at91_pops.get_mctrl = fns->get_mctrl;
661 if (fns->set_mctrl)
662 at91_pops.set_mctrl = fns->set_mctrl;
663 at91_open = fns->open;
664 at91_close = fns->close;
665 at91_pops.pm = fns->pm;
666 at91_pops.set_wake = fns->set_wake;
667}
668
669/*
670 * Setup ports.
671 */
672void __init at91_register_uart(int idx, int port)
673{
674 if ((idx < 0) || (idx >= AT91_NR_UART)) {
675 printk(KERN_ERR "%s: bad index number %d\n", __FUNCTION__, idx);
676 return;
677 }
678
679 switch (port) {
680 case 0:
681 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US0;
682 at91_ports[idx].mapbase = AT91_VA_BASE_US0;
683 at91_ports[idx].irq = AT91_ID_US0;
684 AT91_CfgPIO_USART0();
685 break;
686 case 1:
687 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US1;
688 at91_ports[idx].mapbase = AT91_VA_BASE_US1;
689 at91_ports[idx].irq = AT91_ID_US1;
690 AT91_CfgPIO_USART1();
691 break;
692 case 2:
693 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US2;
694 at91_ports[idx].mapbase = AT91_VA_BASE_US2;
695 at91_ports[idx].irq = AT91_ID_US2;
696 AT91_CfgPIO_USART2();
697 break;
698 case 3:
699 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US3;
700 at91_ports[idx].mapbase = AT91_VA_BASE_US3;
701 at91_ports[idx].irq = AT91_ID_US3;
702 AT91_CfgPIO_USART3();
703 break;
704 case 4:
705 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_DBGU;
706 at91_ports[idx].mapbase = AT91_VA_BASE_DBGU;
707 at91_ports[idx].irq = AT91_ID_SYS;
708 AT91_CfgPIO_DBGU();
709 break;
710 default:
711 printk(KERN_ERR "%s : bad port number %d\n", __FUNCTION__, port);
712 }
713}
714
715#ifdef CONFIG_SERIAL_AT91_CONSOLE
716
717/*
718 * Interrupts are disabled on entering
719 */
720static void at91_console_write(struct console *co, const char *s, u_int count)
721{
722 struct uart_port *port = at91_ports + co->index;
723 unsigned int status, i, imr;
724
725 /*
726 * First, save IMR and then disable interrupts
727 */
728 imr = UART_GET_IMR(port); /* get interrupt mask */
729 UART_PUT_IDR(port, AT91_US_RXRDY | AT91_US_TXRDY);
730
731 /*
732 * Now, do each character
733 */
734 for (i = 0; i < count; i++) {
735 do {
736 status = UART_GET_CSR(port);
737 } while (!(status & AT91_US_TXRDY));
738 UART_PUT_CHAR(port, s[i]);
739 if (s[i] == '\n') {
740 do {
741 status = UART_GET_CSR(port);
742 } while (!(status & AT91_US_TXRDY));
743 UART_PUT_CHAR(port, '\r');
744 }
745 }
746
747 /*
748 * Finally, wait for transmitter to become empty
749 * and restore IMR
750 */
751 do {
752 status = UART_GET_CSR(port);
753 } while (!(status & AT91_US_TXRDY));
754 UART_PUT_IER(port, imr); /* set interrupts back the way they were */
755}
756
757/*
758 * If the port was already initialised (eg, by a boot loader), try to determine
759 * the current setup.
760 */
761static void __init at91_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
762{
763 unsigned int mr, quot;
764
765// TODO: CR is a write-only register
766// unsigned int cr;
767//
768// cr = UART_GET_CR(port) & (AT91_US_RXEN | AT91_US_TXEN);
769// if (cr == (AT91_US_RXEN | AT91_US_TXEN)) {
770// /* ok, the port was enabled */
771// }
772
773 mr = UART_GET_MR(port) & AT91_US_CHRL;
774 if (mr == AT91_US_CHRL_8)
775 *bits = 8;
776 else
777 *bits = 7;
778
779 mr = UART_GET_MR(port) & AT91_US_PAR;
780 if (mr == AT91_US_PAR_EVEN)
781 *parity = 'e';
782 else if (mr == AT91_US_PAR_ODD)
783 *parity = 'o';
784
785 quot = UART_GET_BRGR(port);
786 *baud = port->uartclk / (16 * (quot));
787}
788
789static int __init at91_console_setup(struct console *co, char *options)
790{
791 struct uart_port *port;
792 int baud = 115200;
793 int bits = 8;
794 int parity = 'n';
795 int flow = 'n';
796
797 /*
798 * Check whether an invalid uart number has been specified, and
799 * if so, search for the first available port that does have
800 * console support.
801 */
802 port = uart_get_console(at91_ports, AT91_NR_UART, co);
803
804 /*
805 * Enable the serial console, in-case bootloader did not do it.
806 */
807 at91_sys_write(AT91_PMC_PCER, 1 << port->irq); /* enable clock */
808 UART_PUT_IDR(port, -1); /* disable interrupts */
809 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
810 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
811
812 if (options)
813 uart_parse_options(options, &baud, &parity, &bits, &flow);
814 else
815 at91_console_get_options(port, &baud, &parity, &bits);
816
817 return uart_set_options(port, co, baud, parity, bits, flow);
818}
819
820static struct uart_driver at91_uart;
821
822static struct console at91_console = {
823 .name = AT91_DEVICENAME,
824 .write = at91_console_write,
825 .device = uart_console_device,
826 .setup = at91_console_setup,
827 .flags = CON_PRINTBUFFER,
828 .index = -1,
829 .data = &at91_uart,
830};
831
832#define AT91_CONSOLE_DEVICE &at91_console
833
834static int __init at91_console_init(void)
835{
836 at91_init_ports();
837
838 at91_console.index = at91_console_port;
839 register_console(&at91_console);
840 return 0;
841}
842console_initcall(at91_console_init);
843
844#else
845#define AT91_CONSOLE_DEVICE NULL
846#endif
847
848static struct uart_driver at91_uart = {
849 .owner = THIS_MODULE,
850 .driver_name = AT91_DEVICENAME,
851 .dev_name = AT91_DEVICENAME,
852 .devfs_name = AT91_DEVICENAME,
853 .major = SERIAL_AT91_MAJOR,
854 .minor = MINOR_START,
855 .nr = AT91_NR_UART,
856 .cons = AT91_CONSOLE_DEVICE,
857};
858
859static int __init at91_serial_init(void)
860{
861 int ret, i;
862
863 at91_init_ports();
864
865 ret = uart_register_driver(&at91_uart);
866 if (ret)
867 return ret;
868
869 for (i = 0; i < AT91_NR_UART; i++) {
870 if (at91_serial_map[i] >= 0)
871 uart_add_one_port(&at91_uart, &at91_ports[i]);
872 }
873
874 return 0;
875}
876
877static void __exit at91_serial_exit(void)
878{
879 int i;
880
881 for (i = 0; i < AT91_NR_UART; i++) {
882 if (at91_serial_map[i] >= 0)
883 uart_remove_one_port(&at91_uart, &at91_ports[i]);
884 }
885
886 uart_unregister_driver(&at91_uart);
887}
888
889module_init(at91_serial_init);
890module_exit(at91_serial_exit);
891
892MODULE_AUTHOR("Rick Bronson");
893MODULE_DESCRIPTION("AT91 generic serial port driver");
894MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-02 18:49:18 -0500