diff options
Diffstat (limited to 'drivers/serial/amba-pl011.c')
-rw-r--r-- | drivers/serial/amba-pl011.c | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index 1ff629c74750..89d7bd3eaee3 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c | |||
@@ -49,7 +49,7 @@ | |||
49 | #include <linux/serial.h> | 49 | #include <linux/serial.h> |
50 | 50 | ||
51 | #include <asm/io.h> | 51 | #include <asm/io.h> |
52 | #include <asm/irq.h> | 52 | #include <asm/sizes.h> |
53 | #include <asm/hardware/amba.h> | 53 | #include <asm/hardware/amba.h> |
54 | #include <asm/hardware/clock.h> | 54 | #include <asm/hardware/clock.h> |
55 | #include <asm/hardware/amba_serial.h> | 55 | #include <asm/hardware/amba_serial.h> |
@@ -62,7 +62,8 @@ | |||
62 | 62 | ||
63 | #define AMBA_ISR_PASS_LIMIT 256 | 63 | #define AMBA_ISR_PASS_LIMIT 256 |
64 | 64 | ||
65 | #define UART_DUMMY_RSR_RX 256 | 65 | #define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE) |
66 | #define UART_DUMMY_DR_RX (1 << 16) | ||
66 | 67 | ||
67 | /* | 68 | /* |
68 | * We wrap our port structure around the generic uart_port. | 69 | * We wrap our port structure around the generic uart_port. |
@@ -115,7 +116,7 @@ pl011_rx_chars(struct uart_amba_port *uap) | |||
115 | #endif | 116 | #endif |
116 | { | 117 | { |
117 | struct tty_struct *tty = uap->port.info->tty; | 118 | struct tty_struct *tty = uap->port.info->tty; |
118 | unsigned int status, ch, flag, rsr, max_count = 256; | 119 | unsigned int status, ch, flag, max_count = 256; |
119 | 120 | ||
120 | status = readw(uap->port.membase + UART01x_FR); | 121 | status = readw(uap->port.membase + UART01x_FR); |
121 | while ((status & UART01x_FR_RXFE) == 0 && max_count--) { | 122 | while ((status & UART01x_FR_RXFE) == 0 && max_count--) { |
@@ -128,7 +129,7 @@ pl011_rx_chars(struct uart_amba_port *uap) | |||
128 | */ | 129 | */ |
129 | } | 130 | } |
130 | 131 | ||
131 | ch = readw(uap->port.membase + UART01x_DR); | 132 | ch = readw(uap->port.membase + UART01x_DR) | UART_DUMMY_DR_RX; |
132 | flag = TTY_NORMAL; | 133 | flag = TTY_NORMAL; |
133 | uap->port.icount.rx++; | 134 | uap->port.icount.rx++; |
134 | 135 | ||
@@ -136,34 +137,33 @@ pl011_rx_chars(struct uart_amba_port *uap) | |||
136 | * Note that the error handling code is | 137 | * Note that the error handling code is |
137 | * out of the main execution path | 138 | * out of the main execution path |
138 | */ | 139 | */ |
139 | rsr = readw(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX; | 140 | if (unlikely(ch & UART_DR_ERROR)) { |
140 | if (unlikely(rsr & UART01x_RSR_ANY)) { | 141 | if (ch & UART011_DR_BE) { |
141 | if (rsr & UART01x_RSR_BE) { | 142 | ch &= ~(UART011_DR_FE | UART011_DR_PE); |
142 | rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); | ||
143 | uap->port.icount.brk++; | 143 | uap->port.icount.brk++; |
144 | if (uart_handle_break(&uap->port)) | 144 | if (uart_handle_break(&uap->port)) |
145 | goto ignore_char; | 145 | goto ignore_char; |
146 | } else if (rsr & UART01x_RSR_PE) | 146 | } else if (ch & UART011_DR_PE) |
147 | uap->port.icount.parity++; | 147 | uap->port.icount.parity++; |
148 | else if (rsr & UART01x_RSR_FE) | 148 | else if (ch & UART011_DR_FE) |
149 | uap->port.icount.frame++; | 149 | uap->port.icount.frame++; |
150 | if (rsr & UART01x_RSR_OE) | 150 | if (ch & UART011_DR_OE) |
151 | uap->port.icount.overrun++; | 151 | uap->port.icount.overrun++; |
152 | 152 | ||
153 | rsr &= uap->port.read_status_mask; | 153 | ch &= uap->port.read_status_mask; |
154 | 154 | ||
155 | if (rsr & UART01x_RSR_BE) | 155 | if (ch & UART011_DR_BE) |
156 | flag = TTY_BREAK; | 156 | flag = TTY_BREAK; |
157 | else if (rsr & UART01x_RSR_PE) | 157 | else if (ch & UART011_DR_PE) |
158 | flag = TTY_PARITY; | 158 | flag = TTY_PARITY; |
159 | else if (rsr & UART01x_RSR_FE) | 159 | else if (ch & UART011_DR_FE) |
160 | flag = TTY_FRAME; | 160 | flag = TTY_FRAME; |
161 | } | 161 | } |
162 | 162 | ||
163 | if (uart_handle_sysrq_char(&uap->port, ch, regs)) | 163 | if (uart_handle_sysrq_char(&uap->port, ch, regs)) |
164 | goto ignore_char; | 164 | goto ignore_char; |
165 | 165 | ||
166 | uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag); | 166 | uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag); |
167 | 167 | ||
168 | ignore_char: | 168 | ignore_char: |
169 | status = readw(uap->port.membase + UART01x_FR); | 169 | status = readw(uap->port.membase + UART01x_FR); |
@@ -475,33 +475,33 @@ pl011_set_termios(struct uart_port *port, struct termios *termios, | |||
475 | */ | 475 | */ |
476 | uart_update_timeout(port, termios->c_cflag, baud); | 476 | uart_update_timeout(port, termios->c_cflag, baud); |
477 | 477 | ||
478 | port->read_status_mask = UART01x_RSR_OE; | 478 | port->read_status_mask = UART011_DR_OE | 255; |
479 | if (termios->c_iflag & INPCK) | 479 | if (termios->c_iflag & INPCK) |
480 | port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; | 480 | port->read_status_mask |= UART011_DR_FE | UART011_DR_PE; |
481 | if (termios->c_iflag & (BRKINT | PARMRK)) | 481 | if (termios->c_iflag & (BRKINT | PARMRK)) |
482 | port->read_status_mask |= UART01x_RSR_BE; | 482 | port->read_status_mask |= UART011_DR_BE; |
483 | 483 | ||
484 | /* | 484 | /* |
485 | * Characters to ignore | 485 | * Characters to ignore |
486 | */ | 486 | */ |
487 | port->ignore_status_mask = 0; | 487 | port->ignore_status_mask = 0; |
488 | if (termios->c_iflag & IGNPAR) | 488 | if (termios->c_iflag & IGNPAR) |
489 | port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; | 489 | port->ignore_status_mask |= UART011_DR_FE | UART011_DR_PE; |
490 | if (termios->c_iflag & IGNBRK) { | 490 | if (termios->c_iflag & IGNBRK) { |
491 | port->ignore_status_mask |= UART01x_RSR_BE; | 491 | port->ignore_status_mask |= UART011_DR_BE; |
492 | /* | 492 | /* |
493 | * If we're ignoring parity and break indicators, | 493 | * If we're ignoring parity and break indicators, |
494 | * ignore overruns too (for real raw support). | 494 | * ignore overruns too (for real raw support). |
495 | */ | 495 | */ |
496 | if (termios->c_iflag & IGNPAR) | 496 | if (termios->c_iflag & IGNPAR) |
497 | port->ignore_status_mask |= UART01x_RSR_OE; | 497 | port->ignore_status_mask |= UART011_DR_OE; |
498 | } | 498 | } |
499 | 499 | ||
500 | /* | 500 | /* |
501 | * Ignore all characters if CREAD is not set. | 501 | * Ignore all characters if CREAD is not set. |
502 | */ | 502 | */ |
503 | if ((termios->c_cflag & CREAD) == 0) | 503 | if ((termios->c_cflag & CREAD) == 0) |
504 | port->ignore_status_mask |= UART_DUMMY_RSR_RX; | 504 | port->ignore_status_mask |= UART_DUMMY_DR_RX; |
505 | 505 | ||
506 | if (UART_ENABLE_MS(port, termios->c_cflag)) | 506 | if (UART_ENABLE_MS(port, termios->c_cflag)) |
507 | pl011_enable_ms(port); | 507 | pl011_enable_ms(port); |