diff options
Diffstat (limited to 'drivers/serial/68360serial.c')
-rw-r--r-- | drivers/serial/68360serial.c | 3027 |
1 files changed, 3027 insertions, 0 deletions
diff --git a/drivers/serial/68360serial.c b/drivers/serial/68360serial.c new file mode 100644 index 000000000000..f148022b6b4e --- /dev/null +++ b/drivers/serial/68360serial.c | |||
@@ -0,0 +1,3027 @@ | |||
1 | /* | ||
2 | * UART driver for 68360 CPM SCC or SMC | ||
3 | * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>, | ||
4 | * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca> | ||
5 | * Copyright (c) 1997 Dan Malek <dmalek@jlc.net> | ||
6 | * | ||
7 | * I used the serial.c driver as the framework for this driver. | ||
8 | * Give credit to those guys. | ||
9 | * The original code was written for the MBX860 board. I tried to make | ||
10 | * it generic, but there may be some assumptions in the structures that | ||
11 | * have to be fixed later. | ||
12 | * To save porting time, I did not bother to change any object names | ||
13 | * that are not accessed outside of this file. | ||
14 | * It still needs lots of work........When it was easy, I included code | ||
15 | * to support the SCCs, but this has never been tested, nor is it complete. | ||
16 | * Only the SCCs support modem control, so that is not complete either. | ||
17 | * | ||
18 | * This module exports the following rs232 io functions: | ||
19 | * | ||
20 | * int rs_360_init(void); | ||
21 | */ | ||
22 | |||
23 | #include <linux/config.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/errno.h> | ||
26 | #include <linux/signal.h> | ||
27 | #include <linux/sched.h> | ||
28 | #include <linux/timer.h> | ||
29 | #include <linux/interrupt.h> | ||
30 | #include <linux/tty.h> | ||
31 | #include <linux/tty_flip.h> | ||
32 | #include <linux/serial.h> | ||
33 | #include <linux/serialP.h> | ||
34 | #include <linux/major.h> | ||
35 | #include <linux/string.h> | ||
36 | #include <linux/fcntl.h> | ||
37 | #include <linux/ptrace.h> | ||
38 | #include <linux/mm.h> | ||
39 | #include <linux/init.h> | ||
40 | #include <linux/delay.h> | ||
41 | #include <asm/irq.h> | ||
42 | #include <asm/m68360.h> | ||
43 | #include <asm/commproc.h> | ||
44 | |||
45 | |||
46 | #ifdef CONFIG_KGDB | ||
47 | extern void breakpoint(void); | ||
48 | extern void set_debug_traps(void); | ||
49 | extern int kgdb_output_string (const char* s, unsigned int count); | ||
50 | #endif | ||
51 | |||
52 | |||
53 | /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */ | ||
54 | #include <linux/console.h> | ||
55 | |||
56 | /* this defines the index into rs_table for the port to use | ||
57 | */ | ||
58 | #ifndef CONFIG_SERIAL_CONSOLE_PORT | ||
59 | #define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */ | ||
60 | #endif | ||
61 | /* #endif */ | ||
62 | |||
63 | #if 0 | ||
64 | /* SCC2 for console | ||
65 | */ | ||
66 | #undef CONFIG_SERIAL_CONSOLE_PORT | ||
67 | #define CONFIG_SERIAL_CONSOLE_PORT 2 | ||
68 | #endif | ||
69 | |||
70 | |||
71 | #define TX_WAKEUP ASYNC_SHARE_IRQ | ||
72 | |||
73 | static char *serial_name = "CPM UART driver"; | ||
74 | static char *serial_version = "0.03"; | ||
75 | |||
76 | static struct tty_driver *serial_driver; | ||
77 | int serial_console_setup(struct console *co, char *options); | ||
78 | |||
79 | /* | ||
80 | * Serial driver configuration section. Here are the various options: | ||
81 | */ | ||
82 | #define SERIAL_PARANOIA_CHECK | ||
83 | #define CONFIG_SERIAL_NOPAUSE_IO | ||
84 | #define SERIAL_DO_RESTART | ||
85 | |||
86 | /* Set of debugging defines */ | ||
87 | |||
88 | #undef SERIAL_DEBUG_INTR | ||
89 | #undef SERIAL_DEBUG_OPEN | ||
90 | #undef SERIAL_DEBUG_FLOW | ||
91 | #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | ||
92 | |||
93 | #define _INLINE_ inline | ||
94 | |||
95 | #define DBG_CNT(s) | ||
96 | |||
97 | /* We overload some of the items in the data structure to meet our | ||
98 | * needs. For example, the port address is the CPM parameter ram | ||
99 | * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and | ||
100 | * 2 SMCs. The "hub6" field is used to indicate the channel number, with | ||
101 | * a flag indicating SCC or SMC, and the number is used as an index into | ||
102 | * the CPM parameter area for this device. | ||
103 | * The "type" field is currently set to 0, for PORT_UNKNOWN. It is | ||
104 | * not currently used. I should probably use it to indicate the port | ||
105 | * type of SMC or SCC. | ||
106 | * The SMCs do not support any modem control signals. | ||
107 | */ | ||
108 | #define smc_scc_num hub6 | ||
109 | #define NUM_IS_SCC ((int)0x00010000) | ||
110 | #define PORT_NUM(P) ((P) & 0x0000ffff) | ||
111 | |||
112 | |||
113 | #if defined (CONFIG_UCQUICC) | ||
114 | |||
115 | volatile extern void *_periph_base; | ||
116 | /* sipex transceiver | ||
117 | * mode bits for are on pins | ||
118 | * | ||
119 | * SCC2 d16..19 | ||
120 | * SCC3 d20..23 | ||
121 | * SCC4 d24..27 | ||
122 | */ | ||
123 | #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1))) | ||
124 | |||
125 | static uint sipex_mode_bits = 0x00000000; | ||
126 | |||
127 | #endif | ||
128 | |||
129 | /* There is no `serial_state' defined back here in 2.0. | ||
130 | * Try to get by with serial_struct | ||
131 | */ | ||
132 | /* #define serial_state serial_struct */ | ||
133 | |||
134 | /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few | ||
135 | * extras: */ | ||
136 | |||
137 | #if 0 | ||
138 | struct async_icount_24 { | ||
139 | __u32 cts, dsr, rng, dcd, tx, rx; | ||
140 | __u32 frame, parity, overrun, brk; | ||
141 | __u32 buf_overrun; | ||
142 | } icount; | ||
143 | #endif | ||
144 | |||
145 | #if 0 | ||
146 | |||
147 | struct serial_state { | ||
148 | int magic; | ||
149 | int baud_base; | ||
150 | unsigned long port; | ||
151 | int irq; | ||
152 | int flags; | ||
153 | int hub6; | ||
154 | int type; | ||
155 | int line; | ||
156 | int revision; /* Chip revision (950) */ | ||
157 | int xmit_fifo_size; | ||
158 | int custom_divisor; | ||
159 | int count; | ||
160 | u8 *iomem_base; | ||
161 | u16 iomem_reg_shift; | ||
162 | unsigned short close_delay; | ||
163 | unsigned short closing_wait; /* time to wait before closing */ | ||
164 | struct async_icount_24 icount; | ||
165 | int io_type; | ||
166 | struct async_struct *info; | ||
167 | }; | ||
168 | #endif | ||
169 | |||
170 | #define SSTATE_MAGIC 0x5302 | ||
171 | |||
172 | |||
173 | |||
174 | /* SMC2 is sometimes used for low performance TDM interfaces. Define | ||
175 | * this as 1 if you want SMC2 as a serial port UART managed by this driver. | ||
176 | * Define this as 0 if you wish to use SMC2 for something else. | ||
177 | */ | ||
178 | #define USE_SMC2 1 | ||
179 | |||
180 | #if 0 | ||
181 | /* Define SCC to ttySx mapping. */ | ||
182 | #define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */ | ||
183 | |||
184 | /* Define which SCC is the first one to use for a serial port. These | ||
185 | * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used | ||
186 | * for Ethernet, and the first available SCC for serial UART is SCC2. | ||
187 | * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and | ||
188 | * interrupt vectors in the table below to match. | ||
189 | */ | ||
190 | #define SCC_IDX_BASE 1 /* table index */ | ||
191 | #endif | ||
192 | |||
193 | |||
194 | /* Processors other than the 860 only get SMCs configured by default. | ||
195 | * Either they don't have SCCs or they are allocated somewhere else. | ||
196 | * Of course, there are now 860s without some SCCs, so we will need to | ||
197 | * address that someday. | ||
198 | * The Embedded Planet Multimedia I/O cards use TDM interfaces to the | ||
199 | * stereo codec parts, and we use SMC2 to help support that. | ||
200 | */ | ||
201 | static struct serial_state rs_table[] = { | ||
202 | /* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */ | ||
203 | { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */ | ||
204 | #if USE_SMC2 | ||
205 | ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */ | ||
206 | #endif | ||
207 | |||
208 | #if defined(CONFIG_SERIAL_68360_SCC) | ||
209 | ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */ | ||
210 | ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */ | ||
211 | ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */ | ||
212 | #endif | ||
213 | }; | ||
214 | |||
215 | #define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state)) | ||
216 | |||
217 | /* The number of buffer descriptors and their sizes. | ||
218 | */ | ||
219 | #define RX_NUM_FIFO 4 | ||
220 | #define RX_BUF_SIZE 32 | ||
221 | #define TX_NUM_FIFO 4 | ||
222 | #define TX_BUF_SIZE 32 | ||
223 | |||
224 | #define CONSOLE_NUM_FIFO 2 | ||
225 | #define CONSOLE_BUF_SIZE 4 | ||
226 | |||
227 | char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE]; | ||
228 | |||
229 | /* The async_struct in serial.h does not really give us what we | ||
230 | * need, so define our own here. | ||
231 | */ | ||
232 | typedef struct serial_info { | ||
233 | int magic; | ||
234 | int flags; | ||
235 | |||
236 | struct serial_state *state; | ||
237 | /* struct serial_struct *state; */ | ||
238 | /* struct async_struct *state; */ | ||
239 | |||
240 | struct tty_struct *tty; | ||
241 | int read_status_mask; | ||
242 | int ignore_status_mask; | ||
243 | int timeout; | ||
244 | int line; | ||
245 | int x_char; /* xon/xoff character */ | ||
246 | int close_delay; | ||
247 | unsigned short closing_wait; | ||
248 | unsigned short closing_wait2; | ||
249 | unsigned long event; | ||
250 | unsigned long last_active; | ||
251 | int blocked_open; /* # of blocked opens */ | ||
252 | struct work_struct tqueue; | ||
253 | struct work_struct tqueue_hangup; | ||
254 | wait_queue_head_t open_wait; | ||
255 | wait_queue_head_t close_wait; | ||
256 | |||
257 | |||
258 | /* CPM Buffer Descriptor pointers. | ||
259 | */ | ||
260 | QUICC_BD *rx_bd_base; | ||
261 | QUICC_BD *rx_cur; | ||
262 | QUICC_BD *tx_bd_base; | ||
263 | QUICC_BD *tx_cur; | ||
264 | } ser_info_t; | ||
265 | |||
266 | |||
267 | /* since kmalloc_init() does not get called until much after this initialization: */ | ||
268 | static ser_info_t quicc_ser_info[NR_PORTS]; | ||
269 | static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE]; | ||
270 | static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE]; | ||
271 | |||
272 | static void change_speed(ser_info_t *info); | ||
273 | static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout); | ||
274 | |||
275 | static inline int serial_paranoia_check(ser_info_t *info, | ||
276 | char *name, const char *routine) | ||
277 | { | ||
278 | #ifdef SERIAL_PARANOIA_CHECK | ||
279 | static const char *badmagic = | ||
280 | "Warning: bad magic number for serial struct (%s) in %s\n"; | ||
281 | static const char *badinfo = | ||
282 | "Warning: null async_struct for (%s) in %s\n"; | ||
283 | |||
284 | if (!info) { | ||
285 | printk(badinfo, name, routine); | ||
286 | return 1; | ||
287 | } | ||
288 | if (info->magic != SERIAL_MAGIC) { | ||
289 | printk(badmagic, name, routine); | ||
290 | return 1; | ||
291 | } | ||
292 | #endif | ||
293 | return 0; | ||
294 | } | ||
295 | |||
296 | /* | ||
297 | * This is used to figure out the divisor speeds and the timeouts, | ||
298 | * indexed by the termio value. The generic CPM functions are responsible | ||
299 | * for setting and assigning baud rate generators for us. | ||
300 | */ | ||
301 | static int baud_table[] = { | ||
302 | 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, | ||
303 | 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 }; | ||
304 | |||
305 | /* This sucks. There is a better way: */ | ||
306 | #if defined(CONFIG_CONSOLE_9600) | ||
307 | #define CONSOLE_BAUDRATE 9600 | ||
308 | #elif defined(CONFIG_CONSOLE_19200) | ||
309 | #define CONSOLE_BAUDRATE 19200 | ||
310 | #elif defined(CONFIG_CONSOLE_115200) | ||
311 | #define CONSOLE_BAUDRATE 115200 | ||
312 | #else | ||
313 | #warning "console baud rate undefined" | ||
314 | #define CONSOLE_BAUDRATE 9600 | ||
315 | #endif | ||
316 | |||
317 | /* | ||
318 | * ------------------------------------------------------------ | ||
319 | * rs_stop() and rs_start() | ||
320 | * | ||
321 | * This routines are called before setting or resetting tty->stopped. | ||
322 | * They enable or disable transmitter interrupts, as necessary. | ||
323 | * ------------------------------------------------------------ | ||
324 | */ | ||
325 | static void rs_360_stop(struct tty_struct *tty) | ||
326 | { | ||
327 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
328 | int idx; | ||
329 | unsigned long flags; | ||
330 | volatile struct scc_regs *sccp; | ||
331 | volatile struct smc_regs *smcp; | ||
332 | |||
333 | if (serial_paranoia_check(info, tty->name, "rs_stop")) | ||
334 | return; | ||
335 | |||
336 | local_irq_save(flags); | ||
337 | idx = PORT_NUM(info->state->smc_scc_num); | ||
338 | if (info->state->smc_scc_num & NUM_IS_SCC) { | ||
339 | sccp = &pquicc->scc_regs[idx]; | ||
340 | sccp->scc_sccm &= ~UART_SCCM_TX; | ||
341 | } else { | ||
342 | /* smcp = &cpmp->cp_smc[idx]; */ | ||
343 | smcp = &pquicc->smc_regs[idx]; | ||
344 | smcp->smc_smcm &= ~SMCM_TX; | ||
345 | } | ||
346 | local_irq_restore(flags); | ||
347 | } | ||
348 | |||
349 | |||
350 | static void rs_360_start(struct tty_struct *tty) | ||
351 | { | ||
352 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
353 | int idx; | ||
354 | unsigned long flags; | ||
355 | volatile struct scc_regs *sccp; | ||
356 | volatile struct smc_regs *smcp; | ||
357 | |||
358 | if (serial_paranoia_check(info, tty->name, "rs_stop")) | ||
359 | return; | ||
360 | |||
361 | local_irq_save(flags); | ||
362 | idx = PORT_NUM(info->state->smc_scc_num); | ||
363 | if (info->state->smc_scc_num & NUM_IS_SCC) { | ||
364 | sccp = &pquicc->scc_regs[idx]; | ||
365 | sccp->scc_sccm |= UART_SCCM_TX; | ||
366 | } else { | ||
367 | smcp = &pquicc->smc_regs[idx]; | ||
368 | smcp->smc_smcm |= SMCM_TX; | ||
369 | } | ||
370 | local_irq_restore(flags); | ||
371 | } | ||
372 | |||
373 | /* | ||
374 | * ---------------------------------------------------------------------- | ||
375 | * | ||
376 | * Here starts the interrupt handling routines. All of the following | ||
377 | * subroutines are declared as inline and are folded into | ||
378 | * rs_interrupt(). They were separated out for readability's sake. | ||
379 | * | ||
380 | * Note: rs_interrupt() is a "fast" interrupt, which means that it | ||
381 | * runs with interrupts turned off. People who may want to modify | ||
382 | * rs_interrupt() should try to keep the interrupt handler as fast as | ||
383 | * possible. After you are done making modifications, it is not a bad | ||
384 | * idea to do: | ||
385 | * | ||
386 | * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c | ||
387 | * | ||
388 | * and look at the resulting assemble code in serial.s. | ||
389 | * | ||
390 | * - Ted Ts'o (tytso@mit.edu), 7-Mar-93 | ||
391 | * ----------------------------------------------------------------------- | ||
392 | */ | ||
393 | |||
394 | static _INLINE_ void receive_chars(ser_info_t *info) | ||
395 | { | ||
396 | struct tty_struct *tty = info->tty; | ||
397 | unsigned char ch, *cp; | ||
398 | /*int ignored = 0;*/ | ||
399 | int i; | ||
400 | ushort status; | ||
401 | struct async_icount *icount; | ||
402 | /* struct async_icount_24 *icount; */ | ||
403 | volatile QUICC_BD *bdp; | ||
404 | |||
405 | icount = &info->state->icount; | ||
406 | |||
407 | /* Just loop through the closed BDs and copy the characters into | ||
408 | * the buffer. | ||
409 | */ | ||
410 | bdp = info->rx_cur; | ||
411 | for (;;) { | ||
412 | if (bdp->status & BD_SC_EMPTY) /* If this one is empty */ | ||
413 | break; /* we are all done */ | ||
414 | |||
415 | /* The read status mask tell us what we should do with | ||
416 | * incoming characters, especially if errors occur. | ||
417 | * One special case is the use of BD_SC_EMPTY. If | ||
418 | * this is not set, we are supposed to be ignoring | ||
419 | * inputs. In this case, just mark the buffer empty and | ||
420 | * continue. | ||
421 | */ | ||
422 | if (!(info->read_status_mask & BD_SC_EMPTY)) { | ||
423 | bdp->status |= BD_SC_EMPTY; | ||
424 | bdp->status &= | ||
425 | ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV); | ||
426 | |||
427 | if (bdp->status & BD_SC_WRAP) | ||
428 | bdp = info->rx_bd_base; | ||
429 | else | ||
430 | bdp++; | ||
431 | continue; | ||
432 | } | ||
433 | |||
434 | /* Get the number of characters and the buffer pointer. | ||
435 | */ | ||
436 | i = bdp->length; | ||
437 | /* cp = (unsigned char *)__va(bdp->buf); */ | ||
438 | cp = (char *)bdp->buf; | ||
439 | status = bdp->status; | ||
440 | |||
441 | /* Check to see if there is room in the tty buffer for | ||
442 | * the characters in our BD buffer. If not, we exit | ||
443 | * now, leaving the BD with the characters. We'll pick | ||
444 | * them up again on the next receive interrupt (which could | ||
445 | * be a timeout). | ||
446 | */ | ||
447 | if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) | ||
448 | break; | ||
449 | |||
450 | while (i-- > 0) { | ||
451 | ch = *cp++; | ||
452 | *tty->flip.char_buf_ptr = ch; | ||
453 | icount->rx++; | ||
454 | |||
455 | #ifdef SERIAL_DEBUG_INTR | ||
456 | printk("DR%02x:%02x...", ch, status); | ||
457 | #endif | ||
458 | *tty->flip.flag_buf_ptr = 0; | ||
459 | if (status & (BD_SC_BR | BD_SC_FR | | ||
460 | BD_SC_PR | BD_SC_OV)) { | ||
461 | /* | ||
462 | * For statistics only | ||
463 | */ | ||
464 | if (status & BD_SC_BR) | ||
465 | icount->brk++; | ||
466 | else if (status & BD_SC_PR) | ||
467 | icount->parity++; | ||
468 | else if (status & BD_SC_FR) | ||
469 | icount->frame++; | ||
470 | if (status & BD_SC_OV) | ||
471 | icount->overrun++; | ||
472 | |||
473 | /* | ||
474 | * Now check to see if character should be | ||
475 | * ignored, and mask off conditions which | ||
476 | * should be ignored. | ||
477 | if (status & info->ignore_status_mask) { | ||
478 | if (++ignored > 100) | ||
479 | break; | ||
480 | continue; | ||
481 | } | ||
482 | */ | ||
483 | status &= info->read_status_mask; | ||
484 | |||
485 | if (status & (BD_SC_BR)) { | ||
486 | #ifdef SERIAL_DEBUG_INTR | ||
487 | printk("handling break...."); | ||
488 | #endif | ||
489 | *tty->flip.flag_buf_ptr = TTY_BREAK; | ||
490 | if (info->flags & ASYNC_SAK) | ||
491 | do_SAK(tty); | ||
492 | } else if (status & BD_SC_PR) | ||
493 | *tty->flip.flag_buf_ptr = TTY_PARITY; | ||
494 | else if (status & BD_SC_FR) | ||
495 | *tty->flip.flag_buf_ptr = TTY_FRAME; | ||
496 | if (status & BD_SC_OV) { | ||
497 | /* | ||
498 | * Overrun is special, since it's | ||
499 | * reported immediately, and doesn't | ||
500 | * affect the current character | ||
501 | */ | ||
502 | if (tty->flip.count < TTY_FLIPBUF_SIZE) { | ||
503 | tty->flip.count++; | ||
504 | tty->flip.flag_buf_ptr++; | ||
505 | tty->flip.char_buf_ptr++; | ||
506 | *tty->flip.flag_buf_ptr = | ||
507 | TTY_OVERRUN; | ||
508 | } | ||
509 | } | ||
510 | } | ||
511 | if (tty->flip.count >= TTY_FLIPBUF_SIZE) | ||
512 | break; | ||
513 | |||
514 | tty->flip.flag_buf_ptr++; | ||
515 | tty->flip.char_buf_ptr++; | ||
516 | tty->flip.count++; | ||
517 | } | ||
518 | |||
519 | /* This BD is ready to be used again. Clear status. | ||
520 | * Get next BD. | ||
521 | */ | ||
522 | bdp->status |= BD_SC_EMPTY; | ||
523 | bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV); | ||
524 | |||
525 | if (bdp->status & BD_SC_WRAP) | ||
526 | bdp = info->rx_bd_base; | ||
527 | else | ||
528 | bdp++; | ||
529 | } | ||
530 | |||
531 | info->rx_cur = (QUICC_BD *)bdp; | ||
532 | |||
533 | schedule_work(&tty->flip.work); | ||
534 | } | ||
535 | |||
536 | static _INLINE_ void receive_break(ser_info_t *info) | ||
537 | { | ||
538 | struct tty_struct *tty = info->tty; | ||
539 | |||
540 | info->state->icount.brk++; | ||
541 | /* Check to see if there is room in the tty buffer for | ||
542 | * the break. If not, we exit now, losing the break. FIXME | ||
543 | */ | ||
544 | if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE) | ||
545 | return; | ||
546 | *(tty->flip.flag_buf_ptr++) = TTY_BREAK; | ||
547 | *(tty->flip.char_buf_ptr++) = 0; | ||
548 | tty->flip.count++; | ||
549 | |||
550 | schedule_work(&tty->flip.work); | ||
551 | } | ||
552 | |||
553 | static _INLINE_ void transmit_chars(ser_info_t *info) | ||
554 | { | ||
555 | |||
556 | if ((info->flags & TX_WAKEUP) || | ||
557 | (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) { | ||
558 | schedule_work(&info->tqueue); | ||
559 | } | ||
560 | |||
561 | #ifdef SERIAL_DEBUG_INTR | ||
562 | printk("THRE..."); | ||
563 | #endif | ||
564 | } | ||
565 | |||
566 | #ifdef notdef | ||
567 | /* I need to do this for the SCCs, so it is left as a reminder. | ||
568 | */ | ||
569 | static _INLINE_ void check_modem_status(struct async_struct *info) | ||
570 | { | ||
571 | int status; | ||
572 | /* struct async_icount *icount; */ | ||
573 | struct async_icount_24 *icount; | ||
574 | |||
575 | status = serial_in(info, UART_MSR); | ||
576 | |||
577 | if (status & UART_MSR_ANY_DELTA) { | ||
578 | icount = &info->state->icount; | ||
579 | /* update input line counters */ | ||
580 | if (status & UART_MSR_TERI) | ||
581 | icount->rng++; | ||
582 | if (status & UART_MSR_DDSR) | ||
583 | icount->dsr++; | ||
584 | if (status & UART_MSR_DDCD) { | ||
585 | icount->dcd++; | ||
586 | #ifdef CONFIG_HARD_PPS | ||
587 | if ((info->flags & ASYNC_HARDPPS_CD) && | ||
588 | (status & UART_MSR_DCD)) | ||
589 | hardpps(); | ||
590 | #endif | ||
591 | } | ||
592 | if (status & UART_MSR_DCTS) | ||
593 | icount->cts++; | ||
594 | wake_up_interruptible(&info->delta_msr_wait); | ||
595 | } | ||
596 | |||
597 | if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { | ||
598 | #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR)) | ||
599 | printk("ttys%d CD now %s...", info->line, | ||
600 | (status & UART_MSR_DCD) ? "on" : "off"); | ||
601 | #endif | ||
602 | if (status & UART_MSR_DCD) | ||
603 | wake_up_interruptible(&info->open_wait); | ||
604 | else { | ||
605 | #ifdef SERIAL_DEBUG_OPEN | ||
606 | printk("scheduling hangup..."); | ||
607 | #endif | ||
608 | queue_task(&info->tqueue_hangup, | ||
609 | &tq_scheduler); | ||
610 | } | ||
611 | } | ||
612 | if (info->flags & ASYNC_CTS_FLOW) { | ||
613 | if (info->tty->hw_stopped) { | ||
614 | if (status & UART_MSR_CTS) { | ||
615 | #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW)) | ||
616 | printk("CTS tx start..."); | ||
617 | #endif | ||
618 | info->tty->hw_stopped = 0; | ||
619 | info->IER |= UART_IER_THRI; | ||
620 | serial_out(info, UART_IER, info->IER); | ||
621 | rs_sched_event(info, RS_EVENT_WRITE_WAKEUP); | ||
622 | return; | ||
623 | } | ||
624 | } else { | ||
625 | if (!(status & UART_MSR_CTS)) { | ||
626 | #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW)) | ||
627 | printk("CTS tx stop..."); | ||
628 | #endif | ||
629 | info->tty->hw_stopped = 1; | ||
630 | info->IER &= ~UART_IER_THRI; | ||
631 | serial_out(info, UART_IER, info->IER); | ||
632 | } | ||
633 | } | ||
634 | } | ||
635 | } | ||
636 | #endif | ||
637 | |||
638 | /* | ||
639 | * This is the serial driver's interrupt routine for a single port | ||
640 | */ | ||
641 | /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */ | ||
642 | static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp) | ||
643 | { | ||
644 | u_char events; | ||
645 | int idx; | ||
646 | ser_info_t *info; | ||
647 | volatile struct smc_regs *smcp; | ||
648 | volatile struct scc_regs *sccp; | ||
649 | |||
650 | info = (ser_info_t *)dev_id; | ||
651 | |||
652 | idx = PORT_NUM(info->state->smc_scc_num); | ||
653 | if (info->state->smc_scc_num & NUM_IS_SCC) { | ||
654 | sccp = &pquicc->scc_regs[idx]; | ||
655 | events = sccp->scc_scce; | ||
656 | if (events & SCCM_RX) | ||
657 | receive_chars(info); | ||
658 | if (events & SCCM_TX) | ||
659 | transmit_chars(info); | ||
660 | sccp->scc_scce = events; | ||
661 | } else { | ||
662 | smcp = &pquicc->smc_regs[idx]; | ||
663 | events = smcp->smc_smce; | ||
664 | if (events & SMCM_BRKE) | ||
665 | receive_break(info); | ||
666 | if (events & SMCM_RX) | ||
667 | receive_chars(info); | ||
668 | if (events & SMCM_TX) | ||
669 | transmit_chars(info); | ||
670 | smcp->smc_smce = events; | ||
671 | } | ||
672 | |||
673 | #ifdef SERIAL_DEBUG_INTR | ||
674 | printk("rs_interrupt_single(%d, %x)...", | ||
675 | info->state->smc_scc_num, events); | ||
676 | #endif | ||
677 | #ifdef modem_control | ||
678 | check_modem_status(info); | ||
679 | #endif | ||
680 | info->last_active = jiffies; | ||
681 | #ifdef SERIAL_DEBUG_INTR | ||
682 | printk("end.\n"); | ||
683 | #endif | ||
684 | } | ||
685 | |||
686 | |||
687 | /* | ||
688 | * ------------------------------------------------------------------- | ||
689 | * Here ends the serial interrupt routines. | ||
690 | * ------------------------------------------------------------------- | ||
691 | */ | ||
692 | |||
693 | |||
694 | static void do_softint(void *private_) | ||
695 | { | ||
696 | ser_info_t *info = (ser_info_t *) private_; | ||
697 | struct tty_struct *tty; | ||
698 | |||
699 | tty = info->tty; | ||
700 | if (!tty) | ||
701 | return; | ||
702 | |||
703 | if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) | ||
704 | tty_wakeup(tty); | ||
705 | } | ||
706 | |||
707 | |||
708 | /* | ||
709 | * This routine is called from the scheduler tqueue when the interrupt | ||
710 | * routine has signalled that a hangup has occurred. The path of | ||
711 | * hangup processing is: | ||
712 | * | ||
713 | * serial interrupt routine -> (scheduler tqueue) -> | ||
714 | * do_serial_hangup() -> tty->hangup() -> rs_hangup() | ||
715 | * | ||
716 | */ | ||
717 | static void do_serial_hangup(void *private_) | ||
718 | { | ||
719 | struct async_struct *info = (struct async_struct *) private_; | ||
720 | struct tty_struct *tty; | ||
721 | |||
722 | tty = info->tty; | ||
723 | if (!tty) | ||
724 | return; | ||
725 | |||
726 | tty_hangup(tty); | ||
727 | } | ||
728 | |||
729 | |||
730 | static int startup(ser_info_t *info) | ||
731 | { | ||
732 | unsigned long flags; | ||
733 | int retval=0; | ||
734 | int idx; | ||
735 | /*struct serial_state *state = info->state;*/ | ||
736 | volatile struct smc_regs *smcp; | ||
737 | volatile struct scc_regs *sccp; | ||
738 | volatile struct smc_uart_pram *up; | ||
739 | volatile struct uart_pram *scup; | ||
740 | |||
741 | |||
742 | local_irq_save(flags); | ||
743 | |||
744 | if (info->flags & ASYNC_INITIALIZED) { | ||
745 | goto errout; | ||
746 | } | ||
747 | |||
748 | #ifdef maybe | ||
749 | if (!state->port || !state->type) { | ||
750 | if (info->tty) | ||
751 | set_bit(TTY_IO_ERROR, &info->tty->flags); | ||
752 | goto errout; | ||
753 | } | ||
754 | #endif | ||
755 | |||
756 | #ifdef SERIAL_DEBUG_OPEN | ||
757 | printk("starting up ttys%d (irq %d)...", info->line, state->irq); | ||
758 | #endif | ||
759 | |||
760 | |||
761 | #ifdef modem_control | ||
762 | info->MCR = 0; | ||
763 | if (info->tty->termios->c_cflag & CBAUD) | ||
764 | info->MCR = UART_MCR_DTR | UART_MCR_RTS; | ||
765 | #endif | ||
766 | |||
767 | if (info->tty) | ||
768 | clear_bit(TTY_IO_ERROR, &info->tty->flags); | ||
769 | |||
770 | /* | ||
771 | * and set the speed of the serial port | ||
772 | */ | ||
773 | change_speed(info); | ||
774 | |||
775 | idx = PORT_NUM(info->state->smc_scc_num); | ||
776 | if (info->state->smc_scc_num & NUM_IS_SCC) { | ||
777 | sccp = &pquicc->scc_regs[idx]; | ||
778 | scup = &pquicc->pram[info->state->port].scc.pscc.u; | ||
779 | |||
780 | scup->mrblr = RX_BUF_SIZE; | ||
781 | scup->max_idl = RX_BUF_SIZE; | ||
782 | |||
783 | sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX); | ||
784 | sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
785 | |||
786 | } else { | ||
787 | smcp = &pquicc->smc_regs[idx]; | ||
788 | |||
789 | /* Enable interrupts and I/O. | ||
790 | */ | ||
791 | smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | ||
792 | smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN); | ||
793 | |||
794 | /* We can tune the buffer length and idle characters | ||
795 | * to take advantage of the entire incoming buffer size. | ||
796 | * If mrblr is something other than 1, maxidl has to be | ||
797 | * non-zero or we never get an interrupt. The maxidl | ||
798 | * is the number of character times we wait after reception | ||
799 | * of the last character before we decide no more characters | ||
800 | * are coming. | ||
801 | */ | ||
802 | /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */ | ||
803 | /* holy unionized structures, Batman: */ | ||
804 | up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u; | ||
805 | |||
806 | up->mrblr = RX_BUF_SIZE; | ||
807 | up->max_idl = RX_BUF_SIZE; | ||
808 | |||
809 | up->brkcr = 1; /* number of break chars */ | ||
810 | } | ||
811 | |||
812 | info->flags |= ASYNC_INITIALIZED; | ||
813 | local_irq_restore(flags); | ||
814 | return 0; | ||
815 | |||
816 | errout: | ||
817 | local_irq_restore(flags); | ||
818 | return retval; | ||
819 | } | ||
820 | |||
821 | /* | ||
822 | * This routine will shutdown a serial port; interrupts are disabled, and | ||
823 | * DTR is dropped if the hangup on close termio flag is on. | ||
824 | */ | ||
825 | static void shutdown(ser_info_t *info) | ||
826 | { | ||
827 | unsigned long flags; | ||
828 | struct serial_state *state; | ||
829 | int idx; | ||
830 | volatile struct smc_regs *smcp; | ||
831 | volatile struct scc_regs *sccp; | ||
832 | |||
833 | if (!(info->flags & ASYNC_INITIALIZED)) | ||
834 | return; | ||
835 | |||
836 | state = info->state; | ||
837 | |||
838 | #ifdef SERIAL_DEBUG_OPEN | ||
839 | printk("Shutting down serial port %d (irq %d)....", info->line, | ||
840 | state->irq); | ||
841 | #endif | ||
842 | |||
843 | local_irq_save(flags); | ||
844 | |||
845 | idx = PORT_NUM(state->smc_scc_num); | ||
846 | if (state->smc_scc_num & NUM_IS_SCC) { | ||
847 | sccp = &pquicc->scc_regs[idx]; | ||
848 | sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
849 | #ifdef CONFIG_SERIAL_CONSOLE | ||
850 | /* We can't disable the transmitter if this is the | ||
851 | * system console. | ||
852 | */ | ||
853 | if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT) | ||
854 | #endif | ||
855 | sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); | ||
856 | } else { | ||
857 | smcp = &pquicc->smc_regs[idx]; | ||
858 | |||
859 | /* Disable interrupts and I/O. | ||
860 | */ | ||
861 | smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); | ||
862 | #ifdef CONFIG_SERIAL_CONSOLE | ||
863 | /* We can't disable the transmitter if this is the | ||
864 | * system console. | ||
865 | */ | ||
866 | if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT) | ||
867 | #endif | ||
868 | smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | ||
869 | } | ||
870 | |||
871 | if (info->tty) | ||
872 | set_bit(TTY_IO_ERROR, &info->tty->flags); | ||
873 | |||
874 | info->flags &= ~ASYNC_INITIALIZED; | ||
875 | local_irq_restore(flags); | ||
876 | } | ||
877 | |||
878 | /* | ||
879 | * This routine is called to set the UART divisor registers to match | ||
880 | * the specified baud rate for a serial port. | ||
881 | */ | ||
882 | static void change_speed(ser_info_t *info) | ||
883 | { | ||
884 | int baud_rate; | ||
885 | unsigned cflag, cval, scval, prev_mode; | ||
886 | int i, bits, sbits, idx; | ||
887 | unsigned long flags; | ||
888 | struct serial_state *state; | ||
889 | volatile struct smc_regs *smcp; | ||
890 | volatile struct scc_regs *sccp; | ||
891 | |||
892 | if (!info->tty || !info->tty->termios) | ||
893 | return; | ||
894 | cflag = info->tty->termios->c_cflag; | ||
895 | |||
896 | state = info->state; | ||
897 | |||
898 | /* Character length programmed into the mode register is the | ||
899 | * sum of: 1 start bit, number of data bits, 0 or 1 parity bit, | ||
900 | * 1 or 2 stop bits, minus 1. | ||
901 | * The value 'bits' counts this for us. | ||
902 | */ | ||
903 | cval = 0; | ||
904 | scval = 0; | ||
905 | |||
906 | /* byte size and parity */ | ||
907 | switch (cflag & CSIZE) { | ||
908 | case CS5: bits = 5; break; | ||
909 | case CS6: bits = 6; break; | ||
910 | case CS7: bits = 7; break; | ||
911 | case CS8: bits = 8; break; | ||
912 | /* Never happens, but GCC is too dumb to figure it out */ | ||
913 | default: bits = 8; break; | ||
914 | } | ||
915 | sbits = bits - 5; | ||
916 | |||
917 | if (cflag & CSTOPB) { | ||
918 | cval |= SMCMR_SL; /* Two stops */ | ||
919 | scval |= SCU_PMSR_SL; | ||
920 | bits++; | ||
921 | } | ||
922 | if (cflag & PARENB) { | ||
923 | cval |= SMCMR_PEN; | ||
924 | scval |= SCU_PMSR_PEN; | ||
925 | bits++; | ||
926 | } | ||
927 | if (!(cflag & PARODD)) { | ||
928 | cval |= SMCMR_PM_EVEN; | ||
929 | scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP); | ||
930 | } | ||
931 | |||
932 | /* Determine divisor based on baud rate */ | ||
933 | i = cflag & CBAUD; | ||
934 | if (i >= (sizeof(baud_table)/sizeof(int))) | ||
935 | baud_rate = 9600; | ||
936 | else | ||
937 | baud_rate = baud_table[i]; | ||
938 | |||
939 | info->timeout = (TX_BUF_SIZE*HZ*bits); | ||
940 | info->timeout += HZ/50; /* Add .02 seconds of slop */ | ||
941 | |||
942 | #ifdef modem_control | ||
943 | /* CTS flow control flag and modem status interrupts */ | ||
944 | info->IER &= ~UART_IER_MSI; | ||
945 | if (info->flags & ASYNC_HARDPPS_CD) | ||
946 | info->IER |= UART_IER_MSI; | ||
947 | if (cflag & CRTSCTS) { | ||
948 | info->flags |= ASYNC_CTS_FLOW; | ||
949 | info->IER |= UART_IER_MSI; | ||
950 | } else | ||
951 | info->flags &= ~ASYNC_CTS_FLOW; | ||
952 | if (cflag & CLOCAL) | ||
953 | info->flags &= ~ASYNC_CHECK_CD; | ||
954 | else { | ||
955 | info->flags |= ASYNC_CHECK_CD; | ||
956 | info->IER |= UART_IER_MSI; | ||
957 | } | ||
958 | serial_out(info, UART_IER, info->IER); | ||
959 | #endif | ||
960 | |||
961 | /* | ||
962 | * Set up parity check flag | ||
963 | */ | ||
964 | #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) | ||
965 | |||
966 | info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV); | ||
967 | if (I_INPCK(info->tty)) | ||
968 | info->read_status_mask |= BD_SC_FR | BD_SC_PR; | ||
969 | if (I_BRKINT(info->tty) || I_PARMRK(info->tty)) | ||
970 | info->read_status_mask |= BD_SC_BR; | ||
971 | |||
972 | /* | ||
973 | * Characters to ignore | ||
974 | */ | ||
975 | info->ignore_status_mask = 0; | ||
976 | if (I_IGNPAR(info->tty)) | ||
977 | info->ignore_status_mask |= BD_SC_PR | BD_SC_FR; | ||
978 | if (I_IGNBRK(info->tty)) { | ||
979 | info->ignore_status_mask |= BD_SC_BR; | ||
980 | /* | ||
981 | * If we're ignore parity and break indicators, ignore | ||
982 | * overruns too. (For real raw support). | ||
983 | */ | ||
984 | if (I_IGNPAR(info->tty)) | ||
985 | info->ignore_status_mask |= BD_SC_OV; | ||
986 | } | ||
987 | /* | ||
988 | * !!! ignore all characters if CREAD is not set | ||
989 | */ | ||
990 | if ((cflag & CREAD) == 0) | ||
991 | info->read_status_mask &= ~BD_SC_EMPTY; | ||
992 | local_irq_save(flags); | ||
993 | |||
994 | /* Start bit has not been added (so don't, because we would just | ||
995 | * subtract it later), and we need to add one for the number of | ||
996 | * stops bits (there is always at least one). | ||
997 | */ | ||
998 | bits++; | ||
999 | idx = PORT_NUM(state->smc_scc_num); | ||
1000 | if (state->smc_scc_num & NUM_IS_SCC) { | ||
1001 | sccp = &pquicc->scc_regs[idx]; | ||
1002 | sccp->scc_psmr = (sbits << 12) | scval; | ||
1003 | } else { | ||
1004 | smcp = &pquicc->smc_regs[idx]; | ||
1005 | |||
1006 | /* Set the mode register. We want to keep a copy of the | ||
1007 | * enables, because we want to put them back if they were | ||
1008 | * present. | ||
1009 | */ | ||
1010 | prev_mode = smcp->smc_smcmr; | ||
1011 | smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART; | ||
1012 | smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN)); | ||
1013 | } | ||
1014 | |||
1015 | m360_cpm_setbrg((state - rs_table), baud_rate); | ||
1016 | |||
1017 | local_irq_restore(flags); | ||
1018 | } | ||
1019 | |||
1020 | static void rs_360_put_char(struct tty_struct *tty, unsigned char ch) | ||
1021 | { | ||
1022 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1023 | volatile QUICC_BD *bdp; | ||
1024 | |||
1025 | if (serial_paranoia_check(info, tty->name, "rs_put_char")) | ||
1026 | return; | ||
1027 | |||
1028 | if (!tty) | ||
1029 | return; | ||
1030 | |||
1031 | bdp = info->tx_cur; | ||
1032 | while (bdp->status & BD_SC_READY); | ||
1033 | |||
1034 | /* *((char *)__va(bdp->buf)) = ch; */ | ||
1035 | *((char *)bdp->buf) = ch; | ||
1036 | bdp->length = 1; | ||
1037 | bdp->status |= BD_SC_READY; | ||
1038 | |||
1039 | /* Get next BD. | ||
1040 | */ | ||
1041 | if (bdp->status & BD_SC_WRAP) | ||
1042 | bdp = info->tx_bd_base; | ||
1043 | else | ||
1044 | bdp++; | ||
1045 | |||
1046 | info->tx_cur = (QUICC_BD *)bdp; | ||
1047 | |||
1048 | } | ||
1049 | |||
1050 | static int rs_360_write(struct tty_struct * tty, | ||
1051 | const unsigned char *buf, int count) | ||
1052 | { | ||
1053 | int c, ret = 0; | ||
1054 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1055 | volatile QUICC_BD *bdp; | ||
1056 | |||
1057 | #ifdef CONFIG_KGDB | ||
1058 | /* Try to let stub handle output. Returns true if it did. */ | ||
1059 | if (kgdb_output_string(buf, count)) | ||
1060 | return ret; | ||
1061 | #endif | ||
1062 | |||
1063 | if (serial_paranoia_check(info, tty->name, "rs_write")) | ||
1064 | return 0; | ||
1065 | |||
1066 | if (!tty) | ||
1067 | return 0; | ||
1068 | |||
1069 | bdp = info->tx_cur; | ||
1070 | |||
1071 | while (1) { | ||
1072 | c = min(count, TX_BUF_SIZE); | ||
1073 | |||
1074 | if (c <= 0) | ||
1075 | break; | ||
1076 | |||
1077 | if (bdp->status & BD_SC_READY) { | ||
1078 | info->flags |= TX_WAKEUP; | ||
1079 | break; | ||
1080 | } | ||
1081 | |||
1082 | /* memcpy(__va(bdp->buf), buf, c); */ | ||
1083 | memcpy((void *)bdp->buf, buf, c); | ||
1084 | |||
1085 | bdp->length = c; | ||
1086 | bdp->status |= BD_SC_READY; | ||
1087 | |||
1088 | buf += c; | ||
1089 | count -= c; | ||
1090 | ret += c; | ||
1091 | |||
1092 | /* Get next BD. | ||
1093 | */ | ||
1094 | if (bdp->status & BD_SC_WRAP) | ||
1095 | bdp = info->tx_bd_base; | ||
1096 | else | ||
1097 | bdp++; | ||
1098 | info->tx_cur = (QUICC_BD *)bdp; | ||
1099 | } | ||
1100 | return ret; | ||
1101 | } | ||
1102 | |||
1103 | static int rs_360_write_room(struct tty_struct *tty) | ||
1104 | { | ||
1105 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1106 | int ret; | ||
1107 | |||
1108 | if (serial_paranoia_check(info, tty->name, "rs_write_room")) | ||
1109 | return 0; | ||
1110 | |||
1111 | if ((info->tx_cur->status & BD_SC_READY) == 0) { | ||
1112 | info->flags &= ~TX_WAKEUP; | ||
1113 | ret = TX_BUF_SIZE; | ||
1114 | } | ||
1115 | else { | ||
1116 | info->flags |= TX_WAKEUP; | ||
1117 | ret = 0; | ||
1118 | } | ||
1119 | return ret; | ||
1120 | } | ||
1121 | |||
1122 | /* I could track this with transmit counters....maybe later. | ||
1123 | */ | ||
1124 | static int rs_360_chars_in_buffer(struct tty_struct *tty) | ||
1125 | { | ||
1126 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1127 | |||
1128 | if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer")) | ||
1129 | return 0; | ||
1130 | return 0; | ||
1131 | } | ||
1132 | |||
1133 | static void rs_360_flush_buffer(struct tty_struct *tty) | ||
1134 | { | ||
1135 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1136 | |||
1137 | if (serial_paranoia_check(info, tty->name, "rs_flush_buffer")) | ||
1138 | return; | ||
1139 | |||
1140 | /* There is nothing to "flush", whatever we gave the CPM | ||
1141 | * is on its way out. | ||
1142 | */ | ||
1143 | tty_wakeup(tty); | ||
1144 | info->flags &= ~TX_WAKEUP; | ||
1145 | } | ||
1146 | |||
1147 | /* | ||
1148 | * This function is used to send a high-priority XON/XOFF character to | ||
1149 | * the device | ||
1150 | */ | ||
1151 | static void rs_360_send_xchar(struct tty_struct *tty, char ch) | ||
1152 | { | ||
1153 | volatile QUICC_BD *bdp; | ||
1154 | |||
1155 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1156 | |||
1157 | if (serial_paranoia_check(info, tty->name, "rs_send_char")) | ||
1158 | return; | ||
1159 | |||
1160 | bdp = info->tx_cur; | ||
1161 | while (bdp->status & BD_SC_READY); | ||
1162 | |||
1163 | /* *((char *)__va(bdp->buf)) = ch; */ | ||
1164 | *((char *)bdp->buf) = ch; | ||
1165 | bdp->length = 1; | ||
1166 | bdp->status |= BD_SC_READY; | ||
1167 | |||
1168 | /* Get next BD. | ||
1169 | */ | ||
1170 | if (bdp->status & BD_SC_WRAP) | ||
1171 | bdp = info->tx_bd_base; | ||
1172 | else | ||
1173 | bdp++; | ||
1174 | |||
1175 | info->tx_cur = (QUICC_BD *)bdp; | ||
1176 | } | ||
1177 | |||
1178 | /* | ||
1179 | * ------------------------------------------------------------ | ||
1180 | * rs_throttle() | ||
1181 | * | ||
1182 | * This routine is called by the upper-layer tty layer to signal that | ||
1183 | * incoming characters should be throttled. | ||
1184 | * ------------------------------------------------------------ | ||
1185 | */ | ||
1186 | static void rs_360_throttle(struct tty_struct * tty) | ||
1187 | { | ||
1188 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1189 | #ifdef SERIAL_DEBUG_THROTTLE | ||
1190 | char buf[64]; | ||
1191 | |||
1192 | printk("throttle %s: %d....\n", _tty_name(tty, buf), | ||
1193 | tty->ldisc.chars_in_buffer(tty)); | ||
1194 | #endif | ||
1195 | |||
1196 | if (serial_paranoia_check(info, tty->name, "rs_throttle")) | ||
1197 | return; | ||
1198 | |||
1199 | if (I_IXOFF(tty)) | ||
1200 | rs_360_send_xchar(tty, STOP_CHAR(tty)); | ||
1201 | |||
1202 | #ifdef modem_control | ||
1203 | if (tty->termios->c_cflag & CRTSCTS) | ||
1204 | info->MCR &= ~UART_MCR_RTS; | ||
1205 | |||
1206 | local_irq_disable(); | ||
1207 | serial_out(info, UART_MCR, info->MCR); | ||
1208 | local_irq_enable(); | ||
1209 | #endif | ||
1210 | } | ||
1211 | |||
1212 | static void rs_360_unthrottle(struct tty_struct * tty) | ||
1213 | { | ||
1214 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1215 | #ifdef SERIAL_DEBUG_THROTTLE | ||
1216 | char buf[64]; | ||
1217 | |||
1218 | printk("unthrottle %s: %d....\n", _tty_name(tty, buf), | ||
1219 | tty->ldisc.chars_in_buffer(tty)); | ||
1220 | #endif | ||
1221 | |||
1222 | if (serial_paranoia_check(info, tty->name, "rs_unthrottle")) | ||
1223 | return; | ||
1224 | |||
1225 | if (I_IXOFF(tty)) { | ||
1226 | if (info->x_char) | ||
1227 | info->x_char = 0; | ||
1228 | else | ||
1229 | rs_360_send_xchar(tty, START_CHAR(tty)); | ||
1230 | } | ||
1231 | #ifdef modem_control | ||
1232 | if (tty->termios->c_cflag & CRTSCTS) | ||
1233 | info->MCR |= UART_MCR_RTS; | ||
1234 | local_irq_disable(); | ||
1235 | serial_out(info, UART_MCR, info->MCR); | ||
1236 | local_irq_enable(); | ||
1237 | #endif | ||
1238 | } | ||
1239 | |||
1240 | /* | ||
1241 | * ------------------------------------------------------------ | ||
1242 | * rs_ioctl() and friends | ||
1243 | * ------------------------------------------------------------ | ||
1244 | */ | ||
1245 | |||
1246 | #ifdef maybe | ||
1247 | /* | ||
1248 | * get_lsr_info - get line status register info | ||
1249 | * | ||
1250 | * Purpose: Let user call ioctl() to get info when the UART physically | ||
1251 | * is emptied. On bus types like RS485, the transmitter must | ||
1252 | * release the bus after transmitting. This must be done when | ||
1253 | * the transmit shift register is empty, not be done when the | ||
1254 | * transmit holding register is empty. This functionality | ||
1255 | * allows an RS485 driver to be written in user space. | ||
1256 | */ | ||
1257 | static int get_lsr_info(struct async_struct * info, unsigned int *value) | ||
1258 | { | ||
1259 | unsigned char status; | ||
1260 | unsigned int result; | ||
1261 | |||
1262 | local_irq_disable(); | ||
1263 | status = serial_in(info, UART_LSR); | ||
1264 | local_irq_enable(); | ||
1265 | result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); | ||
1266 | return put_user(result,value); | ||
1267 | } | ||
1268 | #endif | ||
1269 | |||
1270 | static int rs_360_tiocmget(struct tty_struct *tty, struct file *file) | ||
1271 | { | ||
1272 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1273 | unsigned int result = 0; | ||
1274 | #ifdef modem_control | ||
1275 | unsigned char control, status; | ||
1276 | |||
1277 | if (serial_paranoia_check(info, tty->name, __FUNCTION__)) | ||
1278 | return -ENODEV; | ||
1279 | |||
1280 | if (tty->flags & (1 << TTY_IO_ERROR)) | ||
1281 | return -EIO; | ||
1282 | |||
1283 | control = info->MCR; | ||
1284 | local_irq_disable(); | ||
1285 | status = serial_in(info, UART_MSR); | ||
1286 | local_irq_enable(); | ||
1287 | result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | ||
1288 | | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | ||
1289 | #ifdef TIOCM_OUT1 | ||
1290 | | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0) | ||
1291 | | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0) | ||
1292 | #endif | ||
1293 | | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | ||
1294 | | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | ||
1295 | | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | ||
1296 | | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); | ||
1297 | #endif | ||
1298 | return result; | ||
1299 | } | ||
1300 | |||
1301 | static int rs_360_tiocmset(struct tty_struct *tty, struct file *file, | ||
1302 | unsigned int set, unsigned int clear) | ||
1303 | { | ||
1304 | #ifdef modem_control | ||
1305 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1306 | unsigned int arg; | ||
1307 | |||
1308 | if (serial_paranoia_check(info, tty->name, __FUNCTION__)) | ||
1309 | return -ENODEV; | ||
1310 | |||
1311 | if (tty->flags & (1 << TTY_IO_ERROR)) | ||
1312 | return -EIO; | ||
1313 | |||
1314 | if (set & TIOCM_RTS) | ||
1315 | info->mcr |= UART_MCR_RTS; | ||
1316 | if (set & TIOCM_DTR) | ||
1317 | info->mcr |= UART_MCR_DTR; | ||
1318 | if (clear & TIOCM_RTS) | ||
1319 | info->MCR &= ~UART_MCR_RTS; | ||
1320 | if (clear & TIOCM_DTR) | ||
1321 | info->MCR &= ~UART_MCR_DTR; | ||
1322 | |||
1323 | #ifdef TIOCM_OUT1 | ||
1324 | if (set & TIOCM_OUT1) | ||
1325 | info->MCR |= UART_MCR_OUT1; | ||
1326 | if (set & TIOCM_OUT2) | ||
1327 | info->MCR |= UART_MCR_OUT2; | ||
1328 | if (clear & TIOCM_OUT1) | ||
1329 | info->MCR &= ~UART_MCR_OUT1; | ||
1330 | if (clear & TIOCM_OUT2) | ||
1331 | info->MCR &= ~UART_MCR_OUT2; | ||
1332 | #endif | ||
1333 | |||
1334 | local_irq_disable(); | ||
1335 | serial_out(info, UART_MCR, info->MCR); | ||
1336 | local_irq_enable(); | ||
1337 | #endif | ||
1338 | return 0; | ||
1339 | } | ||
1340 | |||
1341 | /* Sending a break is a two step process on the SMC/SCC. It is accomplished | ||
1342 | * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT | ||
1343 | * command. We take advantage of the begin/end functions to make this | ||
1344 | * happen. | ||
1345 | */ | ||
1346 | static ushort smc_chan_map[] = { | ||
1347 | CPM_CR_CH_SMC1, | ||
1348 | CPM_CR_CH_SMC2 | ||
1349 | }; | ||
1350 | |||
1351 | static ushort scc_chan_map[] = { | ||
1352 | CPM_CR_CH_SCC1, | ||
1353 | CPM_CR_CH_SCC2, | ||
1354 | CPM_CR_CH_SCC3, | ||
1355 | CPM_CR_CH_SCC4 | ||
1356 | }; | ||
1357 | |||
1358 | static void begin_break(ser_info_t *info) | ||
1359 | { | ||
1360 | volatile QUICC *cp; | ||
1361 | ushort chan; | ||
1362 | int idx; | ||
1363 | |||
1364 | cp = pquicc; | ||
1365 | |||
1366 | idx = PORT_NUM(info->state->smc_scc_num); | ||
1367 | if (info->state->smc_scc_num & NUM_IS_SCC) | ||
1368 | chan = scc_chan_map[idx]; | ||
1369 | else | ||
1370 | chan = smc_chan_map[idx]; | ||
1371 | |||
1372 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; | ||
1373 | while (cp->cp_cr & CPM_CR_FLG); | ||
1374 | } | ||
1375 | |||
1376 | static void end_break(ser_info_t *info) | ||
1377 | { | ||
1378 | volatile QUICC *cp; | ||
1379 | ushort chan; | ||
1380 | int idx; | ||
1381 | |||
1382 | cp = pquicc; | ||
1383 | |||
1384 | idx = PORT_NUM(info->state->smc_scc_num); | ||
1385 | if (info->state->smc_scc_num & NUM_IS_SCC) | ||
1386 | chan = scc_chan_map[idx]; | ||
1387 | else | ||
1388 | chan = smc_chan_map[idx]; | ||
1389 | |||
1390 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG; | ||
1391 | while (cp->cp_cr & CPM_CR_FLG); | ||
1392 | } | ||
1393 | |||
1394 | /* | ||
1395 | * This routine sends a break character out the serial port. | ||
1396 | */ | ||
1397 | static void send_break(ser_info_t *info, int duration) | ||
1398 | { | ||
1399 | set_current_state(TASK_INTERRUPTIBLE); | ||
1400 | #ifdef SERIAL_DEBUG_SEND_BREAK | ||
1401 | printk("rs_send_break(%d) jiff=%lu...", duration, jiffies); | ||
1402 | #endif | ||
1403 | begin_break(info); | ||
1404 | schedule_timeout(duration); | ||
1405 | end_break(info); | ||
1406 | #ifdef SERIAL_DEBUG_SEND_BREAK | ||
1407 | printk("done jiffies=%lu\n", jiffies); | ||
1408 | #endif | ||
1409 | } | ||
1410 | |||
1411 | |||
1412 | static int rs_360_ioctl(struct tty_struct *tty, struct file * file, | ||
1413 | unsigned int cmd, unsigned long arg) | ||
1414 | { | ||
1415 | int error; | ||
1416 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1417 | int retval; | ||
1418 | struct async_icount cnow; | ||
1419 | /* struct async_icount_24 cnow;*/ /* kernel counter temps */ | ||
1420 | struct serial_icounter_struct *p_cuser; /* user space */ | ||
1421 | |||
1422 | if (serial_paranoia_check(info, tty->name, "rs_ioctl")) | ||
1423 | return -ENODEV; | ||
1424 | |||
1425 | if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { | ||
1426 | if (tty->flags & (1 << TTY_IO_ERROR)) | ||
1427 | return -EIO; | ||
1428 | } | ||
1429 | |||
1430 | switch (cmd) { | ||
1431 | case TCSBRK: /* SVID version: non-zero arg --> no break */ | ||
1432 | retval = tty_check_change(tty); | ||
1433 | if (retval) | ||
1434 | return retval; | ||
1435 | tty_wait_until_sent(tty, 0); | ||
1436 | if (signal_pending(current)) | ||
1437 | return -EINTR; | ||
1438 | if (!arg) { | ||
1439 | send_break(info, HZ/4); /* 1/4 second */ | ||
1440 | if (signal_pending(current)) | ||
1441 | return -EINTR; | ||
1442 | } | ||
1443 | return 0; | ||
1444 | case TCSBRKP: /* support for POSIX tcsendbreak() */ | ||
1445 | retval = tty_check_change(tty); | ||
1446 | if (retval) | ||
1447 | return retval; | ||
1448 | tty_wait_until_sent(tty, 0); | ||
1449 | if (signal_pending(current)) | ||
1450 | return -EINTR; | ||
1451 | send_break(info, arg ? arg*(HZ/10) : HZ/4); | ||
1452 | if (signal_pending(current)) | ||
1453 | return -EINTR; | ||
1454 | return 0; | ||
1455 | case TIOCSBRK: | ||
1456 | retval = tty_check_change(tty); | ||
1457 | if (retval) | ||
1458 | return retval; | ||
1459 | tty_wait_until_sent(tty, 0); | ||
1460 | begin_break(info); | ||
1461 | return 0; | ||
1462 | case TIOCCBRK: | ||
1463 | retval = tty_check_change(tty); | ||
1464 | if (retval) | ||
1465 | return retval; | ||
1466 | end_break(info); | ||
1467 | return 0; | ||
1468 | case TIOCGSOFTCAR: | ||
1469 | /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */ | ||
1470 | put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); | ||
1471 | return 0; | ||
1472 | case TIOCSSOFTCAR: | ||
1473 | error = get_user(arg, (unsigned int *) arg); | ||
1474 | if (error) | ||
1475 | return error; | ||
1476 | tty->termios->c_cflag = | ||
1477 | ((tty->termios->c_cflag & ~CLOCAL) | | ||
1478 | (arg ? CLOCAL : 0)); | ||
1479 | return 0; | ||
1480 | #ifdef maybe | ||
1481 | case TIOCSERGETLSR: /* Get line status register */ | ||
1482 | return get_lsr_info(info, (unsigned int *) arg); | ||
1483 | #endif | ||
1484 | /* | ||
1485 | * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change | ||
1486 | * - mask passed in arg for lines of interest | ||
1487 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | ||
1488 | * Caller should use TIOCGICOUNT to see which one it was | ||
1489 | */ | ||
1490 | case TIOCMIWAIT: | ||
1491 | #ifdef modem_control | ||
1492 | local_irq_disable(); | ||
1493 | /* note the counters on entry */ | ||
1494 | cprev = info->state->icount; | ||
1495 | local_irq_enable(); | ||
1496 | while (1) { | ||
1497 | interruptible_sleep_on(&info->delta_msr_wait); | ||
1498 | /* see if a signal did it */ | ||
1499 | if (signal_pending(current)) | ||
1500 | return -ERESTARTSYS; | ||
1501 | local_irq_disable(); | ||
1502 | cnow = info->state->icount; /* atomic copy */ | ||
1503 | local_irq_enable(); | ||
1504 | if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && | ||
1505 | cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) | ||
1506 | return -EIO; /* no change => error */ | ||
1507 | if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || | ||
1508 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || | ||
1509 | ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || | ||
1510 | ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) { | ||
1511 | return 0; | ||
1512 | } | ||
1513 | cprev = cnow; | ||
1514 | } | ||
1515 | /* NOTREACHED */ | ||
1516 | #else | ||
1517 | return 0; | ||
1518 | #endif | ||
1519 | |||
1520 | /* | ||
1521 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | ||
1522 | * Return: write counters to the user passed counter struct | ||
1523 | * NB: both 1->0 and 0->1 transitions are counted except for | ||
1524 | * RI where only 0->1 is counted. | ||
1525 | */ | ||
1526 | case TIOCGICOUNT: | ||
1527 | local_irq_disable(); | ||
1528 | cnow = info->state->icount; | ||
1529 | local_irq_enable(); | ||
1530 | p_cuser = (struct serial_icounter_struct *) arg; | ||
1531 | /* error = put_user(cnow.cts, &p_cuser->cts); */ | ||
1532 | /* if (error) return error; */ | ||
1533 | /* error = put_user(cnow.dsr, &p_cuser->dsr); */ | ||
1534 | /* if (error) return error; */ | ||
1535 | /* error = put_user(cnow.rng, &p_cuser->rng); */ | ||
1536 | /* if (error) return error; */ | ||
1537 | /* error = put_user(cnow.dcd, &p_cuser->dcd); */ | ||
1538 | /* if (error) return error; */ | ||
1539 | |||
1540 | put_user(cnow.cts, &p_cuser->cts); | ||
1541 | put_user(cnow.dsr, &p_cuser->dsr); | ||
1542 | put_user(cnow.rng, &p_cuser->rng); | ||
1543 | put_user(cnow.dcd, &p_cuser->dcd); | ||
1544 | return 0; | ||
1545 | |||
1546 | default: | ||
1547 | return -ENOIOCTLCMD; | ||
1548 | } | ||
1549 | return 0; | ||
1550 | } | ||
1551 | |||
1552 | /* FIX UP modem control here someday...... | ||
1553 | */ | ||
1554 | static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios) | ||
1555 | { | ||
1556 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1557 | |||
1558 | if ( (tty->termios->c_cflag == old_termios->c_cflag) | ||
1559 | && ( RELEVANT_IFLAG(tty->termios->c_iflag) | ||
1560 | == RELEVANT_IFLAG(old_termios->c_iflag))) | ||
1561 | return; | ||
1562 | |||
1563 | change_speed(info); | ||
1564 | |||
1565 | #ifdef modem_control | ||
1566 | /* Handle transition to B0 status */ | ||
1567 | if ((old_termios->c_cflag & CBAUD) && | ||
1568 | !(tty->termios->c_cflag & CBAUD)) { | ||
1569 | info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS); | ||
1570 | local_irq_disable(); | ||
1571 | serial_out(info, UART_MCR, info->MCR); | ||
1572 | local_irq_enable(); | ||
1573 | } | ||
1574 | |||
1575 | /* Handle transition away from B0 status */ | ||
1576 | if (!(old_termios->c_cflag & CBAUD) && | ||
1577 | (tty->termios->c_cflag & CBAUD)) { | ||
1578 | info->MCR |= UART_MCR_DTR; | ||
1579 | if (!tty->hw_stopped || | ||
1580 | !(tty->termios->c_cflag & CRTSCTS)) { | ||
1581 | info->MCR |= UART_MCR_RTS; | ||
1582 | } | ||
1583 | local_irq_disable(); | ||
1584 | serial_out(info, UART_MCR, info->MCR); | ||
1585 | local_irq_enable(); | ||
1586 | } | ||
1587 | |||
1588 | /* Handle turning off CRTSCTS */ | ||
1589 | if ((old_termios->c_cflag & CRTSCTS) && | ||
1590 | !(tty->termios->c_cflag & CRTSCTS)) { | ||
1591 | tty->hw_stopped = 0; | ||
1592 | rs_360_start(tty); | ||
1593 | } | ||
1594 | #endif | ||
1595 | |||
1596 | #if 0 | ||
1597 | /* | ||
1598 | * No need to wake up processes in open wait, since they | ||
1599 | * sample the CLOCAL flag once, and don't recheck it. | ||
1600 | * XXX It's not clear whether the current behavior is correct | ||
1601 | * or not. Hence, this may change..... | ||
1602 | */ | ||
1603 | if (!(old_termios->c_cflag & CLOCAL) && | ||
1604 | (tty->termios->c_cflag & CLOCAL)) | ||
1605 | wake_up_interruptible(&info->open_wait); | ||
1606 | #endif | ||
1607 | } | ||
1608 | |||
1609 | /* | ||
1610 | * ------------------------------------------------------------ | ||
1611 | * rs_close() | ||
1612 | * | ||
1613 | * This routine is called when the serial port gets closed. First, we | ||
1614 | * wait for the last remaining data to be sent. Then, we unlink its | ||
1615 | * async structure from the interrupt chain if necessary, and we free | ||
1616 | * that IRQ if nothing is left in the chain. | ||
1617 | * ------------------------------------------------------------ | ||
1618 | */ | ||
1619 | static void rs_360_close(struct tty_struct *tty, struct file * filp) | ||
1620 | { | ||
1621 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1622 | /* struct async_state *state; */ | ||
1623 | struct serial_state *state; | ||
1624 | unsigned long flags; | ||
1625 | int idx; | ||
1626 | volatile struct smc_regs *smcp; | ||
1627 | volatile struct scc_regs *sccp; | ||
1628 | |||
1629 | if (!info || serial_paranoia_check(info, tty->name, "rs_close")) | ||
1630 | return; | ||
1631 | |||
1632 | state = info->state; | ||
1633 | |||
1634 | local_irq_save(flags); | ||
1635 | |||
1636 | if (tty_hung_up_p(filp)) { | ||
1637 | DBG_CNT("before DEC-hung"); | ||
1638 | local_irq_restore(flags); | ||
1639 | return; | ||
1640 | } | ||
1641 | |||
1642 | #ifdef SERIAL_DEBUG_OPEN | ||
1643 | printk("rs_close ttys%d, count = %d\n", info->line, state->count); | ||
1644 | #endif | ||
1645 | if ((tty->count == 1) && (state->count != 1)) { | ||
1646 | /* | ||
1647 | * Uh, oh. tty->count is 1, which means that the tty | ||
1648 | * structure will be freed. state->count should always | ||
1649 | * be one in these conditions. If it's greater than | ||
1650 | * one, we've got real problems, since it means the | ||
1651 | * serial port won't be shutdown. | ||
1652 | */ | ||
1653 | printk("rs_close: bad serial port count; tty->count is 1, " | ||
1654 | "state->count is %d\n", state->count); | ||
1655 | state->count = 1; | ||
1656 | } | ||
1657 | if (--state->count < 0) { | ||
1658 | printk("rs_close: bad serial port count for ttys%d: %d\n", | ||
1659 | info->line, state->count); | ||
1660 | state->count = 0; | ||
1661 | } | ||
1662 | if (state->count) { | ||
1663 | DBG_CNT("before DEC-2"); | ||
1664 | local_irq_restore(flags); | ||
1665 | return; | ||
1666 | } | ||
1667 | info->flags |= ASYNC_CLOSING; | ||
1668 | /* | ||
1669 | * Now we wait for the transmit buffer to clear; and we notify | ||
1670 | * the line discipline to only process XON/XOFF characters. | ||
1671 | */ | ||
1672 | tty->closing = 1; | ||
1673 | if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) | ||
1674 | tty_wait_until_sent(tty, info->closing_wait); | ||
1675 | /* | ||
1676 | * At this point we stop accepting input. To do this, we | ||
1677 | * disable the receive line status interrupts, and tell the | ||
1678 | * interrupt driver to stop checking the data ready bit in the | ||
1679 | * line status register. | ||
1680 | */ | ||
1681 | info->read_status_mask &= ~BD_SC_EMPTY; | ||
1682 | if (info->flags & ASYNC_INITIALIZED) { | ||
1683 | |||
1684 | idx = PORT_NUM(info->state->smc_scc_num); | ||
1685 | if (info->state->smc_scc_num & NUM_IS_SCC) { | ||
1686 | sccp = &pquicc->scc_regs[idx]; | ||
1687 | sccp->scc_sccm &= ~UART_SCCM_RX; | ||
1688 | sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR; | ||
1689 | } else { | ||
1690 | smcp = &pquicc->smc_regs[idx]; | ||
1691 | smcp->smc_smcm &= ~SMCM_RX; | ||
1692 | smcp->smc_smcmr &= ~SMCMR_REN; | ||
1693 | } | ||
1694 | /* | ||
1695 | * Before we drop DTR, make sure the UART transmitter | ||
1696 | * has completely drained; this is especially | ||
1697 | * important if there is a transmit FIFO! | ||
1698 | */ | ||
1699 | rs_360_wait_until_sent(tty, info->timeout); | ||
1700 | } | ||
1701 | shutdown(info); | ||
1702 | if (tty->driver->flush_buffer) | ||
1703 | tty->driver->flush_buffer(tty); | ||
1704 | tty_ldisc_flush(tty); | ||
1705 | tty->closing = 0; | ||
1706 | info->event = 0; | ||
1707 | info->tty = 0; | ||
1708 | if (info->blocked_open) { | ||
1709 | if (info->close_delay) { | ||
1710 | msleep_interruptible(jiffies_to_msecs(info->close_delay)); | ||
1711 | } | ||
1712 | wake_up_interruptible(&info->open_wait); | ||
1713 | } | ||
1714 | info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); | ||
1715 | wake_up_interruptible(&info->close_wait); | ||
1716 | local_irq_restore(flags); | ||
1717 | } | ||
1718 | |||
1719 | /* | ||
1720 | * rs_wait_until_sent() --- wait until the transmitter is empty | ||
1721 | */ | ||
1722 | static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout) | ||
1723 | { | ||
1724 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1725 | unsigned long orig_jiffies, char_time; | ||
1726 | /*int lsr;*/ | ||
1727 | volatile QUICC_BD *bdp; | ||
1728 | |||
1729 | if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent")) | ||
1730 | return; | ||
1731 | |||
1732 | #ifdef maybe | ||
1733 | if (info->state->type == PORT_UNKNOWN) | ||
1734 | return; | ||
1735 | #endif | ||
1736 | |||
1737 | orig_jiffies = jiffies; | ||
1738 | /* | ||
1739 | * Set the check interval to be 1/5 of the estimated time to | ||
1740 | * send a single character, and make it at least 1. The check | ||
1741 | * interval should also be less than the timeout. | ||
1742 | * | ||
1743 | * Note: we have to use pretty tight timings here to satisfy | ||
1744 | * the NIST-PCTS. | ||
1745 | */ | ||
1746 | char_time = 1; | ||
1747 | if (timeout) | ||
1748 | char_time = min(char_time, (unsigned long)timeout); | ||
1749 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | ||
1750 | printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time); | ||
1751 | printk("jiff=%lu...", jiffies); | ||
1752 | #endif | ||
1753 | |||
1754 | /* We go through the loop at least once because we can't tell | ||
1755 | * exactly when the last character exits the shifter. There can | ||
1756 | * be at least two characters waiting to be sent after the buffers | ||
1757 | * are empty. | ||
1758 | */ | ||
1759 | do { | ||
1760 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | ||
1761 | printk("lsr = %d (jiff=%lu)...", lsr, jiffies); | ||
1762 | #endif | ||
1763 | /* current->counter = 0; make us low-priority */ | ||
1764 | msleep_interruptible(jiffies_to_msecs(char_time)); | ||
1765 | if (signal_pending(current)) | ||
1766 | break; | ||
1767 | if (timeout && ((orig_jiffies + timeout) < jiffies)) | ||
1768 | break; | ||
1769 | /* The 'tx_cur' is really the next buffer to send. We | ||
1770 | * have to back up to the previous BD and wait for it | ||
1771 | * to go. This isn't perfect, because all this indicates | ||
1772 | * is the buffer is available. There are still characters | ||
1773 | * in the CPM FIFO. | ||
1774 | */ | ||
1775 | bdp = info->tx_cur; | ||
1776 | if (bdp == info->tx_bd_base) | ||
1777 | bdp += (TX_NUM_FIFO-1); | ||
1778 | else | ||
1779 | bdp--; | ||
1780 | } while (bdp->status & BD_SC_READY); | ||
1781 | current->state = TASK_RUNNING; | ||
1782 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | ||
1783 | printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); | ||
1784 | #endif | ||
1785 | } | ||
1786 | |||
1787 | /* | ||
1788 | * rs_hangup() --- called by tty_hangup() when a hangup is signaled. | ||
1789 | */ | ||
1790 | static void rs_360_hangup(struct tty_struct *tty) | ||
1791 | { | ||
1792 | ser_info_t *info = (ser_info_t *)tty->driver_data; | ||
1793 | struct serial_state *state = info->state; | ||
1794 | |||
1795 | if (serial_paranoia_check(info, tty->name, "rs_hangup")) | ||
1796 | return; | ||
1797 | |||
1798 | state = info->state; | ||
1799 | |||
1800 | rs_360_flush_buffer(tty); | ||
1801 | shutdown(info); | ||
1802 | info->event = 0; | ||
1803 | state->count = 0; | ||
1804 | info->flags &= ~ASYNC_NORMAL_ACTIVE; | ||
1805 | info->tty = 0; | ||
1806 | wake_up_interruptible(&info->open_wait); | ||
1807 | } | ||
1808 | |||
1809 | /* | ||
1810 | * ------------------------------------------------------------ | ||
1811 | * rs_open() and friends | ||
1812 | * ------------------------------------------------------------ | ||
1813 | */ | ||
1814 | static int block_til_ready(struct tty_struct *tty, struct file * filp, | ||
1815 | ser_info_t *info) | ||
1816 | { | ||
1817 | #ifdef DO_THIS_LATER | ||
1818 | DECLARE_WAITQUEUE(wait, current); | ||
1819 | #endif | ||
1820 | struct serial_state *state = info->state; | ||
1821 | int retval; | ||
1822 | int do_clocal = 0; | ||
1823 | |||
1824 | /* | ||
1825 | * If the device is in the middle of being closed, then block | ||
1826 | * until it's done, and then try again. | ||
1827 | */ | ||
1828 | if (tty_hung_up_p(filp) || | ||
1829 | (info->flags & ASYNC_CLOSING)) { | ||
1830 | if (info->flags & ASYNC_CLOSING) | ||
1831 | interruptible_sleep_on(&info->close_wait); | ||
1832 | #ifdef SERIAL_DO_RESTART | ||
1833 | if (info->flags & ASYNC_HUP_NOTIFY) | ||
1834 | return -EAGAIN; | ||
1835 | else | ||
1836 | return -ERESTARTSYS; | ||
1837 | #else | ||
1838 | return -EAGAIN; | ||
1839 | #endif | ||
1840 | } | ||
1841 | |||
1842 | /* | ||
1843 | * If non-blocking mode is set, or the port is not enabled, | ||
1844 | * then make the check up front and then exit. | ||
1845 | * If this is an SMC port, we don't have modem control to wait | ||
1846 | * for, so just get out here. | ||
1847 | */ | ||
1848 | if ((filp->f_flags & O_NONBLOCK) || | ||
1849 | (tty->flags & (1 << TTY_IO_ERROR)) || | ||
1850 | !(info->state->smc_scc_num & NUM_IS_SCC)) { | ||
1851 | info->flags |= ASYNC_NORMAL_ACTIVE; | ||
1852 | return 0; | ||
1853 | } | ||
1854 | |||
1855 | if (tty->termios->c_cflag & CLOCAL) | ||
1856 | do_clocal = 1; | ||
1857 | |||
1858 | /* | ||
1859 | * Block waiting for the carrier detect and the line to become | ||
1860 | * free (i.e., not in use by the callout). While we are in | ||
1861 | * this loop, state->count is dropped by one, so that | ||
1862 | * rs_close() knows when to free things. We restore it upon | ||
1863 | * exit, either normal or abnormal. | ||
1864 | */ | ||
1865 | retval = 0; | ||
1866 | #ifdef DO_THIS_LATER | ||
1867 | add_wait_queue(&info->open_wait, &wait); | ||
1868 | #ifdef SERIAL_DEBUG_OPEN | ||
1869 | printk("block_til_ready before block: ttys%d, count = %d\n", | ||
1870 | state->line, state->count); | ||
1871 | #endif | ||
1872 | local_irq_disable(); | ||
1873 | if (!tty_hung_up_p(filp)) | ||
1874 | state->count--; | ||
1875 | local_irq_enable(); | ||
1876 | info->blocked_open++; | ||
1877 | while (1) { | ||
1878 | local_irq_disable(); | ||
1879 | if (tty->termios->c_cflag & CBAUD) | ||
1880 | serial_out(info, UART_MCR, | ||
1881 | serial_inp(info, UART_MCR) | | ||
1882 | (UART_MCR_DTR | UART_MCR_RTS)); | ||
1883 | local_irq_enable(); | ||
1884 | set_current_state(TASK_INTERRUPTIBLE); | ||
1885 | if (tty_hung_up_p(filp) || | ||
1886 | !(info->flags & ASYNC_INITIALIZED)) { | ||
1887 | #ifdef SERIAL_DO_RESTART | ||
1888 | if (info->flags & ASYNC_HUP_NOTIFY) | ||
1889 | retval = -EAGAIN; | ||
1890 | else | ||
1891 | retval = -ERESTARTSYS; | ||
1892 | #else | ||
1893 | retval = -EAGAIN; | ||
1894 | #endif | ||
1895 | break; | ||
1896 | } | ||
1897 | if (!(info->flags & ASYNC_CLOSING) && | ||
1898 | (do_clocal || (serial_in(info, UART_MSR) & | ||
1899 | UART_MSR_DCD))) | ||
1900 | break; | ||
1901 | if (signal_pending(current)) { | ||
1902 | retval = -ERESTARTSYS; | ||
1903 | break; | ||
1904 | } | ||
1905 | #ifdef SERIAL_DEBUG_OPEN | ||
1906 | printk("block_til_ready blocking: ttys%d, count = %d\n", | ||
1907 | info->line, state->count); | ||
1908 | #endif | ||
1909 | schedule(); | ||
1910 | } | ||
1911 | current->state = TASK_RUNNING; | ||
1912 | remove_wait_queue(&info->open_wait, &wait); | ||
1913 | if (!tty_hung_up_p(filp)) | ||
1914 | state->count++; | ||
1915 | info->blocked_open--; | ||
1916 | #ifdef SERIAL_DEBUG_OPEN | ||
1917 | printk("block_til_ready after blocking: ttys%d, count = %d\n", | ||
1918 | info->line, state->count); | ||
1919 | #endif | ||
1920 | #endif /* DO_THIS_LATER */ | ||
1921 | if (retval) | ||
1922 | return retval; | ||
1923 | info->flags |= ASYNC_NORMAL_ACTIVE; | ||
1924 | return 0; | ||
1925 | } | ||
1926 | |||
1927 | static int get_async_struct(int line, ser_info_t **ret_info) | ||
1928 | { | ||
1929 | struct serial_state *sstate; | ||
1930 | |||
1931 | sstate = rs_table + line; | ||
1932 | if (sstate->info) { | ||
1933 | sstate->count++; | ||
1934 | *ret_info = (ser_info_t *)sstate->info; | ||
1935 | return 0; | ||
1936 | } | ||
1937 | else { | ||
1938 | return -ENOMEM; | ||
1939 | } | ||
1940 | } | ||
1941 | |||
1942 | /* | ||
1943 | * This routine is called whenever a serial port is opened. It | ||
1944 | * enables interrupts for a serial port, linking in its async structure into | ||
1945 | * the IRQ chain. It also performs the serial-specific | ||
1946 | * initialization for the tty structure. | ||
1947 | */ | ||
1948 | static int rs_360_open(struct tty_struct *tty, struct file * filp) | ||
1949 | { | ||
1950 | ser_info_t *info; | ||
1951 | int retval, line; | ||
1952 | |||
1953 | line = tty->index; | ||
1954 | if ((line < 0) || (line >= NR_PORTS)) | ||
1955 | return -ENODEV; | ||
1956 | retval = get_async_struct(line, &info); | ||
1957 | if (retval) | ||
1958 | return retval; | ||
1959 | if (serial_paranoia_check(info, tty->name, "rs_open")) | ||
1960 | return -ENODEV; | ||
1961 | |||
1962 | #ifdef SERIAL_DEBUG_OPEN | ||
1963 | printk("rs_open %s, count = %d\n", tty->name, info->state->count); | ||
1964 | #endif | ||
1965 | tty->driver_data = info; | ||
1966 | info->tty = tty; | ||
1967 | |||
1968 | /* | ||
1969 | * Start up serial port | ||
1970 | */ | ||
1971 | retval = startup(info); | ||
1972 | if (retval) | ||
1973 | return retval; | ||
1974 | |||
1975 | retval = block_til_ready(tty, filp, info); | ||
1976 | if (retval) { | ||
1977 | #ifdef SERIAL_DEBUG_OPEN | ||
1978 | printk("rs_open returning after block_til_ready with %d\n", | ||
1979 | retval); | ||
1980 | #endif | ||
1981 | return retval; | ||
1982 | } | ||
1983 | |||
1984 | #ifdef SERIAL_DEBUG_OPEN | ||
1985 | printk("rs_open %s successful...", tty->name); | ||
1986 | #endif | ||
1987 | return 0; | ||
1988 | } | ||
1989 | |||
1990 | /* | ||
1991 | * /proc fs routines.... | ||
1992 | */ | ||
1993 | |||
1994 | static inline int line_info(char *buf, struct serial_state *state) | ||
1995 | { | ||
1996 | #ifdef notdef | ||
1997 | struct async_struct *info = state->info, scr_info; | ||
1998 | char stat_buf[30], control, status; | ||
1999 | #endif | ||
2000 | int ret; | ||
2001 | |||
2002 | ret = sprintf(buf, "%d: uart:%s port:%X irq:%d", | ||
2003 | state->line, | ||
2004 | (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC", | ||
2005 | (unsigned int)(state->port), state->irq); | ||
2006 | |||
2007 | if (!state->port || (state->type == PORT_UNKNOWN)) { | ||
2008 | ret += sprintf(buf+ret, "\n"); | ||
2009 | return ret; | ||
2010 | } | ||
2011 | |||
2012 | #ifdef notdef | ||
2013 | /* | ||
2014 | * Figure out the current RS-232 lines | ||
2015 | */ | ||
2016 | if (!info) { | ||
2017 | info = &scr_info; /* This is just for serial_{in,out} */ | ||
2018 | |||
2019 | info->magic = SERIAL_MAGIC; | ||
2020 | info->port = state->port; | ||
2021 | info->flags = state->flags; | ||
2022 | info->quot = 0; | ||
2023 | info->tty = 0; | ||
2024 | } | ||
2025 | local_irq_disable(); | ||
2026 | status = serial_in(info, UART_MSR); | ||
2027 | control = info ? info->MCR : serial_in(info, UART_MCR); | ||
2028 | local_irq_enable(); | ||
2029 | |||
2030 | stat_buf[0] = 0; | ||
2031 | stat_buf[1] = 0; | ||
2032 | if (control & UART_MCR_RTS) | ||
2033 | strcat(stat_buf, "|RTS"); | ||
2034 | if (status & UART_MSR_CTS) | ||
2035 | strcat(stat_buf, "|CTS"); | ||
2036 | if (control & UART_MCR_DTR) | ||
2037 | strcat(stat_buf, "|DTR"); | ||
2038 | if (status & UART_MSR_DSR) | ||
2039 | strcat(stat_buf, "|DSR"); | ||
2040 | if (status & UART_MSR_DCD) | ||
2041 | strcat(stat_buf, "|CD"); | ||
2042 | if (status & UART_MSR_RI) | ||
2043 | strcat(stat_buf, "|RI"); | ||
2044 | |||
2045 | if (info->quot) { | ||
2046 | ret += sprintf(buf+ret, " baud:%d", | ||
2047 | state->baud_base / info->quot); | ||
2048 | } | ||
2049 | |||
2050 | ret += sprintf(buf+ret, " tx:%d rx:%d", | ||
2051 | state->icount.tx, state->icount.rx); | ||
2052 | |||
2053 | if (state->icount.frame) | ||
2054 | ret += sprintf(buf+ret, " fe:%d", state->icount.frame); | ||
2055 | |||
2056 | if (state->icount.parity) | ||
2057 | ret += sprintf(buf+ret, " pe:%d", state->icount.parity); | ||
2058 | |||
2059 | if (state->icount.brk) | ||
2060 | ret += sprintf(buf+ret, " brk:%d", state->icount.brk); | ||
2061 | |||
2062 | if (state->icount.overrun) | ||
2063 | ret += sprintf(buf+ret, " oe:%d", state->icount.overrun); | ||
2064 | |||
2065 | /* | ||
2066 | * Last thing is the RS-232 status lines | ||
2067 | */ | ||
2068 | ret += sprintf(buf+ret, " %s\n", stat_buf+1); | ||
2069 | #endif | ||
2070 | return ret; | ||
2071 | } | ||
2072 | |||
2073 | int rs_360_read_proc(char *page, char **start, off_t off, int count, | ||
2074 | int *eof, void *data) | ||
2075 | { | ||
2076 | int i, len = 0; | ||
2077 | off_t begin = 0; | ||
2078 | |||
2079 | len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version); | ||
2080 | for (i = 0; i < NR_PORTS && len < 4000; i++) { | ||
2081 | len += line_info(page + len, &rs_table[i]); | ||
2082 | if (len+begin > off+count) | ||
2083 | goto done; | ||
2084 | if (len+begin < off) { | ||
2085 | begin += len; | ||
2086 | len = 0; | ||
2087 | } | ||
2088 | } | ||
2089 | *eof = 1; | ||
2090 | done: | ||
2091 | if (off >= len+begin) | ||
2092 | return 0; | ||
2093 | *start = page + (begin-off); | ||
2094 | return ((count < begin+len-off) ? count : begin+len-off); | ||
2095 | } | ||
2096 | |||
2097 | /* | ||
2098 | * --------------------------------------------------------------------- | ||
2099 | * rs_init() and friends | ||
2100 | * | ||
2101 | * rs_init() is called at boot-time to initialize the serial driver. | ||
2102 | * --------------------------------------------------------------------- | ||
2103 | */ | ||
2104 | |||
2105 | /* | ||
2106 | * This routine prints out the appropriate serial driver version | ||
2107 | * number, and identifies which options were configured into this | ||
2108 | * driver. | ||
2109 | */ | ||
2110 | static _INLINE_ void show_serial_version(void) | ||
2111 | { | ||
2112 | printk(KERN_INFO "%s version %s\n", serial_name, serial_version); | ||
2113 | } | ||
2114 | |||
2115 | |||
2116 | /* | ||
2117 | * The serial console driver used during boot. Note that these names | ||
2118 | * clash with those found in "serial.c", so we currently can't support | ||
2119 | * the 16xxx uarts and these at the same time. I will fix this to become | ||
2120 | * an indirect function call from tty_io.c (or something). | ||
2121 | */ | ||
2122 | |||
2123 | #ifdef CONFIG_SERIAL_CONSOLE | ||
2124 | |||
2125 | /* | ||
2126 | * Print a string to the serial port trying not to disturb any possible | ||
2127 | * real use of the port... | ||
2128 | */ | ||
2129 | static void my_console_write(int idx, const char *s, | ||
2130 | unsigned count) | ||
2131 | { | ||
2132 | struct serial_state *ser; | ||
2133 | ser_info_t *info; | ||
2134 | unsigned i; | ||
2135 | QUICC_BD *bdp, *bdbase; | ||
2136 | volatile struct smc_uart_pram *up; | ||
2137 | volatile u_char *cp; | ||
2138 | |||
2139 | ser = rs_table + idx; | ||
2140 | |||
2141 | |||
2142 | /* If the port has been initialized for general use, we have | ||
2143 | * to use the buffer descriptors allocated there. Otherwise, | ||
2144 | * we simply use the single buffer allocated. | ||
2145 | */ | ||
2146 | if ((info = (ser_info_t *)ser->info) != NULL) { | ||
2147 | bdp = info->tx_cur; | ||
2148 | bdbase = info->tx_bd_base; | ||
2149 | } | ||
2150 | else { | ||
2151 | /* Pointer to UART in parameter ram. | ||
2152 | */ | ||
2153 | /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */ | ||
2154 | up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u; | ||
2155 | |||
2156 | /* Get the address of the host memory buffer. | ||
2157 | */ | ||
2158 | bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase); | ||
2159 | } | ||
2160 | |||
2161 | /* | ||
2162 | * We need to gracefully shut down the transmitter, disable | ||
2163 | * interrupts, then send our bytes out. | ||
2164 | */ | ||
2165 | |||
2166 | /* | ||
2167 | * Now, do each character. This is not as bad as it looks | ||
2168 | * since this is a holding FIFO and not a transmitting FIFO. | ||
2169 | * We could add the complexity of filling the entire transmit | ||
2170 | * buffer, but we would just wait longer between accesses...... | ||
2171 | */ | ||
2172 | for (i = 0; i < count; i++, s++) { | ||
2173 | /* Wait for transmitter fifo to empty. | ||
2174 | * Ready indicates output is ready, and xmt is doing | ||
2175 | * that, not that it is ready for us to send. | ||
2176 | */ | ||
2177 | while (bdp->status & BD_SC_READY); | ||
2178 | |||
2179 | /* Send the character out. | ||
2180 | */ | ||
2181 | cp = bdp->buf; | ||
2182 | *cp = *s; | ||
2183 | |||
2184 | bdp->length = 1; | ||
2185 | bdp->status |= BD_SC_READY; | ||
2186 | |||
2187 | if (bdp->status & BD_SC_WRAP) | ||
2188 | bdp = bdbase; | ||
2189 | else | ||
2190 | bdp++; | ||
2191 | |||
2192 | /* if a LF, also do CR... */ | ||
2193 | if (*s == 10) { | ||
2194 | while (bdp->status & BD_SC_READY); | ||
2195 | /* cp = __va(bdp->buf); */ | ||
2196 | cp = bdp->buf; | ||
2197 | *cp = 13; | ||
2198 | bdp->length = 1; | ||
2199 | bdp->status |= BD_SC_READY; | ||
2200 | |||
2201 | if (bdp->status & BD_SC_WRAP) { | ||
2202 | bdp = bdbase; | ||
2203 | } | ||
2204 | else { | ||
2205 | bdp++; | ||
2206 | } | ||
2207 | } | ||
2208 | } | ||
2209 | |||
2210 | /* | ||
2211 | * Finally, Wait for transmitter & holding register to empty | ||
2212 | * and restore the IER | ||
2213 | */ | ||
2214 | while (bdp->status & BD_SC_READY); | ||
2215 | |||
2216 | if (info) | ||
2217 | info->tx_cur = (QUICC_BD *)bdp; | ||
2218 | } | ||
2219 | |||
2220 | static void serial_console_write(struct console *c, const char *s, | ||
2221 | unsigned count) | ||
2222 | { | ||
2223 | #ifdef CONFIG_KGDB | ||
2224 | /* Try to let stub handle output. Returns true if it did. */ | ||
2225 | if (kgdb_output_string(s, count)) | ||
2226 | return; | ||
2227 | #endif | ||
2228 | my_console_write(c->index, s, count); | ||
2229 | } | ||
2230 | |||
2231 | |||
2232 | |||
2233 | /*void console_print_68360(const char *p) | ||
2234 | { | ||
2235 | const char *cp = p; | ||
2236 | int i; | ||
2237 | |||
2238 | for (i=0;cp[i]!=0;i++); | ||
2239 | |||
2240 | serial_console_write (p, i); | ||
2241 | |||
2242 | //Comment this if you want to have a strict interrupt-driven output | ||
2243 | //rs_fair_output(); | ||
2244 | |||
2245 | return; | ||
2246 | }*/ | ||
2247 | |||
2248 | |||
2249 | |||
2250 | |||
2251 | |||
2252 | |||
2253 | #ifdef CONFIG_XMON | ||
2254 | int | ||
2255 | xmon_360_write(const char *s, unsigned count) | ||
2256 | { | ||
2257 | my_console_write(0, s, count); | ||
2258 | return(count); | ||
2259 | } | ||
2260 | #endif | ||
2261 | |||
2262 | #ifdef CONFIG_KGDB | ||
2263 | void | ||
2264 | putDebugChar(char ch) | ||
2265 | { | ||
2266 | my_console_write(0, &ch, 1); | ||
2267 | } | ||
2268 | #endif | ||
2269 | |||
2270 | /* | ||
2271 | * Receive character from the serial port. This only works well | ||
2272 | * before the port is initialized for real use. | ||
2273 | */ | ||
2274 | static int my_console_wait_key(int idx, int xmon, char *obuf) | ||
2275 | { | ||
2276 | struct serial_state *ser; | ||
2277 | u_char c, *cp; | ||
2278 | ser_info_t *info; | ||
2279 | QUICC_BD *bdp; | ||
2280 | volatile struct smc_uart_pram *up; | ||
2281 | int i; | ||
2282 | |||
2283 | ser = rs_table + idx; | ||
2284 | |||
2285 | /* Get the address of the host memory buffer. | ||
2286 | * If the port has been initialized for general use, we must | ||
2287 | * use information from the port structure. | ||
2288 | */ | ||
2289 | if ((info = (ser_info_t *)ser->info)) | ||
2290 | bdp = info->rx_cur; | ||
2291 | else | ||
2292 | /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */ | ||
2293 | bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase); | ||
2294 | |||
2295 | /* Pointer to UART in parameter ram. | ||
2296 | */ | ||
2297 | /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */ | ||
2298 | up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u; | ||
2299 | |||
2300 | /* | ||
2301 | * We need to gracefully shut down the receiver, disable | ||
2302 | * interrupts, then read the input. | ||
2303 | * XMON just wants a poll. If no character, return -1, else | ||
2304 | * return the character. | ||
2305 | */ | ||
2306 | if (!xmon) { | ||
2307 | while (bdp->status & BD_SC_EMPTY); | ||
2308 | } | ||
2309 | else { | ||
2310 | if (bdp->status & BD_SC_EMPTY) | ||
2311 | return -1; | ||
2312 | } | ||
2313 | |||
2314 | cp = (char *)bdp->buf; | ||
2315 | |||
2316 | if (obuf) { | ||
2317 | i = c = bdp->length; | ||
2318 | while (i-- > 0) | ||
2319 | *obuf++ = *cp++; | ||
2320 | } | ||
2321 | else { | ||
2322 | c = *cp; | ||
2323 | } | ||
2324 | bdp->status |= BD_SC_EMPTY; | ||
2325 | |||
2326 | if (info) { | ||
2327 | if (bdp->status & BD_SC_WRAP) { | ||
2328 | bdp = info->rx_bd_base; | ||
2329 | } | ||
2330 | else { | ||
2331 | bdp++; | ||
2332 | } | ||
2333 | info->rx_cur = (QUICC_BD *)bdp; | ||
2334 | } | ||
2335 | |||
2336 | return((int)c); | ||
2337 | } | ||
2338 | |||
2339 | static int serial_console_wait_key(struct console *co) | ||
2340 | { | ||
2341 | return(my_console_wait_key(co->index, 0, NULL)); | ||
2342 | } | ||
2343 | |||
2344 | #ifdef CONFIG_XMON | ||
2345 | int | ||
2346 | xmon_360_read_poll(void) | ||
2347 | { | ||
2348 | return(my_console_wait_key(0, 1, NULL)); | ||
2349 | } | ||
2350 | |||
2351 | int | ||
2352 | xmon_360_read_char(void) | ||
2353 | { | ||
2354 | return(my_console_wait_key(0, 0, NULL)); | ||
2355 | } | ||
2356 | #endif | ||
2357 | |||
2358 | #ifdef CONFIG_KGDB | ||
2359 | static char kgdb_buf[RX_BUF_SIZE], *kgdp; | ||
2360 | static int kgdb_chars; | ||
2361 | |||
2362 | unsigned char | ||
2363 | getDebugChar(void) | ||
2364 | { | ||
2365 | if (kgdb_chars <= 0) { | ||
2366 | kgdb_chars = my_console_wait_key(0, 0, kgdb_buf); | ||
2367 | kgdp = kgdb_buf; | ||
2368 | } | ||
2369 | kgdb_chars--; | ||
2370 | |||
2371 | return(*kgdp++); | ||
2372 | } | ||
2373 | |||
2374 | void kgdb_interruptible(int state) | ||
2375 | { | ||
2376 | } | ||
2377 | void kgdb_map_scc(void) | ||
2378 | { | ||
2379 | struct serial_state *ser; | ||
2380 | uint mem_addr; | ||
2381 | volatile QUICC_BD *bdp; | ||
2382 | volatile smc_uart_t *up; | ||
2383 | |||
2384 | cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm); | ||
2385 | |||
2386 | /* To avoid data cache CPM DMA coherency problems, allocate a | ||
2387 | * buffer in the CPM DPRAM. This will work until the CPM and | ||
2388 | * serial ports are initialized. At that time a memory buffer | ||
2389 | * will be allocated. | ||
2390 | * The port is already initialized from the boot procedure, all | ||
2391 | * we do here is give it a different buffer and make it a FIFO. | ||
2392 | */ | ||
2393 | |||
2394 | ser = rs_table; | ||
2395 | |||
2396 | /* Right now, assume we are using SMCs. | ||
2397 | */ | ||
2398 | up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; | ||
2399 | |||
2400 | /* Allocate space for an input FIFO, plus a few bytes for output. | ||
2401 | * Allocate bytes to maintain word alignment. | ||
2402 | */ | ||
2403 | mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]); | ||
2404 | |||
2405 | /* Set the physical address of the host memory buffers in | ||
2406 | * the buffer descriptors. | ||
2407 | */ | ||
2408 | bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; | ||
2409 | bdp->buf = mem_addr; | ||
2410 | |||
2411 | bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase]; | ||
2412 | bdp->buf = mem_addr+RX_BUF_SIZE; | ||
2413 | |||
2414 | up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */ | ||
2415 | up->smc_maxidl = RX_BUF_SIZE; | ||
2416 | } | ||
2417 | #endif | ||
2418 | |||
2419 | static struct tty_struct *serial_console_device(struct console *c, int *index) | ||
2420 | { | ||
2421 | *index = c->index; | ||
2422 | return serial_driver; | ||
2423 | } | ||
2424 | |||
2425 | |||
2426 | struct console sercons = { | ||
2427 | .name = "ttyS", | ||
2428 | .write = serial_console_write, | ||
2429 | .device = serial_console_device, | ||
2430 | .wait_key = serial_console_wait_key, | ||
2431 | .setup = serial_console_setup, | ||
2432 | .flags = CON_PRINTBUFFER, | ||
2433 | .index = CONFIG_SERIAL_CONSOLE_PORT, | ||
2434 | }; | ||
2435 | |||
2436 | |||
2437 | |||
2438 | /* | ||
2439 | * Register console. | ||
2440 | */ | ||
2441 | long console_360_init(long kmem_start, long kmem_end) | ||
2442 | { | ||
2443 | register_console(&sercons); | ||
2444 | /*register_console (console_print_68360); - 2.0.38 only required a write | ||
2445 | function pointer. */ | ||
2446 | return kmem_start; | ||
2447 | } | ||
2448 | |||
2449 | #endif | ||
2450 | |||
2451 | /* Index in baud rate table of the default console baud rate. | ||
2452 | */ | ||
2453 | static int baud_idx; | ||
2454 | |||
2455 | static struct tty_operations rs_360_ops = { | ||
2456 | .owner = THIS_MODULE, | ||
2457 | .open = rs_360_open, | ||
2458 | .close = rs_360_close, | ||
2459 | .write = rs_360_write, | ||
2460 | .put_char = rs_360_put_char, | ||
2461 | .write_room = rs_360_write_room, | ||
2462 | .chars_in_buffer = rs_360_chars_in_buffer, | ||
2463 | .flush_buffer = rs_360_flush_buffer, | ||
2464 | .ioctl = rs_360_ioctl, | ||
2465 | .throttle = rs_360_throttle, | ||
2466 | .unthrottle = rs_360_unthrottle, | ||
2467 | /* .send_xchar = rs_360_send_xchar, */ | ||
2468 | .set_termios = rs_360_set_termios, | ||
2469 | .stop = rs_360_stop, | ||
2470 | .start = rs_360_start, | ||
2471 | .hangup = rs_360_hangup, | ||
2472 | /* .wait_until_sent = rs_360_wait_until_sent, */ | ||
2473 | /* .read_proc = rs_360_read_proc, */ | ||
2474 | .tiocmget = rs_360_tiocmget, | ||
2475 | .tiocmset = rs_360_tiocmset, | ||
2476 | }; | ||
2477 | |||
2478 | /* int __init rs_360_init(void) */ | ||
2479 | int rs_360_init(void) | ||
2480 | { | ||
2481 | struct serial_state * state; | ||
2482 | ser_info_t *info; | ||
2483 | void *mem_addr; | ||
2484 | uint dp_addr, iobits; | ||
2485 | int i, j, idx; | ||
2486 | ushort chan; | ||
2487 | QUICC_BD *bdp; | ||
2488 | volatile QUICC *cp; | ||
2489 | volatile struct smc_regs *sp; | ||
2490 | volatile struct smc_uart_pram *up; | ||
2491 | volatile struct scc_regs *scp; | ||
2492 | volatile struct uart_pram *sup; | ||
2493 | /* volatile immap_t *immap; */ | ||
2494 | |||
2495 | serial_driver = alloc_tty_driver(NR_PORTS); | ||
2496 | if (!serial_driver) | ||
2497 | return -1; | ||
2498 | |||
2499 | show_serial_version(); | ||
2500 | |||
2501 | serial_driver->name = "ttyS"; | ||
2502 | serial_driver->major = TTY_MAJOR; | ||
2503 | serial_driver->minor_start = 64; | ||
2504 | serial_driver->type = TTY_DRIVER_TYPE_SERIAL; | ||
2505 | serial_driver->subtype = SERIAL_TYPE_NORMAL; | ||
2506 | serial_driver->init_termios = tty_std_termios; | ||
2507 | serial_driver->init_termios.c_cflag = | ||
2508 | baud_idx | CS8 | CREAD | HUPCL | CLOCAL; | ||
2509 | serial_driver->flags = TTY_DRIVER_REAL_RAW; | ||
2510 | tty_set_operations(serial_driver, &rs_360_ops); | ||
2511 | |||
2512 | if (tty_register_driver(serial_driver)) | ||
2513 | panic("Couldn't register serial driver\n"); | ||
2514 | |||
2515 | cp = pquicc; /* Get pointer to Communication Processor */ | ||
2516 | /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */ | ||
2517 | |||
2518 | |||
2519 | /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O. | ||
2520 | */ | ||
2521 | /* The "standard" configuration through the 860. | ||
2522 | */ | ||
2523 | /* immap->im_ioport.iop_papar |= 0x00fc; */ | ||
2524 | /* immap->im_ioport.iop_padir &= ~0x00fc; */ | ||
2525 | /* immap->im_ioport.iop_paodr &= ~0x00fc; */ | ||
2526 | cp->pio_papar |= 0x00fc; | ||
2527 | cp->pio_padir &= ~0x00fc; | ||
2528 | /* cp->pio_paodr &= ~0x00fc; */ | ||
2529 | |||
2530 | |||
2531 | /* Since we don't yet do modem control, connect the port C pins | ||
2532 | * as general purpose I/O. This will assert CTS and CD for the | ||
2533 | * SCC ports. | ||
2534 | */ | ||
2535 | /* FIXME: see 360um p.7-365 and 860um p.34-12 | ||
2536 | * I can't make sense of these bits - mleslie*/ | ||
2537 | /* immap->im_ioport.iop_pcdir |= 0x03c6; */ | ||
2538 | /* immap->im_ioport.iop_pcpar &= ~0x03c6; */ | ||
2539 | |||
2540 | /* cp->pio_pcdir |= 0x03c6; */ | ||
2541 | /* cp->pio_pcpar &= ~0x03c6; */ | ||
2542 | |||
2543 | |||
2544 | |||
2545 | /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and | ||
2546 | * BRG4 to SCC3. | ||
2547 | */ | ||
2548 | cp->si_sicr &= ~0x00ffff00; | ||
2549 | cp->si_sicr |= 0x001b1200; | ||
2550 | |||
2551 | #ifdef CONFIG_PP04 | ||
2552 | /* Frequentis PP04 forced to RS-232 until we know better. | ||
2553 | * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4. | ||
2554 | */ | ||
2555 | immap->im_ioport.iop_pcdir |= 0x000c; | ||
2556 | immap->im_ioport.iop_pcpar &= ~0x000c; | ||
2557 | immap->im_ioport.iop_pcdat &= ~0x000c; | ||
2558 | |||
2559 | /* This enables the TX driver. | ||
2560 | */ | ||
2561 | cp->cp_pbpar &= ~0x6000; | ||
2562 | cp->cp_pbdat &= ~0x6000; | ||
2563 | #endif | ||
2564 | |||
2565 | for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) { | ||
2566 | state->magic = SSTATE_MAGIC; | ||
2567 | state->line = i; | ||
2568 | state->type = PORT_UNKNOWN; | ||
2569 | state->custom_divisor = 0; | ||
2570 | state->close_delay = 5*HZ/10; | ||
2571 | state->closing_wait = 30*HZ; | ||
2572 | state->icount.cts = state->icount.dsr = | ||
2573 | state->icount.rng = state->icount.dcd = 0; | ||
2574 | state->icount.rx = state->icount.tx = 0; | ||
2575 | state->icount.frame = state->icount.parity = 0; | ||
2576 | state->icount.overrun = state->icount.brk = 0; | ||
2577 | printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n", | ||
2578 | i, (unsigned int)(state->irq), | ||
2579 | (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC"); | ||
2580 | |||
2581 | #ifdef CONFIG_SERIAL_CONSOLE | ||
2582 | /* If we just printed the message on the console port, and | ||
2583 | * we are about to initialize it for general use, we have | ||
2584 | * to wait a couple of character times for the CR/NL to | ||
2585 | * make it out of the transmit buffer. | ||
2586 | */ | ||
2587 | if (i == CONFIG_SERIAL_CONSOLE_PORT) | ||
2588 | mdelay(8); | ||
2589 | |||
2590 | |||
2591 | /* idx = PORT_NUM(info->state->smc_scc_num); */ | ||
2592 | /* if (info->state->smc_scc_num & NUM_IS_SCC) */ | ||
2593 | /* chan = scc_chan_map[idx]; */ | ||
2594 | /* else */ | ||
2595 | /* chan = smc_chan_map[idx]; */ | ||
2596 | |||
2597 | /* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */ | ||
2598 | /* while (cp->cp_cr & CPM_CR_FLG); */ | ||
2599 | |||
2600 | #endif | ||
2601 | /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */ | ||
2602 | info = &quicc_ser_info[i]; | ||
2603 | if (info) { | ||
2604 | memset (info, 0, sizeof(ser_info_t)); | ||
2605 | info->magic = SERIAL_MAGIC; | ||
2606 | info->line = i; | ||
2607 | info->flags = state->flags; | ||
2608 | INIT_WORK(&info->tqueue, do_softint, info); | ||
2609 | INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info); | ||
2610 | init_waitqueue_head(&info->open_wait); | ||
2611 | init_waitqueue_head(&info->close_wait); | ||
2612 | info->state = state; | ||
2613 | state->info = (struct async_struct *)info; | ||
2614 | |||
2615 | /* We need to allocate a transmit and receive buffer | ||
2616 | * descriptors from dual port ram, and a character | ||
2617 | * buffer area from host mem. | ||
2618 | */ | ||
2619 | dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO); | ||
2620 | |||
2621 | /* Allocate space for FIFOs in the host memory. | ||
2622 | * (for now this is from a static array of buffers :( | ||
2623 | */ | ||
2624 | /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */ | ||
2625 | /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */ | ||
2626 | mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE]; | ||
2627 | |||
2628 | /* Set the physical address of the host memory | ||
2629 | * buffers in the buffer descriptors, and the | ||
2630 | * virtual address for us to work with. | ||
2631 | */ | ||
2632 | bdp = (QUICC_BD *)((uint)pquicc + dp_addr); | ||
2633 | info->rx_cur = info->rx_bd_base = bdp; | ||
2634 | |||
2635 | /* initialize rx buffer descriptors */ | ||
2636 | for (j=0; j<(RX_NUM_FIFO-1); j++) { | ||
2637 | bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE]; | ||
2638 | bdp->status = BD_SC_EMPTY | BD_SC_INTRPT; | ||
2639 | mem_addr += RX_BUF_SIZE; | ||
2640 | bdp++; | ||
2641 | } | ||
2642 | bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE]; | ||
2643 | bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT; | ||
2644 | |||
2645 | |||
2646 | idx = PORT_NUM(info->state->smc_scc_num); | ||
2647 | if (info->state->smc_scc_num & NUM_IS_SCC) { | ||
2648 | |||
2649 | #if defined (CONFIG_UCQUICC) && 1 | ||
2650 | /* set the transceiver mode to RS232 */ | ||
2651 | sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */ | ||
2652 | sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02); | ||
2653 | *(uint *)_periph_base = sipex_mode_bits; | ||
2654 | /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */ | ||
2655 | #endif | ||
2656 | } | ||
2657 | |||
2658 | dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO); | ||
2659 | |||
2660 | /* Allocate space for FIFOs in the host memory. | ||
2661 | */ | ||
2662 | /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */ | ||
2663 | /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */ | ||
2664 | mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE]; | ||
2665 | |||
2666 | /* Set the physical address of the host memory | ||
2667 | * buffers in the buffer descriptors, and the | ||
2668 | * virtual address for us to work with. | ||
2669 | */ | ||
2670 | /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */ | ||
2671 | bdp = (QUICC_BD *)((uint)pquicc + dp_addr); | ||
2672 | info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp; | ||
2673 | |||
2674 | /* initialize tx buffer descriptors */ | ||
2675 | for (j=0; j<(TX_NUM_FIFO-1); j++) { | ||
2676 | bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE]; | ||
2677 | bdp->status = BD_SC_INTRPT; | ||
2678 | mem_addr += TX_BUF_SIZE; | ||
2679 | bdp++; | ||
2680 | } | ||
2681 | bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE]; | ||
2682 | bdp->status = (BD_SC_WRAP | BD_SC_INTRPT); | ||
2683 | |||
2684 | if (info->state->smc_scc_num & NUM_IS_SCC) { | ||
2685 | scp = &pquicc->scc_regs[idx]; | ||
2686 | sup = &pquicc->pram[info->state->port].scc.pscc.u; | ||
2687 | sup->rbase = dp_addr; | ||
2688 | sup->tbase = dp_addr; | ||
2689 | |||
2690 | /* Set up the uart parameters in the | ||
2691 | * parameter ram. | ||
2692 | */ | ||
2693 | sup->rfcr = SMC_EB; | ||
2694 | sup->tfcr = SMC_EB; | ||
2695 | |||
2696 | /* Set this to 1 for now, so we get single | ||
2697 | * character interrupts. Using idle charater | ||
2698 | * time requires some additional tuning. | ||
2699 | */ | ||
2700 | sup->mrblr = 1; | ||
2701 | sup->max_idl = 0; | ||
2702 | sup->brkcr = 1; | ||
2703 | sup->parec = 0; | ||
2704 | sup->frmer = 0; | ||
2705 | sup->nosec = 0; | ||
2706 | sup->brkec = 0; | ||
2707 | sup->uaddr1 = 0; | ||
2708 | sup->uaddr2 = 0; | ||
2709 | sup->toseq = 0; | ||
2710 | { | ||
2711 | int i; | ||
2712 | for (i=0;i<8;i++) | ||
2713 | sup->cc[i] = 0x8000; | ||
2714 | } | ||
2715 | sup->rccm = 0xc0ff; | ||
2716 | |||
2717 | /* Send the CPM an initialize command. | ||
2718 | */ | ||
2719 | chan = scc_chan_map[idx]; | ||
2720 | |||
2721 | /* execute the INIT RX & TX PARAMS command for this channel. */ | ||
2722 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG; | ||
2723 | while (cp->cp_cr & CPM_CR_FLG); | ||
2724 | |||
2725 | /* Set UART mode, 8 bit, no parity, one stop. | ||
2726 | * Enable receive and transmit. | ||
2727 | */ | ||
2728 | scp->scc_gsmr.w.high = 0; | ||
2729 | scp->scc_gsmr.w.low = | ||
2730 | (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); | ||
2731 | |||
2732 | /* Disable all interrupts and clear all pending | ||
2733 | * events. | ||
2734 | */ | ||
2735 | scp->scc_sccm = 0; | ||
2736 | scp->scc_scce = 0xffff; | ||
2737 | scp->scc_dsr = 0x7e7e; | ||
2738 | scp->scc_psmr = 0x3000; | ||
2739 | |||
2740 | /* If the port is the console, enable Rx and Tx. | ||
2741 | */ | ||
2742 | #ifdef CONFIG_SERIAL_CONSOLE | ||
2743 | if (i == CONFIG_SERIAL_CONSOLE_PORT) | ||
2744 | scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
2745 | #endif | ||
2746 | } | ||
2747 | else { | ||
2748 | /* Configure SMCs Tx/Rx instead of port B | ||
2749 | * parallel I/O. | ||
2750 | */ | ||
2751 | up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u; | ||
2752 | up->rbase = dp_addr; | ||
2753 | |||
2754 | iobits = 0xc0 << (idx * 4); | ||
2755 | cp->pip_pbpar |= iobits; | ||
2756 | cp->pip_pbdir &= ~iobits; | ||
2757 | cp->pip_pbodr &= ~iobits; | ||
2758 | |||
2759 | |||
2760 | /* Connect the baud rate generator to the | ||
2761 | * SMC based upon index in rs_table. Also | ||
2762 | * make sure it is connected to NMSI. | ||
2763 | */ | ||
2764 | cp->si_simode &= ~(0xffff << (idx * 16)); | ||
2765 | cp->si_simode |= (i << ((idx * 16) + 12)); | ||
2766 | |||
2767 | up->tbase = dp_addr; | ||
2768 | |||
2769 | /* Set up the uart parameters in the | ||
2770 | * parameter ram. | ||
2771 | */ | ||
2772 | up->rfcr = SMC_EB; | ||
2773 | up->tfcr = SMC_EB; | ||
2774 | |||
2775 | /* Set this to 1 for now, so we get single | ||
2776 | * character interrupts. Using idle charater | ||
2777 | * time requires some additional tuning. | ||
2778 | */ | ||
2779 | up->mrblr = 1; | ||
2780 | up->max_idl = 0; | ||
2781 | up->brkcr = 1; | ||
2782 | |||
2783 | /* Send the CPM an initialize command. | ||
2784 | */ | ||
2785 | chan = smc_chan_map[idx]; | ||
2786 | |||
2787 | cp->cp_cr = mk_cr_cmd(chan, | ||
2788 | CPM_CR_INIT_TRX) | CPM_CR_FLG; | ||
2789 | #ifdef CONFIG_SERIAL_CONSOLE | ||
2790 | if (i == CONFIG_SERIAL_CONSOLE_PORT) | ||
2791 | printk(""); | ||
2792 | #endif | ||
2793 | while (cp->cp_cr & CPM_CR_FLG); | ||
2794 | |||
2795 | /* Set UART mode, 8 bit, no parity, one stop. | ||
2796 | * Enable receive and transmit. | ||
2797 | */ | ||
2798 | sp = &cp->smc_regs[idx]; | ||
2799 | sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; | ||
2800 | |||
2801 | /* Disable all interrupts and clear all pending | ||
2802 | * events. | ||
2803 | */ | ||
2804 | sp->smc_smcm = 0; | ||
2805 | sp->smc_smce = 0xff; | ||
2806 | |||
2807 | /* If the port is the console, enable Rx and Tx. | ||
2808 | */ | ||
2809 | #ifdef CONFIG_SERIAL_CONSOLE | ||
2810 | if (i == CONFIG_SERIAL_CONSOLE_PORT) | ||
2811 | sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; | ||
2812 | #endif | ||
2813 | } | ||
2814 | |||
2815 | /* Install interrupt handler. | ||
2816 | */ | ||
2817 | /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */ | ||
2818 | /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */ | ||
2819 | request_irq(state->irq, rs_360_interrupt, | ||
2820 | IRQ_FLG_LOCK, "ttyS", (void *)info); | ||
2821 | |||
2822 | /* Set up the baud rate generator. | ||
2823 | */ | ||
2824 | m360_cpm_setbrg(i, baud_table[baud_idx]); | ||
2825 | |||
2826 | } | ||
2827 | } | ||
2828 | |||
2829 | return 0; | ||
2830 | } | ||
2831 | |||
2832 | |||
2833 | |||
2834 | |||
2835 | |||
2836 | /* This must always be called before the rs_360_init() function, otherwise | ||
2837 | * it blows away the port control information. | ||
2838 | */ | ||
2839 | //static int __init serial_console_setup( struct console *co, char *options) | ||
2840 | int serial_console_setup( struct console *co, char *options) | ||
2841 | { | ||
2842 | struct serial_state *ser; | ||
2843 | uint mem_addr, dp_addr, bidx, idx, iobits; | ||
2844 | ushort chan; | ||
2845 | QUICC_BD *bdp; | ||
2846 | volatile QUICC *cp; | ||
2847 | volatile struct smc_regs *sp; | ||
2848 | volatile struct scc_regs *scp; | ||
2849 | volatile struct smc_uart_pram *up; | ||
2850 | volatile struct uart_pram *sup; | ||
2851 | |||
2852 | /* mleslie TODO: | ||
2853 | * add something to the 68k bootloader to store a desired initial console baud rate */ | ||
2854 | |||
2855 | /* bd_t *bd; */ /* a board info struct used by EPPC-bug */ | ||
2856 | /* bd = (bd_t *)__res; */ | ||
2857 | |||
2858 | for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++) | ||
2859 | /* if (bd->bi_baudrate == baud_table[bidx]) */ | ||
2860 | if (CONSOLE_BAUDRATE == baud_table[bidx]) | ||
2861 | break; | ||
2862 | |||
2863 | /* co->cflag = CREAD|CLOCAL|bidx|CS8; */ | ||
2864 | baud_idx = bidx; | ||
2865 | |||
2866 | ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT; | ||
2867 | |||
2868 | cp = pquicc; /* Get pointer to Communication Processor */ | ||
2869 | |||
2870 | idx = PORT_NUM(ser->smc_scc_num); | ||
2871 | if (ser->smc_scc_num & NUM_IS_SCC) { | ||
2872 | |||
2873 | /* TODO: need to set up SCC pin assignment etc. here */ | ||
2874 | |||
2875 | } | ||
2876 | else { | ||
2877 | iobits = 0xc0 << (idx * 4); | ||
2878 | cp->pip_pbpar |= iobits; | ||
2879 | cp->pip_pbdir &= ~iobits; | ||
2880 | cp->pip_pbodr &= ~iobits; | ||
2881 | |||
2882 | /* Connect the baud rate generator to the | ||
2883 | * SMC based upon index in rs_table. Also | ||
2884 | * make sure it is connected to NMSI. | ||
2885 | */ | ||
2886 | cp->si_simode &= ~(0xffff << (idx * 16)); | ||
2887 | cp->si_simode |= (idx << ((idx * 16) + 12)); | ||
2888 | } | ||
2889 | |||
2890 | /* When we get here, the CPM has been reset, so we need | ||
2891 | * to configure the port. | ||
2892 | * We need to allocate a transmit and receive buffer descriptor | ||
2893 | * from dual port ram, and a character buffer area from host mem. | ||
2894 | */ | ||
2895 | |||
2896 | /* Allocate space for two buffer descriptors in the DP ram. | ||
2897 | */ | ||
2898 | dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO); | ||
2899 | |||
2900 | /* Allocate space for two 2 byte FIFOs in the host memory. | ||
2901 | */ | ||
2902 | /* mem_addr = m360_cpm_hostalloc(8); */ | ||
2903 | mem_addr = (uint)console_fifos; | ||
2904 | |||
2905 | |||
2906 | /* Set the physical address of the host memory buffers in | ||
2907 | * the buffer descriptors. | ||
2908 | */ | ||
2909 | /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */ | ||
2910 | bdp = (QUICC_BD *)((uint)pquicc + dp_addr); | ||
2911 | bdp->buf = (char *)mem_addr; | ||
2912 | (bdp+1)->buf = (char *)(mem_addr+4); | ||
2913 | |||
2914 | /* For the receive, set empty and wrap. | ||
2915 | * For transmit, set wrap. | ||
2916 | */ | ||
2917 | bdp->status = BD_SC_EMPTY | BD_SC_WRAP; | ||
2918 | (bdp+1)->status = BD_SC_WRAP; | ||
2919 | |||
2920 | /* Set up the uart parameters in the parameter ram. | ||
2921 | */ | ||
2922 | if (ser->smc_scc_num & NUM_IS_SCC) { | ||
2923 | scp = &cp->scc_regs[idx]; | ||
2924 | /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */ | ||
2925 | sup = &pquicc->pram[ser->port].scc.pscc.u; | ||
2926 | |||
2927 | sup->rbase = dp_addr; | ||
2928 | sup->tbase = dp_addr + sizeof(QUICC_BD); | ||
2929 | |||
2930 | /* Set up the uart parameters in the | ||
2931 | * parameter ram. | ||
2932 | */ | ||
2933 | sup->rfcr = SMC_EB; | ||
2934 | sup->tfcr = SMC_EB; | ||
2935 | |||
2936 | /* Set this to 1 for now, so we get single | ||
2937 | * character interrupts. Using idle charater | ||
2938 | * time requires some additional tuning. | ||
2939 | */ | ||
2940 | sup->mrblr = 1; | ||
2941 | sup->max_idl = 0; | ||
2942 | sup->brkcr = 1; | ||
2943 | sup->parec = 0; | ||
2944 | sup->frmer = 0; | ||
2945 | sup->nosec = 0; | ||
2946 | sup->brkec = 0; | ||
2947 | sup->uaddr1 = 0; | ||
2948 | sup->uaddr2 = 0; | ||
2949 | sup->toseq = 0; | ||
2950 | { | ||
2951 | int i; | ||
2952 | for (i=0;i<8;i++) | ||
2953 | sup->cc[i] = 0x8000; | ||
2954 | } | ||
2955 | sup->rccm = 0xc0ff; | ||
2956 | |||
2957 | /* Send the CPM an initialize command. | ||
2958 | */ | ||
2959 | chan = scc_chan_map[idx]; | ||
2960 | |||
2961 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG; | ||
2962 | while (cp->cp_cr & CPM_CR_FLG); | ||
2963 | |||
2964 | /* Set UART mode, 8 bit, no parity, one stop. | ||
2965 | * Enable receive and transmit. | ||
2966 | */ | ||
2967 | scp->scc_gsmr.w.high = 0; | ||
2968 | scp->scc_gsmr.w.low = | ||
2969 | (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); | ||
2970 | |||
2971 | /* Disable all interrupts and clear all pending | ||
2972 | * events. | ||
2973 | */ | ||
2974 | scp->scc_sccm = 0; | ||
2975 | scp->scc_scce = 0xffff; | ||
2976 | scp->scc_dsr = 0x7e7e; | ||
2977 | scp->scc_psmr = 0x3000; | ||
2978 | |||
2979 | scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
2980 | |||
2981 | } | ||
2982 | else { | ||
2983 | /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */ | ||
2984 | up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u; | ||
2985 | |||
2986 | up->rbase = dp_addr; /* Base of receive buffer desc. */ | ||
2987 | up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */ | ||
2988 | up->rfcr = SMC_EB; | ||
2989 | up->tfcr = SMC_EB; | ||
2990 | |||
2991 | /* Set this to 1 for now, so we get single character interrupts. | ||
2992 | */ | ||
2993 | up->mrblr = 1; /* receive buffer length */ | ||
2994 | up->max_idl = 0; /* wait forever for next char */ | ||
2995 | |||
2996 | /* Send the CPM an initialize command. | ||
2997 | */ | ||
2998 | chan = smc_chan_map[idx]; | ||
2999 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG; | ||
3000 | while (cp->cp_cr & CPM_CR_FLG); | ||
3001 | |||
3002 | /* Set UART mode, 8 bit, no parity, one stop. | ||
3003 | * Enable receive and transmit. | ||
3004 | */ | ||
3005 | sp = &cp->smc_regs[idx]; | ||
3006 | sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; | ||
3007 | |||
3008 | /* And finally, enable Rx and Tx. | ||
3009 | */ | ||
3010 | sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; | ||
3011 | } | ||
3012 | |||
3013 | /* Set up the baud rate generator. | ||
3014 | */ | ||
3015 | /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */ | ||
3016 | m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE); | ||
3017 | |||
3018 | return 0; | ||
3019 | } | ||
3020 | |||
3021 | /* | ||
3022 | * Local variables: | ||
3023 | * c-indent-level: 4 | ||
3024 | * c-basic-offset: 4 | ||
3025 | * tab-width: 4 | ||
3026 | * End: | ||
3027 | */ | ||