diff options
Diffstat (limited to 'drivers/scsi')
| -rw-r--r-- | drivers/scsi/be2iscsi/be_main.c | 2 | ||||
| -rw-r--r-- | drivers/scsi/bnx2fc/bnx2fc_io.c | 16 | ||||
| -rw-r--r-- | drivers/scsi/bnx2fc/bnx2fc_tgt.c | 38 | ||||
| -rw-r--r-- | drivers/scsi/bnx2i/bnx2i_hwi.c | 52 | ||||
| -rw-r--r-- | drivers/scsi/bnx2i/bnx2i_iscsi.c | 23 | ||||
| -rw-r--r-- | drivers/scsi/isci/host.h | 5 | ||||
| -rw-r--r-- | drivers/scsi/isci/port_config.c | 7 | ||||
| -rw-r--r-- | drivers/scsi/isci/task.c | 2 | ||||
| -rw-r--r-- | drivers/scsi/qla2xxx/qla_def.h | 3 | ||||
| -rw-r--r-- | drivers/scsi/qla2xxx/qla_isr.c | 46 | ||||
| -rw-r--r-- | drivers/scsi/qla2xxx/qla_target.c | 44 | ||||
| -rw-r--r-- | drivers/scsi/qla2xxx/qla_target.h | 3 | ||||
| -rw-r--r-- | drivers/scsi/qla2xxx/tcm_qla2xxx.c | 158 | ||||
| -rw-r--r-- | drivers/scsi/qla2xxx/tcm_qla2xxx.h | 7 | ||||
| -rw-r--r-- | drivers/scsi/scsi_lib.c | 2 | ||||
| -rw-r--r-- | drivers/scsi/storvsc_drv.c | 3 |
16 files changed, 261 insertions, 150 deletions
diff --git a/drivers/scsi/be2iscsi/be_main.c b/drivers/scsi/be2iscsi/be_main.c index 1f375051483a..5642a9b250c2 100644 --- a/drivers/scsi/be2iscsi/be_main.c +++ b/drivers/scsi/be2iscsi/be_main.c | |||
| @@ -325,7 +325,7 @@ static int beiscsi_eh_device_reset(struct scsi_cmnd *sc) | |||
| 325 | if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE) | 325 | if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE) |
| 326 | continue; | 326 | continue; |
| 327 | 327 | ||
| 328 | if (abrt_task->sc->device->lun != abrt_task->sc->device->lun) | 328 | if (sc->device->lun != abrt_task->sc->device->lun) |
| 329 | continue; | 329 | continue; |
| 330 | 330 | ||
| 331 | /* Invalidate WRB Posted for this Task */ | 331 | /* Invalidate WRB Posted for this Task */ |
diff --git a/drivers/scsi/bnx2fc/bnx2fc_io.c b/drivers/scsi/bnx2fc/bnx2fc_io.c index ed880891cb7c..e9279a8c1e1c 100644 --- a/drivers/scsi/bnx2fc/bnx2fc_io.c +++ b/drivers/scsi/bnx2fc/bnx2fc_io.c | |||
| @@ -594,13 +594,13 @@ static void bnx2fc_free_mp_resc(struct bnx2fc_cmd *io_req) | |||
| 594 | mp_req->mp_resp_bd = NULL; | 594 | mp_req->mp_resp_bd = NULL; |
| 595 | } | 595 | } |
| 596 | if (mp_req->req_buf) { | 596 | if (mp_req->req_buf) { |
| 597 | dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, | 597 | dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 598 | mp_req->req_buf, | 598 | mp_req->req_buf, |
| 599 | mp_req->req_buf_dma); | 599 | mp_req->req_buf_dma); |
| 600 | mp_req->req_buf = NULL; | 600 | mp_req->req_buf = NULL; |
| 601 | } | 601 | } |
| 602 | if (mp_req->resp_buf) { | 602 | if (mp_req->resp_buf) { |
| 603 | dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, | 603 | dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 604 | mp_req->resp_buf, | 604 | mp_req->resp_buf, |
| 605 | mp_req->resp_buf_dma); | 605 | mp_req->resp_buf_dma); |
| 606 | mp_req->resp_buf = NULL; | 606 | mp_req->resp_buf = NULL; |
| @@ -622,7 +622,7 @@ int bnx2fc_init_mp_req(struct bnx2fc_cmd *io_req) | |||
| 622 | 622 | ||
| 623 | mp_req->req_len = sizeof(struct fcp_cmnd); | 623 | mp_req->req_len = sizeof(struct fcp_cmnd); |
| 624 | io_req->data_xfer_len = mp_req->req_len; | 624 | io_req->data_xfer_len = mp_req->req_len; |
| 625 | mp_req->req_buf = dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, | 625 | mp_req->req_buf = dma_alloc_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 626 | &mp_req->req_buf_dma, | 626 | &mp_req->req_buf_dma, |
| 627 | GFP_ATOMIC); | 627 | GFP_ATOMIC); |
| 628 | if (!mp_req->req_buf) { | 628 | if (!mp_req->req_buf) { |
| @@ -631,7 +631,7 @@ int bnx2fc_init_mp_req(struct bnx2fc_cmd *io_req) | |||
| 631 | return FAILED; | 631 | return FAILED; |
| 632 | } | 632 | } |
| 633 | 633 | ||
| 634 | mp_req->resp_buf = dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, | 634 | mp_req->resp_buf = dma_alloc_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 635 | &mp_req->resp_buf_dma, | 635 | &mp_req->resp_buf_dma, |
| 636 | GFP_ATOMIC); | 636 | GFP_ATOMIC); |
| 637 | if (!mp_req->resp_buf) { | 637 | if (!mp_req->resp_buf) { |
| @@ -639,8 +639,8 @@ int bnx2fc_init_mp_req(struct bnx2fc_cmd *io_req) | |||
| 639 | bnx2fc_free_mp_resc(io_req); | 639 | bnx2fc_free_mp_resc(io_req); |
| 640 | return FAILED; | 640 | return FAILED; |
| 641 | } | 641 | } |
| 642 | memset(mp_req->req_buf, 0, PAGE_SIZE); | 642 | memset(mp_req->req_buf, 0, CNIC_PAGE_SIZE); |
| 643 | memset(mp_req->resp_buf, 0, PAGE_SIZE); | 643 | memset(mp_req->resp_buf, 0, CNIC_PAGE_SIZE); |
| 644 | 644 | ||
| 645 | /* Allocate and map mp_req_bd and mp_resp_bd */ | 645 | /* Allocate and map mp_req_bd and mp_resp_bd */ |
| 646 | sz = sizeof(struct fcoe_bd_ctx); | 646 | sz = sizeof(struct fcoe_bd_ctx); |
| @@ -665,7 +665,7 @@ int bnx2fc_init_mp_req(struct bnx2fc_cmd *io_req) | |||
| 665 | mp_req_bd = mp_req->mp_req_bd; | 665 | mp_req_bd = mp_req->mp_req_bd; |
| 666 | mp_req_bd->buf_addr_lo = (u32)addr & 0xffffffff; | 666 | mp_req_bd->buf_addr_lo = (u32)addr & 0xffffffff; |
| 667 | mp_req_bd->buf_addr_hi = (u32)((u64)addr >> 32); | 667 | mp_req_bd->buf_addr_hi = (u32)((u64)addr >> 32); |
| 668 | mp_req_bd->buf_len = PAGE_SIZE; | 668 | mp_req_bd->buf_len = CNIC_PAGE_SIZE; |
| 669 | mp_req_bd->flags = 0; | 669 | mp_req_bd->flags = 0; |
| 670 | 670 | ||
| 671 | /* | 671 | /* |
| @@ -677,7 +677,7 @@ int bnx2fc_init_mp_req(struct bnx2fc_cmd *io_req) | |||
| 677 | addr = mp_req->resp_buf_dma; | 677 | addr = mp_req->resp_buf_dma; |
| 678 | mp_resp_bd->buf_addr_lo = (u32)addr & 0xffffffff; | 678 | mp_resp_bd->buf_addr_lo = (u32)addr & 0xffffffff; |
| 679 | mp_resp_bd->buf_addr_hi = (u32)((u64)addr >> 32); | 679 | mp_resp_bd->buf_addr_hi = (u32)((u64)addr >> 32); |
| 680 | mp_resp_bd->buf_len = PAGE_SIZE; | 680 | mp_resp_bd->buf_len = CNIC_PAGE_SIZE; |
| 681 | mp_resp_bd->flags = 0; | 681 | mp_resp_bd->flags = 0; |
| 682 | 682 | ||
| 683 | return SUCCESS; | 683 | return SUCCESS; |
diff --git a/drivers/scsi/bnx2fc/bnx2fc_tgt.c b/drivers/scsi/bnx2fc/bnx2fc_tgt.c index 4d93177dfb53..d9bae5672273 100644 --- a/drivers/scsi/bnx2fc/bnx2fc_tgt.c +++ b/drivers/scsi/bnx2fc/bnx2fc_tgt.c | |||
| @@ -673,7 +673,8 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 673 | 673 | ||
| 674 | /* Allocate and map SQ */ | 674 | /* Allocate and map SQ */ |
| 675 | tgt->sq_mem_size = tgt->max_sqes * BNX2FC_SQ_WQE_SIZE; | 675 | tgt->sq_mem_size = tgt->max_sqes * BNX2FC_SQ_WQE_SIZE; |
| 676 | tgt->sq_mem_size = (tgt->sq_mem_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 676 | tgt->sq_mem_size = (tgt->sq_mem_size + (CNIC_PAGE_SIZE - 1)) & |
| 677 | CNIC_PAGE_MASK; | ||
| 677 | 678 | ||
| 678 | tgt->sq = dma_alloc_coherent(&hba->pcidev->dev, tgt->sq_mem_size, | 679 | tgt->sq = dma_alloc_coherent(&hba->pcidev->dev, tgt->sq_mem_size, |
| 679 | &tgt->sq_dma, GFP_KERNEL); | 680 | &tgt->sq_dma, GFP_KERNEL); |
| @@ -686,7 +687,8 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 686 | 687 | ||
| 687 | /* Allocate and map CQ */ | 688 | /* Allocate and map CQ */ |
| 688 | tgt->cq_mem_size = tgt->max_cqes * BNX2FC_CQ_WQE_SIZE; | 689 | tgt->cq_mem_size = tgt->max_cqes * BNX2FC_CQ_WQE_SIZE; |
| 689 | tgt->cq_mem_size = (tgt->cq_mem_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 690 | tgt->cq_mem_size = (tgt->cq_mem_size + (CNIC_PAGE_SIZE - 1)) & |
| 691 | CNIC_PAGE_MASK; | ||
| 690 | 692 | ||
| 691 | tgt->cq = dma_alloc_coherent(&hba->pcidev->dev, tgt->cq_mem_size, | 693 | tgt->cq = dma_alloc_coherent(&hba->pcidev->dev, tgt->cq_mem_size, |
| 692 | &tgt->cq_dma, GFP_KERNEL); | 694 | &tgt->cq_dma, GFP_KERNEL); |
| @@ -699,7 +701,8 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 699 | 701 | ||
| 700 | /* Allocate and map RQ and RQ PBL */ | 702 | /* Allocate and map RQ and RQ PBL */ |
| 701 | tgt->rq_mem_size = tgt->max_rqes * BNX2FC_RQ_WQE_SIZE; | 703 | tgt->rq_mem_size = tgt->max_rqes * BNX2FC_RQ_WQE_SIZE; |
| 702 | tgt->rq_mem_size = (tgt->rq_mem_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 704 | tgt->rq_mem_size = (tgt->rq_mem_size + (CNIC_PAGE_SIZE - 1)) & |
| 705 | CNIC_PAGE_MASK; | ||
| 703 | 706 | ||
| 704 | tgt->rq = dma_alloc_coherent(&hba->pcidev->dev, tgt->rq_mem_size, | 707 | tgt->rq = dma_alloc_coherent(&hba->pcidev->dev, tgt->rq_mem_size, |
| 705 | &tgt->rq_dma, GFP_KERNEL); | 708 | &tgt->rq_dma, GFP_KERNEL); |
| @@ -710,8 +713,9 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 710 | } | 713 | } |
| 711 | memset(tgt->rq, 0, tgt->rq_mem_size); | 714 | memset(tgt->rq, 0, tgt->rq_mem_size); |
| 712 | 715 | ||
| 713 | tgt->rq_pbl_size = (tgt->rq_mem_size / PAGE_SIZE) * sizeof(void *); | 716 | tgt->rq_pbl_size = (tgt->rq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *); |
| 714 | tgt->rq_pbl_size = (tgt->rq_pbl_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 717 | tgt->rq_pbl_size = (tgt->rq_pbl_size + (CNIC_PAGE_SIZE - 1)) & |
| 718 | CNIC_PAGE_MASK; | ||
| 715 | 719 | ||
| 716 | tgt->rq_pbl = dma_alloc_coherent(&hba->pcidev->dev, tgt->rq_pbl_size, | 720 | tgt->rq_pbl = dma_alloc_coherent(&hba->pcidev->dev, tgt->rq_pbl_size, |
| 717 | &tgt->rq_pbl_dma, GFP_KERNEL); | 721 | &tgt->rq_pbl_dma, GFP_KERNEL); |
| @@ -722,7 +726,7 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 722 | } | 726 | } |
| 723 | 727 | ||
| 724 | memset(tgt->rq_pbl, 0, tgt->rq_pbl_size); | 728 | memset(tgt->rq_pbl, 0, tgt->rq_pbl_size); |
| 725 | num_pages = tgt->rq_mem_size / PAGE_SIZE; | 729 | num_pages = tgt->rq_mem_size / CNIC_PAGE_SIZE; |
| 726 | page = tgt->rq_dma; | 730 | page = tgt->rq_dma; |
| 727 | pbl = (u32 *)tgt->rq_pbl; | 731 | pbl = (u32 *)tgt->rq_pbl; |
| 728 | 732 | ||
| @@ -731,13 +735,13 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 731 | pbl++; | 735 | pbl++; |
| 732 | *pbl = (u32)((u64)page >> 32); | 736 | *pbl = (u32)((u64)page >> 32); |
| 733 | pbl++; | 737 | pbl++; |
| 734 | page += PAGE_SIZE; | 738 | page += CNIC_PAGE_SIZE; |
| 735 | } | 739 | } |
| 736 | 740 | ||
| 737 | /* Allocate and map XFERQ */ | 741 | /* Allocate and map XFERQ */ |
| 738 | tgt->xferq_mem_size = tgt->max_sqes * BNX2FC_XFERQ_WQE_SIZE; | 742 | tgt->xferq_mem_size = tgt->max_sqes * BNX2FC_XFERQ_WQE_SIZE; |
| 739 | tgt->xferq_mem_size = (tgt->xferq_mem_size + (PAGE_SIZE - 1)) & | 743 | tgt->xferq_mem_size = (tgt->xferq_mem_size + (CNIC_PAGE_SIZE - 1)) & |
| 740 | PAGE_MASK; | 744 | CNIC_PAGE_MASK; |
| 741 | 745 | ||
| 742 | tgt->xferq = dma_alloc_coherent(&hba->pcidev->dev, tgt->xferq_mem_size, | 746 | tgt->xferq = dma_alloc_coherent(&hba->pcidev->dev, tgt->xferq_mem_size, |
| 743 | &tgt->xferq_dma, GFP_KERNEL); | 747 | &tgt->xferq_dma, GFP_KERNEL); |
| @@ -750,8 +754,8 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 750 | 754 | ||
| 751 | /* Allocate and map CONFQ & CONFQ PBL */ | 755 | /* Allocate and map CONFQ & CONFQ PBL */ |
| 752 | tgt->confq_mem_size = tgt->max_sqes * BNX2FC_CONFQ_WQE_SIZE; | 756 | tgt->confq_mem_size = tgt->max_sqes * BNX2FC_CONFQ_WQE_SIZE; |
| 753 | tgt->confq_mem_size = (tgt->confq_mem_size + (PAGE_SIZE - 1)) & | 757 | tgt->confq_mem_size = (tgt->confq_mem_size + (CNIC_PAGE_SIZE - 1)) & |
| 754 | PAGE_MASK; | 758 | CNIC_PAGE_MASK; |
| 755 | 759 | ||
| 756 | tgt->confq = dma_alloc_coherent(&hba->pcidev->dev, tgt->confq_mem_size, | 760 | tgt->confq = dma_alloc_coherent(&hba->pcidev->dev, tgt->confq_mem_size, |
| 757 | &tgt->confq_dma, GFP_KERNEL); | 761 | &tgt->confq_dma, GFP_KERNEL); |
| @@ -763,9 +767,9 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 763 | memset(tgt->confq, 0, tgt->confq_mem_size); | 767 | memset(tgt->confq, 0, tgt->confq_mem_size); |
| 764 | 768 | ||
| 765 | tgt->confq_pbl_size = | 769 | tgt->confq_pbl_size = |
| 766 | (tgt->confq_mem_size / PAGE_SIZE) * sizeof(void *); | 770 | (tgt->confq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *); |
| 767 | tgt->confq_pbl_size = | 771 | tgt->confq_pbl_size = |
| 768 | (tgt->confq_pbl_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 772 | (tgt->confq_pbl_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK; |
| 769 | 773 | ||
| 770 | tgt->confq_pbl = dma_alloc_coherent(&hba->pcidev->dev, | 774 | tgt->confq_pbl = dma_alloc_coherent(&hba->pcidev->dev, |
| 771 | tgt->confq_pbl_size, | 775 | tgt->confq_pbl_size, |
| @@ -777,7 +781,7 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 777 | } | 781 | } |
| 778 | 782 | ||
| 779 | memset(tgt->confq_pbl, 0, tgt->confq_pbl_size); | 783 | memset(tgt->confq_pbl, 0, tgt->confq_pbl_size); |
| 780 | num_pages = tgt->confq_mem_size / PAGE_SIZE; | 784 | num_pages = tgt->confq_mem_size / CNIC_PAGE_SIZE; |
| 781 | page = tgt->confq_dma; | 785 | page = tgt->confq_dma; |
| 782 | pbl = (u32 *)tgt->confq_pbl; | 786 | pbl = (u32 *)tgt->confq_pbl; |
| 783 | 787 | ||
| @@ -786,7 +790,7 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 786 | pbl++; | 790 | pbl++; |
| 787 | *pbl = (u32)((u64)page >> 32); | 791 | *pbl = (u32)((u64)page >> 32); |
| 788 | pbl++; | 792 | pbl++; |
| 789 | page += PAGE_SIZE; | 793 | page += CNIC_PAGE_SIZE; |
| 790 | } | 794 | } |
| 791 | 795 | ||
| 792 | /* Allocate and map ConnDB */ | 796 | /* Allocate and map ConnDB */ |
| @@ -805,8 +809,8 @@ static int bnx2fc_alloc_session_resc(struct bnx2fc_hba *hba, | |||
| 805 | 809 | ||
| 806 | /* Allocate and map LCQ */ | 810 | /* Allocate and map LCQ */ |
| 807 | tgt->lcq_mem_size = (tgt->max_sqes + 8) * BNX2FC_SQ_WQE_SIZE; | 811 | tgt->lcq_mem_size = (tgt->max_sqes + 8) * BNX2FC_SQ_WQE_SIZE; |
| 808 | tgt->lcq_mem_size = (tgt->lcq_mem_size + (PAGE_SIZE - 1)) & | 812 | tgt->lcq_mem_size = (tgt->lcq_mem_size + (CNIC_PAGE_SIZE - 1)) & |
| 809 | PAGE_MASK; | 813 | CNIC_PAGE_MASK; |
| 810 | 814 | ||
| 811 | tgt->lcq = dma_alloc_coherent(&hba->pcidev->dev, tgt->lcq_mem_size, | 815 | tgt->lcq = dma_alloc_coherent(&hba->pcidev->dev, tgt->lcq_mem_size, |
| 812 | &tgt->lcq_dma, GFP_KERNEL); | 816 | &tgt->lcq_dma, GFP_KERNEL); |
diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c index e4cf23df4b4f..b87a1933f880 100644 --- a/drivers/scsi/bnx2i/bnx2i_hwi.c +++ b/drivers/scsi/bnx2i/bnx2i_hwi.c | |||
| @@ -61,7 +61,7 @@ static void bnx2i_adjust_qp_size(struct bnx2i_hba *hba) | |||
| 61 | * yield integral num of page buffers | 61 | * yield integral num of page buffers |
| 62 | */ | 62 | */ |
| 63 | /* adjust SQ */ | 63 | /* adjust SQ */ |
| 64 | num_elements_per_pg = PAGE_SIZE / BNX2I_SQ_WQE_SIZE; | 64 | num_elements_per_pg = CNIC_PAGE_SIZE / BNX2I_SQ_WQE_SIZE; |
| 65 | if (hba->max_sqes < num_elements_per_pg) | 65 | if (hba->max_sqes < num_elements_per_pg) |
| 66 | hba->max_sqes = num_elements_per_pg; | 66 | hba->max_sqes = num_elements_per_pg; |
| 67 | else if (hba->max_sqes % num_elements_per_pg) | 67 | else if (hba->max_sqes % num_elements_per_pg) |
| @@ -69,7 +69,7 @@ static void bnx2i_adjust_qp_size(struct bnx2i_hba *hba) | |||
| 69 | ~(num_elements_per_pg - 1); | 69 | ~(num_elements_per_pg - 1); |
| 70 | 70 | ||
| 71 | /* adjust CQ */ | 71 | /* adjust CQ */ |
| 72 | num_elements_per_pg = PAGE_SIZE / BNX2I_CQE_SIZE; | 72 | num_elements_per_pg = CNIC_PAGE_SIZE / BNX2I_CQE_SIZE; |
| 73 | if (hba->max_cqes < num_elements_per_pg) | 73 | if (hba->max_cqes < num_elements_per_pg) |
| 74 | hba->max_cqes = num_elements_per_pg; | 74 | hba->max_cqes = num_elements_per_pg; |
| 75 | else if (hba->max_cqes % num_elements_per_pg) | 75 | else if (hba->max_cqes % num_elements_per_pg) |
| @@ -77,7 +77,7 @@ static void bnx2i_adjust_qp_size(struct bnx2i_hba *hba) | |||
| 77 | ~(num_elements_per_pg - 1); | 77 | ~(num_elements_per_pg - 1); |
| 78 | 78 | ||
| 79 | /* adjust RQ */ | 79 | /* adjust RQ */ |
| 80 | num_elements_per_pg = PAGE_SIZE / BNX2I_RQ_WQE_SIZE; | 80 | num_elements_per_pg = CNIC_PAGE_SIZE / BNX2I_RQ_WQE_SIZE; |
| 81 | if (hba->max_rqes < num_elements_per_pg) | 81 | if (hba->max_rqes < num_elements_per_pg) |
| 82 | hba->max_rqes = num_elements_per_pg; | 82 | hba->max_rqes = num_elements_per_pg; |
| 83 | else if (hba->max_rqes % num_elements_per_pg) | 83 | else if (hba->max_rqes % num_elements_per_pg) |
| @@ -959,7 +959,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep) | |||
| 959 | 959 | ||
| 960 | /* SQ page table */ | 960 | /* SQ page table */ |
| 961 | memset(ep->qp.sq_pgtbl_virt, 0, ep->qp.sq_pgtbl_size); | 961 | memset(ep->qp.sq_pgtbl_virt, 0, ep->qp.sq_pgtbl_size); |
| 962 | num_pages = ep->qp.sq_mem_size / PAGE_SIZE; | 962 | num_pages = ep->qp.sq_mem_size / CNIC_PAGE_SIZE; |
| 963 | page = ep->qp.sq_phys; | 963 | page = ep->qp.sq_phys; |
| 964 | 964 | ||
| 965 | if (cnic_dev_10g) | 965 | if (cnic_dev_10g) |
| @@ -973,7 +973,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep) | |||
| 973 | ptbl++; | 973 | ptbl++; |
| 974 | *ptbl = (u32) ((u64) page >> 32); | 974 | *ptbl = (u32) ((u64) page >> 32); |
| 975 | ptbl++; | 975 | ptbl++; |
| 976 | page += PAGE_SIZE; | 976 | page += CNIC_PAGE_SIZE; |
| 977 | } else { | 977 | } else { |
| 978 | /* PTE is written in big endian format for | 978 | /* PTE is written in big endian format for |
| 979 | * 5706/5708/5709 devices */ | 979 | * 5706/5708/5709 devices */ |
| @@ -981,13 +981,13 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep) | |||
| 981 | ptbl++; | 981 | ptbl++; |
| 982 | *ptbl = (u32) page; | 982 | *ptbl = (u32) page; |
| 983 | ptbl++; | 983 | ptbl++; |
| 984 | page += PAGE_SIZE; | 984 | page += CNIC_PAGE_SIZE; |
| 985 | } | 985 | } |
| 986 | } | 986 | } |
| 987 | 987 | ||
| 988 | /* RQ page table */ | 988 | /* RQ page table */ |
| 989 | memset(ep->qp.rq_pgtbl_virt, 0, ep->qp.rq_pgtbl_size); | 989 | memset(ep->qp.rq_pgtbl_virt, 0, ep->qp.rq_pgtbl_size); |
| 990 | num_pages = ep->qp.rq_mem_size / PAGE_SIZE; | 990 | num_pages = ep->qp.rq_mem_size / CNIC_PAGE_SIZE; |
| 991 | page = ep->qp.rq_phys; | 991 | page = ep->qp.rq_phys; |
| 992 | 992 | ||
| 993 | if (cnic_dev_10g) | 993 | if (cnic_dev_10g) |
| @@ -1001,7 +1001,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep) | |||
| 1001 | ptbl++; | 1001 | ptbl++; |
| 1002 | *ptbl = (u32) ((u64) page >> 32); | 1002 | *ptbl = (u32) ((u64) page >> 32); |
| 1003 | ptbl++; | 1003 | ptbl++; |
| 1004 | page += PAGE_SIZE; | 1004 | page += CNIC_PAGE_SIZE; |
| 1005 | } else { | 1005 | } else { |
| 1006 | /* PTE is written in big endian format for | 1006 | /* PTE is written in big endian format for |
| 1007 | * 5706/5708/5709 devices */ | 1007 | * 5706/5708/5709 devices */ |
| @@ -1009,13 +1009,13 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep) | |||
| 1009 | ptbl++; | 1009 | ptbl++; |
| 1010 | *ptbl = (u32) page; | 1010 | *ptbl = (u32) page; |
| 1011 | ptbl++; | 1011 | ptbl++; |
| 1012 | page += PAGE_SIZE; | 1012 | page += CNIC_PAGE_SIZE; |
| 1013 | } | 1013 | } |
| 1014 | } | 1014 | } |
| 1015 | 1015 | ||
| 1016 | /* CQ page table */ | 1016 | /* CQ page table */ |
| 1017 | memset(ep->qp.cq_pgtbl_virt, 0, ep->qp.cq_pgtbl_size); | 1017 | memset(ep->qp.cq_pgtbl_virt, 0, ep->qp.cq_pgtbl_size); |
| 1018 | num_pages = ep->qp.cq_mem_size / PAGE_SIZE; | 1018 | num_pages = ep->qp.cq_mem_size / CNIC_PAGE_SIZE; |
| 1019 | page = ep->qp.cq_phys; | 1019 | page = ep->qp.cq_phys; |
| 1020 | 1020 | ||
| 1021 | if (cnic_dev_10g) | 1021 | if (cnic_dev_10g) |
| @@ -1029,7 +1029,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep) | |||
| 1029 | ptbl++; | 1029 | ptbl++; |
| 1030 | *ptbl = (u32) ((u64) page >> 32); | 1030 | *ptbl = (u32) ((u64) page >> 32); |
| 1031 | ptbl++; | 1031 | ptbl++; |
| 1032 | page += PAGE_SIZE; | 1032 | page += CNIC_PAGE_SIZE; |
| 1033 | } else { | 1033 | } else { |
| 1034 | /* PTE is written in big endian format for | 1034 | /* PTE is written in big endian format for |
| 1035 | * 5706/5708/5709 devices */ | 1035 | * 5706/5708/5709 devices */ |
| @@ -1037,7 +1037,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep) | |||
| 1037 | ptbl++; | 1037 | ptbl++; |
| 1038 | *ptbl = (u32) page; | 1038 | *ptbl = (u32) page; |
| 1039 | ptbl++; | 1039 | ptbl++; |
| 1040 | page += PAGE_SIZE; | 1040 | page += CNIC_PAGE_SIZE; |
| 1041 | } | 1041 | } |
| 1042 | } | 1042 | } |
| 1043 | } | 1043 | } |
| @@ -1064,11 +1064,11 @@ int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba, struct bnx2i_endpoint *ep) | |||
| 1064 | /* Allocate page table memory for SQ which is page aligned */ | 1064 | /* Allocate page table memory for SQ which is page aligned */ |
| 1065 | ep->qp.sq_mem_size = hba->max_sqes * BNX2I_SQ_WQE_SIZE; | 1065 | ep->qp.sq_mem_size = hba->max_sqes * BNX2I_SQ_WQE_SIZE; |
| 1066 | ep->qp.sq_mem_size = | 1066 | ep->qp.sq_mem_size = |
| 1067 | (ep->qp.sq_mem_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 1067 | (ep->qp.sq_mem_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK; |
| 1068 | ep->qp.sq_pgtbl_size = | 1068 | ep->qp.sq_pgtbl_size = |
| 1069 | (ep->qp.sq_mem_size / PAGE_SIZE) * sizeof(void *); | 1069 | (ep->qp.sq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *); |
| 1070 | ep->qp.sq_pgtbl_size = | 1070 | ep->qp.sq_pgtbl_size = |
| 1071 | (ep->qp.sq_pgtbl_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 1071 | (ep->qp.sq_pgtbl_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK; |
| 1072 | 1072 | ||
| 1073 | ep->qp.sq_pgtbl_virt = | 1073 | ep->qp.sq_pgtbl_virt = |
| 1074 | dma_alloc_coherent(&hba->pcidev->dev, ep->qp.sq_pgtbl_size, | 1074 | dma_alloc_coherent(&hba->pcidev->dev, ep->qp.sq_pgtbl_size, |
| @@ -1101,11 +1101,11 @@ int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba, struct bnx2i_endpoint *ep) | |||
| 1101 | /* Allocate page table memory for CQ which is page aligned */ | 1101 | /* Allocate page table memory for CQ which is page aligned */ |
| 1102 | ep->qp.cq_mem_size = hba->max_cqes * BNX2I_CQE_SIZE; | 1102 | ep->qp.cq_mem_size = hba->max_cqes * BNX2I_CQE_SIZE; |
| 1103 | ep->qp.cq_mem_size = | 1103 | ep->qp.cq_mem_size = |
| 1104 | (ep->qp.cq_mem_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 1104 | (ep->qp.cq_mem_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK; |
| 1105 | ep->qp.cq_pgtbl_size = | 1105 | ep->qp.cq_pgtbl_size = |
| 1106 | (ep->qp.cq_mem_size / PAGE_SIZE) * sizeof(void *); | 1106 | (ep->qp.cq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *); |
| 1107 | ep->qp.cq_pgtbl_size = | 1107 | ep->qp.cq_pgtbl_size = |
| 1108 | (ep->qp.cq_pgtbl_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 1108 | (ep->qp.cq_pgtbl_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK; |
| 1109 | 1109 | ||
| 1110 | ep->qp.cq_pgtbl_virt = | 1110 | ep->qp.cq_pgtbl_virt = |
| 1111 | dma_alloc_coherent(&hba->pcidev->dev, ep->qp.cq_pgtbl_size, | 1111 | dma_alloc_coherent(&hba->pcidev->dev, ep->qp.cq_pgtbl_size, |
| @@ -1144,11 +1144,11 @@ int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba, struct bnx2i_endpoint *ep) | |||
| 1144 | /* Allocate page table memory for RQ which is page aligned */ | 1144 | /* Allocate page table memory for RQ which is page aligned */ |
| 1145 | ep->qp.rq_mem_size = hba->max_rqes * BNX2I_RQ_WQE_SIZE; | 1145 | ep->qp.rq_mem_size = hba->max_rqes * BNX2I_RQ_WQE_SIZE; |
| 1146 | ep->qp.rq_mem_size = | 1146 | ep->qp.rq_mem_size = |
| 1147 | (ep->qp.rq_mem_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 1147 | (ep->qp.rq_mem_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK; |
| 1148 | ep->qp.rq_pgtbl_size = | 1148 | ep->qp.rq_pgtbl_size = |
| 1149 | (ep->qp.rq_mem_size / PAGE_SIZE) * sizeof(void *); | 1149 | (ep->qp.rq_mem_size / CNIC_PAGE_SIZE) * sizeof(void *); |
| 1150 | ep->qp.rq_pgtbl_size = | 1150 | ep->qp.rq_pgtbl_size = |
| 1151 | (ep->qp.rq_pgtbl_size + (PAGE_SIZE - 1)) & PAGE_MASK; | 1151 | (ep->qp.rq_pgtbl_size + (CNIC_PAGE_SIZE - 1)) & CNIC_PAGE_MASK; |
| 1152 | 1152 | ||
| 1153 | ep->qp.rq_pgtbl_virt = | 1153 | ep->qp.rq_pgtbl_virt = |
| 1154 | dma_alloc_coherent(&hba->pcidev->dev, ep->qp.rq_pgtbl_size, | 1154 | dma_alloc_coherent(&hba->pcidev->dev, ep->qp.rq_pgtbl_size, |
| @@ -1270,7 +1270,7 @@ int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba) | |||
| 1270 | bnx2i_adjust_qp_size(hba); | 1270 | bnx2i_adjust_qp_size(hba); |
| 1271 | 1271 | ||
| 1272 | iscsi_init.flags = | 1272 | iscsi_init.flags = |
| 1273 | ISCSI_PAGE_SIZE_4K << ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT; | 1273 | (CNIC_PAGE_BITS - 8) << ISCSI_KWQE_INIT1_PAGE_SIZE_SHIFT; |
| 1274 | if (en_tcp_dack) | 1274 | if (en_tcp_dack) |
| 1275 | iscsi_init.flags |= ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE; | 1275 | iscsi_init.flags |= ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE; |
| 1276 | iscsi_init.reserved0 = 0; | 1276 | iscsi_init.reserved0 = 0; |
| @@ -1288,15 +1288,15 @@ int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba) | |||
| 1288 | ((hba->num_ccell & 0xFFFF) | (hba->max_sqes << 16)); | 1288 | ((hba->num_ccell & 0xFFFF) | (hba->max_sqes << 16)); |
| 1289 | iscsi_init.num_ccells_per_conn = hba->num_ccell; | 1289 | iscsi_init.num_ccells_per_conn = hba->num_ccell; |
| 1290 | iscsi_init.num_tasks_per_conn = hba->max_sqes; | 1290 | iscsi_init.num_tasks_per_conn = hba->max_sqes; |
| 1291 | iscsi_init.sq_wqes_per_page = PAGE_SIZE / BNX2I_SQ_WQE_SIZE; | 1291 | iscsi_init.sq_wqes_per_page = CNIC_PAGE_SIZE / BNX2I_SQ_WQE_SIZE; |
| 1292 | iscsi_init.sq_num_wqes = hba->max_sqes; | 1292 | iscsi_init.sq_num_wqes = hba->max_sqes; |
| 1293 | iscsi_init.cq_log_wqes_per_page = | 1293 | iscsi_init.cq_log_wqes_per_page = |
| 1294 | (u8) bnx2i_power_of2(PAGE_SIZE / BNX2I_CQE_SIZE); | 1294 | (u8) bnx2i_power_of2(CNIC_PAGE_SIZE / BNX2I_CQE_SIZE); |
| 1295 | iscsi_init.cq_num_wqes = hba->max_cqes; | 1295 | iscsi_init.cq_num_wqes = hba->max_cqes; |
| 1296 | iscsi_init.cq_num_pages = (hba->max_cqes * BNX2I_CQE_SIZE + | 1296 | iscsi_init.cq_num_pages = (hba->max_cqes * BNX2I_CQE_SIZE + |
| 1297 | (PAGE_SIZE - 1)) / PAGE_SIZE; | 1297 | (CNIC_PAGE_SIZE - 1)) / CNIC_PAGE_SIZE; |
| 1298 | iscsi_init.sq_num_pages = (hba->max_sqes * BNX2I_SQ_WQE_SIZE + | 1298 | iscsi_init.sq_num_pages = (hba->max_sqes * BNX2I_SQ_WQE_SIZE + |
| 1299 | (PAGE_SIZE - 1)) / PAGE_SIZE; | 1299 | (CNIC_PAGE_SIZE - 1)) / CNIC_PAGE_SIZE; |
| 1300 | iscsi_init.rq_buffer_size = BNX2I_RQ_WQE_SIZE; | 1300 | iscsi_init.rq_buffer_size = BNX2I_RQ_WQE_SIZE; |
| 1301 | iscsi_init.rq_num_wqes = hba->max_rqes; | 1301 | iscsi_init.rq_num_wqes = hba->max_rqes; |
| 1302 | 1302 | ||
diff --git a/drivers/scsi/bnx2i/bnx2i_iscsi.c b/drivers/scsi/bnx2i/bnx2i_iscsi.c index 854dad7d5b03..c8b0aff5bbd4 100644 --- a/drivers/scsi/bnx2i/bnx2i_iscsi.c +++ b/drivers/scsi/bnx2i/bnx2i_iscsi.c | |||
| @@ -525,7 +525,7 @@ static int bnx2i_setup_mp_bdt(struct bnx2i_hba *hba) | |||
| 525 | struct iscsi_bd *mp_bdt; | 525 | struct iscsi_bd *mp_bdt; |
| 526 | u64 addr; | 526 | u64 addr; |
| 527 | 527 | ||
| 528 | hba->mp_bd_tbl = dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, | 528 | hba->mp_bd_tbl = dma_alloc_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 529 | &hba->mp_bd_dma, GFP_KERNEL); | 529 | &hba->mp_bd_dma, GFP_KERNEL); |
| 530 | if (!hba->mp_bd_tbl) { | 530 | if (!hba->mp_bd_tbl) { |
| 531 | printk(KERN_ERR "unable to allocate Middle Path BDT\n"); | 531 | printk(KERN_ERR "unable to allocate Middle Path BDT\n"); |
| @@ -533,11 +533,12 @@ static int bnx2i_setup_mp_bdt(struct bnx2i_hba *hba) | |||
| 533 | goto out; | 533 | goto out; |
| 534 | } | 534 | } |
| 535 | 535 | ||
| 536 | hba->dummy_buffer = dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, | 536 | hba->dummy_buffer = dma_alloc_coherent(&hba->pcidev->dev, |
| 537 | CNIC_PAGE_SIZE, | ||
| 537 | &hba->dummy_buf_dma, GFP_KERNEL); | 538 | &hba->dummy_buf_dma, GFP_KERNEL); |
| 538 | if (!hba->dummy_buffer) { | 539 | if (!hba->dummy_buffer) { |
| 539 | printk(KERN_ERR "unable to alloc Middle Path Dummy Buffer\n"); | 540 | printk(KERN_ERR "unable to alloc Middle Path Dummy Buffer\n"); |
| 540 | dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, | 541 | dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 541 | hba->mp_bd_tbl, hba->mp_bd_dma); | 542 | hba->mp_bd_tbl, hba->mp_bd_dma); |
| 542 | hba->mp_bd_tbl = NULL; | 543 | hba->mp_bd_tbl = NULL; |
| 543 | rc = -1; | 544 | rc = -1; |
| @@ -548,7 +549,7 @@ static int bnx2i_setup_mp_bdt(struct bnx2i_hba *hba) | |||
| 548 | addr = (unsigned long) hba->dummy_buf_dma; | 549 | addr = (unsigned long) hba->dummy_buf_dma; |
| 549 | mp_bdt->buffer_addr_lo = addr & 0xffffffff; | 550 | mp_bdt->buffer_addr_lo = addr & 0xffffffff; |
| 550 | mp_bdt->buffer_addr_hi = addr >> 32; | 551 | mp_bdt->buffer_addr_hi = addr >> 32; |
| 551 | mp_bdt->buffer_length = PAGE_SIZE; | 552 | mp_bdt->buffer_length = CNIC_PAGE_SIZE; |
| 552 | mp_bdt->flags = ISCSI_BD_LAST_IN_BD_CHAIN | | 553 | mp_bdt->flags = ISCSI_BD_LAST_IN_BD_CHAIN | |
| 553 | ISCSI_BD_FIRST_IN_BD_CHAIN; | 554 | ISCSI_BD_FIRST_IN_BD_CHAIN; |
| 554 | out: | 555 | out: |
| @@ -565,12 +566,12 @@ out: | |||
| 565 | static void bnx2i_free_mp_bdt(struct bnx2i_hba *hba) | 566 | static void bnx2i_free_mp_bdt(struct bnx2i_hba *hba) |
| 566 | { | 567 | { |
| 567 | if (hba->mp_bd_tbl) { | 568 | if (hba->mp_bd_tbl) { |
| 568 | dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, | 569 | dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 569 | hba->mp_bd_tbl, hba->mp_bd_dma); | 570 | hba->mp_bd_tbl, hba->mp_bd_dma); |
| 570 | hba->mp_bd_tbl = NULL; | 571 | hba->mp_bd_tbl = NULL; |
| 571 | } | 572 | } |
| 572 | if (hba->dummy_buffer) { | 573 | if (hba->dummy_buffer) { |
| 573 | dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, | 574 | dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 574 | hba->dummy_buffer, hba->dummy_buf_dma); | 575 | hba->dummy_buffer, hba->dummy_buf_dma); |
| 575 | hba->dummy_buffer = NULL; | 576 | hba->dummy_buffer = NULL; |
| 576 | } | 577 | } |
| @@ -934,14 +935,14 @@ static void bnx2i_conn_free_login_resources(struct bnx2i_hba *hba, | |||
| 934 | struct bnx2i_conn *bnx2i_conn) | 935 | struct bnx2i_conn *bnx2i_conn) |
| 935 | { | 936 | { |
| 936 | if (bnx2i_conn->gen_pdu.resp_bd_tbl) { | 937 | if (bnx2i_conn->gen_pdu.resp_bd_tbl) { |
| 937 | dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, | 938 | dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 938 | bnx2i_conn->gen_pdu.resp_bd_tbl, | 939 | bnx2i_conn->gen_pdu.resp_bd_tbl, |
| 939 | bnx2i_conn->gen_pdu.resp_bd_dma); | 940 | bnx2i_conn->gen_pdu.resp_bd_dma); |
| 940 | bnx2i_conn->gen_pdu.resp_bd_tbl = NULL; | 941 | bnx2i_conn->gen_pdu.resp_bd_tbl = NULL; |
| 941 | } | 942 | } |
| 942 | 943 | ||
| 943 | if (bnx2i_conn->gen_pdu.req_bd_tbl) { | 944 | if (bnx2i_conn->gen_pdu.req_bd_tbl) { |
| 944 | dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, | 945 | dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 945 | bnx2i_conn->gen_pdu.req_bd_tbl, | 946 | bnx2i_conn->gen_pdu.req_bd_tbl, |
| 946 | bnx2i_conn->gen_pdu.req_bd_dma); | 947 | bnx2i_conn->gen_pdu.req_bd_dma); |
| 947 | bnx2i_conn->gen_pdu.req_bd_tbl = NULL; | 948 | bnx2i_conn->gen_pdu.req_bd_tbl = NULL; |
| @@ -998,13 +999,13 @@ static int bnx2i_conn_alloc_login_resources(struct bnx2i_hba *hba, | |||
| 998 | bnx2i_conn->gen_pdu.resp_wr_ptr = bnx2i_conn->gen_pdu.resp_buf; | 999 | bnx2i_conn->gen_pdu.resp_wr_ptr = bnx2i_conn->gen_pdu.resp_buf; |
| 999 | 1000 | ||
| 1000 | bnx2i_conn->gen_pdu.req_bd_tbl = | 1001 | bnx2i_conn->gen_pdu.req_bd_tbl = |
| 1001 | dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, | 1002 | dma_alloc_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 1002 | &bnx2i_conn->gen_pdu.req_bd_dma, GFP_KERNEL); | 1003 | &bnx2i_conn->gen_pdu.req_bd_dma, GFP_KERNEL); |
| 1003 | if (bnx2i_conn->gen_pdu.req_bd_tbl == NULL) | 1004 | if (bnx2i_conn->gen_pdu.req_bd_tbl == NULL) |
| 1004 | goto login_req_bd_tbl_failure; | 1005 | goto login_req_bd_tbl_failure; |
| 1005 | 1006 | ||
| 1006 | bnx2i_conn->gen_pdu.resp_bd_tbl = | 1007 | bnx2i_conn->gen_pdu.resp_bd_tbl = |
| 1007 | dma_alloc_coherent(&hba->pcidev->dev, PAGE_SIZE, | 1008 | dma_alloc_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 1008 | &bnx2i_conn->gen_pdu.resp_bd_dma, | 1009 | &bnx2i_conn->gen_pdu.resp_bd_dma, |
| 1009 | GFP_KERNEL); | 1010 | GFP_KERNEL); |
| 1010 | if (bnx2i_conn->gen_pdu.resp_bd_tbl == NULL) | 1011 | if (bnx2i_conn->gen_pdu.resp_bd_tbl == NULL) |
| @@ -1013,7 +1014,7 @@ static int bnx2i_conn_alloc_login_resources(struct bnx2i_hba *hba, | |||
| 1013 | return 0; | 1014 | return 0; |
| 1014 | 1015 | ||
| 1015 | login_resp_bd_tbl_failure: | 1016 | login_resp_bd_tbl_failure: |
| 1016 | dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE, | 1017 | dma_free_coherent(&hba->pcidev->dev, CNIC_PAGE_SIZE, |
| 1017 | bnx2i_conn->gen_pdu.req_bd_tbl, | 1018 | bnx2i_conn->gen_pdu.req_bd_tbl, |
| 1018 | bnx2i_conn->gen_pdu.req_bd_dma); | 1019 | bnx2i_conn->gen_pdu.req_bd_dma); |
| 1019 | bnx2i_conn->gen_pdu.req_bd_tbl = NULL; | 1020 | bnx2i_conn->gen_pdu.req_bd_tbl = NULL; |
diff --git a/drivers/scsi/isci/host.h b/drivers/scsi/isci/host.h index 4911310a38f5..22a9bb1abae1 100644 --- a/drivers/scsi/isci/host.h +++ b/drivers/scsi/isci/host.h | |||
| @@ -311,9 +311,8 @@ static inline struct Scsi_Host *to_shost(struct isci_host *ihost) | |||
| 311 | } | 311 | } |
| 312 | 312 | ||
| 313 | #define for_each_isci_host(id, ihost, pdev) \ | 313 | #define for_each_isci_host(id, ihost, pdev) \ |
| 314 | for (id = 0, ihost = to_pci_info(pdev)->hosts[id]; \ | 314 | for (id = 0; id < SCI_MAX_CONTROLLERS && \ |
| 315 | id < ARRAY_SIZE(to_pci_info(pdev)->hosts) && ihost; \ | 315 | (ihost = to_pci_info(pdev)->hosts[id]); id++) |
| 316 | ihost = to_pci_info(pdev)->hosts[++id]) | ||
| 317 | 316 | ||
| 318 | static inline void wait_for_start(struct isci_host *ihost) | 317 | static inline void wait_for_start(struct isci_host *ihost) |
| 319 | { | 318 | { |
diff --git a/drivers/scsi/isci/port_config.c b/drivers/scsi/isci/port_config.c index 85c77f6b802b..ac879745ef80 100644 --- a/drivers/scsi/isci/port_config.c +++ b/drivers/scsi/isci/port_config.c | |||
| @@ -615,13 +615,6 @@ static void sci_apc_agent_link_up(struct isci_host *ihost, | |||
| 615 | SCIC_SDS_APC_WAIT_LINK_UP_NOTIFICATION); | 615 | SCIC_SDS_APC_WAIT_LINK_UP_NOTIFICATION); |
| 616 | } else { | 616 | } else { |
| 617 | /* the phy is already the part of the port */ | 617 | /* the phy is already the part of the port */ |
| 618 | u32 port_state = iport->sm.current_state_id; | ||
| 619 | |||
| 620 | /* if the PORT'S state is resetting then the link up is from | ||
| 621 | * port hard reset in this case, we need to tell the port | ||
| 622 | * that link up is recieved | ||
| 623 | */ | ||
| 624 | BUG_ON(port_state != SCI_PORT_RESETTING); | ||
| 625 | port_agent->phy_ready_mask |= 1 << phy_index; | 618 | port_agent->phy_ready_mask |= 1 << phy_index; |
| 626 | sci_port_link_up(iport, iphy); | 619 | sci_port_link_up(iport, iphy); |
| 627 | } | 620 | } |
diff --git a/drivers/scsi/isci/task.c b/drivers/scsi/isci/task.c index 0d30ca849e8f..5d6fda72d659 100644 --- a/drivers/scsi/isci/task.c +++ b/drivers/scsi/isci/task.c | |||
| @@ -801,7 +801,7 @@ int isci_task_I_T_nexus_reset(struct domain_device *dev) | |||
| 801 | /* XXX: need to cleanup any ireqs targeting this | 801 | /* XXX: need to cleanup any ireqs targeting this |
| 802 | * domain_device | 802 | * domain_device |
| 803 | */ | 803 | */ |
| 804 | ret = TMF_RESP_FUNC_COMPLETE; | 804 | ret = -ENODEV; |
| 805 | goto out; | 805 | goto out; |
| 806 | } | 806 | } |
| 807 | 807 | ||
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h index e1fe95ef23e1..266724b6b899 100644 --- a/drivers/scsi/qla2xxx/qla_def.h +++ b/drivers/scsi/qla2xxx/qla_def.h | |||
| @@ -2996,8 +2996,7 @@ struct qla_hw_data { | |||
| 2996 | IS_QLA82XX(ha) || IS_QLA83XX(ha) || \ | 2996 | IS_QLA82XX(ha) || IS_QLA83XX(ha) || \ |
| 2997 | IS_QLA8044(ha)) | 2997 | IS_QLA8044(ha)) |
| 2998 | #define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha)) | 2998 | #define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha)) |
| 2999 | #define IS_NOPOLLING_TYPE(ha) ((IS_QLA25XX(ha) || IS_QLA81XX(ha) || \ | 2999 | #define IS_NOPOLLING_TYPE(ha) (IS_QLA81XX(ha) && (ha)->flags.msix_enabled) |
| 3000 | IS_QLA83XX(ha)) && (ha)->flags.msix_enabled) | ||
| 3001 | #define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha)) | 3000 | #define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha)) |
| 3002 | #define IS_NOCACHE_VPD_TYPE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha)) | 3001 | #define IS_NOCACHE_VPD_TYPE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha)) |
| 3003 | #define IS_ALOGIO_CAPABLE(ha) (IS_QLA23XX(ha) || IS_FWI2_CAPABLE(ha)) | 3002 | #define IS_ALOGIO_CAPABLE(ha) (IS_QLA23XX(ha) || IS_FWI2_CAPABLE(ha)) |
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index 9bc86b9e86b1..0a1dcb43d18b 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c | |||
| @@ -2880,6 +2880,7 @@ static int | |||
| 2880 | qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) | 2880 | qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) |
| 2881 | { | 2881 | { |
| 2882 | #define MIN_MSIX_COUNT 2 | 2882 | #define MIN_MSIX_COUNT 2 |
| 2883 | #define ATIO_VECTOR 2 | ||
| 2883 | int i, ret; | 2884 | int i, ret; |
| 2884 | struct msix_entry *entries; | 2885 | struct msix_entry *entries; |
| 2885 | struct qla_msix_entry *qentry; | 2886 | struct qla_msix_entry *qentry; |
| @@ -2936,34 +2937,47 @@ msix_failed: | |||
| 2936 | } | 2937 | } |
| 2937 | 2938 | ||
| 2938 | /* Enable MSI-X vectors for the base queue */ | 2939 | /* Enable MSI-X vectors for the base queue */ |
| 2939 | for (i = 0; i < ha->msix_count; i++) { | 2940 | for (i = 0; i < 2; i++) { |
| 2940 | qentry = &ha->msix_entries[i]; | 2941 | qentry = &ha->msix_entries[i]; |
| 2941 | if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) { | 2942 | if (IS_P3P_TYPE(ha)) |
| 2942 | ret = request_irq(qentry->vector, | ||
| 2943 | qla83xx_msix_entries[i].handler, | ||
| 2944 | 0, qla83xx_msix_entries[i].name, rsp); | ||
| 2945 | } else if (IS_P3P_TYPE(ha)) { | ||
| 2946 | ret = request_irq(qentry->vector, | 2943 | ret = request_irq(qentry->vector, |
| 2947 | qla82xx_msix_entries[i].handler, | 2944 | qla82xx_msix_entries[i].handler, |
| 2948 | 0, qla82xx_msix_entries[i].name, rsp); | 2945 | 0, qla82xx_msix_entries[i].name, rsp); |
| 2949 | } else { | 2946 | else |
| 2950 | ret = request_irq(qentry->vector, | 2947 | ret = request_irq(qentry->vector, |
| 2951 | msix_entries[i].handler, | 2948 | msix_entries[i].handler, |
| 2952 | 0, msix_entries[i].name, rsp); | 2949 | 0, msix_entries[i].name, rsp); |
| 2953 | } | 2950 | if (ret) |
| 2954 | if (ret) { | 2951 | goto msix_register_fail; |
| 2955 | ql_log(ql_log_fatal, vha, 0x00cb, | ||
| 2956 | "MSI-X: unable to register handler -- %x/%d.\n", | ||
| 2957 | qentry->vector, ret); | ||
| 2958 | qla24xx_disable_msix(ha); | ||
| 2959 | ha->mqenable = 0; | ||
| 2960 | goto msix_out; | ||
| 2961 | } | ||
| 2962 | qentry->have_irq = 1; | 2952 | qentry->have_irq = 1; |
| 2963 | qentry->rsp = rsp; | 2953 | qentry->rsp = rsp; |
| 2964 | rsp->msix = qentry; | 2954 | rsp->msix = qentry; |
| 2965 | } | 2955 | } |
| 2966 | 2956 | ||
| 2957 | /* | ||
| 2958 | * If target mode is enable, also request the vector for the ATIO | ||
| 2959 | * queue. | ||
| 2960 | */ | ||
| 2961 | if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) { | ||
| 2962 | qentry = &ha->msix_entries[ATIO_VECTOR]; | ||
| 2963 | ret = request_irq(qentry->vector, | ||
| 2964 | qla83xx_msix_entries[ATIO_VECTOR].handler, | ||
| 2965 | 0, qla83xx_msix_entries[ATIO_VECTOR].name, rsp); | ||
| 2966 | qentry->have_irq = 1; | ||
| 2967 | qentry->rsp = rsp; | ||
| 2968 | rsp->msix = qentry; | ||
| 2969 | } | ||
| 2970 | |||
| 2971 | msix_register_fail: | ||
| 2972 | if (ret) { | ||
| 2973 | ql_log(ql_log_fatal, vha, 0x00cb, | ||
| 2974 | "MSI-X: unable to register handler -- %x/%d.\n", | ||
| 2975 | qentry->vector, ret); | ||
| 2976 | qla24xx_disable_msix(ha); | ||
| 2977 | ha->mqenable = 0; | ||
| 2978 | goto msix_out; | ||
| 2979 | } | ||
| 2980 | |||
| 2967 | /* Enable MSI-X vector for response queue update for queue 0 */ | 2981 | /* Enable MSI-X vector for response queue update for queue 0 */ |
| 2968 | if (IS_QLA83XX(ha)) { | 2982 | if (IS_QLA83XX(ha)) { |
| 2969 | if (ha->msixbase && ha->mqiobase && | 2983 | if (ha->msixbase && ha->mqiobase && |
diff --git a/drivers/scsi/qla2xxx/qla_target.c b/drivers/scsi/qla2xxx/qla_target.c index 9e80d61e5a3a..0cb73074c199 100644 --- a/drivers/scsi/qla2xxx/qla_target.c +++ b/drivers/scsi/qla2xxx/qla_target.c | |||
| @@ -790,17 +790,32 @@ static inline int test_tgt_sess_count(struct qla_tgt *tgt) | |||
| 790 | } | 790 | } |
| 791 | 791 | ||
| 792 | /* Called by tcm_qla2xxx configfs code */ | 792 | /* Called by tcm_qla2xxx configfs code */ |
| 793 | void qlt_stop_phase1(struct qla_tgt *tgt) | 793 | int qlt_stop_phase1(struct qla_tgt *tgt) |
| 794 | { | 794 | { |
| 795 | struct scsi_qla_host *vha = tgt->vha; | 795 | struct scsi_qla_host *vha = tgt->vha; |
| 796 | struct qla_hw_data *ha = tgt->ha; | 796 | struct qla_hw_data *ha = tgt->ha; |
| 797 | unsigned long flags; | 797 | unsigned long flags; |
| 798 | 798 | ||
| 799 | mutex_lock(&qla_tgt_mutex); | ||
| 800 | if (!vha->fc_vport) { | ||
| 801 | struct Scsi_Host *sh = vha->host; | ||
| 802 | struct fc_host_attrs *fc_host = shost_to_fc_host(sh); | ||
| 803 | bool npiv_vports; | ||
| 804 | |||
| 805 | spin_lock_irqsave(sh->host_lock, flags); | ||
| 806 | npiv_vports = (fc_host->npiv_vports_inuse); | ||
| 807 | spin_unlock_irqrestore(sh->host_lock, flags); | ||
| 808 | |||
| 809 | if (npiv_vports) { | ||
| 810 | mutex_unlock(&qla_tgt_mutex); | ||
| 811 | return -EPERM; | ||
| 812 | } | ||
| 813 | } | ||
| 799 | if (tgt->tgt_stop || tgt->tgt_stopped) { | 814 | if (tgt->tgt_stop || tgt->tgt_stopped) { |
| 800 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04e, | 815 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04e, |
| 801 | "Already in tgt->tgt_stop or tgt_stopped state\n"); | 816 | "Already in tgt->tgt_stop or tgt_stopped state\n"); |
| 802 | dump_stack(); | 817 | mutex_unlock(&qla_tgt_mutex); |
| 803 | return; | 818 | return -EPERM; |
| 804 | } | 819 | } |
| 805 | 820 | ||
| 806 | ql_dbg(ql_dbg_tgt, vha, 0xe003, "Stopping target for host %ld(%p)\n", | 821 | ql_dbg(ql_dbg_tgt, vha, 0xe003, "Stopping target for host %ld(%p)\n", |
| @@ -815,6 +830,7 @@ void qlt_stop_phase1(struct qla_tgt *tgt) | |||
| 815 | qlt_clear_tgt_db(tgt, true); | 830 | qlt_clear_tgt_db(tgt, true); |
| 816 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 831 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 817 | mutex_unlock(&vha->vha_tgt.tgt_mutex); | 832 | mutex_unlock(&vha->vha_tgt.tgt_mutex); |
| 833 | mutex_unlock(&qla_tgt_mutex); | ||
| 818 | 834 | ||
| 819 | flush_delayed_work(&tgt->sess_del_work); | 835 | flush_delayed_work(&tgt->sess_del_work); |
| 820 | 836 | ||
| @@ -841,6 +857,7 @@ void qlt_stop_phase1(struct qla_tgt *tgt) | |||
| 841 | 857 | ||
| 842 | /* Wait for sessions to clear out (just in case) */ | 858 | /* Wait for sessions to clear out (just in case) */ |
| 843 | wait_event(tgt->waitQ, test_tgt_sess_count(tgt)); | 859 | wait_event(tgt->waitQ, test_tgt_sess_count(tgt)); |
| 860 | return 0; | ||
| 844 | } | 861 | } |
| 845 | EXPORT_SYMBOL(qlt_stop_phase1); | 862 | EXPORT_SYMBOL(qlt_stop_phase1); |
| 846 | 863 | ||
| @@ -2595,8 +2612,6 @@ static int qlt_handle_cmd_for_atio(struct scsi_qla_host *vha, | |||
| 2595 | return -ENOMEM; | 2612 | return -ENOMEM; |
| 2596 | } | 2613 | } |
| 2597 | 2614 | ||
| 2598 | INIT_LIST_HEAD(&cmd->cmd_list); | ||
| 2599 | |||
| 2600 | memcpy(&cmd->atio, atio, sizeof(*atio)); | 2615 | memcpy(&cmd->atio, atio, sizeof(*atio)); |
| 2601 | cmd->state = QLA_TGT_STATE_NEW; | 2616 | cmd->state = QLA_TGT_STATE_NEW; |
| 2602 | cmd->tgt = vha->vha_tgt.qla_tgt; | 2617 | cmd->tgt = vha->vha_tgt.qla_tgt; |
| @@ -3187,7 +3202,8 @@ restart: | |||
| 3187 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf02c, | 3202 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf02c, |
| 3188 | "SRR cmd %p (se_cmd %p, tag %d, op %x), " | 3203 | "SRR cmd %p (se_cmd %p, tag %d, op %x), " |
| 3189 | "sg_cnt=%d, offset=%d", cmd, &cmd->se_cmd, cmd->tag, | 3204 | "sg_cnt=%d, offset=%d", cmd, &cmd->se_cmd, cmd->tag, |
| 3190 | se_cmd->t_task_cdb[0], cmd->sg_cnt, cmd->offset); | 3205 | se_cmd->t_task_cdb ? se_cmd->t_task_cdb[0] : 0, |
| 3206 | cmd->sg_cnt, cmd->offset); | ||
| 3191 | 3207 | ||
| 3192 | qlt_handle_srr(vha, sctio, imm); | 3208 | qlt_handle_srr(vha, sctio, imm); |
| 3193 | 3209 | ||
| @@ -4183,6 +4199,9 @@ int qlt_add_target(struct qla_hw_data *ha, struct scsi_qla_host *base_vha) | |||
| 4183 | tgt->datasegs_per_cmd = QLA_TGT_DATASEGS_PER_CMD_24XX; | 4199 | tgt->datasegs_per_cmd = QLA_TGT_DATASEGS_PER_CMD_24XX; |
| 4184 | tgt->datasegs_per_cont = QLA_TGT_DATASEGS_PER_CONT_24XX; | 4200 | tgt->datasegs_per_cont = QLA_TGT_DATASEGS_PER_CONT_24XX; |
| 4185 | 4201 | ||
| 4202 | if (base_vha->fc_vport) | ||
| 4203 | return 0; | ||
| 4204 | |||
| 4186 | mutex_lock(&qla_tgt_mutex); | 4205 | mutex_lock(&qla_tgt_mutex); |
| 4187 | list_add_tail(&tgt->tgt_list_entry, &qla_tgt_glist); | 4206 | list_add_tail(&tgt->tgt_list_entry, &qla_tgt_glist); |
| 4188 | mutex_unlock(&qla_tgt_mutex); | 4207 | mutex_unlock(&qla_tgt_mutex); |
| @@ -4196,6 +4215,10 @@ int qlt_remove_target(struct qla_hw_data *ha, struct scsi_qla_host *vha) | |||
| 4196 | if (!vha->vha_tgt.qla_tgt) | 4215 | if (!vha->vha_tgt.qla_tgt) |
| 4197 | return 0; | 4216 | return 0; |
| 4198 | 4217 | ||
| 4218 | if (vha->fc_vport) { | ||
| 4219 | qlt_release(vha->vha_tgt.qla_tgt); | ||
| 4220 | return 0; | ||
| 4221 | } | ||
| 4199 | mutex_lock(&qla_tgt_mutex); | 4222 | mutex_lock(&qla_tgt_mutex); |
| 4200 | list_del(&vha->vha_tgt.qla_tgt->tgt_list_entry); | 4223 | list_del(&vha->vha_tgt.qla_tgt->tgt_list_entry); |
| 4201 | mutex_unlock(&qla_tgt_mutex); | 4224 | mutex_unlock(&qla_tgt_mutex); |
| @@ -4267,6 +4290,12 @@ int qlt_lport_register(void *target_lport_ptr, u64 phys_wwpn, | |||
| 4267 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 4290 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 4268 | continue; | 4291 | continue; |
| 4269 | } | 4292 | } |
| 4293 | if (tgt->tgt_stop) { | ||
| 4294 | pr_debug("MODE_TARGET in shutdown on qla2xxx(%d)\n", | ||
| 4295 | host->host_no); | ||
| 4296 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | ||
| 4297 | continue; | ||
| 4298 | } | ||
| 4270 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 4299 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 4271 | 4300 | ||
| 4272 | if (!scsi_host_get(host)) { | 4301 | if (!scsi_host_get(host)) { |
| @@ -4281,12 +4310,11 @@ int qlt_lport_register(void *target_lport_ptr, u64 phys_wwpn, | |||
| 4281 | scsi_host_put(host); | 4310 | scsi_host_put(host); |
| 4282 | continue; | 4311 | continue; |
| 4283 | } | 4312 | } |
| 4284 | mutex_unlock(&qla_tgt_mutex); | ||
| 4285 | |||
| 4286 | rc = (*callback)(vha, target_lport_ptr, npiv_wwpn, npiv_wwnn); | 4313 | rc = (*callback)(vha, target_lport_ptr, npiv_wwpn, npiv_wwnn); |
| 4287 | if (rc != 0) | 4314 | if (rc != 0) |
| 4288 | scsi_host_put(host); | 4315 | scsi_host_put(host); |
| 4289 | 4316 | ||
| 4317 | mutex_unlock(&qla_tgt_mutex); | ||
| 4290 | return rc; | 4318 | return rc; |
| 4291 | } | 4319 | } |
| 4292 | mutex_unlock(&qla_tgt_mutex); | 4320 | mutex_unlock(&qla_tgt_mutex); |
diff --git a/drivers/scsi/qla2xxx/qla_target.h b/drivers/scsi/qla2xxx/qla_target.h index 1d10eecad499..ce33d8c26406 100644 --- a/drivers/scsi/qla2xxx/qla_target.h +++ b/drivers/scsi/qla2xxx/qla_target.h | |||
| @@ -855,7 +855,6 @@ struct qla_tgt_cmd { | |||
| 855 | uint16_t loop_id; /* to save extra sess dereferences */ | 855 | uint16_t loop_id; /* to save extra sess dereferences */ |
| 856 | struct qla_tgt *tgt; /* to save extra sess dereferences */ | 856 | struct qla_tgt *tgt; /* to save extra sess dereferences */ |
| 857 | struct scsi_qla_host *vha; | 857 | struct scsi_qla_host *vha; |
| 858 | struct list_head cmd_list; | ||
| 859 | 858 | ||
| 860 | struct atio_from_isp atio; | 859 | struct atio_from_isp atio; |
| 861 | }; | 860 | }; |
| @@ -1002,7 +1001,7 @@ extern void qlt_modify_vp_config(struct scsi_qla_host *, | |||
| 1002 | extern void qlt_probe_one_stage1(struct scsi_qla_host *, struct qla_hw_data *); | 1001 | extern void qlt_probe_one_stage1(struct scsi_qla_host *, struct qla_hw_data *); |
| 1003 | extern int qlt_mem_alloc(struct qla_hw_data *); | 1002 | extern int qlt_mem_alloc(struct qla_hw_data *); |
| 1004 | extern void qlt_mem_free(struct qla_hw_data *); | 1003 | extern void qlt_mem_free(struct qla_hw_data *); |
| 1005 | extern void qlt_stop_phase1(struct qla_tgt *); | 1004 | extern int qlt_stop_phase1(struct qla_tgt *); |
| 1006 | extern void qlt_stop_phase2(struct qla_tgt *); | 1005 | extern void qlt_stop_phase2(struct qla_tgt *); |
| 1007 | extern irqreturn_t qla83xx_msix_atio_q(int, void *); | 1006 | extern irqreturn_t qla83xx_msix_atio_q(int, void *); |
| 1008 | extern void qlt_83xx_iospace_config(struct qla_hw_data *); | 1007 | extern void qlt_83xx_iospace_config(struct qla_hw_data *); |
diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.c b/drivers/scsi/qla2xxx/tcm_qla2xxx.c index 75a141bbe74d..788c4fe2b0c9 100644 --- a/drivers/scsi/qla2xxx/tcm_qla2xxx.c +++ b/drivers/scsi/qla2xxx/tcm_qla2xxx.c | |||
| @@ -182,20 +182,6 @@ static int tcm_qla2xxx_npiv_parse_wwn( | |||
| 182 | return 0; | 182 | return 0; |
| 183 | } | 183 | } |
| 184 | 184 | ||
| 185 | static ssize_t tcm_qla2xxx_npiv_format_wwn(char *buf, size_t len, | ||
| 186 | u64 wwpn, u64 wwnn) | ||
| 187 | { | ||
| 188 | u8 b[8], b2[8]; | ||
| 189 | |||
| 190 | put_unaligned_be64(wwpn, b); | ||
| 191 | put_unaligned_be64(wwnn, b2); | ||
| 192 | return snprintf(buf, len, | ||
| 193 | "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x," | ||
| 194 | "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x", | ||
| 195 | b[0], b[1], b[2], b[3], b[4], b[5], b[6], b[7], | ||
| 196 | b2[0], b2[1], b2[2], b2[3], b2[4], b2[5], b2[6], b2[7]); | ||
| 197 | } | ||
| 198 | |||
| 199 | static char *tcm_qla2xxx_npiv_get_fabric_name(void) | 185 | static char *tcm_qla2xxx_npiv_get_fabric_name(void) |
| 200 | { | 186 | { |
| 201 | return "qla2xxx_npiv"; | 187 | return "qla2xxx_npiv"; |
| @@ -227,15 +213,6 @@ static char *tcm_qla2xxx_get_fabric_wwn(struct se_portal_group *se_tpg) | |||
| 227 | return lport->lport_naa_name; | 213 | return lport->lport_naa_name; |
| 228 | } | 214 | } |
| 229 | 215 | ||
| 230 | static char *tcm_qla2xxx_npiv_get_fabric_wwn(struct se_portal_group *se_tpg) | ||
| 231 | { | ||
| 232 | struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg, | ||
| 233 | struct tcm_qla2xxx_tpg, se_tpg); | ||
| 234 | struct tcm_qla2xxx_lport *lport = tpg->lport; | ||
| 235 | |||
| 236 | return &lport->lport_npiv_name[0]; | ||
| 237 | } | ||
| 238 | |||
| 239 | static u16 tcm_qla2xxx_get_tag(struct se_portal_group *se_tpg) | 216 | static u16 tcm_qla2xxx_get_tag(struct se_portal_group *se_tpg) |
| 240 | { | 217 | { |
| 241 | struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg, | 218 | struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg, |
| @@ -941,15 +918,41 @@ static ssize_t tcm_qla2xxx_tpg_show_enable( | |||
| 941 | atomic_read(&tpg->lport_tpg_enabled)); | 918 | atomic_read(&tpg->lport_tpg_enabled)); |
| 942 | } | 919 | } |
| 943 | 920 | ||
| 921 | static void tcm_qla2xxx_depend_tpg(struct work_struct *work) | ||
| 922 | { | ||
| 923 | struct tcm_qla2xxx_tpg *base_tpg = container_of(work, | ||
| 924 | struct tcm_qla2xxx_tpg, tpg_base_work); | ||
| 925 | struct se_portal_group *se_tpg = &base_tpg->se_tpg; | ||
| 926 | struct scsi_qla_host *base_vha = base_tpg->lport->qla_vha; | ||
| 927 | |||
| 928 | if (!configfs_depend_item(se_tpg->se_tpg_tfo->tf_subsys, | ||
| 929 | &se_tpg->tpg_group.cg_item)) { | ||
| 930 | atomic_set(&base_tpg->lport_tpg_enabled, 1); | ||
| 931 | qlt_enable_vha(base_vha); | ||
| 932 | } | ||
| 933 | complete(&base_tpg->tpg_base_comp); | ||
| 934 | } | ||
| 935 | |||
| 936 | static void tcm_qla2xxx_undepend_tpg(struct work_struct *work) | ||
| 937 | { | ||
| 938 | struct tcm_qla2xxx_tpg *base_tpg = container_of(work, | ||
| 939 | struct tcm_qla2xxx_tpg, tpg_base_work); | ||
| 940 | struct se_portal_group *se_tpg = &base_tpg->se_tpg; | ||
| 941 | struct scsi_qla_host *base_vha = base_tpg->lport->qla_vha; | ||
| 942 | |||
| 943 | if (!qlt_stop_phase1(base_vha->vha_tgt.qla_tgt)) { | ||
| 944 | atomic_set(&base_tpg->lport_tpg_enabled, 0); | ||
| 945 | configfs_undepend_item(se_tpg->se_tpg_tfo->tf_subsys, | ||
| 946 | &se_tpg->tpg_group.cg_item); | ||
| 947 | } | ||
| 948 | complete(&base_tpg->tpg_base_comp); | ||
| 949 | } | ||
| 950 | |||
| 944 | static ssize_t tcm_qla2xxx_tpg_store_enable( | 951 | static ssize_t tcm_qla2xxx_tpg_store_enable( |
| 945 | struct se_portal_group *se_tpg, | 952 | struct se_portal_group *se_tpg, |
| 946 | const char *page, | 953 | const char *page, |
| 947 | size_t count) | 954 | size_t count) |
| 948 | { | 955 | { |
| 949 | struct se_wwn *se_wwn = se_tpg->se_tpg_wwn; | ||
| 950 | struct tcm_qla2xxx_lport *lport = container_of(se_wwn, | ||
| 951 | struct tcm_qla2xxx_lport, lport_wwn); | ||
| 952 | struct scsi_qla_host *vha = lport->qla_vha; | ||
| 953 | struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg, | 956 | struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg, |
| 954 | struct tcm_qla2xxx_tpg, se_tpg); | 957 | struct tcm_qla2xxx_tpg, se_tpg); |
| 955 | unsigned long op; | 958 | unsigned long op; |
| @@ -964,19 +967,28 @@ static ssize_t tcm_qla2xxx_tpg_store_enable( | |||
| 964 | pr_err("Illegal value for tpg_enable: %lu\n", op); | 967 | pr_err("Illegal value for tpg_enable: %lu\n", op); |
| 965 | return -EINVAL; | 968 | return -EINVAL; |
| 966 | } | 969 | } |
| 967 | |||
| 968 | if (op) { | 970 | if (op) { |
| 969 | atomic_set(&tpg->lport_tpg_enabled, 1); | 971 | if (atomic_read(&tpg->lport_tpg_enabled)) |
| 970 | qlt_enable_vha(vha); | 972 | return -EEXIST; |
| 973 | |||
| 974 | INIT_WORK(&tpg->tpg_base_work, tcm_qla2xxx_depend_tpg); | ||
| 971 | } else { | 975 | } else { |
| 972 | if (!vha->vha_tgt.qla_tgt) { | 976 | if (!atomic_read(&tpg->lport_tpg_enabled)) |
| 973 | pr_err("struct qla_hw_data *vha->vha_tgt.qla_tgt is NULL\n"); | 977 | return count; |
| 974 | return -ENODEV; | 978 | |
| 975 | } | 979 | INIT_WORK(&tpg->tpg_base_work, tcm_qla2xxx_undepend_tpg); |
| 976 | atomic_set(&tpg->lport_tpg_enabled, 0); | ||
| 977 | qlt_stop_phase1(vha->vha_tgt.qla_tgt); | ||
| 978 | } | 980 | } |
| 981 | init_completion(&tpg->tpg_base_comp); | ||
| 982 | schedule_work(&tpg->tpg_base_work); | ||
| 983 | wait_for_completion(&tpg->tpg_base_comp); | ||
| 979 | 984 | ||
| 985 | if (op) { | ||
| 986 | if (!atomic_read(&tpg->lport_tpg_enabled)) | ||
| 987 | return -ENODEV; | ||
| 988 | } else { | ||
| 989 | if (atomic_read(&tpg->lport_tpg_enabled)) | ||
| 990 | return -EPERM; | ||
| 991 | } | ||
| 980 | return count; | 992 | return count; |
| 981 | } | 993 | } |
| 982 | 994 | ||
| @@ -1053,11 +1065,64 @@ static void tcm_qla2xxx_drop_tpg(struct se_portal_group *se_tpg) | |||
| 1053 | /* | 1065 | /* |
| 1054 | * Clear local TPG=1 pointer for non NPIV mode. | 1066 | * Clear local TPG=1 pointer for non NPIV mode. |
| 1055 | */ | 1067 | */ |
| 1056 | lport->tpg_1 = NULL; | 1068 | lport->tpg_1 = NULL; |
| 1057 | |||
| 1058 | kfree(tpg); | 1069 | kfree(tpg); |
| 1059 | } | 1070 | } |
| 1060 | 1071 | ||
| 1072 | static ssize_t tcm_qla2xxx_npiv_tpg_show_enable( | ||
| 1073 | struct se_portal_group *se_tpg, | ||
| 1074 | char *page) | ||
| 1075 | { | ||
| 1076 | return tcm_qla2xxx_tpg_show_enable(se_tpg, page); | ||
| 1077 | } | ||
| 1078 | |||
| 1079 | static ssize_t tcm_qla2xxx_npiv_tpg_store_enable( | ||
| 1080 | struct se_portal_group *se_tpg, | ||
| 1081 | const char *page, | ||
| 1082 | size_t count) | ||
| 1083 | { | ||
| 1084 | struct se_wwn *se_wwn = se_tpg->se_tpg_wwn; | ||
| 1085 | struct tcm_qla2xxx_lport *lport = container_of(se_wwn, | ||
| 1086 | struct tcm_qla2xxx_lport, lport_wwn); | ||
| 1087 | struct scsi_qla_host *vha = lport->qla_vha; | ||
| 1088 | struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg, | ||
| 1089 | struct tcm_qla2xxx_tpg, se_tpg); | ||
| 1090 | unsigned long op; | ||
| 1091 | int rc; | ||
| 1092 | |||
| 1093 | rc = kstrtoul(page, 0, &op); | ||
| 1094 | if (rc < 0) { | ||
| 1095 | pr_err("kstrtoul() returned %d\n", rc); | ||
| 1096 | return -EINVAL; | ||
| 1097 | } | ||
| 1098 | if ((op != 1) && (op != 0)) { | ||
| 1099 | pr_err("Illegal value for tpg_enable: %lu\n", op); | ||
| 1100 | return -EINVAL; | ||
| 1101 | } | ||
| 1102 | if (op) { | ||
| 1103 | if (atomic_read(&tpg->lport_tpg_enabled)) | ||
| 1104 | return -EEXIST; | ||
| 1105 | |||
| 1106 | atomic_set(&tpg->lport_tpg_enabled, 1); | ||
| 1107 | qlt_enable_vha(vha); | ||
| 1108 | } else { | ||
| 1109 | if (!atomic_read(&tpg->lport_tpg_enabled)) | ||
| 1110 | return count; | ||
| 1111 | |||
| 1112 | atomic_set(&tpg->lport_tpg_enabled, 0); | ||
| 1113 | qlt_stop_phase1(vha->vha_tgt.qla_tgt); | ||
| 1114 | } | ||
| 1115 | |||
| 1116 | return count; | ||
| 1117 | } | ||
| 1118 | |||
| 1119 | TF_TPG_BASE_ATTR(tcm_qla2xxx_npiv, enable, S_IRUGO | S_IWUSR); | ||
| 1120 | |||
| 1121 | static struct configfs_attribute *tcm_qla2xxx_npiv_tpg_attrs[] = { | ||
| 1122 | &tcm_qla2xxx_npiv_tpg_enable.attr, | ||
| 1123 | NULL, | ||
| 1124 | }; | ||
| 1125 | |||
| 1061 | static struct se_portal_group *tcm_qla2xxx_npiv_make_tpg( | 1126 | static struct se_portal_group *tcm_qla2xxx_npiv_make_tpg( |
| 1062 | struct se_wwn *wwn, | 1127 | struct se_wwn *wwn, |
| 1063 | struct config_group *group, | 1128 | struct config_group *group, |
| @@ -1650,6 +1715,9 @@ static int tcm_qla2xxx_lport_register_npiv_cb(struct scsi_qla_host *base_vha, | |||
| 1650 | struct scsi_qla_host *npiv_vha; | 1715 | struct scsi_qla_host *npiv_vha; |
| 1651 | struct tcm_qla2xxx_lport *lport = | 1716 | struct tcm_qla2xxx_lport *lport = |
| 1652 | (struct tcm_qla2xxx_lport *)target_lport_ptr; | 1717 | (struct tcm_qla2xxx_lport *)target_lport_ptr; |
| 1718 | struct tcm_qla2xxx_lport *base_lport = | ||
| 1719 | (struct tcm_qla2xxx_lport *)base_vha->vha_tgt.target_lport_ptr; | ||
| 1720 | struct tcm_qla2xxx_tpg *base_tpg; | ||
| 1653 | struct fc_vport_identifiers vport_id; | 1721 | struct fc_vport_identifiers vport_id; |
| 1654 | 1722 | ||
| 1655 | if (!qla_tgt_mode_enabled(base_vha)) { | 1723 | if (!qla_tgt_mode_enabled(base_vha)) { |
| @@ -1657,6 +1725,13 @@ static int tcm_qla2xxx_lport_register_npiv_cb(struct scsi_qla_host *base_vha, | |||
| 1657 | return -EPERM; | 1725 | return -EPERM; |
| 1658 | } | 1726 | } |
| 1659 | 1727 | ||
| 1728 | if (!base_lport || !base_lport->tpg_1 || | ||
| 1729 | !atomic_read(&base_lport->tpg_1->lport_tpg_enabled)) { | ||
| 1730 | pr_err("qla2xxx base_lport or tpg_1 not available\n"); | ||
| 1731 | return -EPERM; | ||
| 1732 | } | ||
| 1733 | base_tpg = base_lport->tpg_1; | ||
| 1734 | |||
| 1660 | memset(&vport_id, 0, sizeof(vport_id)); | 1735 | memset(&vport_id, 0, sizeof(vport_id)); |
| 1661 | vport_id.port_name = npiv_wwpn; | 1736 | vport_id.port_name = npiv_wwpn; |
| 1662 | vport_id.node_name = npiv_wwnn; | 1737 | vport_id.node_name = npiv_wwnn; |
| @@ -1675,7 +1750,6 @@ static int tcm_qla2xxx_lport_register_npiv_cb(struct scsi_qla_host *base_vha, | |||
| 1675 | npiv_vha = (struct scsi_qla_host *)vport->dd_data; | 1750 | npiv_vha = (struct scsi_qla_host *)vport->dd_data; |
| 1676 | npiv_vha->vha_tgt.target_lport_ptr = target_lport_ptr; | 1751 | npiv_vha->vha_tgt.target_lport_ptr = target_lport_ptr; |
| 1677 | lport->qla_vha = npiv_vha; | 1752 | lport->qla_vha = npiv_vha; |
| 1678 | |||
| 1679 | scsi_host_get(npiv_vha->host); | 1753 | scsi_host_get(npiv_vha->host); |
| 1680 | return 0; | 1754 | return 0; |
| 1681 | } | 1755 | } |
| @@ -1714,8 +1788,6 @@ static struct se_wwn *tcm_qla2xxx_npiv_make_lport( | |||
| 1714 | } | 1788 | } |
| 1715 | lport->lport_npiv_wwpn = npiv_wwpn; | 1789 | lport->lport_npiv_wwpn = npiv_wwpn; |
| 1716 | lport->lport_npiv_wwnn = npiv_wwnn; | 1790 | lport->lport_npiv_wwnn = npiv_wwnn; |
| 1717 | tcm_qla2xxx_npiv_format_wwn(&lport->lport_npiv_name[0], | ||
| 1718 | TCM_QLA2XXX_NAMELEN, npiv_wwpn, npiv_wwnn); | ||
| 1719 | sprintf(lport->lport_naa_name, "naa.%016llx", (unsigned long long) npiv_wwpn); | 1791 | sprintf(lport->lport_naa_name, "naa.%016llx", (unsigned long long) npiv_wwpn); |
| 1720 | 1792 | ||
| 1721 | ret = tcm_qla2xxx_init_lport(lport); | 1793 | ret = tcm_qla2xxx_init_lport(lport); |
| @@ -1824,7 +1896,7 @@ static struct target_core_fabric_ops tcm_qla2xxx_ops = { | |||
| 1824 | static struct target_core_fabric_ops tcm_qla2xxx_npiv_ops = { | 1896 | static struct target_core_fabric_ops tcm_qla2xxx_npiv_ops = { |
| 1825 | .get_fabric_name = tcm_qla2xxx_npiv_get_fabric_name, | 1897 | .get_fabric_name = tcm_qla2xxx_npiv_get_fabric_name, |
| 1826 | .get_fabric_proto_ident = tcm_qla2xxx_get_fabric_proto_ident, | 1898 | .get_fabric_proto_ident = tcm_qla2xxx_get_fabric_proto_ident, |
| 1827 | .tpg_get_wwn = tcm_qla2xxx_npiv_get_fabric_wwn, | 1899 | .tpg_get_wwn = tcm_qla2xxx_get_fabric_wwn, |
| 1828 | .tpg_get_tag = tcm_qla2xxx_get_tag, | 1900 | .tpg_get_tag = tcm_qla2xxx_get_tag, |
| 1829 | .tpg_get_default_depth = tcm_qla2xxx_get_default_depth, | 1901 | .tpg_get_default_depth = tcm_qla2xxx_get_default_depth, |
| 1830 | .tpg_get_pr_transport_id = tcm_qla2xxx_get_pr_transport_id, | 1902 | .tpg_get_pr_transport_id = tcm_qla2xxx_get_pr_transport_id, |
| @@ -1935,7 +2007,7 @@ static int tcm_qla2xxx_register_configfs(void) | |||
| 1935 | */ | 2007 | */ |
| 1936 | npiv_fabric->tf_cit_tmpl.tfc_wwn_cit.ct_attrs = tcm_qla2xxx_wwn_attrs; | 2008 | npiv_fabric->tf_cit_tmpl.tfc_wwn_cit.ct_attrs = tcm_qla2xxx_wwn_attrs; |
| 1937 | npiv_fabric->tf_cit_tmpl.tfc_tpg_base_cit.ct_attrs = | 2009 | npiv_fabric->tf_cit_tmpl.tfc_tpg_base_cit.ct_attrs = |
| 1938 | tcm_qla2xxx_tpg_attrs; | 2010 | tcm_qla2xxx_npiv_tpg_attrs; |
| 1939 | npiv_fabric->tf_cit_tmpl.tfc_tpg_attrib_cit.ct_attrs = NULL; | 2011 | npiv_fabric->tf_cit_tmpl.tfc_tpg_attrib_cit.ct_attrs = NULL; |
| 1940 | npiv_fabric->tf_cit_tmpl.tfc_tpg_param_cit.ct_attrs = NULL; | 2012 | npiv_fabric->tf_cit_tmpl.tfc_tpg_param_cit.ct_attrs = NULL; |
| 1941 | npiv_fabric->tf_cit_tmpl.tfc_tpg_np_base_cit.ct_attrs = NULL; | 2013 | npiv_fabric->tf_cit_tmpl.tfc_tpg_np_base_cit.ct_attrs = NULL; |
diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.h b/drivers/scsi/qla2xxx/tcm_qla2xxx.h index 275d8b9a7a34..33aaac8c7d59 100644 --- a/drivers/scsi/qla2xxx/tcm_qla2xxx.h +++ b/drivers/scsi/qla2xxx/tcm_qla2xxx.h | |||
| @@ -4,8 +4,6 @@ | |||
| 4 | #define TCM_QLA2XXX_VERSION "v0.1" | 4 | #define TCM_QLA2XXX_VERSION "v0.1" |
| 5 | /* length of ASCII WWPNs including pad */ | 5 | /* length of ASCII WWPNs including pad */ |
| 6 | #define TCM_QLA2XXX_NAMELEN 32 | 6 | #define TCM_QLA2XXX_NAMELEN 32 |
| 7 | /* lenth of ASCII NPIV 'WWPN+WWNN' including pad */ | ||
| 8 | #define TCM_QLA2XXX_NPIV_NAMELEN 66 | ||
| 9 | 7 | ||
| 10 | #include "qla_target.h" | 8 | #include "qla_target.h" |
| 11 | 9 | ||
| @@ -43,6 +41,9 @@ struct tcm_qla2xxx_tpg { | |||
| 43 | struct tcm_qla2xxx_tpg_attrib tpg_attrib; | 41 | struct tcm_qla2xxx_tpg_attrib tpg_attrib; |
| 44 | /* Returned by tcm_qla2xxx_make_tpg() */ | 42 | /* Returned by tcm_qla2xxx_make_tpg() */ |
| 45 | struct se_portal_group se_tpg; | 43 | struct se_portal_group se_tpg; |
| 44 | /* Items for dealing with configfs_depend_item */ | ||
| 45 | struct completion tpg_base_comp; | ||
| 46 | struct work_struct tpg_base_work; | ||
| 46 | }; | 47 | }; |
| 47 | 48 | ||
| 48 | struct tcm_qla2xxx_fc_loopid { | 49 | struct tcm_qla2xxx_fc_loopid { |
| @@ -62,8 +63,6 @@ struct tcm_qla2xxx_lport { | |||
| 62 | char lport_name[TCM_QLA2XXX_NAMELEN]; | 63 | char lport_name[TCM_QLA2XXX_NAMELEN]; |
| 63 | /* ASCII formatted naa WWPN for VPD page 83 etc */ | 64 | /* ASCII formatted naa WWPN for VPD page 83 etc */ |
| 64 | char lport_naa_name[TCM_QLA2XXX_NAMELEN]; | 65 | char lport_naa_name[TCM_QLA2XXX_NAMELEN]; |
| 65 | /* ASCII formatted WWPN+WWNN for NPIV FC Target Lport */ | ||
| 66 | char lport_npiv_name[TCM_QLA2XXX_NPIV_NAMELEN]; | ||
| 67 | /* map for fc_port pointers in 24-bit FC Port ID space */ | 66 | /* map for fc_port pointers in 24-bit FC Port ID space */ |
| 68 | struct btree_head32 lport_fcport_map; | 67 | struct btree_head32 lport_fcport_map; |
| 69 | /* vmalloc-ed memory for fc_port pointers for 16-bit FC loop ID */ | 68 | /* vmalloc-ed memory for fc_port pointers for 16-bit FC loop ID */ |
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index 7bd7f0d5f050..62ec84b42e31 100644 --- a/drivers/scsi/scsi_lib.c +++ b/drivers/scsi/scsi_lib.c | |||
| @@ -1684,7 +1684,7 @@ u64 scsi_calculate_bounce_limit(struct Scsi_Host *shost) | |||
| 1684 | 1684 | ||
| 1685 | host_dev = scsi_get_device(shost); | 1685 | host_dev = scsi_get_device(shost); |
| 1686 | if (host_dev && host_dev->dma_mask) | 1686 | if (host_dev && host_dev->dma_mask) |
| 1687 | bounce_limit = dma_max_pfn(host_dev) << PAGE_SHIFT; | 1687 | bounce_limit = (u64)dma_max_pfn(host_dev) << PAGE_SHIFT; |
| 1688 | 1688 | ||
| 1689 | return bounce_limit; | 1689 | return bounce_limit; |
| 1690 | } | 1690 | } |
diff --git a/drivers/scsi/storvsc_drv.c b/drivers/scsi/storvsc_drv.c index 17d740427240..9969fa1ef7c4 100644 --- a/drivers/scsi/storvsc_drv.c +++ b/drivers/scsi/storvsc_drv.c | |||
| @@ -1419,6 +1419,9 @@ static void storvsc_device_destroy(struct scsi_device *sdevice) | |||
| 1419 | { | 1419 | { |
| 1420 | struct stor_mem_pools *memp = sdevice->hostdata; | 1420 | struct stor_mem_pools *memp = sdevice->hostdata; |
| 1421 | 1421 | ||
| 1422 | if (!memp) | ||
| 1423 | return; | ||
| 1424 | |||
| 1422 | mempool_destroy(memp->request_mempool); | 1425 | mempool_destroy(memp->request_mempool); |
| 1423 | kmem_cache_destroy(memp->request_pool); | 1426 | kmem_cache_destroy(memp->request_pool); |
| 1424 | kfree(memp); | 1427 | kfree(memp); |
