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-rw-r--r--drivers/scsi/sata_sil.c27
1 files changed, 20 insertions, 7 deletions
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
index a1b81d43b11f..e6902645f397 100644
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -41,8 +41,11 @@
41#define DRV_VERSION "0.9" 41#define DRV_VERSION "0.9"
42 42
43enum { 43enum {
44 SIL_FLAG_MOD15WRITE = (1 << 30),
45
44 sil_3112 = 0, 46 sil_3112 = 0,
45 sil_3114 = 1, 47 sil_3112_m15w = 1,
48 sil_3114 = 2,
46 49
47 SIL_FIFO_R0 = 0x40, 50 SIL_FIFO_R0 = 0x40,
48 SIL_FIFO_W0 = 0x41, 51 SIL_FIFO_W0 = 0x41,
@@ -76,13 +79,13 @@ static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
76static void sil_post_set_mode (struct ata_port *ap); 79static void sil_post_set_mode (struct ata_port *ap);
77 80
78static struct pci_device_id sil_pci_tbl[] = { 81static struct pci_device_id sil_pci_tbl[] = {
79 { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 82 { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
80 { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 83 { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
81 { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 84 { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
82 { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, 85 { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 },
83 { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 86 { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
84 { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 87 { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
85 { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 88 { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
86 { } /* terminate list */ 89 { } /* terminate list */
87}; 90};
88 91
@@ -174,6 +177,16 @@ static struct ata_port_info sil_port_info[] = {
174 .mwdma_mask = 0x07, /* mwdma0-2 */ 177 .mwdma_mask = 0x07, /* mwdma0-2 */
175 .udma_mask = 0x3f, /* udma0-5 */ 178 .udma_mask = 0x3f, /* udma0-5 */
176 .port_ops = &sil_ops, 179 .port_ops = &sil_ops,
180 }, /* sil_3112_15w - keep it sync'd w/ sil_3112 */
181 {
182 .sht = &sil_sht,
183 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
184 ATA_FLAG_SRST | ATA_FLAG_MMIO |
185 SIL_FLAG_MOD15WRITE,
186 .pio_mask = 0x1f, /* pio0-4 */
187 .mwdma_mask = 0x07, /* mwdma0-2 */
188 .udma_mask = 0x3f, /* udma0-5 */
189 .port_ops = &sil_ops,
177 }, /* sil_3114 */ 190 }, /* sil_3114 */
178 { 191 {
179 .sht = &sil_sht, 192 .sht = &sil_sht,
@@ -331,7 +344,7 @@ static void sil_dev_config(struct ata_port *ap, struct ata_device *dev)
331 } 344 }
332 345
333 /* limit requests to 15 sectors */ 346 /* limit requests to 15 sectors */
334 if (quirks & SIL_QUIRK_MOD15WRITE) { 347 if ((ap->flags & SIL_FLAG_MOD15WRITE) && (quirks & SIL_QUIRK_MOD15WRITE)) {
335 printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n", 348 printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n",
336 ap->id, dev->devno); 349 ap->id, dev->devno);
337 ap->host->max_sectors = 15; 350 ap->host->max_sectors = 15;