diff options
Diffstat (limited to 'drivers/scsi')
-rw-r--r-- | drivers/scsi/ahci.c | 14 | ||||
-rw-r--r-- | drivers/scsi/ata_piix.c | 315 | ||||
-rw-r--r-- | drivers/scsi/libata-core.c | 1003 | ||||
-rw-r--r-- | drivers/scsi/libata-scsi.c | 2 | ||||
-rw-r--r-- | drivers/scsi/libata.h | 1 | ||||
-rw-r--r-- | drivers/scsi/sata_promise.c | 2 | ||||
-rw-r--r-- | drivers/scsi/sata_sil.c | 99 | ||||
-rw-r--r-- | drivers/scsi/sata_sil24.c | 1 | ||||
-rw-r--r-- | drivers/scsi/sr_ioctl.c | 2 |
9 files changed, 881 insertions, 558 deletions
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c index 1c2ab3dede71..00dfdefe2967 100644 --- a/drivers/scsi/ahci.c +++ b/drivers/scsi/ahci.c | |||
@@ -778,23 +778,17 @@ static irqreturn_t ahci_interrupt (int irq, void *dev_instance, struct pt_regs * | |||
778 | struct ata_queued_cmd *qc; | 778 | struct ata_queued_cmd *qc; |
779 | qc = ata_qc_from_tag(ap, ap->active_tag); | 779 | qc = ata_qc_from_tag(ap, ap->active_tag); |
780 | if (!ahci_host_intr(ap, qc)) | 780 | if (!ahci_host_intr(ap, qc)) |
781 | if (ata_ratelimit()) { | 781 | if (ata_ratelimit()) |
782 | struct pci_dev *pdev = | 782 | dev_printk(KERN_WARNING, host_set->dev, |
783 | to_pci_dev(ap->host_set->dev); | ||
784 | dev_printk(KERN_WARNING, &pdev->dev, | ||
785 | "unhandled interrupt on port %u\n", | 783 | "unhandled interrupt on port %u\n", |
786 | i); | 784 | i); |
787 | } | ||
788 | 785 | ||
789 | VPRINTK("port %u\n", i); | 786 | VPRINTK("port %u\n", i); |
790 | } else { | 787 | } else { |
791 | VPRINTK("port %u (no irq)\n", i); | 788 | VPRINTK("port %u (no irq)\n", i); |
792 | if (ata_ratelimit()) { | 789 | if (ata_ratelimit()) |
793 | struct pci_dev *pdev = | 790 | dev_printk(KERN_WARNING, host_set->dev, |
794 | to_pci_dev(ap->host_set->dev); | ||
795 | dev_printk(KERN_WARNING, &pdev->dev, | ||
796 | "interrupt on disabled port %u\n", i); | 791 | "interrupt on disabled port %u\n", i); |
797 | } | ||
798 | } | 792 | } |
799 | 793 | ||
800 | irq_ack |= (1 << i); | 794 | irq_ack |= (1 << i); |
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c index c662bf531514..9327b62f97de 100644 --- a/drivers/scsi/ata_piix.c +++ b/drivers/scsi/ata_piix.c | |||
@@ -101,6 +101,8 @@ enum { | |||
101 | ICH5_PCS = 0x92, /* port control and status */ | 101 | ICH5_PCS = 0x92, /* port control and status */ |
102 | PIIX_SCC = 0x0A, /* sub-class code register */ | 102 | PIIX_SCC = 0x0A, /* sub-class code register */ |
103 | 103 | ||
104 | PIIX_FLAG_IGNORE_PCS = (1 << 25), /* ignore PCS present bits */ | ||
105 | PIIX_FLAG_SCR = (1 << 26), /* SCR available */ | ||
104 | PIIX_FLAG_AHCI = (1 << 27), /* AHCI possible */ | 106 | PIIX_FLAG_AHCI = (1 << 27), /* AHCI possible */ |
105 | PIIX_FLAG_CHECKINTR = (1 << 28), /* make sure PCI INTx enabled */ | 107 | PIIX_FLAG_CHECKINTR = (1 << 28), /* make sure PCI INTx enabled */ |
106 | PIIX_FLAG_COMBINED = (1 << 29), /* combined mode possible */ | 108 | PIIX_FLAG_COMBINED = (1 << 29), /* combined mode possible */ |
@@ -110,24 +112,38 @@ enum { | |||
110 | /* combined mode. if set, PATA is channel 0. | 112 | /* combined mode. if set, PATA is channel 0. |
111 | * if clear, PATA is channel 1. | 113 | * if clear, PATA is channel 1. |
112 | */ | 114 | */ |
113 | PIIX_COMB_PATA_P0 = (1 << 1), | ||
114 | PIIX_COMB = (1 << 2), /* combined mode enabled? */ | ||
115 | |||
116 | PIIX_PORT_ENABLED = (1 << 0), | 115 | PIIX_PORT_ENABLED = (1 << 0), |
117 | PIIX_PORT_PRESENT = (1 << 4), | 116 | PIIX_PORT_PRESENT = (1 << 4), |
118 | 117 | ||
119 | PIIX_80C_PRI = (1 << 5) | (1 << 4), | 118 | PIIX_80C_PRI = (1 << 5) | (1 << 4), |
120 | PIIX_80C_SEC = (1 << 7) | (1 << 6), | 119 | PIIX_80C_SEC = (1 << 7) | (1 << 6), |
121 | 120 | ||
122 | ich5_pata = 0, | 121 | /* controller IDs */ |
123 | ich5_sata = 1, | 122 | piix4_pata = 0, |
124 | piix4_pata = 2, | 123 | ich5_pata = 1, |
125 | ich6_sata = 3, | 124 | ich5_sata = 2, |
126 | ich6_sata_ahci = 4, | 125 | esb_sata = 3, |
126 | ich6_sata = 4, | ||
127 | ich6_sata_ahci = 5, | ||
128 | ich6m_sata_ahci = 6, | ||
129 | |||
130 | /* constants for mapping table */ | ||
131 | P0 = 0, /* port 0 */ | ||
132 | P1 = 1, /* port 1 */ | ||
133 | P2 = 2, /* port 2 */ | ||
134 | P3 = 3, /* port 3 */ | ||
135 | IDE = -1, /* IDE */ | ||
136 | NA = -2, /* not avaliable */ | ||
137 | RV = -3, /* reserved */ | ||
127 | 138 | ||
128 | PIIX_AHCI_DEVICE = 6, | 139 | PIIX_AHCI_DEVICE = 6, |
129 | }; | 140 | }; |
130 | 141 | ||
142 | struct piix_map_db { | ||
143 | const u32 mask; | ||
144 | const int map[][4]; | ||
145 | }; | ||
146 | |||
131 | static int piix_init_one (struct pci_dev *pdev, | 147 | static int piix_init_one (struct pci_dev *pdev, |
132 | const struct pci_device_id *ent); | 148 | const struct pci_device_id *ent); |
133 | 149 | ||
@@ -149,19 +165,32 @@ static const struct pci_device_id piix_pci_tbl[] = { | |||
149 | * list in drivers/pci/quirks.c. | 165 | * list in drivers/pci/quirks.c. |
150 | */ | 166 | */ |
151 | 167 | ||
168 | /* 82801EB (ICH5) */ | ||
152 | { 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata }, | 169 | { 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata }, |
170 | /* 82801EB (ICH5) */ | ||
153 | { 0x8086, 0x24df, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata }, | 171 | { 0x8086, 0x24df, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata }, |
154 | { 0x8086, 0x25a3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata }, | 172 | /* 6300ESB (ICH5 variant with broken PCS present bits) */ |
155 | { 0x8086, 0x25b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata }, | 173 | { 0x8086, 0x25a3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, esb_sata }, |
174 | /* 6300ESB pretending RAID */ | ||
175 | { 0x8086, 0x25b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, esb_sata }, | ||
176 | /* 82801FB/FW (ICH6/ICH6W) */ | ||
156 | { 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, | 177 | { 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, |
178 | /* 82801FR/FRW (ICH6R/ICH6RW) */ | ||
157 | { 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 179 | { 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
158 | { 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 180 | /* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented) */ |
181 | { 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, | ||
182 | /* 82801GB/GR/GH (ICH7, identical to ICH6) */ | ||
159 | { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 183 | { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
160 | { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 184 | /* 2801GBM/GHM (ICH7M, identical to ICH6M) */ |
185 | { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, | ||
186 | /* Enterprise Southbridge 2 (where's the datasheet?) */ | ||
161 | { 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 187 | { 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
188 | /* SATA Controller 1 IDE (ICH8, no datasheet yet) */ | ||
162 | { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 189 | { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
190 | /* SATA Controller 2 IDE (ICH8, ditto) */ | ||
163 | { 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 191 | { 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, |
164 | { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, | 192 | /* Mobile SATA Controller IDE (ICH8M, ditto) */ |
193 | { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, | ||
165 | 194 | ||
166 | { } /* terminate list */ | 195 | { } /* terminate list */ |
167 | }; | 196 | }; |
@@ -254,7 +283,58 @@ static const struct ata_port_operations piix_sata_ops = { | |||
254 | .host_stop = ata_host_stop, | 283 | .host_stop = ata_host_stop, |
255 | }; | 284 | }; |
256 | 285 | ||
286 | static struct piix_map_db ich5_map_db = { | ||
287 | .mask = 0x7, | ||
288 | .map = { | ||
289 | /* PM PS SM SS MAP */ | ||
290 | { P0, NA, P1, NA }, /* 000b */ | ||
291 | { P1, NA, P0, NA }, /* 001b */ | ||
292 | { RV, RV, RV, RV }, | ||
293 | { RV, RV, RV, RV }, | ||
294 | { P0, P1, IDE, IDE }, /* 100b */ | ||
295 | { P1, P0, IDE, IDE }, /* 101b */ | ||
296 | { IDE, IDE, P0, P1 }, /* 110b */ | ||
297 | { IDE, IDE, P1, P0 }, /* 111b */ | ||
298 | }, | ||
299 | }; | ||
300 | |||
301 | static struct piix_map_db ich6_map_db = { | ||
302 | .mask = 0x3, | ||
303 | .map = { | ||
304 | /* PM PS SM SS MAP */ | ||
305 | { P0, P1, P2, P3 }, /* 00b */ | ||
306 | { IDE, IDE, P1, P3 }, /* 01b */ | ||
307 | { P0, P2, IDE, IDE }, /* 10b */ | ||
308 | { RV, RV, RV, RV }, | ||
309 | }, | ||
310 | }; | ||
311 | |||
312 | static struct piix_map_db ich6m_map_db = { | ||
313 | .mask = 0x3, | ||
314 | .map = { | ||
315 | /* PM PS SM SS MAP */ | ||
316 | { P0, P1, P2, P3 }, /* 00b */ | ||
317 | { RV, RV, RV, RV }, | ||
318 | { P0, P2, IDE, IDE }, /* 10b */ | ||
319 | { RV, RV, RV, RV }, | ||
320 | }, | ||
321 | }; | ||
322 | |||
257 | static struct ata_port_info piix_port_info[] = { | 323 | static struct ata_port_info piix_port_info[] = { |
324 | /* piix4_pata */ | ||
325 | { | ||
326 | .sht = &piix_sht, | ||
327 | .host_flags = ATA_FLAG_SLAVE_POSS, | ||
328 | .pio_mask = 0x1f, /* pio0-4 */ | ||
329 | #if 0 | ||
330 | .mwdma_mask = 0x06, /* mwdma1-2 */ | ||
331 | #else | ||
332 | .mwdma_mask = 0x00, /* mwdma broken */ | ||
333 | #endif | ||
334 | .udma_mask = ATA_UDMA_MASK_40C, | ||
335 | .port_ops = &piix_pata_ops, | ||
336 | }, | ||
337 | |||
258 | /* ich5_pata */ | 338 | /* ich5_pata */ |
259 | { | 339 | { |
260 | .sht = &piix_sht, | 340 | .sht = &piix_sht, |
@@ -278,43 +358,57 @@ static struct ata_port_info piix_port_info[] = { | |||
278 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 358 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
279 | .udma_mask = 0x7f, /* udma0-6 */ | 359 | .udma_mask = 0x7f, /* udma0-6 */ |
280 | .port_ops = &piix_sata_ops, | 360 | .port_ops = &piix_sata_ops, |
361 | .private_data = &ich5_map_db, | ||
281 | }, | 362 | }, |
282 | 363 | ||
283 | /* piix4_pata */ | 364 | /* i6300esb_sata */ |
284 | { | 365 | { |
285 | .sht = &piix_sht, | 366 | .sht = &piix_sht, |
286 | .host_flags = ATA_FLAG_SLAVE_POSS, | 367 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED | |
368 | PIIX_FLAG_CHECKINTR | PIIX_FLAG_IGNORE_PCS, | ||
287 | .pio_mask = 0x1f, /* pio0-4 */ | 369 | .pio_mask = 0x1f, /* pio0-4 */ |
288 | #if 0 | 370 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
289 | .mwdma_mask = 0x06, /* mwdma1-2 */ | 371 | .udma_mask = 0x7f, /* udma0-6 */ |
290 | #else | 372 | .port_ops = &piix_sata_ops, |
291 | .mwdma_mask = 0x00, /* mwdma broken */ | 373 | .private_data = &ich5_map_db, |
292 | #endif | ||
293 | .udma_mask = ATA_UDMA_MASK_40C, | ||
294 | .port_ops = &piix_pata_ops, | ||
295 | }, | 374 | }, |
296 | 375 | ||
297 | /* ich6_sata */ | 376 | /* ich6_sata */ |
298 | { | 377 | { |
299 | .sht = &piix_sht, | 378 | .sht = &piix_sht, |
300 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 | | 379 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 | |
301 | PIIX_FLAG_CHECKINTR | ATA_FLAG_SLAVE_POSS, | 380 | PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR, |
302 | .pio_mask = 0x1f, /* pio0-4 */ | 381 | .pio_mask = 0x1f, /* pio0-4 */ |
303 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 382 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
304 | .udma_mask = 0x7f, /* udma0-6 */ | 383 | .udma_mask = 0x7f, /* udma0-6 */ |
305 | .port_ops = &piix_sata_ops, | 384 | .port_ops = &piix_sata_ops, |
385 | .private_data = &ich6_map_db, | ||
306 | }, | 386 | }, |
307 | 387 | ||
308 | /* ich6_sata_ahci */ | 388 | /* ich6_sata_ahci */ |
309 | { | 389 | { |
310 | .sht = &piix_sht, | 390 | .sht = &piix_sht, |
311 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 | | 391 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 | |
312 | PIIX_FLAG_CHECKINTR | ATA_FLAG_SLAVE_POSS | | 392 | PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR | |
313 | PIIX_FLAG_AHCI, | 393 | PIIX_FLAG_AHCI, |
314 | .pio_mask = 0x1f, /* pio0-4 */ | 394 | .pio_mask = 0x1f, /* pio0-4 */ |
315 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 395 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
316 | .udma_mask = 0x7f, /* udma0-6 */ | 396 | .udma_mask = 0x7f, /* udma0-6 */ |
317 | .port_ops = &piix_sata_ops, | 397 | .port_ops = &piix_sata_ops, |
398 | .private_data = &ich6_map_db, | ||
399 | }, | ||
400 | |||
401 | /* ich6m_sata_ahci */ | ||
402 | { | ||
403 | .sht = &piix_sht, | ||
404 | .host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 | | ||
405 | PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR | | ||
406 | PIIX_FLAG_AHCI, | ||
407 | .pio_mask = 0x1f, /* pio0-4 */ | ||
408 | .mwdma_mask = 0x07, /* mwdma0-2 */ | ||
409 | .udma_mask = 0x7f, /* udma0-6 */ | ||
410 | .port_ops = &piix_sata_ops, | ||
411 | .private_data = &ich6m_map_db, | ||
318 | }, | 412 | }, |
319 | }; | 413 | }; |
320 | 414 | ||
@@ -405,44 +499,59 @@ static int piix_pata_probe_reset(struct ata_port *ap, unsigned int *classes) | |||
405 | * piix_sata_probe - Probe PCI device for present SATA devices | 499 | * piix_sata_probe - Probe PCI device for present SATA devices |
406 | * @ap: Port associated with the PCI device we wish to probe | 500 | * @ap: Port associated with the PCI device we wish to probe |
407 | * | 501 | * |
408 | * Reads SATA PCI device's PCI config register Port Configuration | 502 | * Reads and configures SATA PCI device's PCI config register |
409 | * and Status (PCS) to determine port and device availability. | 503 | * Port Configuration and Status (PCS) to determine port and |
504 | * device availability. | ||
410 | * | 505 | * |
411 | * LOCKING: | 506 | * LOCKING: |
412 | * None (inherited from caller). | 507 | * None (inherited from caller). |
413 | * | 508 | * |
414 | * RETURNS: | 509 | * RETURNS: |
415 | * Non-zero if port is enabled, it may or may not have a device | 510 | * Mask of avaliable devices on the port. |
416 | * attached in that case (PRESENT bit would only be set if BIOS probe | ||
417 | * was done). Zero is returned if port is disabled. | ||
418 | */ | 511 | */ |
419 | static int piix_sata_probe (struct ata_port *ap) | 512 | static unsigned int piix_sata_probe (struct ata_port *ap) |
420 | { | 513 | { |
421 | struct pci_dev *pdev = to_pci_dev(ap->host_set->dev); | 514 | struct pci_dev *pdev = to_pci_dev(ap->host_set->dev); |
422 | int combined = (ap->flags & ATA_FLAG_SLAVE_POSS); | 515 | const unsigned int *map = ap->host_set->private_data; |
423 | int orig_mask, mask, i; | 516 | int base = 2 * ap->hard_port_no; |
517 | unsigned int present_mask = 0; | ||
518 | int port, i; | ||
424 | u8 pcs; | 519 | u8 pcs; |
425 | 520 | ||
426 | pci_read_config_byte(pdev, ICH5_PCS, &pcs); | 521 | pci_read_config_byte(pdev, ICH5_PCS, &pcs); |
427 | orig_mask = (int) pcs & 0xff; | 522 | DPRINTK("ata%u: ENTER, pcs=0x%x base=%d\n", ap->id, pcs, base); |
428 | |||
429 | /* TODO: this is vaguely wrong for ICH6 combined mode, | ||
430 | * where only two of the four SATA ports are mapped | ||
431 | * onto a single ATA channel. It is also vaguely inaccurate | ||
432 | * for ICH5, which has only two ports. However, this is ok, | ||
433 | * as further device presence detection code will handle | ||
434 | * any false positives produced here. | ||
435 | */ | ||
436 | 523 | ||
437 | for (i = 0; i < 4; i++) { | 524 | /* enable all ports on this ap and wait for them to settle */ |
438 | mask = (PIIX_PORT_ENABLED << i); | 525 | for (i = 0; i < 2; i++) { |
526 | port = map[base + i]; | ||
527 | if (port >= 0) | ||
528 | pcs |= 1 << port; | ||
529 | } | ||
439 | 530 | ||
440 | if ((orig_mask & mask) == mask) | 531 | pci_write_config_byte(pdev, ICH5_PCS, pcs); |
441 | if (combined || (i == ap->hard_port_no)) | 532 | msleep(100); |
442 | return 1; | 533 | |
534 | /* let's see which devices are present */ | ||
535 | pci_read_config_byte(pdev, ICH5_PCS, &pcs); | ||
536 | |||
537 | for (i = 0; i < 2; i++) { | ||
538 | port = map[base + i]; | ||
539 | if (port < 0) | ||
540 | continue; | ||
541 | if (ap->flags & PIIX_FLAG_IGNORE_PCS || pcs & 1 << (4 + port)) | ||
542 | present_mask |= 1 << i; | ||
543 | else | ||
544 | pcs &= ~(1 << port); | ||
443 | } | 545 | } |
444 | 546 | ||
445 | return 0; | 547 | /* disable offline ports on non-AHCI controllers */ |
548 | if (!(ap->flags & PIIX_FLAG_AHCI)) | ||
549 | pci_write_config_byte(pdev, ICH5_PCS, pcs); | ||
550 | |||
551 | DPRINTK("ata%u: LEAVE, pcs=0x%x present_mask=0x%x\n", | ||
552 | ap->id, pcs, present_mask); | ||
553 | |||
554 | return present_mask; | ||
446 | } | 555 | } |
447 | 556 | ||
448 | /** | 557 | /** |
@@ -666,6 +775,54 @@ static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev) | |||
666 | return no_piix_dma; | 775 | return no_piix_dma; |
667 | } | 776 | } |
668 | 777 | ||
778 | static void __devinit piix_init_sata_map(struct pci_dev *pdev, | ||
779 | struct ata_port_info *pinfo) | ||
780 | { | ||
781 | struct piix_map_db *map_db = pinfo[0].private_data; | ||
782 | const unsigned int *map; | ||
783 | int i, invalid_map = 0; | ||
784 | u8 map_value; | ||
785 | |||
786 | pci_read_config_byte(pdev, ICH5_PMR, &map_value); | ||
787 | |||
788 | map = map_db->map[map_value & map_db->mask]; | ||
789 | |||
790 | dev_printk(KERN_INFO, &pdev->dev, "MAP ["); | ||
791 | for (i = 0; i < 4; i++) { | ||
792 | switch (map[i]) { | ||
793 | case RV: | ||
794 | invalid_map = 1; | ||
795 | printk(" XX"); | ||
796 | break; | ||
797 | |||
798 | case NA: | ||
799 | printk(" --"); | ||
800 | break; | ||
801 | |||
802 | case IDE: | ||
803 | WARN_ON((i & 1) || map[i + 1] != IDE); | ||
804 | pinfo[i / 2] = piix_port_info[ich5_pata]; | ||
805 | i++; | ||
806 | printk(" IDE IDE"); | ||
807 | break; | ||
808 | |||
809 | default: | ||
810 | printk(" P%d", map[i]); | ||
811 | if (i & 1) | ||
812 | pinfo[i / 2].host_flags |= ATA_FLAG_SLAVE_POSS; | ||
813 | break; | ||
814 | } | ||
815 | } | ||
816 | printk(" ]\n"); | ||
817 | |||
818 | if (invalid_map) | ||
819 | dev_printk(KERN_ERR, &pdev->dev, | ||
820 | "invalid MAP value %u\n", map_value); | ||
821 | |||
822 | pinfo[0].private_data = (void *)map; | ||
823 | pinfo[1].private_data = (void *)map; | ||
824 | } | ||
825 | |||
669 | /** | 826 | /** |
670 | * piix_init_one - Register PIIX ATA PCI device with kernel services | 827 | * piix_init_one - Register PIIX ATA PCI device with kernel services |
671 | * @pdev: PCI device to register | 828 | * @pdev: PCI device to register |
@@ -684,9 +841,8 @@ static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev) | |||
684 | static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 841 | static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
685 | { | 842 | { |
686 | static int printed_version; | 843 | static int printed_version; |
687 | struct ata_port_info *port_info[2]; | 844 | struct ata_port_info port_info[2]; |
688 | unsigned int combined = 0; | 845 | struct ata_port_info *ppinfo[2] = { &port_info[0], &port_info[1] }; |
689 | unsigned int pata_chan = 0, sata_chan = 0; | ||
690 | unsigned long host_flags; | 846 | unsigned long host_flags; |
691 | 847 | ||
692 | if (!printed_version++) | 848 | if (!printed_version++) |
@@ -697,10 +853,10 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
697 | if (!in_module_init) | 853 | if (!in_module_init) |
698 | return -ENODEV; | 854 | return -ENODEV; |
699 | 855 | ||
700 | port_info[0] = &piix_port_info[ent->driver_data]; | 856 | port_info[0] = piix_port_info[ent->driver_data]; |
701 | port_info[1] = &piix_port_info[ent->driver_data]; | 857 | port_info[1] = piix_port_info[ent->driver_data]; |
702 | 858 | ||
703 | host_flags = port_info[0]->host_flags; | 859 | host_flags = port_info[0].host_flags; |
704 | 860 | ||
705 | if (host_flags & PIIX_FLAG_AHCI) { | 861 | if (host_flags & PIIX_FLAG_AHCI) { |
706 | u8 tmp; | 862 | u8 tmp; |
@@ -712,37 +868,9 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
712 | } | 868 | } |
713 | } | 869 | } |
714 | 870 | ||
715 | if (host_flags & PIIX_FLAG_COMBINED) { | 871 | /* Initialize SATA map */ |
716 | u8 tmp; | 872 | if (host_flags & ATA_FLAG_SATA) |
717 | pci_read_config_byte(pdev, ICH5_PMR, &tmp); | 873 | piix_init_sata_map(pdev, port_info); |
718 | |||
719 | if (host_flags & PIIX_FLAG_COMBINED_ICH6) { | ||
720 | switch (tmp & 0x3) { | ||
721 | case 0: | ||
722 | break; | ||
723 | case 1: | ||
724 | combined = 1; | ||
725 | sata_chan = 1; | ||
726 | break; | ||
727 | case 2: | ||
728 | combined = 1; | ||
729 | pata_chan = 1; | ||
730 | break; | ||
731 | case 3: | ||
732 | dev_printk(KERN_WARNING, &pdev->dev, | ||
733 | "invalid MAP value %u\n", tmp); | ||
734 | break; | ||
735 | } | ||
736 | } else { | ||
737 | if (tmp & PIIX_COMB) { | ||
738 | combined = 1; | ||
739 | if (tmp & PIIX_COMB_PATA_P0) | ||
740 | sata_chan = 1; | ||
741 | else | ||
742 | pata_chan = 1; | ||
743 | } | ||
744 | } | ||
745 | } | ||
746 | 874 | ||
747 | /* On ICH5, some BIOSen disable the interrupt using the | 875 | /* On ICH5, some BIOSen disable the interrupt using the |
748 | * PCI_COMMAND_INTX_DISABLE bit added in PCI 2.3. | 876 | * PCI_COMMAND_INTX_DISABLE bit added in PCI 2.3. |
@@ -753,25 +881,16 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
753 | if (host_flags & PIIX_FLAG_CHECKINTR) | 881 | if (host_flags & PIIX_FLAG_CHECKINTR) |
754 | pci_intx(pdev, 1); | 882 | pci_intx(pdev, 1); |
755 | 883 | ||
756 | if (combined) { | ||
757 | port_info[sata_chan] = &piix_port_info[ent->driver_data]; | ||
758 | port_info[sata_chan]->host_flags |= ATA_FLAG_SLAVE_POSS; | ||
759 | port_info[pata_chan] = &piix_port_info[ich5_pata]; | ||
760 | |||
761 | dev_printk(KERN_WARNING, &pdev->dev, | ||
762 | "combined mode detected (p=%u, s=%u)\n", | ||
763 | pata_chan, sata_chan); | ||
764 | } | ||
765 | if (piix_check_450nx_errata(pdev)) { | 884 | if (piix_check_450nx_errata(pdev)) { |
766 | /* This writes into the master table but it does not | 885 | /* This writes into the master table but it does not |
767 | really matter for this errata as we will apply it to | 886 | really matter for this errata as we will apply it to |
768 | all the PIIX devices on the board */ | 887 | all the PIIX devices on the board */ |
769 | port_info[0]->mwdma_mask = 0; | 888 | port_info[0].mwdma_mask = 0; |
770 | port_info[0]->udma_mask = 0; | 889 | port_info[0].udma_mask = 0; |
771 | port_info[1]->mwdma_mask = 0; | 890 | port_info[1].mwdma_mask = 0; |
772 | port_info[1]->udma_mask = 0; | 891 | port_info[1].udma_mask = 0; |
773 | } | 892 | } |
774 | return ata_pci_init_one(pdev, port_info, 2); | 893 | return ata_pci_init_one(pdev, ppinfo, 2); |
775 | } | 894 | } |
776 | 895 | ||
777 | static int __init piix_init(void) | 896 | static int __init piix_init(void) |
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c index 9132698d29b8..5060a1a1ad25 100644 --- a/drivers/scsi/libata-core.c +++ b/drivers/scsi/libata-core.c | |||
@@ -65,12 +65,9 @@ static unsigned int ata_dev_init_params(struct ata_port *ap, | |||
65 | struct ata_device *dev); | 65 | struct ata_device *dev); |
66 | static void ata_set_mode(struct ata_port *ap); | 66 | static void ata_set_mode(struct ata_port *ap); |
67 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | 67 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); |
68 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift); | ||
69 | static int fgb(u32 bitmap); | ||
70 | static int ata_choose_xfer_mode(const struct ata_port *ap, | ||
71 | u8 *xfer_mode_out, | ||
72 | unsigned int *xfer_shift_out); | ||
73 | static void ata_pio_error(struct ata_port *ap); | 68 | static void ata_pio_error(struct ata_port *ap); |
69 | static unsigned int ata_dev_xfermask(struct ata_port *ap, | ||
70 | struct ata_device *dev); | ||
74 | 71 | ||
75 | static unsigned int ata_unique_id = 1; | 72 | static unsigned int ata_unique_id = 1; |
76 | static struct workqueue_struct *ata_wq; | 73 | static struct workqueue_struct *ata_wq; |
@@ -232,58 +229,148 @@ int ata_rwcmd_protocol(struct ata_queued_cmd *qc) | |||
232 | return -1; | 229 | return -1; |
233 | } | 230 | } |
234 | 231 | ||
235 | static const char * const xfer_mode_str[] = { | 232 | /** |
236 | "UDMA/16", | 233 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask |
237 | "UDMA/25", | 234 | * @pio_mask: pio_mask |
238 | "UDMA/33", | 235 | * @mwdma_mask: mwdma_mask |
239 | "UDMA/44", | 236 | * @udma_mask: udma_mask |
240 | "UDMA/66", | 237 | * |
241 | "UDMA/100", | 238 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single |
242 | "UDMA/133", | 239 | * unsigned int xfer_mask. |
243 | "UDMA7", | 240 | * |
244 | "MWDMA0", | 241 | * LOCKING: |
245 | "MWDMA1", | 242 | * None. |
246 | "MWDMA2", | 243 | * |
247 | "PIO0", | 244 | * RETURNS: |
248 | "PIO1", | 245 | * Packed xfer_mask. |
249 | "PIO2", | 246 | */ |
250 | "PIO3", | 247 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, |
251 | "PIO4", | 248 | unsigned int mwdma_mask, |
249 | unsigned int udma_mask) | ||
250 | { | ||
251 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | ||
252 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | ||
253 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | ||
254 | } | ||
255 | |||
256 | static const struct ata_xfer_ent { | ||
257 | unsigned int shift, bits; | ||
258 | u8 base; | ||
259 | } ata_xfer_tbl[] = { | ||
260 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | ||
261 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | ||
262 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | ||
263 | { -1, }, | ||
252 | }; | 264 | }; |
253 | 265 | ||
254 | /** | 266 | /** |
255 | * ata_udma_string - convert UDMA bit offset to string | 267 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask |
256 | * @mask: mask of bits supported; only highest bit counts. | 268 | * @xfer_mask: xfer_mask of interest |
257 | * | 269 | * |
258 | * Determine string which represents the highest speed | 270 | * Return matching XFER_* value for @xfer_mask. Only the highest |
259 | * (highest bit in @udma_mask). | 271 | * bit of @xfer_mask is considered. |
260 | * | 272 | * |
261 | * LOCKING: | 273 | * LOCKING: |
262 | * None. | 274 | * None. |
263 | * | 275 | * |
264 | * RETURNS: | 276 | * RETURNS: |
265 | * Constant C string representing highest speed listed in | 277 | * Matching XFER_* value, 0 if no match found. |
266 | * @udma_mask, or the constant C string "<n/a>". | ||
267 | */ | 278 | */ |
279 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | ||
280 | { | ||
281 | int highbit = fls(xfer_mask) - 1; | ||
282 | const struct ata_xfer_ent *ent; | ||
268 | 283 | ||
269 | static const char *ata_mode_string(unsigned int mask) | 284 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) |
285 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | ||
286 | return ent->base + highbit - ent->shift; | ||
287 | return 0; | ||
288 | } | ||
289 | |||
290 | /** | ||
291 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | ||
292 | * @xfer_mode: XFER_* of interest | ||
293 | * | ||
294 | * Return matching xfer_mask for @xfer_mode. | ||
295 | * | ||
296 | * LOCKING: | ||
297 | * None. | ||
298 | * | ||
299 | * RETURNS: | ||
300 | * Matching xfer_mask, 0 if no match found. | ||
301 | */ | ||
302 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | ||
270 | { | 303 | { |
271 | int i; | 304 | const struct ata_xfer_ent *ent; |
272 | 305 | ||
273 | for (i = 7; i >= 0; i--) | 306 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) |
274 | if (mask & (1 << i)) | 307 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) |
275 | goto out; | 308 | return 1 << (ent->shift + xfer_mode - ent->base); |
276 | for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--) | 309 | return 0; |
277 | if (mask & (1 << i)) | 310 | } |
278 | goto out; | ||
279 | for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--) | ||
280 | if (mask & (1 << i)) | ||
281 | goto out; | ||
282 | 311 | ||
283 | return "<n/a>"; | 312 | /** |
313 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | ||
314 | * @xfer_mode: XFER_* of interest | ||
315 | * | ||
316 | * Return matching xfer_shift for @xfer_mode. | ||
317 | * | ||
318 | * LOCKING: | ||
319 | * None. | ||
320 | * | ||
321 | * RETURNS: | ||
322 | * Matching xfer_shift, -1 if no match found. | ||
323 | */ | ||
324 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | ||
325 | { | ||
326 | const struct ata_xfer_ent *ent; | ||
284 | 327 | ||
285 | out: | 328 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) |
286 | return xfer_mode_str[i]; | 329 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) |
330 | return ent->shift; | ||
331 | return -1; | ||
332 | } | ||
333 | |||
334 | /** | ||
335 | * ata_mode_string - convert xfer_mask to string | ||
336 | * @xfer_mask: mask of bits supported; only highest bit counts. | ||
337 | * | ||
338 | * Determine string which represents the highest speed | ||
339 | * (highest bit in @modemask). | ||
340 | * | ||
341 | * LOCKING: | ||
342 | * None. | ||
343 | * | ||
344 | * RETURNS: | ||
345 | * Constant C string representing highest speed listed in | ||
346 | * @mode_mask, or the constant C string "<n/a>". | ||
347 | */ | ||
348 | static const char *ata_mode_string(unsigned int xfer_mask) | ||
349 | { | ||
350 | static const char * const xfer_mode_str[] = { | ||
351 | "PIO0", | ||
352 | "PIO1", | ||
353 | "PIO2", | ||
354 | "PIO3", | ||
355 | "PIO4", | ||
356 | "MWDMA0", | ||
357 | "MWDMA1", | ||
358 | "MWDMA2", | ||
359 | "UDMA/16", | ||
360 | "UDMA/25", | ||
361 | "UDMA/33", | ||
362 | "UDMA/44", | ||
363 | "UDMA/66", | ||
364 | "UDMA/100", | ||
365 | "UDMA/133", | ||
366 | "UDMA7", | ||
367 | }; | ||
368 | int highbit; | ||
369 | |||
370 | highbit = fls(xfer_mask) - 1; | ||
371 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | ||
372 | return xfer_mode_str[highbit]; | ||
373 | return "<n/a>"; | ||
287 | } | 374 | } |
288 | 375 | ||
289 | /** | 376 | /** |
@@ -693,69 +780,104 @@ static inline void ata_dump_id(const u16 *id) | |||
693 | id[93]); | 780 | id[93]); |
694 | } | 781 | } |
695 | 782 | ||
696 | /* | 783 | /** |
697 | * Compute the PIO modes available for this device. This is not as | 784 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data |
698 | * trivial as it seems if we must consider early devices correctly. | 785 | * @id: IDENTIFY data to compute xfer mask from |
699 | * | 786 | * |
700 | * FIXME: pre IDE drive timing (do we care ?). | 787 | * Compute the xfermask for this device. This is not as trivial |
788 | * as it seems if we must consider early devices correctly. | ||
789 | * | ||
790 | * FIXME: pre IDE drive timing (do we care ?). | ||
791 | * | ||
792 | * LOCKING: | ||
793 | * None. | ||
794 | * | ||
795 | * RETURNS: | ||
796 | * Computed xfermask | ||
701 | */ | 797 | */ |
702 | 798 | static unsigned int ata_id_xfermask(const u16 *id) | |
703 | static unsigned int ata_pio_modes(const struct ata_device *adev) | ||
704 | { | 799 | { |
705 | u16 modes; | 800 | unsigned int pio_mask, mwdma_mask, udma_mask; |
706 | 801 | ||
707 | /* Usual case. Word 53 indicates word 64 is valid */ | 802 | /* Usual case. Word 53 indicates word 64 is valid */ |
708 | if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) { | 803 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { |
709 | modes = adev->id[ATA_ID_PIO_MODES] & 0x03; | 804 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; |
710 | modes <<= 3; | 805 | pio_mask <<= 3; |
711 | modes |= 0x7; | 806 | pio_mask |= 0x7; |
712 | return modes; | 807 | } else { |
808 | /* If word 64 isn't valid then Word 51 high byte holds | ||
809 | * the PIO timing number for the maximum. Turn it into | ||
810 | * a mask. | ||
811 | */ | ||
812 | pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | ||
813 | |||
814 | /* But wait.. there's more. Design your standards by | ||
815 | * committee and you too can get a free iordy field to | ||
816 | * process. However its the speeds not the modes that | ||
817 | * are supported... Note drivers using the timing API | ||
818 | * will get this right anyway | ||
819 | */ | ||
713 | } | 820 | } |
714 | 821 | ||
715 | /* If word 64 isn't valid then Word 51 high byte holds the PIO timing | 822 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; |
716 | number for the maximum. Turn it into a mask and return it */ | 823 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; |
717 | modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ; | ||
718 | return modes; | ||
719 | /* But wait.. there's more. Design your standards by committee and | ||
720 | you too can get a free iordy field to process. However its the | ||
721 | speeds not the modes that are supported... Note drivers using the | ||
722 | timing API will get this right anyway */ | ||
723 | } | ||
724 | 824 | ||
725 | static inline void | 825 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); |
726 | ata_queue_pio_task(struct ata_port *ap) | ||
727 | { | ||
728 | if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK)) | ||
729 | queue_work(ata_wq, &ap->pio_task); | ||
730 | } | 826 | } |
731 | 827 | ||
732 | static inline void | 828 | /** |
733 | ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay) | 829 | * ata_port_queue_task - Queue port_task |
830 | * @ap: The ata_port to queue port_task for | ||
831 | * | ||
832 | * Schedule @fn(@data) for execution after @delay jiffies using | ||
833 | * port_task. There is one port_task per port and it's the | ||
834 | * user(low level driver)'s responsibility to make sure that only | ||
835 | * one task is active at any given time. | ||
836 | * | ||
837 | * libata core layer takes care of synchronization between | ||
838 | * port_task and EH. ata_port_queue_task() may be ignored for EH | ||
839 | * synchronization. | ||
840 | * | ||
841 | * LOCKING: | ||
842 | * Inherited from caller. | ||
843 | */ | ||
844 | void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data, | ||
845 | unsigned long delay) | ||
734 | { | 846 | { |
735 | if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK)) | 847 | int rc; |
736 | queue_delayed_work(ata_wq, &ap->pio_task, delay); | 848 | |
849 | if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK) | ||
850 | return; | ||
851 | |||
852 | PREPARE_WORK(&ap->port_task, fn, data); | ||
853 | |||
854 | if (!delay) | ||
855 | rc = queue_work(ata_wq, &ap->port_task); | ||
856 | else | ||
857 | rc = queue_delayed_work(ata_wq, &ap->port_task, delay); | ||
858 | |||
859 | /* rc == 0 means that another user is using port task */ | ||
860 | WARN_ON(rc == 0); | ||
737 | } | 861 | } |
738 | 862 | ||
739 | /** | 863 | /** |
740 | * ata_flush_pio_tasks - Flush pio_task | 864 | * ata_port_flush_task - Flush port_task |
741 | * @ap: the target ata_port | 865 | * @ap: The ata_port to flush port_task for |
742 | * | 866 | * |
743 | * After this function completes, pio_task is | 867 | * After this function completes, port_task is guranteed not to |
744 | * guranteed not to be running or scheduled. | 868 | * be running or scheduled. |
745 | * | 869 | * |
746 | * LOCKING: | 870 | * LOCKING: |
747 | * Kernel thread context (may sleep) | 871 | * Kernel thread context (may sleep) |
748 | */ | 872 | */ |
749 | 873 | void ata_port_flush_task(struct ata_port *ap) | |
750 | static void ata_flush_pio_tasks(struct ata_port *ap) | ||
751 | { | 874 | { |
752 | int tmp = 0; | ||
753 | unsigned long flags; | 875 | unsigned long flags; |
754 | 876 | ||
755 | DPRINTK("ENTER\n"); | 877 | DPRINTK("ENTER\n"); |
756 | 878 | ||
757 | spin_lock_irqsave(&ap->host_set->lock, flags); | 879 | spin_lock_irqsave(&ap->host_set->lock, flags); |
758 | ap->flags |= ATA_FLAG_FLUSH_PIO_TASK; | 880 | ap->flags |= ATA_FLAG_FLUSH_PORT_TASK; |
759 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | 881 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
760 | 882 | ||
761 | DPRINTK("flush #1\n"); | 883 | DPRINTK("flush #1\n"); |
@@ -766,14 +888,13 @@ static void ata_flush_pio_tasks(struct ata_port *ap) | |||
766 | * the FLUSH flag; thus, it will never queue pio tasks again. | 888 | * the FLUSH flag; thus, it will never queue pio tasks again. |
767 | * Cancel and flush. | 889 | * Cancel and flush. |
768 | */ | 890 | */ |
769 | tmp |= cancel_delayed_work(&ap->pio_task); | 891 | if (!cancel_delayed_work(&ap->port_task)) { |
770 | if (!tmp) { | ||
771 | DPRINTK("flush #2\n"); | 892 | DPRINTK("flush #2\n"); |
772 | flush_workqueue(ata_wq); | 893 | flush_workqueue(ata_wq); |
773 | } | 894 | } |
774 | 895 | ||
775 | spin_lock_irqsave(&ap->host_set->lock, flags); | 896 | spin_lock_irqsave(&ap->host_set->lock, flags); |
776 | ap->flags &= ~ATA_FLAG_FLUSH_PIO_TASK; | 897 | ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK; |
777 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | 898 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
778 | 899 | ||
779 | DPRINTK("EXIT\n"); | 900 | DPRINTK("EXIT\n"); |
@@ -904,7 +1025,7 @@ unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |||
904 | * @dev: target device | 1025 | * @dev: target device |
905 | * @p_class: pointer to class of the target device (may be changed) | 1026 | * @p_class: pointer to class of the target device (may be changed) |
906 | * @post_reset: is this read ID post-reset? | 1027 | * @post_reset: is this read ID post-reset? |
907 | * @id: buffer to fill IDENTIFY page into | 1028 | * @p_id: read IDENTIFY page (newly allocated) |
908 | * | 1029 | * |
909 | * Read ID data from the specified device. ATA_CMD_ID_ATA is | 1030 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
910 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | 1031 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI |
@@ -919,12 +1040,13 @@ unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |||
919 | * 0 on success, -errno otherwise. | 1040 | * 0 on success, -errno otherwise. |
920 | */ | 1041 | */ |
921 | static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev, | 1042 | static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev, |
922 | unsigned int *p_class, int post_reset, u16 *id) | 1043 | unsigned int *p_class, int post_reset, u16 **p_id) |
923 | { | 1044 | { |
924 | unsigned int class = *p_class; | 1045 | unsigned int class = *p_class; |
925 | unsigned int using_edd; | 1046 | unsigned int using_edd; |
926 | struct ata_taskfile tf; | 1047 | struct ata_taskfile tf; |
927 | unsigned int err_mask = 0; | 1048 | unsigned int err_mask = 0; |
1049 | u16 *id; | ||
928 | const char *reason; | 1050 | const char *reason; |
929 | int rc; | 1051 | int rc; |
930 | 1052 | ||
@@ -938,6 +1060,13 @@ static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev, | |||
938 | 1060 | ||
939 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ | 1061 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
940 | 1062 | ||
1063 | id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL); | ||
1064 | if (id == NULL) { | ||
1065 | rc = -ENOMEM; | ||
1066 | reason = "out of memory"; | ||
1067 | goto err_out; | ||
1068 | } | ||
1069 | |||
941 | retry: | 1070 | retry: |
942 | ata_tf_init(ap, &tf, dev->devno); | 1071 | ata_tf_init(ap, &tf, dev->devno); |
943 | 1072 | ||
@@ -1028,53 +1157,59 @@ static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev, | |||
1028 | } | 1157 | } |
1029 | 1158 | ||
1030 | *p_class = class; | 1159 | *p_class = class; |
1160 | *p_id = id; | ||
1031 | return 0; | 1161 | return 0; |
1032 | 1162 | ||
1033 | err_out: | 1163 | err_out: |
1034 | printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n", | 1164 | printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n", |
1035 | ap->id, dev->devno, reason); | 1165 | ap->id, dev->devno, reason); |
1166 | kfree(id); | ||
1036 | return rc; | 1167 | return rc; |
1037 | } | 1168 | } |
1038 | 1169 | ||
1170 | static inline u8 ata_dev_knobble(const struct ata_port *ap, | ||
1171 | struct ata_device *dev) | ||
1172 | { | ||
1173 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); | ||
1174 | } | ||
1175 | |||
1039 | /** | 1176 | /** |
1040 | * ata_dev_identify - obtain IDENTIFY x DEVICE page | 1177 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
1041 | * @ap: port on which device we wish to probe resides | 1178 | * @ap: Port on which target device resides |
1042 | * @device: device bus address, starting at zero | 1179 | * @dev: Target device to configure |
1043 | * | 1180 | * @print_info: Enable device info printout |
1044 | * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE | 1181 | * |
1045 | * command, and read back the 512-byte device information page. | 1182 | * Configure @dev according to @dev->id. Generic and low-level |
1046 | * The device information page is fed to us via the standard | 1183 | * driver specific fixups are also applied. |
1047 | * PIO-IN protocol, but we hand-code it here. (TODO: investigate | ||
1048 | * using standard PIO-IN paths) | ||
1049 | * | ||
1050 | * After reading the device information page, we use several | ||
1051 | * bits of information from it to initialize data structures | ||
1052 | * that will be used during the lifetime of the ata_device. | ||
1053 | * Other data from the info page is used to disqualify certain | ||
1054 | * older ATA devices we do not wish to support. | ||
1055 | * | 1184 | * |
1056 | * LOCKING: | 1185 | * LOCKING: |
1057 | * Inherited from caller. Some functions called by this function | 1186 | * Kernel thread context (may sleep) |
1058 | * obtain the host_set lock. | 1187 | * |
1188 | * RETURNS: | ||
1189 | * 0 on success, -errno otherwise | ||
1059 | */ | 1190 | */ |
1060 | 1191 | static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev, | |
1061 | static void ata_dev_identify(struct ata_port *ap, unsigned int device) | 1192 | int print_info) |
1062 | { | 1193 | { |
1063 | struct ata_device *dev = &ap->device[device]; | 1194 | unsigned int xfer_mask; |
1064 | unsigned long xfer_modes; | ||
1065 | int i, rc; | 1195 | int i, rc; |
1066 | 1196 | ||
1067 | if (!ata_dev_present(dev)) { | 1197 | if (!ata_dev_present(dev)) { |
1068 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | 1198 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", |
1069 | ap->id, device); | 1199 | ap->id, dev->devno); |
1070 | return; | 1200 | return 0; |
1071 | } | 1201 | } |
1072 | 1202 | ||
1073 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, device); | 1203 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno); |
1074 | 1204 | ||
1075 | rc = ata_dev_read_id(ap, dev, &dev->class, 1, dev->id); | 1205 | /* initialize to-be-configured parameters */ |
1076 | if (rc) | 1206 | dev->flags = 0; |
1077 | goto err_out; | 1207 | dev->max_sectors = 0; |
1208 | dev->cdb_len = 0; | ||
1209 | dev->n_sectors = 0; | ||
1210 | dev->cylinders = 0; | ||
1211 | dev->heads = 0; | ||
1212 | dev->sectors = 0; | ||
1078 | 1213 | ||
1079 | /* | 1214 | /* |
1080 | * common ATA, ATAPI feature tests | 1215 | * common ATA, ATAPI feature tests |
@@ -1083,15 +1218,12 @@ static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |||
1083 | /* we require DMA support (bits 8 of word 49) */ | 1218 | /* we require DMA support (bits 8 of word 49) */ |
1084 | if (!ata_id_has_dma(dev->id)) { | 1219 | if (!ata_id_has_dma(dev->id)) { |
1085 | printk(KERN_DEBUG "ata%u: no dma\n", ap->id); | 1220 | printk(KERN_DEBUG "ata%u: no dma\n", ap->id); |
1221 | rc = -EINVAL; | ||
1086 | goto err_out_nosup; | 1222 | goto err_out_nosup; |
1087 | } | 1223 | } |
1088 | 1224 | ||
1089 | /* quick-n-dirty find max transfer mode; for printk only */ | 1225 | /* find max transfer mode; for printk only */ |
1090 | xfer_modes = dev->id[ATA_ID_UDMA_MODES]; | 1226 | xfer_mask = ata_id_xfermask(dev->id); |
1091 | if (!xfer_modes) | ||
1092 | xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; | ||
1093 | if (!xfer_modes) | ||
1094 | xfer_modes = ata_pio_modes(dev); | ||
1095 | 1227 | ||
1096 | ata_dump_id(dev->id); | 1228 | ata_dump_id(dev->id); |
1097 | 1229 | ||
@@ -1100,19 +1232,25 @@ static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |||
1100 | dev->n_sectors = ata_id_n_sectors(dev->id); | 1232 | dev->n_sectors = ata_id_n_sectors(dev->id); |
1101 | 1233 | ||
1102 | if (ata_id_has_lba(dev->id)) { | 1234 | if (ata_id_has_lba(dev->id)) { |
1103 | dev->flags |= ATA_DFLAG_LBA; | 1235 | const char *lba_desc; |
1104 | 1236 | ||
1105 | if (ata_id_has_lba48(dev->id)) | 1237 | lba_desc = "LBA"; |
1238 | dev->flags |= ATA_DFLAG_LBA; | ||
1239 | if (ata_id_has_lba48(dev->id)) { | ||
1106 | dev->flags |= ATA_DFLAG_LBA48; | 1240 | dev->flags |= ATA_DFLAG_LBA48; |
1241 | lba_desc = "LBA48"; | ||
1242 | } | ||
1107 | 1243 | ||
1108 | /* print device info to dmesg */ | 1244 | /* print device info to dmesg */ |
1109 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n", | 1245 | if (print_info) |
1110 | ap->id, device, | 1246 | printk(KERN_INFO "ata%u: dev %u ATA-%d, " |
1111 | ata_id_major_version(dev->id), | 1247 | "max %s, %Lu sectors: %s\n", |
1112 | ata_mode_string(xfer_modes), | 1248 | ap->id, dev->devno, |
1113 | (unsigned long long)dev->n_sectors, | 1249 | ata_id_major_version(dev->id), |
1114 | dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA"); | 1250 | ata_mode_string(xfer_mask), |
1115 | } else { | 1251 | (unsigned long long)dev->n_sectors, |
1252 | lba_desc); | ||
1253 | } else { | ||
1116 | /* CHS */ | 1254 | /* CHS */ |
1117 | 1255 | ||
1118 | /* Default translation */ | 1256 | /* Default translation */ |
@@ -1128,13 +1266,14 @@ static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |||
1128 | } | 1266 | } |
1129 | 1267 | ||
1130 | /* print device info to dmesg */ | 1268 | /* print device info to dmesg */ |
1131 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n", | 1269 | if (print_info) |
1132 | ap->id, device, | 1270 | printk(KERN_INFO "ata%u: dev %u ATA-%d, " |
1133 | ata_id_major_version(dev->id), | 1271 | "max %s, %Lu sectors: CHS %u/%u/%u\n", |
1134 | ata_mode_string(xfer_modes), | 1272 | ap->id, dev->devno, |
1135 | (unsigned long long)dev->n_sectors, | 1273 | ata_id_major_version(dev->id), |
1136 | (int)dev->cylinders, (int)dev->heads, (int)dev->sectors); | 1274 | ata_mode_string(xfer_mask), |
1137 | 1275 | (unsigned long long)dev->n_sectors, | |
1276 | dev->cylinders, dev->heads, dev->sectors); | ||
1138 | } | 1277 | } |
1139 | 1278 | ||
1140 | if (dev->id[59] & 0x100) { | 1279 | if (dev->id[59] & 0x100) { |
@@ -1150,6 +1289,7 @@ static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |||
1150 | rc = atapi_cdb_len(dev->id); | 1289 | rc = atapi_cdb_len(dev->id); |
1151 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | 1290 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
1152 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | 1291 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); |
1292 | rc = -EINVAL; | ||
1153 | goto err_out_nosup; | 1293 | goto err_out_nosup; |
1154 | } | 1294 | } |
1155 | dev->cdb_len = (unsigned int) rc; | 1295 | dev->cdb_len = (unsigned int) rc; |
@@ -1158,9 +1298,9 @@ static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |||
1158 | dev->flags |= ATA_DFLAG_CDB_INTR; | 1298 | dev->flags |= ATA_DFLAG_CDB_INTR; |
1159 | 1299 | ||
1160 | /* print device info to dmesg */ | 1300 | /* print device info to dmesg */ |
1161 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | 1301 | if (print_info) |
1162 | ap->id, device, | 1302 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", |
1163 | ata_mode_string(xfer_modes)); | 1303 | ap->id, dev->devno, ata_mode_string(xfer_mask)); |
1164 | } | 1304 | } |
1165 | 1305 | ||
1166 | ap->host->max_cmd_len = 0; | 1306 | ap->host->max_cmd_len = 0; |
@@ -1169,44 +1309,26 @@ static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |||
1169 | ap->host->max_cmd_len, | 1309 | ap->host->max_cmd_len, |
1170 | ap->device[i].cdb_len); | 1310 | ap->device[i].cdb_len); |
1171 | 1311 | ||
1172 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | ||
1173 | return; | ||
1174 | |||
1175 | err_out_nosup: | ||
1176 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | ||
1177 | ap->id, device); | ||
1178 | err_out: | ||
1179 | dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */ | ||
1180 | DPRINTK("EXIT, err\n"); | ||
1181 | } | ||
1182 | |||
1183 | |||
1184 | static inline u8 ata_dev_knobble(const struct ata_port *ap, | ||
1185 | struct ata_device *dev) | ||
1186 | { | ||
1187 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); | ||
1188 | } | ||
1189 | |||
1190 | /** | ||
1191 | * ata_dev_config - Run device specific handlers & check for SATA->PATA bridges | ||
1192 | * @ap: Bus | ||
1193 | * @i: Device | ||
1194 | * | ||
1195 | * LOCKING: | ||
1196 | */ | ||
1197 | |||
1198 | void ata_dev_config(struct ata_port *ap, unsigned int i) | ||
1199 | { | ||
1200 | /* limit bridge transfers to udma5, 200 sectors */ | 1312 | /* limit bridge transfers to udma5, 200 sectors */ |
1201 | if (ata_dev_knobble(ap, &ap->device[i])) { | 1313 | if (ata_dev_knobble(ap, dev)) { |
1202 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", | 1314 | if (print_info) |
1203 | ap->id, i); | 1315 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", |
1316 | ap->id, dev->devno); | ||
1204 | ap->udma_mask &= ATA_UDMA5; | 1317 | ap->udma_mask &= ATA_UDMA5; |
1205 | ap->device[i].max_sectors = ATA_MAX_SECTORS; | 1318 | dev->max_sectors = ATA_MAX_SECTORS; |
1206 | } | 1319 | } |
1207 | 1320 | ||
1208 | if (ap->ops->dev_config) | 1321 | if (ap->ops->dev_config) |
1209 | ap->ops->dev_config(ap, &ap->device[i]); | 1322 | ap->ops->dev_config(ap, dev); |
1323 | |||
1324 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | ||
1325 | return 0; | ||
1326 | |||
1327 | err_out_nosup: | ||
1328 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | ||
1329 | ap->id, dev->devno); | ||
1330 | DPRINTK("EXIT, err\n"); | ||
1331 | return rc; | ||
1210 | } | 1332 | } |
1211 | 1333 | ||
1212 | /** | 1334 | /** |
@@ -1226,41 +1348,61 @@ void ata_dev_config(struct ata_port *ap, unsigned int i) | |||
1226 | 1348 | ||
1227 | static int ata_bus_probe(struct ata_port *ap) | 1349 | static int ata_bus_probe(struct ata_port *ap) |
1228 | { | 1350 | { |
1229 | unsigned int i, found = 0; | 1351 | unsigned int classes[ATA_MAX_DEVICES]; |
1352 | unsigned int i, rc, found = 0; | ||
1230 | 1353 | ||
1231 | if (ap->ops->probe_reset) { | 1354 | ata_port_probe(ap); |
1232 | unsigned int classes[ATA_MAX_DEVICES]; | ||
1233 | int rc; | ||
1234 | 1355 | ||
1235 | ata_port_probe(ap); | 1356 | /* reset */ |
1357 | if (ap->ops->probe_reset) { | ||
1358 | for (i = 0; i < ATA_MAX_DEVICES; i++) | ||
1359 | classes[i] = ATA_DEV_UNKNOWN; | ||
1236 | 1360 | ||
1237 | rc = ap->ops->probe_reset(ap, classes); | 1361 | rc = ap->ops->probe_reset(ap, classes); |
1238 | if (rc == 0) { | 1362 | if (rc) { |
1239 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | 1363 | printk("ata%u: reset failed (errno=%d)\n", ap->id, rc); |
1240 | if (classes[i] == ATA_DEV_UNKNOWN) | 1364 | return rc; |
1241 | classes[i] = ATA_DEV_NONE; | ||
1242 | ap->device[i].class = classes[i]; | ||
1243 | } | ||
1244 | } else { | ||
1245 | printk(KERN_ERR "ata%u: probe reset failed, " | ||
1246 | "disabling port\n", ap->id); | ||
1247 | ata_port_disable(ap); | ||
1248 | } | 1365 | } |
1249 | } else | 1366 | |
1367 | for (i = 0; i < ATA_MAX_DEVICES; i++) | ||
1368 | if (classes[i] == ATA_DEV_UNKNOWN) | ||
1369 | classes[i] = ATA_DEV_NONE; | ||
1370 | } else { | ||
1250 | ap->ops->phy_reset(ap); | 1371 | ap->ops->phy_reset(ap); |
1251 | 1372 | ||
1252 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | 1373 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1253 | goto err_out; | 1374 | if (!(ap->flags & ATA_FLAG_PORT_DISABLED)) |
1375 | classes[i] = ap->device[i].class; | ||
1376 | else | ||
1377 | ap->device[i].class = ATA_DEV_UNKNOWN; | ||
1378 | } | ||
1379 | ata_port_probe(ap); | ||
1380 | } | ||
1254 | 1381 | ||
1382 | /* read IDENTIFY page and configure devices */ | ||
1255 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | 1383 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1256 | ata_dev_identify(ap, i); | 1384 | struct ata_device *dev = &ap->device[i]; |
1257 | if (ata_dev_present(&ap->device[i])) { | 1385 | |
1258 | found = 1; | 1386 | dev->class = classes[i]; |
1259 | ata_dev_config(ap,i); | 1387 | |
1388 | if (!ata_dev_present(dev)) | ||
1389 | continue; | ||
1390 | |||
1391 | WARN_ON(dev->id != NULL); | ||
1392 | if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) { | ||
1393 | dev->class = ATA_DEV_NONE; | ||
1394 | continue; | ||
1395 | } | ||
1396 | |||
1397 | if (ata_dev_configure(ap, dev, 1)) { | ||
1398 | dev->class++; /* disable device */ | ||
1399 | continue; | ||
1260 | } | 1400 | } |
1401 | |||
1402 | found = 1; | ||
1261 | } | 1403 | } |
1262 | 1404 | ||
1263 | if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | 1405 | if (!found) |
1264 | goto err_out_disable; | 1406 | goto err_out_disable; |
1265 | 1407 | ||
1266 | ata_set_mode(ap); | 1408 | ata_set_mode(ap); |
@@ -1271,7 +1413,6 @@ static int ata_bus_probe(struct ata_port *ap) | |||
1271 | 1413 | ||
1272 | err_out_disable: | 1414 | err_out_disable: |
1273 | ap->ops->port_disable(ap); | 1415 | ap->ops->port_disable(ap); |
1274 | err_out: | ||
1275 | return -1; | 1416 | return -1; |
1276 | } | 1417 | } |
1277 | 1418 | ||
@@ -1567,31 +1708,8 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |||
1567 | return 0; | 1708 | return 0; |
1568 | } | 1709 | } |
1569 | 1710 | ||
1570 | static const struct { | ||
1571 | unsigned int shift; | ||
1572 | u8 base; | ||
1573 | } xfer_mode_classes[] = { | ||
1574 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | ||
1575 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | ||
1576 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | ||
1577 | }; | ||
1578 | |||
1579 | static u8 base_from_shift(unsigned int shift) | ||
1580 | { | ||
1581 | int i; | ||
1582 | |||
1583 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | ||
1584 | if (xfer_mode_classes[i].shift == shift) | ||
1585 | return xfer_mode_classes[i].base; | ||
1586 | |||
1587 | return 0xff; | ||
1588 | } | ||
1589 | |||
1590 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | 1711 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) |
1591 | { | 1712 | { |
1592 | int ofs, idx; | ||
1593 | u8 base; | ||
1594 | |||
1595 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | 1713 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) |
1596 | return; | 1714 | return; |
1597 | 1715 | ||
@@ -1600,65 +1718,58 @@ static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |||
1600 | 1718 | ||
1601 | ata_dev_set_xfermode(ap, dev); | 1719 | ata_dev_set_xfermode(ap, dev); |
1602 | 1720 | ||
1603 | base = base_from_shift(dev->xfer_shift); | 1721 | if (ata_dev_revalidate(ap, dev, 0)) { |
1604 | ofs = dev->xfer_mode - base; | 1722 | printk(KERN_ERR "ata%u: failed to revalidate after set " |
1605 | idx = ofs + dev->xfer_shift; | 1723 | "xfermode, disabled\n", ap->id); |
1606 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | 1724 | ata_port_disable(ap); |
1725 | } | ||
1607 | 1726 | ||
1608 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", | 1727 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
1609 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | 1728 | dev->xfer_shift, (int)dev->xfer_mode); |
1610 | 1729 | ||
1611 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | 1730 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", |
1612 | ap->id, dev->devno, xfer_mode_str[idx]); | 1731 | ap->id, dev->devno, |
1732 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | ||
1613 | } | 1733 | } |
1614 | 1734 | ||
1615 | static int ata_host_set_pio(struct ata_port *ap) | 1735 | static int ata_host_set_pio(struct ata_port *ap) |
1616 | { | 1736 | { |
1617 | unsigned int mask; | 1737 | int i; |
1618 | int x, i; | ||
1619 | u8 base, xfer_mode; | ||
1620 | |||
1621 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | ||
1622 | x = fgb(mask); | ||
1623 | if (x < 0) { | ||
1624 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | ||
1625 | return -1; | ||
1626 | } | ||
1627 | |||
1628 | base = base_from_shift(ATA_SHIFT_PIO); | ||
1629 | xfer_mode = base + x; | ||
1630 | |||
1631 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | ||
1632 | (int)base, (int)xfer_mode, mask, x); | ||
1633 | 1738 | ||
1634 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | 1739 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1635 | struct ata_device *dev = &ap->device[i]; | 1740 | struct ata_device *dev = &ap->device[i]; |
1636 | if (ata_dev_present(dev)) { | 1741 | |
1637 | dev->pio_mode = xfer_mode; | 1742 | if (!ata_dev_present(dev)) |
1638 | dev->xfer_mode = xfer_mode; | 1743 | continue; |
1639 | dev->xfer_shift = ATA_SHIFT_PIO; | 1744 | |
1640 | if (ap->ops->set_piomode) | 1745 | if (!dev->pio_mode) { |
1641 | ap->ops->set_piomode(ap, dev); | 1746 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); |
1747 | return -1; | ||
1642 | } | 1748 | } |
1749 | |||
1750 | dev->xfer_mode = dev->pio_mode; | ||
1751 | dev->xfer_shift = ATA_SHIFT_PIO; | ||
1752 | if (ap->ops->set_piomode) | ||
1753 | ap->ops->set_piomode(ap, dev); | ||
1643 | } | 1754 | } |
1644 | 1755 | ||
1645 | return 0; | 1756 | return 0; |
1646 | } | 1757 | } |
1647 | 1758 | ||
1648 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | 1759 | static void ata_host_set_dma(struct ata_port *ap) |
1649 | unsigned int xfer_shift) | ||
1650 | { | 1760 | { |
1651 | int i; | 1761 | int i; |
1652 | 1762 | ||
1653 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | 1763 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1654 | struct ata_device *dev = &ap->device[i]; | 1764 | struct ata_device *dev = &ap->device[i]; |
1655 | if (ata_dev_present(dev)) { | 1765 | |
1656 | dev->dma_mode = xfer_mode; | 1766 | if (!ata_dev_present(dev) || !dev->dma_mode) |
1657 | dev->xfer_mode = xfer_mode; | 1767 | continue; |
1658 | dev->xfer_shift = xfer_shift; | 1768 | |
1659 | if (ap->ops->set_dmamode) | 1769 | dev->xfer_mode = dev->dma_mode; |
1660 | ap->ops->set_dmamode(ap, dev); | 1770 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); |
1661 | } | 1771 | if (ap->ops->set_dmamode) |
1772 | ap->ops->set_dmamode(ap, dev); | ||
1662 | } | 1773 | } |
1663 | } | 1774 | } |
1664 | 1775 | ||
@@ -1673,28 +1784,34 @@ static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |||
1673 | */ | 1784 | */ |
1674 | static void ata_set_mode(struct ata_port *ap) | 1785 | static void ata_set_mode(struct ata_port *ap) |
1675 | { | 1786 | { |
1676 | unsigned int xfer_shift; | 1787 | int i, rc; |
1677 | u8 xfer_mode; | ||
1678 | int rc; | ||
1679 | 1788 | ||
1680 | /* step 1: always set host PIO timings */ | 1789 | /* step 1: calculate xfer_mask */ |
1681 | rc = ata_host_set_pio(ap); | 1790 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1682 | if (rc) | 1791 | struct ata_device *dev = &ap->device[i]; |
1683 | goto err_out; | 1792 | unsigned int xfer_mask; |
1793 | |||
1794 | if (!ata_dev_present(dev)) | ||
1795 | continue; | ||
1796 | |||
1797 | xfer_mask = ata_dev_xfermask(ap, dev); | ||
1684 | 1798 | ||
1685 | /* step 2: choose the best data xfer mode */ | 1799 | dev->pio_mode = ata_xfer_mask2mode(xfer_mask & ATA_MASK_PIO); |
1686 | xfer_mode = xfer_shift = 0; | 1800 | dev->dma_mode = ata_xfer_mask2mode(xfer_mask & (ATA_MASK_MWDMA | |
1687 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | 1801 | ATA_MASK_UDMA)); |
1802 | } | ||
1803 | |||
1804 | /* step 2: always set host PIO timings */ | ||
1805 | rc = ata_host_set_pio(ap); | ||
1688 | if (rc) | 1806 | if (rc) |
1689 | goto err_out; | 1807 | goto err_out; |
1690 | 1808 | ||
1691 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | 1809 | /* step 3: set host DMA timings */ |
1692 | if (xfer_shift != ATA_SHIFT_PIO) | 1810 | ata_host_set_dma(ap); |
1693 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | ||
1694 | 1811 | ||
1695 | /* step 4: update devices' xfer mode */ | 1812 | /* step 4: update devices' xfer mode */ |
1696 | ata_dev_set_mode(ap, &ap->device[0]); | 1813 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1697 | ata_dev_set_mode(ap, &ap->device[1]); | 1814 | ata_dev_set_mode(ap, &ap->device[i]); |
1698 | 1815 | ||
1699 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | 1816 | if (ap->flags & ATA_FLAG_PORT_DISABLED) |
1700 | return; | 1817 | return; |
@@ -2325,11 +2442,118 @@ int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit, | |||
2325 | return rc; | 2442 | return rc; |
2326 | } | 2443 | } |
2327 | 2444 | ||
2328 | static void ata_pr_blacklisted(const struct ata_port *ap, | 2445 | /** |
2329 | const struct ata_device *dev) | 2446 | * ata_dev_same_device - Determine whether new ID matches configured device |
2447 | * @ap: port on which the device to compare against resides | ||
2448 | * @dev: device to compare against | ||
2449 | * @new_class: class of the new device | ||
2450 | * @new_id: IDENTIFY page of the new device | ||
2451 | * | ||
2452 | * Compare @new_class and @new_id against @dev and determine | ||
2453 | * whether @dev is the device indicated by @new_class and | ||
2454 | * @new_id. | ||
2455 | * | ||
2456 | * LOCKING: | ||
2457 | * None. | ||
2458 | * | ||
2459 | * RETURNS: | ||
2460 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | ||
2461 | */ | ||
2462 | static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev, | ||
2463 | unsigned int new_class, const u16 *new_id) | ||
2464 | { | ||
2465 | const u16 *old_id = dev->id; | ||
2466 | unsigned char model[2][41], serial[2][21]; | ||
2467 | u64 new_n_sectors; | ||
2468 | |||
2469 | if (dev->class != new_class) { | ||
2470 | printk(KERN_INFO | ||
2471 | "ata%u: dev %u class mismatch %d != %d\n", | ||
2472 | ap->id, dev->devno, dev->class, new_class); | ||
2473 | return 0; | ||
2474 | } | ||
2475 | |||
2476 | ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0])); | ||
2477 | ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1])); | ||
2478 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0])); | ||
2479 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1])); | ||
2480 | new_n_sectors = ata_id_n_sectors(new_id); | ||
2481 | |||
2482 | if (strcmp(model[0], model[1])) { | ||
2483 | printk(KERN_INFO | ||
2484 | "ata%u: dev %u model number mismatch '%s' != '%s'\n", | ||
2485 | ap->id, dev->devno, model[0], model[1]); | ||
2486 | return 0; | ||
2487 | } | ||
2488 | |||
2489 | if (strcmp(serial[0], serial[1])) { | ||
2490 | printk(KERN_INFO | ||
2491 | "ata%u: dev %u serial number mismatch '%s' != '%s'\n", | ||
2492 | ap->id, dev->devno, serial[0], serial[1]); | ||
2493 | return 0; | ||
2494 | } | ||
2495 | |||
2496 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { | ||
2497 | printk(KERN_INFO | ||
2498 | "ata%u: dev %u n_sectors mismatch %llu != %llu\n", | ||
2499 | ap->id, dev->devno, (unsigned long long)dev->n_sectors, | ||
2500 | (unsigned long long)new_n_sectors); | ||
2501 | return 0; | ||
2502 | } | ||
2503 | |||
2504 | return 1; | ||
2505 | } | ||
2506 | |||
2507 | /** | ||
2508 | * ata_dev_revalidate - Revalidate ATA device | ||
2509 | * @ap: port on which the device to revalidate resides | ||
2510 | * @dev: device to revalidate | ||
2511 | * @post_reset: is this revalidation after reset? | ||
2512 | * | ||
2513 | * Re-read IDENTIFY page and make sure @dev is still attached to | ||
2514 | * the port. | ||
2515 | * | ||
2516 | * LOCKING: | ||
2517 | * Kernel thread context (may sleep) | ||
2518 | * | ||
2519 | * RETURNS: | ||
2520 | * 0 on success, negative errno otherwise | ||
2521 | */ | ||
2522 | int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev, | ||
2523 | int post_reset) | ||
2330 | { | 2524 | { |
2331 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | 2525 | unsigned int class; |
2332 | ap->id, dev->devno); | 2526 | u16 *id; |
2527 | int rc; | ||
2528 | |||
2529 | if (!ata_dev_present(dev)) | ||
2530 | return -ENODEV; | ||
2531 | |||
2532 | class = dev->class; | ||
2533 | id = NULL; | ||
2534 | |||
2535 | /* allocate & read ID data */ | ||
2536 | rc = ata_dev_read_id(ap, dev, &class, post_reset, &id); | ||
2537 | if (rc) | ||
2538 | goto fail; | ||
2539 | |||
2540 | /* is the device still there? */ | ||
2541 | if (!ata_dev_same_device(ap, dev, class, id)) { | ||
2542 | rc = -ENODEV; | ||
2543 | goto fail; | ||
2544 | } | ||
2545 | |||
2546 | kfree(dev->id); | ||
2547 | dev->id = id; | ||
2548 | |||
2549 | /* configure device according to the new ID */ | ||
2550 | return ata_dev_configure(ap, dev, 0); | ||
2551 | |||
2552 | fail: | ||
2553 | printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n", | ||
2554 | ap->id, dev->devno, rc); | ||
2555 | kfree(id); | ||
2556 | return rc; | ||
2333 | } | 2557 | } |
2334 | 2558 | ||
2335 | static const char * const ata_dma_blacklist [] = { | 2559 | static const char * const ata_dma_blacklist [] = { |
@@ -2378,128 +2602,45 @@ static int ata_dma_blacklisted(const struct ata_device *dev) | |||
2378 | return 0; | 2602 | return 0; |
2379 | } | 2603 | } |
2380 | 2604 | ||
2381 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift) | ||
2382 | { | ||
2383 | const struct ata_device *master, *slave; | ||
2384 | unsigned int mask; | ||
2385 | |||
2386 | master = &ap->device[0]; | ||
2387 | slave = &ap->device[1]; | ||
2388 | |||
2389 | WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave)); | ||
2390 | |||
2391 | if (shift == ATA_SHIFT_UDMA) { | ||
2392 | mask = ap->udma_mask; | ||
2393 | if (ata_dev_present(master)) { | ||
2394 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | ||
2395 | if (ata_dma_blacklisted(master)) { | ||
2396 | mask = 0; | ||
2397 | ata_pr_blacklisted(ap, master); | ||
2398 | } | ||
2399 | } | ||
2400 | if (ata_dev_present(slave)) { | ||
2401 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | ||
2402 | if (ata_dma_blacklisted(slave)) { | ||
2403 | mask = 0; | ||
2404 | ata_pr_blacklisted(ap, slave); | ||
2405 | } | ||
2406 | } | ||
2407 | } | ||
2408 | else if (shift == ATA_SHIFT_MWDMA) { | ||
2409 | mask = ap->mwdma_mask; | ||
2410 | if (ata_dev_present(master)) { | ||
2411 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | ||
2412 | if (ata_dma_blacklisted(master)) { | ||
2413 | mask = 0; | ||
2414 | ata_pr_blacklisted(ap, master); | ||
2415 | } | ||
2416 | } | ||
2417 | if (ata_dev_present(slave)) { | ||
2418 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | ||
2419 | if (ata_dma_blacklisted(slave)) { | ||
2420 | mask = 0; | ||
2421 | ata_pr_blacklisted(ap, slave); | ||
2422 | } | ||
2423 | } | ||
2424 | } | ||
2425 | else if (shift == ATA_SHIFT_PIO) { | ||
2426 | mask = ap->pio_mask; | ||
2427 | if (ata_dev_present(master)) { | ||
2428 | /* spec doesn't return explicit support for | ||
2429 | * PIO0-2, so we fake it | ||
2430 | */ | ||
2431 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | ||
2432 | tmp_mode <<= 3; | ||
2433 | tmp_mode |= 0x7; | ||
2434 | mask &= tmp_mode; | ||
2435 | } | ||
2436 | if (ata_dev_present(slave)) { | ||
2437 | /* spec doesn't return explicit support for | ||
2438 | * PIO0-2, so we fake it | ||
2439 | */ | ||
2440 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | ||
2441 | tmp_mode <<= 3; | ||
2442 | tmp_mode |= 0x7; | ||
2443 | mask &= tmp_mode; | ||
2444 | } | ||
2445 | } | ||
2446 | else { | ||
2447 | mask = 0xffffffff; /* shut up compiler warning */ | ||
2448 | BUG(); | ||
2449 | } | ||
2450 | |||
2451 | return mask; | ||
2452 | } | ||
2453 | |||
2454 | /* find greatest bit */ | ||
2455 | static int fgb(u32 bitmap) | ||
2456 | { | ||
2457 | unsigned int i; | ||
2458 | int x = -1; | ||
2459 | |||
2460 | for (i = 0; i < 32; i++) | ||
2461 | if (bitmap & (1 << i)) | ||
2462 | x = i; | ||
2463 | |||
2464 | return x; | ||
2465 | } | ||
2466 | |||
2467 | /** | 2605 | /** |
2468 | * ata_choose_xfer_mode - attempt to find best transfer mode | 2606 | * ata_dev_xfermask - Compute supported xfermask of the given device |
2469 | * @ap: Port for which an xfer mode will be selected | 2607 | * @ap: Port on which the device to compute xfermask for resides |
2470 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | 2608 | * @dev: Device to compute xfermask for |
2471 | * @xfer_shift_out: (output) bit shift that selects this mode | ||
2472 | * | 2609 | * |
2473 | * Based on host and device capabilities, determine the | 2610 | * Compute supported xfermask of @dev. This function is |
2474 | * maximum transfer mode that is amenable to all. | 2611 | * responsible for applying all known limits including host |
2612 | * controller limits, device blacklist, etc... | ||
2475 | * | 2613 | * |
2476 | * LOCKING: | 2614 | * LOCKING: |
2477 | * PCI/etc. bus probe sem. | 2615 | * None. |
2478 | * | 2616 | * |
2479 | * RETURNS: | 2617 | * RETURNS: |
2480 | * Zero on success, negative on error. | 2618 | * Computed xfermask. |
2481 | */ | 2619 | */ |
2482 | 2620 | static unsigned int ata_dev_xfermask(struct ata_port *ap, | |
2483 | static int ata_choose_xfer_mode(const struct ata_port *ap, | 2621 | struct ata_device *dev) |
2484 | u8 *xfer_mode_out, | ||
2485 | unsigned int *xfer_shift_out) | ||
2486 | { | 2622 | { |
2487 | unsigned int mask, shift; | 2623 | unsigned long xfer_mask; |
2488 | int x, i; | 2624 | int i; |
2489 | 2625 | ||
2490 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | 2626 | xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask, |
2491 | shift = xfer_mode_classes[i].shift; | 2627 | ap->udma_mask); |
2492 | mask = ata_get_mode_mask(ap, shift); | ||
2493 | 2628 | ||
2494 | x = fgb(mask); | 2629 | /* use port-wide xfermask for now */ |
2495 | if (x >= 0) { | 2630 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2496 | *xfer_mode_out = xfer_mode_classes[i].base + x; | 2631 | struct ata_device *d = &ap->device[i]; |
2497 | *xfer_shift_out = shift; | 2632 | if (!ata_dev_present(d)) |
2498 | return 0; | 2633 | continue; |
2499 | } | 2634 | xfer_mask &= ata_id_xfermask(d->id); |
2635 | if (ata_dma_blacklisted(d)) | ||
2636 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | ||
2500 | } | 2637 | } |
2501 | 2638 | ||
2502 | return -1; | 2639 | if (ata_dma_blacklisted(dev)) |
2640 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, " | ||
2641 | "disabling DMA\n", ap->id, dev->devno); | ||
2642 | |||
2643 | return xfer_mask; | ||
2503 | } | 2644 | } |
2504 | 2645 | ||
2505 | /** | 2646 | /** |
@@ -3667,12 +3808,84 @@ fsm_start: | |||
3667 | } | 3808 | } |
3668 | 3809 | ||
3669 | if (timeout) | 3810 | if (timeout) |
3670 | ata_queue_delayed_pio_task(ap, timeout); | 3811 | ata_port_queue_task(ap, ata_pio_task, ap, timeout); |
3671 | else if (has_next) | 3812 | else if (!qc_completed) |
3672 | goto fsm_start; | 3813 | goto fsm_start; |
3673 | } | 3814 | } |
3674 | 3815 | ||
3675 | /** | 3816 | /** |
3817 | * atapi_packet_task - Write CDB bytes to hardware | ||
3818 | * @_data: Port to which ATAPI device is attached. | ||
3819 | * | ||
3820 | * When device has indicated its readiness to accept | ||
3821 | * a CDB, this function is called. Send the CDB. | ||
3822 | * If DMA is to be performed, exit immediately. | ||
3823 | * Otherwise, we are in polling mode, so poll | ||
3824 | * status under operation succeeds or fails. | ||
3825 | * | ||
3826 | * LOCKING: | ||
3827 | * Kernel thread context (may sleep) | ||
3828 | */ | ||
3829 | |||
3830 | static void atapi_packet_task(void *_data) | ||
3831 | { | ||
3832 | struct ata_port *ap = _data; | ||
3833 | struct ata_queued_cmd *qc; | ||
3834 | u8 status; | ||
3835 | |||
3836 | qc = ata_qc_from_tag(ap, ap->active_tag); | ||
3837 | WARN_ON(qc == NULL); | ||
3838 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | ||
3839 | |||
3840 | /* sleep-wait for BSY to clear */ | ||
3841 | DPRINTK("busy wait\n"); | ||
3842 | if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) { | ||
3843 | qc->err_mask |= AC_ERR_TIMEOUT; | ||
3844 | goto err_out; | ||
3845 | } | ||
3846 | |||
3847 | /* make sure DRQ is set */ | ||
3848 | status = ata_chk_status(ap); | ||
3849 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) { | ||
3850 | qc->err_mask |= AC_ERR_HSM; | ||
3851 | goto err_out; | ||
3852 | } | ||
3853 | |||
3854 | /* send SCSI cdb */ | ||
3855 | DPRINTK("send cdb\n"); | ||
3856 | WARN_ON(qc->dev->cdb_len < 12); | ||
3857 | |||
3858 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || | ||
3859 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | ||
3860 | unsigned long flags; | ||
3861 | |||
3862 | /* Once we're done issuing command and kicking bmdma, | ||
3863 | * irq handler takes over. To not lose irq, we need | ||
3864 | * to clear NOINTR flag before sending cdb, but | ||
3865 | * interrupt handler shouldn't be invoked before we're | ||
3866 | * finished. Hence, the following locking. | ||
3867 | */ | ||
3868 | spin_lock_irqsave(&ap->host_set->lock, flags); | ||
3869 | ap->flags &= ~ATA_FLAG_NOINTR; | ||
3870 | ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1); | ||
3871 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | ||
3872 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | ||
3873 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | ||
3874 | } else { | ||
3875 | ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1); | ||
3876 | |||
3877 | /* PIO commands are handled by polling */ | ||
3878 | ap->hsm_task_state = HSM_ST; | ||
3879 | ata_port_queue_task(ap, ata_pio_task, ap, 0); | ||
3880 | } | ||
3881 | |||
3882 | return; | ||
3883 | |||
3884 | err_out: | ||
3885 | ata_poll_qc_complete(qc); | ||
3886 | } | ||
3887 | |||
3888 | /** | ||
3676 | * ata_qc_timeout - Handle timeout of queued command | 3889 | * ata_qc_timeout - Handle timeout of queued command |
3677 | * @qc: Command that timed out | 3890 | * @qc: Command that timed out |
3678 | * | 3891 | * |
@@ -3700,7 +3913,6 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc) | |||
3700 | 3913 | ||
3701 | DPRINTK("ENTER\n"); | 3914 | DPRINTK("ENTER\n"); |
3702 | 3915 | ||
3703 | ata_flush_pio_tasks(ap); | ||
3704 | ap->hsm_task_state = HSM_ST_IDLE; | 3916 | ap->hsm_task_state = HSM_ST_IDLE; |
3705 | 3917 | ||
3706 | spin_lock_irqsave(&host_set->lock, flags); | 3918 | spin_lock_irqsave(&host_set->lock, flags); |
@@ -4010,7 +4222,7 @@ unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |||
4010 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | 4222 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
4011 | /* PIO data out protocol */ | 4223 | /* PIO data out protocol */ |
4012 | ap->hsm_task_state = HSM_ST_FIRST; | 4224 | ap->hsm_task_state = HSM_ST_FIRST; |
4013 | ata_queue_pio_task(ap); | 4225 | ata_port_queue_task(ap, ata_pio_task, ap, 0); |
4014 | 4226 | ||
4015 | /* always send first data block using | 4227 | /* always send first data block using |
4016 | * the ata_pio_task() codepath. | 4228 | * the ata_pio_task() codepath. |
@@ -4020,7 +4232,7 @@ unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |||
4020 | ap->hsm_task_state = HSM_ST; | 4232 | ap->hsm_task_state = HSM_ST; |
4021 | 4233 | ||
4022 | if (qc->tf.flags & ATA_TFLAG_POLLING) | 4234 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4023 | ata_queue_pio_task(ap); | 4235 | ata_port_queue_task(ap, ata_pio_task, ap, 0); |
4024 | 4236 | ||
4025 | /* if polling, ata_pio_task() handles the rest. | 4237 | /* if polling, ata_pio_task() handles the rest. |
4026 | * otherwise, interrupt handler takes over from here. | 4238 | * otherwise, interrupt handler takes over from here. |
@@ -4041,7 +4253,7 @@ unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |||
4041 | /* send cdb by polling if no cdb interrupt */ | 4253 | /* send cdb by polling if no cdb interrupt */ |
4042 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | 4254 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || |
4043 | (qc->tf.flags & ATA_TFLAG_POLLING)) | 4255 | (qc->tf.flags & ATA_TFLAG_POLLING)) |
4044 | ata_queue_pio_task(ap); | 4256 | ata_port_queue_task(ap, atapi_packet_task, ap, 0); |
4045 | break; | 4257 | break; |
4046 | 4258 | ||
4047 | case ATA_PROT_ATAPI_DMA: | 4259 | case ATA_PROT_ATAPI_DMA: |
@@ -4053,7 +4265,7 @@ unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |||
4053 | 4265 | ||
4054 | /* send cdb by polling if no cdb interrupt */ | 4266 | /* send cdb by polling if no cdb interrupt */ |
4055 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | 4267 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) |
4056 | ata_queue_pio_task(ap); | 4268 | ata_port_queue_task(ap, atapi_packet_task, ap, 0); |
4057 | break; | 4269 | break; |
4058 | 4270 | ||
4059 | default: | 4271 | default: |
@@ -4533,6 +4745,7 @@ irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |||
4533 | return IRQ_RETVAL(handled); | 4745 | return IRQ_RETVAL(handled); |
4534 | } | 4746 | } |
4535 | 4747 | ||
4748 | |||
4536 | /* | 4749 | /* |
4537 | * Execute a 'simple' command, that only consists of the opcode 'cmd' itself, | 4750 | * Execute a 'simple' command, that only consists of the opcode 'cmd' itself, |
4538 | * without filling any other registers | 4751 | * without filling any other registers |
@@ -4752,7 +4965,7 @@ static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |||
4752 | ap->active_tag = ATA_TAG_POISON; | 4965 | ap->active_tag = ATA_TAG_POISON; |
4753 | ap->last_ctl = 0xFF; | 4966 | ap->last_ctl = 0xFF; |
4754 | 4967 | ||
4755 | INIT_WORK(&ap->pio_task, ata_pio_task, ap); | 4968 | INIT_WORK(&ap->port_task, NULL, NULL); |
4756 | INIT_LIST_HEAD(&ap->eh_done_q); | 4969 | INIT_LIST_HEAD(&ap->eh_done_q); |
4757 | 4970 | ||
4758 | for (i = 0; i < ATA_MAX_DEVICES; i++) | 4971 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
@@ -5007,11 +5220,14 @@ void ata_host_set_remove(struct ata_host_set *host_set) | |||
5007 | int ata_scsi_release(struct Scsi_Host *host) | 5220 | int ata_scsi_release(struct Scsi_Host *host) |
5008 | { | 5221 | { |
5009 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | 5222 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; |
5223 | int i; | ||
5010 | 5224 | ||
5011 | DPRINTK("ENTER\n"); | 5225 | DPRINTK("ENTER\n"); |
5012 | 5226 | ||
5013 | ap->ops->port_disable(ap); | 5227 | ap->ops->port_disable(ap); |
5014 | ata_host_remove(ap, 0); | 5228 | ata_host_remove(ap, 0); |
5229 | for (i = 0; i < ATA_MAX_DEVICES; i++) | ||
5230 | kfree(ap->device[i].id); | ||
5015 | 5231 | ||
5016 | DPRINTK("EXIT\n"); | 5232 | DPRINTK("EXIT\n"); |
5017 | return 1; | 5233 | return 1; |
@@ -5215,9 +5431,11 @@ EXPORT_SYMBOL_GPL(sata_std_hardreset); | |||
5215 | EXPORT_SYMBOL_GPL(ata_std_postreset); | 5431 | EXPORT_SYMBOL_GPL(ata_std_postreset); |
5216 | EXPORT_SYMBOL_GPL(ata_std_probe_reset); | 5432 | EXPORT_SYMBOL_GPL(ata_std_probe_reset); |
5217 | EXPORT_SYMBOL_GPL(ata_drive_probe_reset); | 5433 | EXPORT_SYMBOL_GPL(ata_drive_probe_reset); |
5434 | EXPORT_SYMBOL_GPL(ata_dev_revalidate); | ||
5218 | EXPORT_SYMBOL_GPL(ata_port_disable); | 5435 | EXPORT_SYMBOL_GPL(ata_port_disable); |
5219 | EXPORT_SYMBOL_GPL(ata_ratelimit); | 5436 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
5220 | EXPORT_SYMBOL_GPL(ata_busy_sleep); | 5437 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
5438 | EXPORT_SYMBOL_GPL(ata_port_queue_task); | ||
5221 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); | 5439 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
5222 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | 5440 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); |
5223 | EXPORT_SYMBOL_GPL(ata_scsi_timed_out); | 5441 | EXPORT_SYMBOL_GPL(ata_scsi_timed_out); |
@@ -5228,7 +5446,6 @@ EXPORT_SYMBOL_GPL(ata_host_intr); | |||
5228 | EXPORT_SYMBOL_GPL(ata_dev_classify); | 5446 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
5229 | EXPORT_SYMBOL_GPL(ata_id_string); | 5447 | EXPORT_SYMBOL_GPL(ata_id_string); |
5230 | EXPORT_SYMBOL_GPL(ata_id_c_string); | 5448 | EXPORT_SYMBOL_GPL(ata_id_c_string); |
5231 | EXPORT_SYMBOL_GPL(ata_dev_config); | ||
5232 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); | 5449 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
5233 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); | 5450 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
5234 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | 5451 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); |
diff --git a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c index d0bd94abb413..ccedb4536977 100644 --- a/drivers/scsi/libata-scsi.c +++ b/drivers/scsi/libata-scsi.c | |||
@@ -785,6 +785,8 @@ int ata_scsi_error(struct Scsi_Host *host) | |||
785 | WARN_ON(ata_qc_from_tag(ap, ap->active_tag) == NULL); | 785 | WARN_ON(ata_qc_from_tag(ap, ap->active_tag) == NULL); |
786 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | 786 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
787 | 787 | ||
788 | ata_port_flush_task(ap); | ||
789 | |||
788 | ap->ops->eng_timeout(ap); | 790 | ap->ops->eng_timeout(ap); |
789 | 791 | ||
790 | WARN_ON(host->host_failed || !list_empty(&host->eh_cmd_q)); | 792 | WARN_ON(host->host_failed || !list_empty(&host->eh_cmd_q)); |
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h index d822eba05f3c..f4c48c91b63d 100644 --- a/drivers/scsi/libata.h +++ b/drivers/scsi/libata.h | |||
@@ -45,6 +45,7 @@ extern int libata_fua; | |||
45 | extern struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | 45 | extern struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, |
46 | struct ata_device *dev); | 46 | struct ata_device *dev); |
47 | extern int ata_rwcmd_protocol(struct ata_queued_cmd *qc); | 47 | extern int ata_rwcmd_protocol(struct ata_queued_cmd *qc); |
48 | extern void ata_port_flush_task(struct ata_port *ap); | ||
48 | extern void ata_qc_free(struct ata_queued_cmd *qc); | 49 | extern void ata_qc_free(struct ata_queued_cmd *qc); |
49 | extern unsigned int ata_qc_issue(struct ata_queued_cmd *qc); | 50 | extern unsigned int ata_qc_issue(struct ata_queued_cmd *qc); |
50 | extern int ata_check_atapi_dma(struct ata_queued_cmd *qc); | 51 | extern int ata_check_atapi_dma(struct ata_queued_cmd *qc); |
diff --git a/drivers/scsi/sata_promise.c b/drivers/scsi/sata_promise.c index 7fa807d7d9e1..e5862ad5e6cd 100644 --- a/drivers/scsi/sata_promise.c +++ b/drivers/scsi/sata_promise.c | |||
@@ -256,6 +256,8 @@ static const struct pci_device_id pdc_ata_pci_tbl[] = { | |||
256 | board_20319 }, | 256 | board_20319 }, |
257 | { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 257 | { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
258 | board_20319 }, | 258 | board_20319 }, |
259 | { PCI_VENDOR_ID_PROMISE, 0x3515, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
260 | board_20319 }, | ||
259 | { PCI_VENDOR_ID_PROMISE, 0x3519, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 261 | { PCI_VENDOR_ID_PROMISE, 0x3519, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
260 | board_20319 }, | 262 | board_20319 }, |
261 | { PCI_VENDOR_ID_PROMISE, 0x3d17, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 263 | { PCI_VENDOR_ID_PROMISE, 0x3d17, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c index cdf800e3ec13..4f2a67ed39d8 100644 --- a/drivers/scsi/sata_sil.c +++ b/drivers/scsi/sata_sil.c | |||
@@ -49,24 +49,30 @@ | |||
49 | #define DRV_VERSION "0.9" | 49 | #define DRV_VERSION "0.9" |
50 | 50 | ||
51 | enum { | 51 | enum { |
52 | /* | ||
53 | * host flags | ||
54 | */ | ||
52 | SIL_FLAG_RERR_ON_DMA_ACT = (1 << 29), | 55 | SIL_FLAG_RERR_ON_DMA_ACT = (1 << 29), |
53 | SIL_FLAG_MOD15WRITE = (1 << 30), | 56 | SIL_FLAG_MOD15WRITE = (1 << 30), |
57 | SIL_DFL_HOST_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | ||
58 | ATA_FLAG_MMIO, | ||
54 | 59 | ||
60 | /* | ||
61 | * Controller IDs | ||
62 | */ | ||
55 | sil_3112 = 0, | 63 | sil_3112 = 0, |
56 | sil_3112_m15w = 1, | 64 | sil_3512 = 1, |
57 | sil_3512 = 2, | 65 | sil_3114 = 2, |
58 | sil_3114 = 3, | ||
59 | |||
60 | SIL_FIFO_R0 = 0x40, | ||
61 | SIL_FIFO_W0 = 0x41, | ||
62 | SIL_FIFO_R1 = 0x44, | ||
63 | SIL_FIFO_W1 = 0x45, | ||
64 | SIL_FIFO_R2 = 0x240, | ||
65 | SIL_FIFO_W2 = 0x241, | ||
66 | SIL_FIFO_R3 = 0x244, | ||
67 | SIL_FIFO_W3 = 0x245, | ||
68 | 66 | ||
67 | /* | ||
68 | * Register offsets | ||
69 | */ | ||
69 | SIL_SYSCFG = 0x48, | 70 | SIL_SYSCFG = 0x48, |
71 | |||
72 | /* | ||
73 | * Register bits | ||
74 | */ | ||
75 | /* SYSCFG */ | ||
70 | SIL_MASK_IDE0_INT = (1 << 22), | 76 | SIL_MASK_IDE0_INT = (1 << 22), |
71 | SIL_MASK_IDE1_INT = (1 << 23), | 77 | SIL_MASK_IDE1_INT = (1 << 23), |
72 | SIL_MASK_IDE2_INT = (1 << 24), | 78 | SIL_MASK_IDE2_INT = (1 << 24), |
@@ -75,9 +81,12 @@ enum { | |||
75 | SIL_MASK_4PORT = SIL_MASK_2PORT | | 81 | SIL_MASK_4PORT = SIL_MASK_2PORT | |
76 | SIL_MASK_IDE2_INT | SIL_MASK_IDE3_INT, | 82 | SIL_MASK_IDE2_INT | SIL_MASK_IDE3_INT, |
77 | 83 | ||
78 | SIL_IDE2_BMDMA = 0x200, | 84 | /* BMDMA/BMDMA2 */ |
79 | |||
80 | SIL_INTR_STEERING = (1 << 1), | 85 | SIL_INTR_STEERING = (1 << 1), |
86 | |||
87 | /* | ||
88 | * Others | ||
89 | */ | ||
81 | SIL_QUIRK_MOD15WRITE = (1 << 0), | 90 | SIL_QUIRK_MOD15WRITE = (1 << 0), |
82 | SIL_QUIRK_UDMA5MAX = (1 << 1), | 91 | SIL_QUIRK_UDMA5MAX = (1 << 1), |
83 | }; | 92 | }; |
@@ -90,13 +99,13 @@ static void sil_post_set_mode (struct ata_port *ap); | |||
90 | 99 | ||
91 | 100 | ||
92 | static const struct pci_device_id sil_pci_tbl[] = { | 101 | static const struct pci_device_id sil_pci_tbl[] = { |
93 | { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, | 102 | { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, |
94 | { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, | 103 | { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, |
95 | { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3512 }, | 104 | { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3512 }, |
96 | { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, | 105 | { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, |
97 | { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, | 106 | { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, |
98 | { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, | 107 | { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, |
99 | { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, | 108 | { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, |
100 | { } /* terminate list */ | 109 | { } /* terminate list */ |
101 | }; | 110 | }; |
102 | 111 | ||
@@ -181,18 +190,7 @@ static const struct ata_port_info sil_port_info[] = { | |||
181 | /* sil_3112 */ | 190 | /* sil_3112 */ |
182 | { | 191 | { |
183 | .sht = &sil_sht, | 192 | .sht = &sil_sht, |
184 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | 193 | .host_flags = SIL_DFL_HOST_FLAGS | SIL_FLAG_MOD15WRITE, |
185 | ATA_FLAG_MMIO, | ||
186 | .pio_mask = 0x1f, /* pio0-4 */ | ||
187 | .mwdma_mask = 0x07, /* mwdma0-2 */ | ||
188 | .udma_mask = 0x3f, /* udma0-5 */ | ||
189 | .port_ops = &sil_ops, | ||
190 | }, | ||
191 | /* sil_3112_15w - keep it sync'd w/ sil_3112 */ | ||
192 | { | ||
193 | .sht = &sil_sht, | ||
194 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | ||
195 | ATA_FLAG_MMIO | SIL_FLAG_MOD15WRITE, | ||
196 | .pio_mask = 0x1f, /* pio0-4 */ | 194 | .pio_mask = 0x1f, /* pio0-4 */ |
197 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 195 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
198 | .udma_mask = 0x3f, /* udma0-5 */ | 196 | .udma_mask = 0x3f, /* udma0-5 */ |
@@ -201,9 +199,7 @@ static const struct ata_port_info sil_port_info[] = { | |||
201 | /* sil_3512 */ | 199 | /* sil_3512 */ |
202 | { | 200 | { |
203 | .sht = &sil_sht, | 201 | .sht = &sil_sht, |
204 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | 202 | .host_flags = SIL_DFL_HOST_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, |
205 | ATA_FLAG_MMIO | | ||
206 | SIL_FLAG_RERR_ON_DMA_ACT, | ||
207 | .pio_mask = 0x1f, /* pio0-4 */ | 203 | .pio_mask = 0x1f, /* pio0-4 */ |
208 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 204 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
209 | .udma_mask = 0x3f, /* udma0-5 */ | 205 | .udma_mask = 0x3f, /* udma0-5 */ |
@@ -212,9 +208,7 @@ static const struct ata_port_info sil_port_info[] = { | |||
212 | /* sil_3114 */ | 208 | /* sil_3114 */ |
213 | { | 209 | { |
214 | .sht = &sil_sht, | 210 | .sht = &sil_sht, |
215 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | 211 | .host_flags = SIL_DFL_HOST_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, |
216 | ATA_FLAG_MMIO | | ||
217 | SIL_FLAG_RERR_ON_DMA_ACT, | ||
218 | .pio_mask = 0x1f, /* pio0-4 */ | 212 | .pio_mask = 0x1f, /* pio0-4 */ |
219 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 213 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
220 | .udma_mask = 0x3f, /* udma0-5 */ | 214 | .udma_mask = 0x3f, /* udma0-5 */ |
@@ -228,16 +222,17 @@ static const struct { | |||
228 | unsigned long tf; /* ATA taskfile register block */ | 222 | unsigned long tf; /* ATA taskfile register block */ |
229 | unsigned long ctl; /* ATA control/altstatus register block */ | 223 | unsigned long ctl; /* ATA control/altstatus register block */ |
230 | unsigned long bmdma; /* DMA register block */ | 224 | unsigned long bmdma; /* DMA register block */ |
225 | unsigned long fifo_cfg; /* FIFO Valid Byte Count and Control */ | ||
231 | unsigned long scr; /* SATA control register block */ | 226 | unsigned long scr; /* SATA control register block */ |
232 | unsigned long sien; /* SATA Interrupt Enable register */ | 227 | unsigned long sien; /* SATA Interrupt Enable register */ |
233 | unsigned long xfer_mode;/* data transfer mode register */ | 228 | unsigned long xfer_mode;/* data transfer mode register */ |
234 | unsigned long sfis_cfg; /* SATA FIS reception config register */ | 229 | unsigned long sfis_cfg; /* SATA FIS reception config register */ |
235 | } sil_port[] = { | 230 | } sil_port[] = { |
236 | /* port 0 ... */ | 231 | /* port 0 ... */ |
237 | { 0x80, 0x8A, 0x00, 0x100, 0x148, 0xb4, 0x14c }, | 232 | { 0x80, 0x8A, 0x00, 0x40, 0x100, 0x148, 0xb4, 0x14c }, |
238 | { 0xC0, 0xCA, 0x08, 0x180, 0x1c8, 0xf4, 0x1cc }, | 233 | { 0xC0, 0xCA, 0x08, 0x44, 0x180, 0x1c8, 0xf4, 0x1cc }, |
239 | { 0x280, 0x28A, 0x200, 0x300, 0x348, 0x2b4, 0x34c }, | 234 | { 0x280, 0x28A, 0x200, 0x240, 0x300, 0x348, 0x2b4, 0x34c }, |
240 | { 0x2C0, 0x2CA, 0x208, 0x380, 0x3c8, 0x2f4, 0x3cc }, | 235 | { 0x2C0, 0x2CA, 0x208, 0x244, 0x380, 0x3c8, 0x2f4, 0x3cc }, |
241 | /* ... port 3 */ | 236 | /* ... port 3 */ |
242 | }; | 237 | }; |
243 | 238 | ||
@@ -418,13 +413,12 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
418 | if (rc) | 413 | if (rc) |
419 | goto err_out_regions; | 414 | goto err_out_regions; |
420 | 415 | ||
421 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); | 416 | probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); |
422 | if (probe_ent == NULL) { | 417 | if (probe_ent == NULL) { |
423 | rc = -ENOMEM; | 418 | rc = -ENOMEM; |
424 | goto err_out_regions; | 419 | goto err_out_regions; |
425 | } | 420 | } |
426 | 421 | ||
427 | memset(probe_ent, 0, sizeof(*probe_ent)); | ||
428 | INIT_LIST_HEAD(&probe_ent->node); | 422 | INIT_LIST_HEAD(&probe_ent->node); |
429 | probe_ent->dev = pci_dev_to_dev(pdev); | 423 | probe_ent->dev = pci_dev_to_dev(pdev); |
430 | probe_ent->port_ops = sil_port_info[ent->driver_data].port_ops; | 424 | probe_ent->port_ops = sil_port_info[ent->driver_data].port_ops; |
@@ -461,19 +455,12 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
461 | if (cls) { | 455 | if (cls) { |
462 | cls >>= 3; | 456 | cls >>= 3; |
463 | cls++; /* cls = (line_size/8)+1 */ | 457 | cls++; /* cls = (line_size/8)+1 */ |
464 | writeb(cls, mmio_base + SIL_FIFO_R0); | 458 | for (i = 0; i < probe_ent->n_ports; i++) |
465 | writeb(cls, mmio_base + SIL_FIFO_W0); | 459 | writew(cls << 8 | cls, |
466 | writeb(cls, mmio_base + SIL_FIFO_R1); | 460 | mmio_base + sil_port[i].fifo_cfg); |
467 | writeb(cls, mmio_base + SIL_FIFO_W1); | ||
468 | if (ent->driver_data == sil_3114) { | ||
469 | writeb(cls, mmio_base + SIL_FIFO_R2); | ||
470 | writeb(cls, mmio_base + SIL_FIFO_W2); | ||
471 | writeb(cls, mmio_base + SIL_FIFO_R3); | ||
472 | writeb(cls, mmio_base + SIL_FIFO_W3); | ||
473 | } | ||
474 | } else | 461 | } else |
475 | dev_printk(KERN_WARNING, &pdev->dev, | 462 | dev_printk(KERN_WARNING, &pdev->dev, |
476 | "cache line size not set. Driver may not function\n"); | 463 | "cache line size not set. Driver may not function\n"); |
477 | 464 | ||
478 | /* Apply R_ERR on DMA activate FIS errata workaround */ | 465 | /* Apply R_ERR on DMA activate FIS errata workaround */ |
479 | if (probe_ent->host_flags & SIL_FLAG_RERR_ON_DMA_ACT) { | 466 | if (probe_ent->host_flags & SIL_FLAG_RERR_ON_DMA_ACT) { |
@@ -496,10 +483,10 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
496 | irq_mask = SIL_MASK_4PORT; | 483 | irq_mask = SIL_MASK_4PORT; |
497 | 484 | ||
498 | /* flip the magic "make 4 ports work" bit */ | 485 | /* flip the magic "make 4 ports work" bit */ |
499 | tmp = readl(mmio_base + SIL_IDE2_BMDMA); | 486 | tmp = readl(mmio_base + sil_port[2].bmdma); |
500 | if ((tmp & SIL_INTR_STEERING) == 0) | 487 | if ((tmp & SIL_INTR_STEERING) == 0) |
501 | writel(tmp | SIL_INTR_STEERING, | 488 | writel(tmp | SIL_INTR_STEERING, |
502 | mmio_base + SIL_IDE2_BMDMA); | 489 | mmio_base + sil_port[2].bmdma); |
503 | 490 | ||
504 | } else { | 491 | } else { |
505 | irq_mask = SIL_MASK_2PORT; | 492 | irq_mask = SIL_MASK_2PORT; |
diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c index 5c5822e33a49..8fb62427be84 100644 --- a/drivers/scsi/sata_sil24.c +++ b/drivers/scsi/sata_sil24.c | |||
@@ -892,6 +892,7 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
892 | probe_ent->sht = pinfo->sht; | 892 | probe_ent->sht = pinfo->sht; |
893 | probe_ent->host_flags = pinfo->host_flags; | 893 | probe_ent->host_flags = pinfo->host_flags; |
894 | probe_ent->pio_mask = pinfo->pio_mask; | 894 | probe_ent->pio_mask = pinfo->pio_mask; |
895 | probe_ent->mwdma_mask = pinfo->mwdma_mask; | ||
895 | probe_ent->udma_mask = pinfo->udma_mask; | 896 | probe_ent->udma_mask = pinfo->udma_mask; |
896 | probe_ent->port_ops = pinfo->port_ops; | 897 | probe_ent->port_ops = pinfo->port_ops; |
897 | probe_ent->n_ports = SIL24_FLAG2NPORTS(pinfo->host_flags); | 898 | probe_ent->n_ports = SIL24_FLAG2NPORTS(pinfo->host_flags); |
diff --git a/drivers/scsi/sr_ioctl.c b/drivers/scsi/sr_ioctl.c index 5d02ff4db6cc..b65462f76484 100644 --- a/drivers/scsi/sr_ioctl.c +++ b/drivers/scsi/sr_ioctl.c | |||
@@ -192,7 +192,7 @@ int sr_do_ioctl(Scsi_CD *cd, struct packet_command *cgc) | |||
192 | SDev = cd->device; | 192 | SDev = cd->device; |
193 | 193 | ||
194 | if (!sense) { | 194 | if (!sense) { |
195 | sense = kmalloc(sizeof(*sense), GFP_KERNEL); | 195 | sense = kmalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL); |
196 | if (!sense) { | 196 | if (!sense) { |
197 | err = -ENOMEM; | 197 | err = -ENOMEM; |
198 | goto out; | 198 | goto out; |