diff options
Diffstat (limited to 'drivers/scsi/sata_sx4.c')
-rw-r--r-- | drivers/scsi/sata_sx4.c | 138 |
1 files changed, 69 insertions, 69 deletions
diff --git a/drivers/scsi/sata_sx4.c b/drivers/scsi/sata_sx4.c index 140cea05de3f..8e59868b24bb 100644 --- a/drivers/scsi/sata_sx4.c +++ b/drivers/scsi/sata_sx4.c | |||
@@ -94,7 +94,7 @@ enum { | |||
94 | PDC_DIMM1_CONTROL_OFFSET = 0x84, | 94 | PDC_DIMM1_CONTROL_OFFSET = 0x84, |
95 | PDC_SDRAM_CONTROL_OFFSET = 0x88, | 95 | PDC_SDRAM_CONTROL_OFFSET = 0x88, |
96 | PDC_I2C_WRITE = 0x00000000, | 96 | PDC_I2C_WRITE = 0x00000000, |
97 | PDC_I2C_READ = 0x00000040, | 97 | PDC_I2C_READ = 0x00000040, |
98 | PDC_I2C_START = 0x00000080, | 98 | PDC_I2C_START = 0x00000080, |
99 | PDC_I2C_MASK_INT = 0x00000020, | 99 | PDC_I2C_MASK_INT = 0x00000020, |
100 | PDC_I2C_COMPLETE = 0x00010000, | 100 | PDC_I2C_COMPLETE = 0x00010000, |
@@ -105,16 +105,16 @@ enum { | |||
105 | PDC_DIMM_SPD_COLUMN_NUM = 4, | 105 | PDC_DIMM_SPD_COLUMN_NUM = 4, |
106 | PDC_DIMM_SPD_MODULE_ROW = 5, | 106 | PDC_DIMM_SPD_MODULE_ROW = 5, |
107 | PDC_DIMM_SPD_TYPE = 11, | 107 | PDC_DIMM_SPD_TYPE = 11, |
108 | PDC_DIMM_SPD_FRESH_RATE = 12, | 108 | PDC_DIMM_SPD_FRESH_RATE = 12, |
109 | PDC_DIMM_SPD_BANK_NUM = 17, | 109 | PDC_DIMM_SPD_BANK_NUM = 17, |
110 | PDC_DIMM_SPD_CAS_LATENCY = 18, | 110 | PDC_DIMM_SPD_CAS_LATENCY = 18, |
111 | PDC_DIMM_SPD_ATTRIBUTE = 21, | 111 | PDC_DIMM_SPD_ATTRIBUTE = 21, |
112 | PDC_DIMM_SPD_ROW_PRE_CHARGE = 27, | 112 | PDC_DIMM_SPD_ROW_PRE_CHARGE = 27, |
113 | PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28, | 113 | PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28, |
114 | PDC_DIMM_SPD_RAS_CAS_DELAY = 29, | 114 | PDC_DIMM_SPD_RAS_CAS_DELAY = 29, |
115 | PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30, | 115 | PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30, |
116 | PDC_DIMM_SPD_SYSTEM_FREQ = 126, | 116 | PDC_DIMM_SPD_SYSTEM_FREQ = 126, |
117 | PDC_CTL_STATUS = 0x08, | 117 | PDC_CTL_STATUS = 0x08, |
118 | PDC_DIMM_WINDOW_CTLR = 0x0C, | 118 | PDC_DIMM_WINDOW_CTLR = 0x0C, |
119 | PDC_TIME_CONTROL = 0x3C, | 119 | PDC_TIME_CONTROL = 0x3C, |
120 | PDC_TIME_PERIOD = 0x40, | 120 | PDC_TIME_PERIOD = 0x40, |
@@ -157,15 +157,15 @@ static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf); | |||
157 | static void pdc20621_host_stop(struct ata_host_set *host_set); | 157 | static void pdc20621_host_stop(struct ata_host_set *host_set); |
158 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe); | 158 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe); |
159 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe); | 159 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe); |
160 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, | 160 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, |
161 | u32 device, u32 subaddr, u32 *pdata); | 161 | u32 device, u32 subaddr, u32 *pdata); |
162 | static int pdc20621_prog_dimm0(struct ata_probe_ent *pe); | 162 | static int pdc20621_prog_dimm0(struct ata_probe_ent *pe); |
163 | static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe); | 163 | static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe); |
164 | #ifdef ATA_VERBOSE_DEBUG | 164 | #ifdef ATA_VERBOSE_DEBUG |
165 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, | 165 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, |
166 | void *psource, u32 offset, u32 size); | 166 | void *psource, u32 offset, u32 size); |
167 | #endif | 167 | #endif |
168 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, | 168 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, |
169 | void *psource, u32 offset, u32 size); | 169 | void *psource, u32 offset, u32 size); |
170 | static void pdc20621_irq_clear(struct ata_port *ap); | 170 | static void pdc20621_irq_clear(struct ata_port *ap); |
171 | static int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); | 171 | static int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); |
@@ -922,7 +922,7 @@ static void pdc_sata_setup_port(struct ata_ioports *port, unsigned long base) | |||
922 | 922 | ||
923 | 923 | ||
924 | #ifdef ATA_VERBOSE_DEBUG | 924 | #ifdef ATA_VERBOSE_DEBUG |
925 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | 925 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, |
926 | u32 offset, u32 size) | 926 | u32 offset, u32 size) |
927 | { | 927 | { |
928 | u32 window_size; | 928 | u32 window_size; |
@@ -936,9 +936,9 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | |||
936 | /* hard-code chip #0 */ | 936 | /* hard-code chip #0 */ |
937 | mmio += PDC_CHIP0_OFS; | 937 | mmio += PDC_CHIP0_OFS; |
938 | 938 | ||
939 | page_mask = 0x00; | 939 | page_mask = 0x00; |
940 | window_size = 0x2000 * 4; /* 32K byte uchar size */ | 940 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
941 | idx = (u16) (offset / window_size); | 941 | idx = (u16) (offset / window_size); |
942 | 942 | ||
943 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 943 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
944 | readl(mmio + PDC_GENERAL_CTLR); | 944 | readl(mmio + PDC_GENERAL_CTLR); |
@@ -947,19 +947,19 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | |||
947 | 947 | ||
948 | offset -= (idx * window_size); | 948 | offset -= (idx * window_size); |
949 | idx++; | 949 | idx++; |
950 | dist = ((long) (window_size - (offset + size))) >= 0 ? size : | 950 | dist = ((long) (window_size - (offset + size))) >= 0 ? size : |
951 | (long) (window_size - offset); | 951 | (long) (window_size - offset); |
952 | memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4), | 952 | memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4), |
953 | dist); | 953 | dist); |
954 | 954 | ||
955 | psource += dist; | 955 | psource += dist; |
956 | size -= dist; | 956 | size -= dist; |
957 | for (; (long) size >= (long) window_size ;) { | 957 | for (; (long) size >= (long) window_size ;) { |
958 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 958 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
959 | readl(mmio + PDC_GENERAL_CTLR); | 959 | readl(mmio + PDC_GENERAL_CTLR); |
960 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 960 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
961 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 961 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
962 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), | 962 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), |
963 | window_size / 4); | 963 | window_size / 4); |
964 | psource += window_size; | 964 | psource += window_size; |
965 | size -= window_size; | 965 | size -= window_size; |
@@ -971,14 +971,14 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | |||
971 | readl(mmio + PDC_GENERAL_CTLR); | 971 | readl(mmio + PDC_GENERAL_CTLR); |
972 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 972 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
973 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 973 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
974 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), | 974 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), |
975 | size / 4); | 975 | size / 4); |
976 | } | 976 | } |
977 | } | 977 | } |
978 | #endif | 978 | #endif |
979 | 979 | ||
980 | 980 | ||
981 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | 981 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, |
982 | u32 offset, u32 size) | 982 | u32 offset, u32 size) |
983 | { | 983 | { |
984 | u32 window_size; | 984 | u32 window_size; |
@@ -989,16 +989,16 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
989 | struct pdc_host_priv *hpriv = pe->private_data; | 989 | struct pdc_host_priv *hpriv = pe->private_data; |
990 | void *dimm_mmio = hpriv->dimm_mmio; | 990 | void *dimm_mmio = hpriv->dimm_mmio; |
991 | 991 | ||
992 | /* hard-code chip #0 */ | 992 | /* hard-code chip #0 */ |
993 | mmio += PDC_CHIP0_OFS; | 993 | mmio += PDC_CHIP0_OFS; |
994 | 994 | ||
995 | page_mask = 0x00; | 995 | page_mask = 0x00; |
996 | window_size = 0x2000 * 4; /* 32K byte uchar size */ | 996 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
997 | idx = (u16) (offset / window_size); | 997 | idx = (u16) (offset / window_size); |
998 | 998 | ||
999 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 999 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
1000 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 1000 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
1001 | offset -= (idx * window_size); | 1001 | offset -= (idx * window_size); |
1002 | idx++; | 1002 | idx++; |
1003 | dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : | 1003 | dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : |
1004 | (long) (window_size - offset); | 1004 | (long) (window_size - offset); |
@@ -1006,12 +1006,12 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
1006 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 1006 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
1007 | readl(mmio + PDC_GENERAL_CTLR); | 1007 | readl(mmio + PDC_GENERAL_CTLR); |
1008 | 1008 | ||
1009 | psource += dist; | 1009 | psource += dist; |
1010 | size -= dist; | 1010 | size -= dist; |
1011 | for (; (long) size >= (long) window_size ;) { | 1011 | for (; (long) size >= (long) window_size ;) { |
1012 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 1012 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
1013 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 1013 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
1014 | memcpy_toio((char *) (dimm_mmio), (char *) psource, | 1014 | memcpy_toio((char *) (dimm_mmio), (char *) psource, |
1015 | window_size / 4); | 1015 | window_size / 4); |
1016 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 1016 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
1017 | readl(mmio + PDC_GENERAL_CTLR); | 1017 | readl(mmio + PDC_GENERAL_CTLR); |
@@ -1019,7 +1019,7 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
1019 | size -= window_size; | 1019 | size -= window_size; |
1020 | idx ++; | 1020 | idx ++; |
1021 | } | 1021 | } |
1022 | 1022 | ||
1023 | if (size) { | 1023 | if (size) { |
1024 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 1024 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
1025 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 1025 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
@@ -1030,12 +1030,12 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
1030 | } | 1030 | } |
1031 | 1031 | ||
1032 | 1032 | ||
1033 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, | 1033 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, |
1034 | u32 subaddr, u32 *pdata) | 1034 | u32 subaddr, u32 *pdata) |
1035 | { | 1035 | { |
1036 | void *mmio = pe->mmio_base; | 1036 | void *mmio = pe->mmio_base; |
1037 | u32 i2creg = 0; | 1037 | u32 i2creg = 0; |
1038 | u32 status; | 1038 | u32 status; |
1039 | u32 count =0; | 1039 | u32 count =0; |
1040 | 1040 | ||
1041 | /* hard-code chip #0 */ | 1041 | /* hard-code chip #0 */ |
@@ -1049,7 +1049,7 @@ static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, | |||
1049 | readl(mmio + PDC_I2C_ADDR_DATA_OFFSET); | 1049 | readl(mmio + PDC_I2C_ADDR_DATA_OFFSET); |
1050 | 1050 | ||
1051 | /* Write Control to perform read operation, mask int */ | 1051 | /* Write Control to perform read operation, mask int */ |
1052 | writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT, | 1052 | writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT, |
1053 | mmio + PDC_I2C_CONTROL_OFFSET); | 1053 | mmio + PDC_I2C_CONTROL_OFFSET); |
1054 | 1054 | ||
1055 | for (count = 0; count <= 1000; count ++) { | 1055 | for (count = 0; count <= 1000; count ++) { |
@@ -1062,26 +1062,26 @@ static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, | |||
1062 | } | 1062 | } |
1063 | 1063 | ||
1064 | *pdata = (status >> 8) & 0x000000ff; | 1064 | *pdata = (status >> 8) & 0x000000ff; |
1065 | return 1; | 1065 | return 1; |
1066 | } | 1066 | } |
1067 | 1067 | ||
1068 | 1068 | ||
1069 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe) | 1069 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe) |
1070 | { | 1070 | { |
1071 | u32 data=0 ; | 1071 | u32 data=0 ; |
1072 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1072 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
1073 | PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { | 1073 | PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { |
1074 | if (data == 100) | 1074 | if (data == 100) |
1075 | return 100; | 1075 | return 100; |
1076 | } else | 1076 | } else |
1077 | return 0; | 1077 | return 0; |
1078 | 1078 | ||
1079 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { | 1079 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { |
1080 | if(data <= 0x75) | 1080 | if(data <= 0x75) |
1081 | return 133; | 1081 | return 133; |
1082 | } else | 1082 | } else |
1083 | return 0; | 1083 | return 0; |
1084 | 1084 | ||
1085 | return 0; | 1085 | return 0; |
1086 | } | 1086 | } |
1087 | 1087 | ||
@@ -1091,15 +1091,15 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1091 | u32 spd0[50]; | 1091 | u32 spd0[50]; |
1092 | u32 data = 0; | 1092 | u32 data = 0; |
1093 | int size, i; | 1093 | int size, i; |
1094 | u8 bdimmsize; | 1094 | u8 bdimmsize; |
1095 | void *mmio = pe->mmio_base; | 1095 | void *mmio = pe->mmio_base; |
1096 | static const struct { | 1096 | static const struct { |
1097 | unsigned int reg; | 1097 | unsigned int reg; |
1098 | unsigned int ofs; | 1098 | unsigned int ofs; |
1099 | } pdc_i2c_read_data [] = { | 1099 | } pdc_i2c_read_data [] = { |
1100 | { PDC_DIMM_SPD_TYPE, 11 }, | 1100 | { PDC_DIMM_SPD_TYPE, 11 }, |
1101 | { PDC_DIMM_SPD_FRESH_RATE, 12 }, | 1101 | { PDC_DIMM_SPD_FRESH_RATE, 12 }, |
1102 | { PDC_DIMM_SPD_COLUMN_NUM, 4 }, | 1102 | { PDC_DIMM_SPD_COLUMN_NUM, 4 }, |
1103 | { PDC_DIMM_SPD_ATTRIBUTE, 21 }, | 1103 | { PDC_DIMM_SPD_ATTRIBUTE, 21 }, |
1104 | { PDC_DIMM_SPD_ROW_NUM, 3 }, | 1104 | { PDC_DIMM_SPD_ROW_NUM, 3 }, |
1105 | { PDC_DIMM_SPD_BANK_NUM, 17 }, | 1105 | { PDC_DIMM_SPD_BANK_NUM, 17 }, |
@@ -1108,7 +1108,7 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1108 | { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 }, | 1108 | { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 }, |
1109 | { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 }, | 1109 | { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 }, |
1110 | { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 }, | 1110 | { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 }, |
1111 | { PDC_DIMM_SPD_CAS_LATENCY, 18 }, | 1111 | { PDC_DIMM_SPD_CAS_LATENCY, 18 }, |
1112 | }; | 1112 | }; |
1113 | 1113 | ||
1114 | /* hard-code chip #0 */ | 1114 | /* hard-code chip #0 */ |
@@ -1116,17 +1116,17 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1116 | 1116 | ||
1117 | for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++) | 1117 | for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++) |
1118 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1118 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
1119 | pdc_i2c_read_data[i].reg, | 1119 | pdc_i2c_read_data[i].reg, |
1120 | &spd0[pdc_i2c_read_data[i].ofs]); | 1120 | &spd0[pdc_i2c_read_data[i].ofs]); |
1121 | 1121 | ||
1122 | data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); | 1122 | data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); |
1123 | data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | | 1123 | data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | |
1124 | ((((spd0[27] + 9) / 10) - 1) << 8) ; | 1124 | ((((spd0[27] + 9) / 10) - 1) << 8) ; |
1125 | data |= (((((spd0[29] > spd0[28]) | 1125 | data |= (((((spd0[29] > spd0[28]) |
1126 | ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; | 1126 | ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; |
1127 | data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; | 1127 | data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; |
1128 | 1128 | ||
1129 | if (spd0[18] & 0x08) | 1129 | if (spd0[18] & 0x08) |
1130 | data |= ((0x03) << 14); | 1130 | data |= ((0x03) << 14); |
1131 | else if (spd0[18] & 0x04) | 1131 | else if (spd0[18] & 0x04) |
1132 | data |= ((0x02) << 14); | 1132 | data |= ((0x02) << 14); |
@@ -1135,7 +1135,7 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1135 | else | 1135 | else |
1136 | data |= (0 << 14); | 1136 | data |= (0 << 14); |
1137 | 1137 | ||
1138 | /* | 1138 | /* |
1139 | Calculate the size of bDIMMSize (power of 2) and | 1139 | Calculate the size of bDIMMSize (power of 2) and |
1140 | merge the DIMM size by program start/end address. | 1140 | merge the DIMM size by program start/end address. |
1141 | */ | 1141 | */ |
@@ -1145,9 +1145,9 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1145 | data |= (((size / 16) - 1) << 16); | 1145 | data |= (((size / 16) - 1) << 16); |
1146 | data |= (0 << 23); | 1146 | data |= (0 << 23); |
1147 | data |= 8; | 1147 | data |= 8; |
1148 | writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET); | 1148 | writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET); |
1149 | readl(mmio + PDC_DIMM0_CONTROL_OFFSET); | 1149 | readl(mmio + PDC_DIMM0_CONTROL_OFFSET); |
1150 | return size; | 1150 | return size; |
1151 | } | 1151 | } |
1152 | 1152 | ||
1153 | 1153 | ||
@@ -1167,12 +1167,12 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe) | |||
1167 | Refresh Enable (bit 17) | 1167 | Refresh Enable (bit 17) |
1168 | */ | 1168 | */ |
1169 | 1169 | ||
1170 | data = 0x022259F1; | 1170 | data = 0x022259F1; |
1171 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); | 1171 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); |
1172 | readl(mmio + PDC_SDRAM_CONTROL_OFFSET); | 1172 | readl(mmio + PDC_SDRAM_CONTROL_OFFSET); |
1173 | 1173 | ||
1174 | /* Turn on for ECC */ | 1174 | /* Turn on for ECC */ |
1175 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1175 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
1176 | PDC_DIMM_SPD_TYPE, &spd0); | 1176 | PDC_DIMM_SPD_TYPE, &spd0); |
1177 | if (spd0 == 0x02) { | 1177 | if (spd0 == 0x02) { |
1178 | data |= (0x01 << 16); | 1178 | data |= (0x01 << 16); |
@@ -1186,22 +1186,22 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe) | |||
1186 | data |= (1<<19); | 1186 | data |= (1<<19); |
1187 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); | 1187 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); |
1188 | 1188 | ||
1189 | error = 1; | 1189 | error = 1; |
1190 | for (i = 1; i <= 10; i++) { /* polling ~5 secs */ | 1190 | for (i = 1; i <= 10; i++) { /* polling ~5 secs */ |
1191 | data = readl(mmio + PDC_SDRAM_CONTROL_OFFSET); | 1191 | data = readl(mmio + PDC_SDRAM_CONTROL_OFFSET); |
1192 | if (!(data & (1<<19))) { | 1192 | if (!(data & (1<<19))) { |
1193 | error = 0; | 1193 | error = 0; |
1194 | break; | 1194 | break; |
1195 | } | 1195 | } |
1196 | msleep(i*100); | 1196 | msleep(i*100); |
1197 | } | 1197 | } |
1198 | return error; | 1198 | return error; |
1199 | } | 1199 | } |
1200 | 1200 | ||
1201 | 1201 | ||
1202 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | 1202 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) |
1203 | { | 1203 | { |
1204 | int speed, size, length; | 1204 | int speed, size, length; |
1205 | u32 addr,spd0,pci_status; | 1205 | u32 addr,spd0,pci_status; |
1206 | u32 tmp=0; | 1206 | u32 tmp=0; |
1207 | u32 time_period=0; | 1207 | u32 time_period=0; |
@@ -1228,7 +1228,7 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
1228 | /* Wait 3 seconds */ | 1228 | /* Wait 3 seconds */ |
1229 | msleep(3000); | 1229 | msleep(3000); |
1230 | 1230 | ||
1231 | /* | 1231 | /* |
1232 | When timer is enabled, counter is decreased every internal | 1232 | When timer is enabled, counter is decreased every internal |
1233 | clock cycle. | 1233 | clock cycle. |
1234 | */ | 1234 | */ |
@@ -1236,24 +1236,24 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
1236 | tcount = readl(mmio + PDC_TIME_COUNTER); | 1236 | tcount = readl(mmio + PDC_TIME_COUNTER); |
1237 | VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount); | 1237 | VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount); |
1238 | 1238 | ||
1239 | /* | 1239 | /* |
1240 | If SX4 is on PCI-X bus, after 3 seconds, the timer counter | 1240 | If SX4 is on PCI-X bus, after 3 seconds, the timer counter |
1241 | register should be >= (0xffffffff - 3x10^8). | 1241 | register should be >= (0xffffffff - 3x10^8). |
1242 | */ | 1242 | */ |
1243 | if(tcount >= PCI_X_TCOUNT) { | 1243 | if(tcount >= PCI_X_TCOUNT) { |
1244 | ticks = (time_period - tcount); | 1244 | ticks = (time_period - tcount); |
1245 | VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks); | 1245 | VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks); |
1246 | 1246 | ||
1247 | clock = (ticks / 300000); | 1247 | clock = (ticks / 300000); |
1248 | VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); | 1248 | VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); |
1249 | 1249 | ||
1250 | clock = (clock * 33); | 1250 | clock = (clock * 33); |
1251 | VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); | 1251 | VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); |
1252 | 1252 | ||
1253 | /* PLL F Param (bit 22:16) */ | 1253 | /* PLL F Param (bit 22:16) */ |
1254 | fparam = (1400000 / clock) - 2; | 1254 | fparam = (1400000 / clock) - 2; |
1255 | VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam); | 1255 | VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam); |
1256 | 1256 | ||
1257 | /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */ | 1257 | /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */ |
1258 | pci_status = (0x8a001824 | (fparam << 16)); | 1258 | pci_status = (0x8a001824 | (fparam << 16)); |
1259 | } else | 1259 | } else |
@@ -1264,21 +1264,21 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
1264 | writel(pci_status, mmio + PDC_CTL_STATUS); | 1264 | writel(pci_status, mmio + PDC_CTL_STATUS); |
1265 | readl(mmio + PDC_CTL_STATUS); | 1265 | readl(mmio + PDC_CTL_STATUS); |
1266 | 1266 | ||
1267 | /* | 1267 | /* |
1268 | Read SPD of DIMM by I2C interface, | 1268 | Read SPD of DIMM by I2C interface, |
1269 | and program the DIMM Module Controller. | 1269 | and program the DIMM Module Controller. |
1270 | */ | 1270 | */ |
1271 | if (!(speed = pdc20621_detect_dimm(pe))) { | 1271 | if (!(speed = pdc20621_detect_dimm(pe))) { |
1272 | printk(KERN_ERR "Detect Local DIMM Fail\n"); | 1272 | printk(KERN_ERR "Detect Local DIMM Fail\n"); |
1273 | return 1; /* DIMM error */ | 1273 | return 1; /* DIMM error */ |
1274 | } | 1274 | } |
1275 | VPRINTK("Local DIMM Speed = %d\n", speed); | 1275 | VPRINTK("Local DIMM Speed = %d\n", speed); |
1276 | 1276 | ||
1277 | /* Programming DIMM0 Module Control Register (index_CID0:80h) */ | 1277 | /* Programming DIMM0 Module Control Register (index_CID0:80h) */ |
1278 | size = pdc20621_prog_dimm0(pe); | 1278 | size = pdc20621_prog_dimm0(pe); |
1279 | VPRINTK("Local DIMM Size = %dMB\n",size); | 1279 | VPRINTK("Local DIMM Size = %dMB\n",size); |
1280 | 1280 | ||
1281 | /* Programming DIMM Module Global Control Register (index_CID0:88h) */ | 1281 | /* Programming DIMM Module Global Control Register (index_CID0:88h) */ |
1282 | if (pdc20621_prog_dimm_global(pe)) { | 1282 | if (pdc20621_prog_dimm_global(pe)) { |
1283 | printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); | 1283 | printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); |
1284 | return 1; | 1284 | return 1; |
@@ -1297,30 +1297,30 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
1297 | 1297 | ||
1298 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40); | 1298 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40); |
1299 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); | 1299 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); |
1300 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1300 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
1301 | test_parttern2[1], &(test_parttern2[2])); | 1301 | test_parttern2[1], &(test_parttern2[2])); |
1302 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040, | 1302 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040, |
1303 | 40); | 1303 | 40); |
1304 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1304 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
1305 | test_parttern2[1], &(test_parttern2[2])); | 1305 | test_parttern2[1], &(test_parttern2[2])); |
1306 | 1306 | ||
1307 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40); | 1307 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40); |
1308 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); | 1308 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); |
1309 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1309 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
1310 | test_parttern2[1], &(test_parttern2[2])); | 1310 | test_parttern2[1], &(test_parttern2[2])); |
1311 | } | 1311 | } |
1312 | #endif | 1312 | #endif |
1313 | 1313 | ||
1314 | /* ECC initiliazation. */ | 1314 | /* ECC initiliazation. */ |
1315 | 1315 | ||
1316 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1316 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
1317 | PDC_DIMM_SPD_TYPE, &spd0); | 1317 | PDC_DIMM_SPD_TYPE, &spd0); |
1318 | if (spd0 == 0x02) { | 1318 | if (spd0 == 0x02) { |
1319 | VPRINTK("Start ECC initialization\n"); | 1319 | VPRINTK("Start ECC initialization\n"); |
1320 | addr = 0; | 1320 | addr = 0; |
1321 | length = size * 1024 * 1024; | 1321 | length = size * 1024 * 1024; |
1322 | while (addr < length) { | 1322 | while (addr < length) { |
1323 | pdc20621_put_to_dimm(pe, (void *) &tmp, addr, | 1323 | pdc20621_put_to_dimm(pe, (void *) &tmp, addr, |
1324 | sizeof(u32)); | 1324 | sizeof(u32)); |
1325 | addr += sizeof(u32); | 1325 | addr += sizeof(u32); |
1326 | } | 1326 | } |