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-rw-r--r--drivers/scsi/qla4xxx/ql4_dbg.c174
-rw-r--r--drivers/scsi/qla4xxx/ql4_def.h78
-rw-r--r--drivers/scsi/qla4xxx/ql4_fw.h426
-rw-r--r--drivers/scsi/qla4xxx/ql4_glbl.h7
-rw-r--r--drivers/scsi/qla4xxx/ql4_init.c105
-rw-r--r--drivers/scsi/qla4xxx/ql4_iocb.c101
-rw-r--r--drivers/scsi/qla4xxx/ql4_isr.c114
-rw-r--r--drivers/scsi/qla4xxx/ql4_mbx.c274
-rw-r--r--drivers/scsi/qla4xxx/ql4_nvram.c3
-rw-r--r--drivers/scsi/qla4xxx/ql4_os.c96
-rw-r--r--drivers/scsi/qla4xxx/ql4_version.h3
11 files changed, 576 insertions, 805 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_dbg.c b/drivers/scsi/qla4xxx/ql4_dbg.c
index 6437d024b0dd..fcc184cd066d 100644
--- a/drivers/scsi/qla4xxx/ql4_dbg.c
+++ b/drivers/scsi/qla4xxx/ql4_dbg.c
@@ -6,176 +6,9 @@
6 */ 6 */
7 7
8#include "ql4_def.h" 8#include "ql4_def.h"
9#include <scsi/scsi_dbg.h> 9#include "ql4_glbl.h"
10 10#include "ql4_dbg.h"
11#if 0 11#include "ql4_inline.h"
12
13static void qla4xxx_print_srb_info(struct srb * srb)
14{
15 printk("%s: srb = 0x%p, flags=0x%02x\n", __func__, srb, srb->flags);
16 printk("%s: cmd = 0x%p, saved_dma_handle = 0x%lx\n",
17 __func__, srb->cmd, (unsigned long) srb->dma_handle);
18 printk("%s: fw_ddb_index = %d, lun = %d\n",
19 __func__, srb->fw_ddb_index, srb->cmd->device->lun);
20 printk("%s: iocb_tov = %d\n",
21 __func__, srb->iocb_tov);
22 printk("%s: cc_stat = 0x%x, r_start = 0x%lx, u_start = 0x%lx\n\n",
23 __func__, srb->cc_stat, srb->r_start, srb->u_start);
24}
25
26void qla4xxx_print_scsi_cmd(struct scsi_cmnd *cmd)
27{
28 printk("SCSI Command = 0x%p, Handle=0x%p\n", cmd, cmd->host_scribble);
29 printk(" b=%d, t=%02xh, l=%02xh, cmd_len = %02xh\n",
30 cmd->device->channel, cmd->device->id, cmd->device->lun,
31 cmd->cmd_len);
32 scsi_print_command(cmd);
33 printk(" seg_cnt = %d\n", cmd->use_sg);
34 printk(" request buffer = 0x%p, request buffer len = 0x%x\n",
35 cmd->request_buffer, cmd->request_bufflen);
36 if (cmd->use_sg) {
37 struct scatterlist *sg;
38 sg = (struct scatterlist *)cmd->request_buffer;
39 printk(" SG buffer: \n");
40 qla4xxx_dump_buffer((caddr_t) sg,
41 (cmd->use_sg * sizeof(*sg)));
42 }
43 printk(" tag = %d, transfersize = 0x%x \n", cmd->tag,
44 cmd->transfersize);
45 printk(" Pid = %d, SP = 0x%p\n", (int)cmd->pid, cmd->SCp.ptr);
46 printk(" underflow size = 0x%x, direction=0x%x\n", cmd->underflow,
47 cmd->sc_data_direction);
48 printk(" Current time (jiffies) = 0x%lx, "
49 "timeout expires = 0x%lx\n", jiffies, cmd->eh_timeout.expires);
50 qla4xxx_print_srb_info((struct srb *) cmd->SCp.ptr);
51}
52
53void __dump_registers(struct scsi_qla_host *ha)
54{
55 uint8_t i;
56 for (i = 0; i < MBOX_REG_COUNT; i++) {
57 printk(KERN_INFO "0x%02X mailbox[%d] = 0x%08X\n",
58 (uint8_t) offsetof(struct isp_reg, mailbox[i]), i,
59 readw(&ha->reg->mailbox[i]));
60 }
61 printk(KERN_INFO "0x%02X flash_address = 0x%08X\n",
62 (uint8_t) offsetof(struct isp_reg, flash_address),
63 readw(&ha->reg->flash_address));
64 printk(KERN_INFO "0x%02X flash_data = 0x%08X\n",
65 (uint8_t) offsetof(struct isp_reg, flash_data),
66 readw(&ha->reg->flash_data));
67 printk(KERN_INFO "0x%02X ctrl_status = 0x%08X\n",
68 (uint8_t) offsetof(struct isp_reg, ctrl_status),
69 readw(&ha->reg->ctrl_status));
70 if (is_qla4010(ha)) {
71 printk(KERN_INFO "0x%02X nvram = 0x%08X\n",
72 (uint8_t) offsetof(struct isp_reg, u1.isp4010.nvram),
73 readw(&ha->reg->u1.isp4010.nvram));
74 }
75
76 else if (is_qla4022(ha) | is_qla4032(ha)) {
77 printk(KERN_INFO "0x%02X intr_mask = 0x%08X\n",
78 (uint8_t) offsetof(struct isp_reg,
79 u1.isp4022.intr_mask),
80 readw(&ha->reg->u1.isp4022.intr_mask));
81 printk(KERN_INFO "0x%02X nvram = 0x%08X\n",
82 (uint8_t) offsetof(struct isp_reg, u1.isp4022.nvram),
83 readw(&ha->reg->u1.isp4022.nvram));
84 printk(KERN_INFO "0x%02X semaphore = 0x%08X\n",
85 (uint8_t) offsetof(struct isp_reg,
86 u1.isp4022.semaphore),
87 readw(&ha->reg->u1.isp4022.semaphore));
88 }
89 printk(KERN_INFO "0x%02X req_q_in = 0x%08X\n",
90 (uint8_t) offsetof(struct isp_reg, req_q_in),
91 readw(&ha->reg->req_q_in));
92 printk(KERN_INFO "0x%02X rsp_q_out = 0x%08X\n",
93 (uint8_t) offsetof(struct isp_reg, rsp_q_out),
94 readw(&ha->reg->rsp_q_out));
95 if (is_qla4010(ha)) {
96 printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n",
97 (uint8_t) offsetof(struct isp_reg,
98 u2.isp4010.ext_hw_conf),
99 readw(&ha->reg->u2.isp4010.ext_hw_conf));
100 printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n",
101 (uint8_t) offsetof(struct isp_reg,
102 u2.isp4010.port_ctrl),
103 readw(&ha->reg->u2.isp4010.port_ctrl));
104 printk(KERN_INFO "0x%02X port_status = 0x%08X\n",
105 (uint8_t) offsetof(struct isp_reg,
106 u2.isp4010.port_status),
107 readw(&ha->reg->u2.isp4010.port_status));
108 printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n",
109 (uint8_t) offsetof(struct isp_reg,
110 u2.isp4010.req_q_out),
111 readw(&ha->reg->u2.isp4010.req_q_out));
112 printk(KERN_INFO "0x%02X gp_out = 0x%08X\n",
113 (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_out),
114 readw(&ha->reg->u2.isp4010.gp_out));
115 printk(KERN_INFO "0x%02X gp_in = 0x%08X\n",
116 (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_in),
117 readw(&ha->reg->u2.isp4010.gp_in));
118 printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n",
119 (uint8_t) offsetof(struct isp_reg,
120 u2.isp4010.port_err_status),
121 readw(&ha->reg->u2.isp4010.port_err_status));
122 }
123
124 else if (is_qla4022(ha) | is_qla4032(ha)) {
125 printk(KERN_INFO "Page 0 Registers:\n");
126 printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n",
127 (uint8_t) offsetof(struct isp_reg,
128 u2.isp4022.p0.ext_hw_conf),
129 readw(&ha->reg->u2.isp4022.p0.ext_hw_conf));
130 printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n",
131 (uint8_t) offsetof(struct isp_reg,
132 u2.isp4022.p0.port_ctrl),
133 readw(&ha->reg->u2.isp4022.p0.port_ctrl));
134 printk(KERN_INFO "0x%02X port_status = 0x%08X\n",
135 (uint8_t) offsetof(struct isp_reg,
136 u2.isp4022.p0.port_status),
137 readw(&ha->reg->u2.isp4022.p0.port_status));
138 printk(KERN_INFO "0x%02X gp_out = 0x%08X\n",
139 (uint8_t) offsetof(struct isp_reg,
140 u2.isp4022.p0.gp_out),
141 readw(&ha->reg->u2.isp4022.p0.gp_out));
142 printk(KERN_INFO "0x%02X gp_in = 0x%08X\n",
143 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in),
144 readw(&ha->reg->u2.isp4022.p0.gp_in));
145 printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n",
146 (uint8_t) offsetof(struct isp_reg,
147 u2.isp4022.p0.port_err_status),
148 readw(&ha->reg->u2.isp4022.p0.port_err_status));
149 printk(KERN_INFO "Page 1 Registers:\n");
150 writel(HOST_MEM_CFG_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
151 &ha->reg->ctrl_status);
152 printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n",
153 (uint8_t) offsetof(struct isp_reg,
154 u2.isp4022.p1.req_q_out),
155 readw(&ha->reg->u2.isp4022.p1.req_q_out));
156 writel(PORT_CTRL_STAT_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
157 &ha->reg->ctrl_status);
158 }
159}
160
161void qla4xxx_dump_mbox_registers(struct scsi_qla_host *ha)
162{
163 unsigned long flags = 0;
164 int i = 0;
165 spin_lock_irqsave(&ha->hardware_lock, flags);
166 for (i = 1; i < MBOX_REG_COUNT; i++)
167 printk(KERN_INFO " Mailbox[%d] = %08x\n", i,
168 readw(&ha->reg->mailbox[i]));
169 spin_unlock_irqrestore(&ha->hardware_lock, flags);
170}
171
172void qla4xxx_dump_registers(struct scsi_qla_host *ha)
173{
174 unsigned long flags = 0;
175 spin_lock_irqsave(&ha->hardware_lock, flags);
176 __dump_registers(ha);
177 spin_unlock_irqrestore(&ha->hardware_lock, flags);
178}
179 12
180void qla4xxx_dump_buffer(void *b, uint32_t size) 13void qla4xxx_dump_buffer(void *b, uint32_t size)
181{ 14{
@@ -198,4 +31,3 @@ void qla4xxx_dump_buffer(void *b, uint32_t size)
198 printk(KERN_DEBUG "\n"); 31 printk(KERN_DEBUG "\n");
199} 32}
200 33
201#endif /* 0 */
diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h
index 6f4cf2dd2f4a..accaf690eaf0 100644
--- a/drivers/scsi/qla4xxx/ql4_def.h
+++ b/drivers/scsi/qla4xxx/ql4_def.h
@@ -122,8 +122,7 @@
122 122
123#define ISCSI_IPADDR_SIZE 4 /* IP address size */ 123#define ISCSI_IPADDR_SIZE 4 /* IP address size */
124#define ISCSI_ALIAS_SIZE 32 /* ISCSI Alais name size */ 124#define ISCSI_ALIAS_SIZE 32 /* ISCSI Alais name size */
125#define ISCSI_NAME_SIZE 255 /* ISCSI Name size - 125#define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */
126 * usually a string */
127 126
128#define LSDW(x) ((u32)((u64)(x))) 127#define LSDW(x) ((u32)((u64)(x)))
129#define MSDW(x) ((u32)((((u64)(x)) >> 16) >> 16)) 128#define MSDW(x) ((u32)((((u64)(x)) >> 16) >> 16))
@@ -187,9 +186,21 @@ struct srb {
187 u_long u_start; /* Time when we handed the cmd to F/W */ 186 u_long u_start; /* Time when we handed the cmd to F/W */
188}; 187};
189 188
190 /* 189/*
191 * Device Database (DDB) structure 190 * Asynchronous Event Queue structure
192 */ 191 */
192struct aen {
193 uint32_t mbox_sts[MBOX_AEN_REG_COUNT];
194};
195
196struct ql4_aen_log {
197 int count;
198 struct aen entry[MAX_AEN_ENTRIES];
199};
200
201/*
202 * Device Database (DDB) structure
203 */
193struct ddb_entry { 204struct ddb_entry {
194 struct list_head list; /* ddb list */ 205 struct list_head list; /* ddb list */
195 struct scsi_qla_host *ha; 206 struct scsi_qla_host *ha;
@@ -254,13 +265,6 @@ struct ddb_entry {
254#define DF_ISNS_DISCOVERED 2 /* Device was discovered via iSNS */ 265#define DF_ISNS_DISCOVERED 2 /* Device was discovered via iSNS */
255#define DF_FO_MASKED 3 266#define DF_FO_MASKED 3
256 267
257/*
258 * Asynchronous Event Queue structure
259 */
260struct aen {
261 uint32_t mbox_sts[MBOX_AEN_REG_COUNT];
262};
263
264 268
265#include "ql4_fw.h" 269#include "ql4_fw.h"
266#include "ql4_nvram.h" 270#include "ql4_nvram.h"
@@ -270,31 +274,31 @@ struct aen {
270 */ 274 */
271struct scsi_qla_host { 275struct scsi_qla_host {
272 /* Linux adapter configuration data */ 276 /* Linux adapter configuration data */
273 struct Scsi_Host *host; /* pointer to host data */
274 uint32_t tot_ddbs;
275 unsigned long flags; 277 unsigned long flags;
276 278
277#define AF_ONLINE 0 /* 0x00000001 */ 279#define AF_ONLINE 0 /* 0x00000001 */
278#define AF_INIT_DONE 1 /* 0x00000002 */ 280#define AF_INIT_DONE 1 /* 0x00000002 */
279#define AF_MBOX_COMMAND 2 /* 0x00000004 */ 281#define AF_MBOX_COMMAND 2 /* 0x00000004 */
280#define AF_MBOX_COMMAND_DONE 3 /* 0x00000008 */ 282#define AF_MBOX_COMMAND_DONE 3 /* 0x00000008 */
281#define AF_INTERRUPTS_ON 6 /* 0x00000040 Not Used */ 283#define AF_INTERRUPTS_ON 6 /* 0x00000040 */
282#define AF_GET_CRASH_RECORD 7 /* 0x00000080 */ 284#define AF_GET_CRASH_RECORD 7 /* 0x00000080 */
283#define AF_LINK_UP 8 /* 0x00000100 */ 285#define AF_LINK_UP 8 /* 0x00000100 */
284#define AF_IRQ_ATTACHED 10 /* 0x00000400 */ 286#define AF_IRQ_ATTACHED 10 /* 0x00000400 */
285#define AF_ISNS_CMD_IN_PROCESS 12 /* 0x00001000 */ 287#define AF_DISABLE_ACB_COMPLETE 11 /* 0x00000800 */
286#define AF_ISNS_CMD_DONE 13 /* 0x00002000 */
287 288
288 unsigned long dpc_flags; 289 unsigned long dpc_flags;
289 290
290#define DPC_RESET_HA 1 /* 0x00000002 */ 291#define DPC_RESET_HA 1 /* 0x00000002 */
291#define DPC_RETRY_RESET_HA 2 /* 0x00000004 */ 292#define DPC_RETRY_RESET_HA 2 /* 0x00000004 */
292#define DPC_RELOGIN_DEVICE 3 /* 0x00000008 */ 293#define DPC_RELOGIN_DEVICE 3 /* 0x00000008 */
293#define DPC_RESET_HA_DESTROY_DDB_LIST 4 /* 0x00000010 */ 294#define DPC_RESET_HA_DESTROY_DDB_LIST 4 /* 0x00000010 */
294#define DPC_RESET_HA_INTR 5 /* 0x00000020 */ 295#define DPC_RESET_HA_INTR 5 /* 0x00000020 */
295#define DPC_ISNS_RESTART 7 /* 0x00000080 */ 296#define DPC_ISNS_RESTART 7 /* 0x00000080 */
296#define DPC_AEN 9 /* 0x00000200 */ 297#define DPC_AEN 9 /* 0x00000200 */
297#define DPC_GET_DHCP_IP_ADDR 15 /* 0x00008000 */ 298#define DPC_GET_DHCP_IP_ADDR 15 /* 0x00008000 */
299
300 struct Scsi_Host *host; /* pointer to host data */
301 uint32_t tot_ddbs;
298 302
299 uint16_t iocb_cnt; 303 uint16_t iocb_cnt;
300 uint16_t iocb_hiwat; 304 uint16_t iocb_hiwat;
@@ -344,6 +348,7 @@ struct scsi_qla_host {
344 uint32_t firmware_version[2]; 348 uint32_t firmware_version[2];
345 uint32_t patch_number; 349 uint32_t patch_number;
346 uint32_t build_number; 350 uint32_t build_number;
351 uint32_t board_id;
347 352
348 /* --- From Init_FW --- */ 353 /* --- From Init_FW --- */
349 /* init_cb_t *init_cb; */ 354 /* init_cb_t *init_cb; */
@@ -363,7 +368,6 @@ struct scsi_qla_host {
363 368
364 /* --- From GetFwState --- */ 369 /* --- From GetFwState --- */
365 uint32_t firmware_state; 370 uint32_t firmware_state;
366 uint32_t board_id;
367 uint32_t addl_fw_state; 371 uint32_t addl_fw_state;
368 372
369 /* Linux kernel thread */ 373 /* Linux kernel thread */
@@ -414,6 +418,8 @@ struct scsi_qla_host {
414 uint16_t aen_out; 418 uint16_t aen_out;
415 struct aen aen_q[MAX_AEN_ENTRIES]; 419 struct aen aen_q[MAX_AEN_ENTRIES];
416 420
421 struct ql4_aen_log aen_log;/* tracks all aens */
422
417 /* This mutex protects several threads to do mailbox commands 423 /* This mutex protects several threads to do mailbox commands
418 * concurrently. 424 * concurrently.
419 */ 425 */
@@ -585,10 +591,4 @@ static inline void ql4xxx_unlock_drvr(struct scsi_qla_host *a)
585#define FLUSH_DDB_CHANGED_AENS 1 591#define FLUSH_DDB_CHANGED_AENS 1
586#define RELOGIN_DDB_CHANGED_AENS 2 592#define RELOGIN_DDB_CHANGED_AENS 2
587 593
588#include "ql4_version.h"
589#include "ql4_glbl.h"
590#include "ql4_dbg.h"
591#include "ql4_inline.h"
592
593
594#endif /*_QLA4XXX_H */ 594#endif /*_QLA4XXX_H */
diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h
index 4eea8c571916..9bb3d1d2a925 100644
--- a/drivers/scsi/qla4xxx/ql4_fw.h
+++ b/drivers/scsi/qla4xxx/ql4_fw.h
@@ -20,143 +20,23 @@
20 *************************************************************************/ 20 *************************************************************************/
21 21
22struct port_ctrl_stat_regs { 22struct port_ctrl_stat_regs {
23 __le32 ext_hw_conf; /* 80 x50 R/W */ 23 __le32 ext_hw_conf; /* 0x50 R/W */
24 __le32 intChipConfiguration; /* 84 x54 */ 24 __le32 rsrvd0; /* 0x54 */
25 __le32 port_ctrl; /* 88 x58 */ 25 __le32 port_ctrl; /* 0x58 */
26 __le32 port_status; /* 92 x5c */ 26 __le32 port_status; /* 0x5c */
27 __le32 HostPrimMACHi; /* 96 x60 */ 27 __le32 rsrvd1[32]; /* 0x60-0xdf */
28 __le32 HostPrimMACLow; /* 100 x64 */ 28 __le32 gp_out; /* 0xe0 */
29 __le32 HostSecMACHi; /* 104 x68 */ 29 __le32 gp_in; /* 0xe4 */
30 __le32 HostSecMACLow; /* 108 x6c */ 30 __le32 rsrvd2[5]; /* 0xe8-0xfb */
31 __le32 EPPrimMACHi; /* 112 x70 */ 31 __le32 port_err_status; /* 0xfc */
32 __le32 EPPrimMACLow; /* 116 x74 */
33 __le32 EPSecMACHi; /* 120 x78 */
34 __le32 EPSecMACLow; /* 124 x7c */
35 __le32 HostPrimIPHi; /* 128 x80 */
36 __le32 HostPrimIPMidHi; /* 132 x84 */
37 __le32 HostPrimIPMidLow; /* 136 x88 */
38 __le32 HostPrimIPLow; /* 140 x8c */
39 __le32 HostSecIPHi; /* 144 x90 */
40 __le32 HostSecIPMidHi; /* 148 x94 */
41 __le32 HostSecIPMidLow; /* 152 x98 */
42 __le32 HostSecIPLow; /* 156 x9c */
43 __le32 EPPrimIPHi; /* 160 xa0 */
44 __le32 EPPrimIPMidHi; /* 164 xa4 */
45 __le32 EPPrimIPMidLow; /* 168 xa8 */
46 __le32 EPPrimIPLow; /* 172 xac */
47 __le32 EPSecIPHi; /* 176 xb0 */
48 __le32 EPSecIPMidHi; /* 180 xb4 */
49 __le32 EPSecIPMidLow; /* 184 xb8 */
50 __le32 EPSecIPLow; /* 188 xbc */
51 __le32 IPReassemblyTimeout; /* 192 xc0 */
52 __le32 EthMaxFramePayload; /* 196 xc4 */
53 __le32 TCPMaxWindowSize; /* 200 xc8 */
54 __le32 TCPCurrentTimestampHi; /* 204 xcc */
55 __le32 TCPCurrentTimestampLow; /* 208 xd0 */
56 __le32 LocalRAMAddress; /* 212 xd4 */
57 __le32 LocalRAMData; /* 216 xd8 */
58 __le32 PCSReserved1; /* 220 xdc */
59 __le32 gp_out; /* 224 xe0 */
60 __le32 gp_in; /* 228 xe4 */
61 __le32 ProbeMuxAddr; /* 232 xe8 */
62 __le32 ProbeMuxData; /* 236 xec */
63 __le32 ERMQueueBaseAddr0; /* 240 xf0 */
64 __le32 ERMQueueBaseAddr1; /* 244 xf4 */
65 __le32 MACConfiguration; /* 248 xf8 */
66 __le32 port_err_status; /* 252 xfc COR */
67}; 32};
68 33
69struct host_mem_cfg_regs { 34struct host_mem_cfg_regs {
70 __le32 NetRequestQueueOut; /* 80 x50 */ 35 __le32 rsrvd0[12]; /* 0x50-0x79 */
71 __le32 NetRequestQueueOutAddrHi; /* 84 x54 */ 36 __le32 req_q_out; /* 0x80 */
72 __le32 NetRequestQueueOutAddrLow; /* 88 x58 */ 37 __le32 rsrvd1[31]; /* 0x84-0xFF */
73 __le32 NetRequestQueueBaseAddrHi; /* 92 x5c */
74 __le32 NetRequestQueueBaseAddrLow; /* 96 x60 */
75 __le32 NetRequestQueueLength; /* 100 x64 */
76 __le32 NetResponseQueueIn; /* 104 x68 */
77 __le32 NetResponseQueueInAddrHi; /* 108 x6c */
78 __le32 NetResponseQueueInAddrLow; /* 112 x70 */
79 __le32 NetResponseQueueBaseAddrHi; /* 116 x74 */
80 __le32 NetResponseQueueBaseAddrLow; /* 120 x78 */
81 __le32 NetResponseQueueLength; /* 124 x7c */
82 __le32 req_q_out; /* 128 x80 */
83 __le32 RequestQueueOutAddrHi; /* 132 x84 */
84 __le32 RequestQueueOutAddrLow; /* 136 x88 */
85 __le32 RequestQueueBaseAddrHi; /* 140 x8c */
86 __le32 RequestQueueBaseAddrLow; /* 144 x90 */
87 __le32 RequestQueueLength; /* 148 x94 */
88 __le32 ResponseQueueIn; /* 152 x98 */
89 __le32 ResponseQueueInAddrHi; /* 156 x9c */
90 __le32 ResponseQueueInAddrLow; /* 160 xa0 */
91 __le32 ResponseQueueBaseAddrHi; /* 164 xa4 */
92 __le32 ResponseQueueBaseAddrLow; /* 168 xa8 */
93 __le32 ResponseQueueLength; /* 172 xac */
94 __le32 NetRxLargeBufferQueueOut; /* 176 xb0 */
95 __le32 NetRxLargeBufferQueueBaseAddrHi; /* 180 xb4 */
96 __le32 NetRxLargeBufferQueueBaseAddrLow; /* 184 xb8 */
97 __le32 NetRxLargeBufferQueueLength; /* 188 xbc */
98 __le32 NetRxLargeBufferLength; /* 192 xc0 */
99 __le32 NetRxSmallBufferQueueOut; /* 196 xc4 */
100 __le32 NetRxSmallBufferQueueBaseAddrHi; /* 200 xc8 */
101 __le32 NetRxSmallBufferQueueBaseAddrLow; /* 204 xcc */
102 __le32 NetRxSmallBufferQueueLength; /* 208 xd0 */
103 __le32 NetRxSmallBufferLength; /* 212 xd4 */
104 __le32 HMCReserved0[10]; /* 216 xd8 */
105}; 38};
106 39
107struct local_ram_cfg_regs {
108 __le32 BufletSize; /* 80 x50 */
109 __le32 BufletMaxCount; /* 84 x54 */
110 __le32 BufletCurrCount; /* 88 x58 */
111 __le32 BufletPauseThresholdCount; /* 92 x5c */
112 __le32 BufletTCPWinThresholdHi; /* 96 x60 */
113 __le32 BufletTCPWinThresholdLow; /* 100 x64 */
114 __le32 IPHashTableBaseAddr; /* 104 x68 */
115 __le32 IPHashTableSize; /* 108 x6c */
116 __le32 TCPHashTableBaseAddr; /* 112 x70 */
117 __le32 TCPHashTableSize; /* 116 x74 */
118 __le32 NCBAreaBaseAddr; /* 120 x78 */
119 __le32 NCBMaxCount; /* 124 x7c */
120 __le32 NCBCurrCount; /* 128 x80 */
121 __le32 DRBAreaBaseAddr; /* 132 x84 */
122 __le32 DRBMaxCount; /* 136 x88 */
123 __le32 DRBCurrCount; /* 140 x8c */
124 __le32 LRCReserved[28]; /* 144 x90 */
125};
126
127struct prot_stat_regs {
128 __le32 MACTxFrameCount; /* 80 x50 R */
129 __le32 MACTxByteCount; /* 84 x54 R */
130 __le32 MACRxFrameCount; /* 88 x58 R */
131 __le32 MACRxByteCount; /* 92 x5c R */
132 __le32 MACCRCErrCount; /* 96 x60 R */
133 __le32 MACEncErrCount; /* 100 x64 R */
134 __le32 MACRxLengthErrCount; /* 104 x68 R */
135 __le32 IPTxPacketCount; /* 108 x6c R */
136 __le32 IPTxByteCount; /* 112 x70 R */
137 __le32 IPTxFragmentCount; /* 116 x74 R */
138 __le32 IPRxPacketCount; /* 120 x78 R */
139 __le32 IPRxByteCount; /* 124 x7c R */
140 __le32 IPRxFragmentCount; /* 128 x80 R */
141 __le32 IPDatagramReassemblyCount; /* 132 x84 R */
142 __le32 IPV6RxPacketCount; /* 136 x88 R */
143 __le32 IPErrPacketCount; /* 140 x8c R */
144 __le32 IPReassemblyErrCount; /* 144 x90 R */
145 __le32 TCPTxSegmentCount; /* 148 x94 R */
146 __le32 TCPTxByteCount; /* 152 x98 R */
147 __le32 TCPRxSegmentCount; /* 156 x9c R */
148 __le32 TCPRxByteCount; /* 160 xa0 R */
149 __le32 TCPTimerExpCount; /* 164 xa4 R */
150 __le32 TCPRxAckCount; /* 168 xa8 R */
151 __le32 TCPTxAckCount; /* 172 xac R */
152 __le32 TCPRxErrOOOCount; /* 176 xb0 R */
153 __le32 PSReserved0; /* 180 xb4 */
154 __le32 TCPRxWindowProbeUpdateCount; /* 184 xb8 R */
155 __le32 ECCErrCorrectionCount; /* 188 xbc R */
156 __le32 PSReserved1[16]; /* 192 xc0 */
157};
158
159
160/* remote register set (access via PCI memory read/write) */ 40/* remote register set (access via PCI memory read/write) */
161struct isp_reg { 41struct isp_reg {
162#define MBOX_REG_COUNT 8 42#define MBOX_REG_COUNT 8
@@ -207,11 +87,7 @@ struct isp_reg {
207 union { 87 union {
208 struct port_ctrl_stat_regs p0; 88 struct port_ctrl_stat_regs p0;
209 struct host_mem_cfg_regs p1; 89 struct host_mem_cfg_regs p1;
210 struct local_ram_cfg_regs p2;
211 struct prot_stat_regs p3;
212 __le32 r_union[44];
213 }; 90 };
214
215 } __attribute__ ((packed)) isp4022; 91 } __attribute__ ((packed)) isp4022;
216 } u2; 92 } u2;
217}; /* 256 x100 */ 93}; /* 256 x100 */
@@ -296,6 +172,7 @@ static inline uint32_t clr_rmask(uint32_t val)
296/* ISP Semaphore definitions */ 172/* ISP Semaphore definitions */
297 173
298/* ISP General Purpose Output definitions */ 174/* ISP General Purpose Output definitions */
175#define GPOR_TOPCAT_RESET 0x00000004
299 176
300/* shadow registers (DMA'd from HA to system memory. read only) */ 177/* shadow registers (DMA'd from HA to system memory. read only) */
301struct shadow_regs { 178struct shadow_regs {
@@ -337,6 +214,7 @@ union external_hw_config_reg {
337 214
338/* Mailbox command definitions */ 215/* Mailbox command definitions */
339#define MBOX_CMD_ABOUT_FW 0x0009 216#define MBOX_CMD_ABOUT_FW 0x0009
217#define MBOX_CMD_PING 0x000B
340#define MBOX_CMD_LUN_RESET 0x0016 218#define MBOX_CMD_LUN_RESET 0x0016
341#define MBOX_CMD_GET_MANAGEMENT_DATA 0x001E 219#define MBOX_CMD_GET_MANAGEMENT_DATA 0x001E
342#define MBOX_CMD_GET_FW_STATUS 0x001F 220#define MBOX_CMD_GET_FW_STATUS 0x001F
@@ -364,6 +242,17 @@ union external_hw_config_reg {
364#define MBOX_CMD_GET_FW_STATE 0x0069 242#define MBOX_CMD_GET_FW_STATE 0x0069
365#define MBOX_CMD_GET_INIT_FW_CTRL_BLOCK_DEFAULTS 0x006A 243#define MBOX_CMD_GET_INIT_FW_CTRL_BLOCK_DEFAULTS 0x006A
366#define MBOX_CMD_RESTORE_FACTORY_DEFAULTS 0x0087 244#define MBOX_CMD_RESTORE_FACTORY_DEFAULTS 0x0087
245#define MBOX_CMD_SET_ACB 0x0088
246#define MBOX_CMD_GET_ACB 0x0089
247#define MBOX_CMD_DISABLE_ACB 0x008A
248#define MBOX_CMD_GET_IPV6_NEIGHBOR_CACHE 0x008B
249#define MBOX_CMD_GET_IPV6_DEST_CACHE 0x008C
250#define MBOX_CMD_GET_IPV6_DEF_ROUTER_LIST 0x008D
251#define MBOX_CMD_GET_IPV6_LCL_PREFIX_LIST 0x008E
252#define MBOX_CMD_SET_IPV6_NEIGHBOR_CACHE 0x0090
253#define MBOX_CMD_GET_IP_ADDR_STATE 0x0091
254#define MBOX_CMD_SEND_IPV6_ROUTER_SOL 0x0092
255#define MBOX_CMD_GET_DB_ENTRY_CURRENT_IP_ADDR 0x0093
367 256
368/* Mailbox 1 */ 257/* Mailbox 1 */
369#define FW_STATE_READY 0x0000 258#define FW_STATE_READY 0x0000
@@ -409,6 +298,16 @@ union external_hw_config_reg {
409#define MBOX_ASTS_DHCP_LEASE_EXPIRED 0x801D 298#define MBOX_ASTS_DHCP_LEASE_EXPIRED 0x801D
410#define MBOX_ASTS_DHCP_LEASE_ACQUIRED 0x801F 299#define MBOX_ASTS_DHCP_LEASE_ACQUIRED 0x801F
411#define MBOX_ASTS_ISNS_UNSOLICITED_PDU_RECEIVED 0x8021 300#define MBOX_ASTS_ISNS_UNSOLICITED_PDU_RECEIVED 0x8021
301#define MBOX_ASTS_DUPLICATE_IP 0x8025
302#define MBOX_ASTS_ARP_COMPLETE 0x8026
303#define MBOX_ASTS_SUBNET_STATE_CHANGE 0x8027
304#define MBOX_ASTS_RESPONSE_QUEUE_FULL 0x8028
305#define MBOX_ASTS_IP_ADDR_STATE_CHANGED 0x8029
306#define MBOX_ASTS_IPV6_PREFIX_EXPIRED 0x802B
307#define MBOX_ASTS_IPV6_ND_PREFIX_IGNORED 0x802C
308#define MBOX_ASTS_IPV6_LCL_PREFIX_IGNORED 0x802D
309#define MBOX_ASTS_ICMPV6_ERROR_MSG_RCVD 0x802E
310
412#define ISNS_EVENT_DATA_RECEIVED 0x0000 311#define ISNS_EVENT_DATA_RECEIVED 0x0000
413#define ISNS_EVENT_CONNECTION_OPENED 0x0001 312#define ISNS_EVENT_CONNECTION_OPENED 0x0001
414#define ISNS_EVENT_CONNECTION_FAILED 0x0002 313#define ISNS_EVENT_CONNECTION_FAILED 0x0002
@@ -418,137 +317,166 @@ union external_hw_config_reg {
418/*************************************************************************/ 317/*************************************************************************/
419 318
420/* Host Adapter Initialization Control Block (from host) */ 319/* Host Adapter Initialization Control Block (from host) */
421struct init_fw_ctrl_blk { 320struct addr_ctrl_blk {
422 uint8_t Version; /* 00 */ 321 uint8_t version; /* 00 */
423 uint8_t Control; /* 01 */ 322 uint8_t control; /* 01 */
424 323
425 uint16_t FwOptions; /* 02-03 */ 324 uint16_t fw_options; /* 02-03 */
426#define FWOPT_HEARTBEAT_ENABLE 0x1000 325#define FWOPT_HEARTBEAT_ENABLE 0x1000
427#define FWOPT_SESSION_MODE 0x0040 326#define FWOPT_SESSION_MODE 0x0040
428#define FWOPT_INITIATOR_MODE 0x0020 327#define FWOPT_INITIATOR_MODE 0x0020
429#define FWOPT_TARGET_MODE 0x0010 328#define FWOPT_TARGET_MODE 0x0010
430 329
431 uint16_t ExecThrottle; /* 04-05 */ 330 uint16_t exec_throttle; /* 04-05 */
432 uint8_t RetryCount; /* 06 */ 331 uint8_t zio_count; /* 06 */
433 uint8_t RetryDelay; /* 07 */ 332 uint8_t res0; /* 07 */
434 uint16_t MaxEthFrPayloadSize; /* 08-09 */ 333 uint16_t eth_mtu_size; /* 08-09 */
435 uint16_t AddFwOptions; /* 0A-0B */ 334 uint16_t add_fw_options; /* 0A-0B */
436 335
437 uint8_t HeartbeatInterval; /* 0C */ 336 uint8_t hb_interval; /* 0C */
438 uint8_t InstanceNumber; /* 0D */ 337 uint8_t inst_num; /* 0D */
439 uint16_t RES2; /* 0E-0F */ 338 uint16_t res1; /* 0E-0F */
440 uint16_t ReqQConsumerIndex; /* 10-11 */ 339 uint16_t rqq_consumer_idx; /* 10-11 */
441 uint16_t ComplQProducerIndex; /* 12-13 */ 340 uint16_t compq_producer_idx; /* 12-13 */
442 uint16_t ReqQLen; /* 14-15 */ 341 uint16_t rqq_len; /* 14-15 */
443 uint16_t ComplQLen; /* 16-17 */ 342 uint16_t compq_len; /* 16-17 */
444 uint32_t ReqQAddrLo; /* 18-1B */ 343 uint32_t rqq_addr_lo; /* 18-1B */
445 uint32_t ReqQAddrHi; /* 1C-1F */ 344 uint32_t rqq_addr_hi; /* 1C-1F */
446 uint32_t ComplQAddrLo; /* 20-23 */ 345 uint32_t compq_addr_lo; /* 20-23 */
447 uint32_t ComplQAddrHi; /* 24-27 */ 346 uint32_t compq_addr_hi; /* 24-27 */
448 uint32_t ShadowRegBufAddrLo; /* 28-2B */ 347 uint32_t shdwreg_addr_lo; /* 28-2B */
449 uint32_t ShadowRegBufAddrHi; /* 2C-2F */ 348 uint32_t shdwreg_addr_hi; /* 2C-2F */
450 349
451 uint16_t iSCSIOptions; /* 30-31 */ 350 uint16_t iscsi_opts; /* 30-31 */
452 351 uint16_t ipv4_tcp_opts; /* 32-33 */
453 uint16_t TCPOptions; /* 32-33 */ 352 uint16_t ipv4_ip_opts; /* 34-35 */
454 353
455 uint16_t IPOptions; /* 34-35 */ 354 uint16_t iscsi_max_pdu_size; /* 36-37 */
456 355 uint8_t ipv4_tos; /* 38 */
457 uint16_t MaxPDUSize; /* 36-37 */ 356 uint8_t ipv4_ttl; /* 39 */
458 uint16_t RcvMarkerInt; /* 38-39 */ 357 uint8_t acb_version; /* 3A */
459 uint16_t SndMarkerInt; /* 3A-3B */ 358 uint8_t res2; /* 3B */
460 uint16_t InitMarkerlessInt; /* 3C-3D */ 359 uint16_t def_timeout; /* 3C-3D */
461 uint16_t FirstBurstSize; /* 3E-3F */ 360 uint16_t iscsi_fburst_len; /* 3E-3F */
462 uint16_t DefaultTime2Wait; /* 40-41 */ 361 uint16_t iscsi_def_time2wait; /* 40-41 */
463 uint16_t DefaultTime2Retain; /* 42-43 */ 362 uint16_t iscsi_def_time2retain; /* 42-43 */
464 uint16_t MaxOutStndngR2T; /* 44-45 */ 363 uint16_t iscsi_max_outstnd_r2t; /* 44-45 */
465 uint16_t KeepAliveTimeout; /* 46-47 */ 364 uint16_t conn_ka_timeout; /* 46-47 */
466 uint16_t PortNumber; /* 48-49 */ 365 uint16_t ipv4_port; /* 48-49 */
467 uint16_t MaxBurstSize; /* 4A-4B */ 366 uint16_t iscsi_max_burst_len; /* 4A-4B */
468 uint32_t RES4; /* 4C-4F */ 367 uint32_t res5; /* 4C-4F */
469 uint8_t IPAddr[4]; /* 50-53 */ 368 uint8_t ipv4_addr[4]; /* 50-53 */
470 uint8_t RES5[12]; /* 54-5F */ 369 uint16_t ipv4_vlan_tag; /* 54-55 */
471 uint8_t SubnetMask[4]; /* 60-63 */ 370 uint8_t ipv4_addr_state; /* 56 */
472 uint8_t RES6[12]; /* 64-6F */ 371 uint8_t ipv4_cacheid; /* 57 */
473 uint8_t GatewayIPAddr[4]; /* 70-73 */ 372 uint8_t res6[8]; /* 58-5F */
474 uint8_t RES7[12]; /* 74-7F */ 373 uint8_t ipv4_subnet[4]; /* 60-63 */
475 uint8_t PriDNSIPAddr[4]; /* 80-83 */ 374 uint8_t res7[12]; /* 64-6F */
476 uint8_t SecDNSIPAddr[4]; /* 84-87 */ 375 uint8_t ipv4_gw_addr[4]; /* 70-73 */
477 uint8_t RES8[8]; /* 88-8F */ 376 uint8_t res8[0xc]; /* 74-7F */
478 uint8_t Alias[32]; /* 90-AF */ 377 uint8_t pri_dns_srvr_ip[4];/* 80-83 */
479 uint8_t TargAddr[8]; /* B0-B7 *//* /FIXME: Remove?? */ 378 uint8_t sec_dns_srvr_ip[4];/* 84-87 */
480 uint8_t CHAPNameSecretsTable[8]; /* B8-BF */ 379 uint16_t min_eph_port; /* 88-89 */
481 uint8_t EthernetMACAddr[6]; /* C0-C5 */ 380 uint16_t max_eph_port; /* 8A-8B */
482 uint16_t TargetPortalGroup; /* C6-C7 */ 381 uint8_t res9[4]; /* 8C-8F */
483 uint8_t SendScale; /* C8 */ 382 uint8_t iscsi_alias[32];/* 90-AF */
484 uint8_t RecvScale; /* C9 */ 383 uint8_t res9_1[0x16]; /* B0-C5 */
485 uint8_t TypeOfService; /* CA */ 384 uint16_t tgt_portal_grp;/* C6-C7 */
486 uint8_t Time2Live; /* CB */ 385 uint8_t abort_timer; /* C8 */
487 uint16_t VLANPriority; /* CC-CD */ 386 uint8_t ipv4_tcp_wsf; /* C9 */
488 uint16_t Reserved8; /* CE-CF */ 387 uint8_t res10[6]; /* CA-CF */
489 uint8_t SecIPAddr[4]; /* D0-D3 */ 388 uint8_t ipv4_sec_ip_addr[4]; /* D0-D3 */
490 uint8_t Reserved9[12]; /* D4-DF */ 389 uint8_t ipv4_dhcp_vid_len; /* D4 */
491 uint8_t iSNSIPAddr[4]; /* E0-E3 */ 390 uint8_t ipv4_dhcp_vid[11]; /* D5-DF */
492 uint16_t iSNSServerPortNumber; /* E4-E5 */ 391 uint8_t res11[20]; /* E0-F3 */
493 uint8_t Reserved10[10]; /* E6-EF */ 392 uint8_t ipv4_dhcp_alt_cid_len; /* F4 */
494 uint8_t SLPDAIPAddr[4]; /* F0-F3 */ 393 uint8_t ipv4_dhcp_alt_cid[11]; /* F5-FF */
495 uint8_t Reserved11[12]; /* F4-FF */ 394 uint8_t iscsi_name[224]; /* 100-1DF */
496 uint8_t iSCSINameString[256]; /* 100-1FF */ 395 uint8_t res12[32]; /* 1E0-1FF */
396 uint32_t cookie; /* 200-203 */
397 uint16_t ipv6_port; /* 204-205 */
398 uint16_t ipv6_opts; /* 206-207 */
399 uint16_t ipv6_addtl_opts; /* 208-209 */
400 uint16_t ipv6_tcp_opts; /* 20A-20B */
401 uint8_t ipv6_tcp_wsf; /* 20C */
402 uint16_t ipv6_flow_lbl; /* 20D-20F */
403 uint8_t ipv6_gw_addr[16]; /* 210-21F */
404 uint16_t ipv6_vlan_tag; /* 220-221 */
405 uint8_t ipv6_lnk_lcl_addr_state;/* 222 */
406 uint8_t ipv6_addr0_state; /* 223 */
407 uint8_t ipv6_addr1_state; /* 224 */
408 uint8_t ipv6_gw_state; /* 225 */
409 uint8_t ipv6_traffic_class; /* 226 */
410 uint8_t ipv6_hop_limit; /* 227 */
411 uint8_t ipv6_if_id[8]; /* 228-22F */
412 uint8_t ipv6_addr0[16]; /* 230-23F */
413 uint8_t ipv6_addr1[16]; /* 240-24F */
414 uint32_t ipv6_nd_reach_time; /* 250-253 */
415 uint32_t ipv6_nd_rexmit_timer; /* 254-257 */
416 uint32_t ipv6_nd_stale_timeout; /* 258-25B */
417 uint8_t ipv6_dup_addr_detect_count; /* 25C */
418 uint8_t ipv6_cache_id; /* 25D */
419 uint8_t res13[18]; /* 25E-26F */
420 uint32_t ipv6_gw_advrt_mtu; /* 270-273 */
421 uint8_t res14[140]; /* 274-2FF */
422};
423
424struct init_fw_ctrl_blk {
425 struct addr_ctrl_blk pri;
426 struct addr_ctrl_blk sec;
497}; 427};
498 428
499/*************************************************************************/ 429/*************************************************************************/
500 430
501struct dev_db_entry { 431struct dev_db_entry {
502 uint8_t options; /* 00 */ 432 uint16_t options; /* 00-01 */
503#define DDB_OPT_DISC_SESSION 0x10 433#define DDB_OPT_DISC_SESSION 0x10
504#define DDB_OPT_TARGET 0x02 /* device is a target */ 434#define DDB_OPT_TARGET 0x02 /* device is a target */
505 435
506 uint8_t control; /* 01 */ 436 uint16_t exec_throttle; /* 02-03 */
507 437 uint16_t exec_count; /* 04-05 */
508 uint16_t exeThrottle; /* 02-03 */ 438 uint16_t res0; /* 06-07 */
509 uint16_t exeCount; /* 04-05 */ 439 uint16_t iscsi_options; /* 08-09 */
510 uint8_t retryCount; /* 06 */ 440 uint16_t tcp_options; /* 0A-0B */
511 uint8_t retryDelay; /* 07 */ 441 uint16_t ip_options; /* 0C-0D */
512 uint16_t iSCSIOptions; /* 08-09 */ 442 uint16_t iscsi_max_rcv_data_seg_len; /* 0E-0F */
513 443 uint32_t res1; /* 10-13 */
514 uint16_t TCPOptions; /* 0A-0B */ 444 uint16_t iscsi_max_snd_data_seg_len; /* 14-15 */
515 445 uint16_t iscsi_first_burst_len; /* 16-17 */
516 uint16_t IPOptions; /* 0C-0D */ 446 uint16_t iscsi_def_time2wait; /* 18-19 */
517 447 uint16_t iscsi_def_time2retain; /* 1A-1B */
518 uint16_t maxPDUSize; /* 0E-0F */ 448 uint16_t iscsi_max_outsnd_r2t; /* 1C-1D */
519 uint16_t rcvMarkerInt; /* 10-11 */ 449 uint16_t ka_timeout; /* 1E-1F */
520 uint16_t sndMarkerInt; /* 12-13 */ 450 uint8_t isid[6]; /* 20-25 big-endian, must be converted
521 uint16_t iSCSIMaxSndDataSegLen; /* 14-15 */
522 uint16_t firstBurstSize; /* 16-17 */
523 uint16_t minTime2Wait; /* 18-19 : RA :default_time2wait */
524 uint16_t maxTime2Retain; /* 1A-1B */
525 uint16_t maxOutstndngR2T; /* 1C-1D */
526 uint16_t keepAliveTimeout; /* 1E-1F */
527 uint8_t ISID[6]; /* 20-25 big-endian, must be converted
528 * to little-endian */ 451 * to little-endian */
529 uint16_t TSID; /* 26-27 */ 452 uint16_t tsid; /* 26-27 */
530 uint16_t portNumber; /* 28-29 */ 453 uint16_t port; /* 28-29 */
531 uint16_t maxBurstSize; /* 2A-2B */ 454 uint16_t iscsi_max_burst_len; /* 2A-2B */
532 uint16_t taskMngmntTimeout; /* 2C-2D */ 455 uint16_t def_timeout; /* 2C-2D */
533 uint16_t reserved1; /* 2E-2F */ 456 uint16_t res2; /* 2E-2F */
534 uint8_t ipAddr[0x10]; /* 30-3F */ 457 uint8_t ip_addr[0x10]; /* 30-3F */
535 uint8_t iSCSIAlias[0x20]; /* 40-5F */ 458 uint8_t iscsi_alias[0x20]; /* 40-5F */
536 uint8_t targetAddr[0x20]; /* 60-7F */ 459 uint8_t tgt_addr[0x20]; /* 60-7F */
537 uint8_t userID[0x20]; /* 80-9F */ 460 uint16_t mss; /* 80-81 */
538 uint8_t password[0x20]; /* A0-BF */ 461 uint16_t res3; /* 82-83 */
539 uint8_t iscsiName[0x100]; /* C0-1BF : xxzzy Make this a 462 uint16_t lcl_port; /* 84-85 */
463 uint8_t ipv4_tos; /* 86 */
464 uint16_t ipv6_flow_lbl; /* 87-89 */
465 uint8_t res4[0x36]; /* 8A-BF */
466 uint8_t iscsi_name[0xE0]; /* C0-19F : xxzzy Make this a
540 * pointer to a string so we 467 * pointer to a string so we
541 * don't have to reserve soooo 468 * don't have to reserve soooo
542 * much RAM */ 469 * much RAM */
543 uint16_t ddbLink; /* 1C0-1C1 */ 470 uint8_t ipv6_addr[0x10];/* 1A0-1AF */
544 uint16_t CHAPTableIndex; /* 1C2-1C3 */ 471 uint8_t res5[0x10]; /* 1B0-1BF */
545 uint16_t TargetPortalGroup; /* 1C4-1C5 */ 472 uint16_t ddb_link; /* 1C0-1C1 */
546 uint16_t reserved2[2]; /* 1C6-1C7 */ 473 uint16_t chap_tbl_idx; /* 1C2-1C3 */
547 uint32_t statSN; /* 1C8-1CB */ 474 uint16_t tgt_portal_grp; /* 1C4-1C5 */
548 uint32_t expStatSN; /* 1CC-1CF */ 475 uint8_t tcp_xmt_wsf; /* 1C6 */
549 uint16_t reserved3[0x2C]; /* 1D0-1FB */ 476 uint8_t tcp_rcv_wsf; /* 1C7 */
550 uint16_t ddbValidCookie; /* 1FC-1FD */ 477 uint32_t stat_sn; /* 1C8-1CB */
551 uint16_t ddbValidSize; /* 1FE-1FF */ 478 uint32_t exp_stat_sn; /* 1CC-1CF */
479 uint8_t res6[0x30]; /* 1D0-1FF */
552}; 480};
553 481
554/*************************************************************************/ 482/*************************************************************************/
diff --git a/drivers/scsi/qla4xxx/ql4_glbl.h b/drivers/scsi/qla4xxx/ql4_glbl.h
index 5b00cb04e7c0..a3608e028bf6 100644
--- a/drivers/scsi/qla4xxx/ql4_glbl.h
+++ b/drivers/scsi/qla4xxx/ql4_glbl.h
@@ -8,6 +8,9 @@
8#ifndef __QLA4x_GBL_H 8#ifndef __QLA4x_GBL_H
9#define __QLA4x_GBL_H 9#define __QLA4x_GBL_H
10 10
11struct iscsi_cls_conn;
12
13void qla4xxx_hw_reset(struct scsi_qla_host *ha);
11int ql4xxx_lock_drvr_wait(struct scsi_qla_host *a); 14int ql4xxx_lock_drvr_wait(struct scsi_qla_host *a);
12int qla4xxx_send_tgts(struct scsi_qla_host *ha, char *ip, uint16_t port); 15int qla4xxx_send_tgts(struct scsi_qla_host *ha, char *ip, uint16_t port);
13int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb); 16int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb);
@@ -58,11 +61,13 @@ int qla4xxx_get_fw_version(struct scsi_qla_host * ha);
58void qla4xxx_interrupt_service_routine(struct scsi_qla_host * ha, 61void qla4xxx_interrupt_service_routine(struct scsi_qla_host * ha,
59 uint32_t intr_status); 62 uint32_t intr_status);
60int qla4xxx_init_rings(struct scsi_qla_host * ha); 63int qla4xxx_init_rings(struct scsi_qla_host * ha);
61struct srb * qla4xxx_del_from_active_array(struct scsi_qla_host *ha, uint32_t index); 64struct srb * qla4xxx_del_from_active_array(struct scsi_qla_host *ha,
65 uint32_t index);
62void qla4xxx_srb_compl(struct scsi_qla_host *ha, struct srb *srb); 66void qla4xxx_srb_compl(struct scsi_qla_host *ha, struct srb *srb);
63int qla4xxx_reinitialize_ddb_list(struct scsi_qla_host * ha); 67int qla4xxx_reinitialize_ddb_list(struct scsi_qla_host * ha);
64int qla4xxx_process_ddb_changed(struct scsi_qla_host * ha, 68int qla4xxx_process_ddb_changed(struct scsi_qla_host * ha,
65 uint32_t fw_ddb_index, uint32_t state); 69 uint32_t fw_ddb_index, uint32_t state);
70void qla4xxx_dump_buffer(void *b, uint32_t size);
66 71
67extern int ql4xextended_error_logging; 72extern int ql4xextended_error_logging;
68extern int ql4xdiscoverywait; 73extern int ql4xdiscoverywait;
diff --git a/drivers/scsi/qla4xxx/ql4_init.c b/drivers/scsi/qla4xxx/ql4_init.c
index 6365df268612..1e29f51d596b 100644
--- a/drivers/scsi/qla4xxx/ql4_init.c
+++ b/drivers/scsi/qla4xxx/ql4_init.c
@@ -6,6 +6,9 @@
6 */ 6 */
7 7
8#include "ql4_def.h" 8#include "ql4_def.h"
9#include "ql4_glbl.h"
10#include "ql4_dbg.h"
11#include "ql4_inline.h"
9 12
10static struct ddb_entry * qla4xxx_alloc_ddb(struct scsi_qla_host *ha, 13static struct ddb_entry * qla4xxx_alloc_ddb(struct scsi_qla_host *ha,
11 uint32_t fw_ddb_index); 14 uint32_t fw_ddb_index);
@@ -300,12 +303,12 @@ static int qla4xxx_init_firmware(struct scsi_qla_host *ha)
300 if (!qla4xxx_fw_ready(ha)) 303 if (!qla4xxx_fw_ready(ha))
301 return status; 304 return status;
302 305
303 set_bit(AF_ONLINE, &ha->flags);
304 return qla4xxx_get_firmware_status(ha); 306 return qla4xxx_get_firmware_status(ha);
305} 307}
306 308
307static struct ddb_entry* qla4xxx_get_ddb_entry(struct scsi_qla_host *ha, 309static struct ddb_entry* qla4xxx_get_ddb_entry(struct scsi_qla_host *ha,
308 uint32_t fw_ddb_index) 310 uint32_t fw_ddb_index,
311 uint32_t *new_tgt)
309{ 312{
310 struct dev_db_entry *fw_ddb_entry = NULL; 313 struct dev_db_entry *fw_ddb_entry = NULL;
311 dma_addr_t fw_ddb_entry_dma; 314 dma_addr_t fw_ddb_entry_dma;
@@ -313,6 +316,7 @@ static struct ddb_entry* qla4xxx_get_ddb_entry(struct scsi_qla_host *ha,
313 int found = 0; 316 int found = 0;
314 uint32_t device_state; 317 uint32_t device_state;
315 318
319 *new_tgt = 0;
316 /* Make sure the dma buffer is valid */ 320 /* Make sure the dma buffer is valid */
317 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, 321 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev,
318 sizeof(*fw_ddb_entry), 322 sizeof(*fw_ddb_entry),
@@ -337,7 +341,7 @@ static struct ddb_entry* qla4xxx_get_ddb_entry(struct scsi_qla_host *ha,
337 DEBUG2(printk("scsi%ld: %s: Looking for ddb[%d]\n", ha->host_no, 341 DEBUG2(printk("scsi%ld: %s: Looking for ddb[%d]\n", ha->host_no,
338 __func__, fw_ddb_index)); 342 __func__, fw_ddb_index));
339 list_for_each_entry(ddb_entry, &ha->ddb_list, list) { 343 list_for_each_entry(ddb_entry, &ha->ddb_list, list) {
340 if (memcmp(ddb_entry->iscsi_name, fw_ddb_entry->iscsiName, 344 if (memcmp(ddb_entry->iscsi_name, fw_ddb_entry->iscsi_name,
341 ISCSI_NAME_SIZE) == 0) { 345 ISCSI_NAME_SIZE) == 0) {
342 found++; 346 found++;
343 break; 347 break;
@@ -348,6 +352,7 @@ static struct ddb_entry* qla4xxx_get_ddb_entry(struct scsi_qla_host *ha,
348 DEBUG2(printk("scsi%ld: %s: ddb[%d] not found - allocating " 352 DEBUG2(printk("scsi%ld: %s: ddb[%d] not found - allocating "
349 "new ddb\n", ha->host_no, __func__, 353 "new ddb\n", ha->host_no, __func__,
350 fw_ddb_index)); 354 fw_ddb_index));
355 *new_tgt = 1;
351 ddb_entry = qla4xxx_alloc_ddb(ha, fw_ddb_index); 356 ddb_entry = qla4xxx_alloc_ddb(ha, fw_ddb_index);
352 } 357 }
353 358
@@ -409,26 +414,26 @@ static int qla4xxx_update_ddb_entry(struct scsi_qla_host *ha,
409 } 414 }
410 415
411 status = QLA_SUCCESS; 416 status = QLA_SUCCESS;
412 ddb_entry->target_session_id = le16_to_cpu(fw_ddb_entry->TSID); 417 ddb_entry->target_session_id = le16_to_cpu(fw_ddb_entry->tsid);
413 ddb_entry->task_mgmt_timeout = 418 ddb_entry->task_mgmt_timeout =
414 le16_to_cpu(fw_ddb_entry->taskMngmntTimeout); 419 le16_to_cpu(fw_ddb_entry->def_timeout);
415 ddb_entry->CmdSn = 0; 420 ddb_entry->CmdSn = 0;
416 ddb_entry->exe_throttle = le16_to_cpu(fw_ddb_entry->exeThrottle); 421 ddb_entry->exe_throttle = le16_to_cpu(fw_ddb_entry->exec_throttle);
417 ddb_entry->default_relogin_timeout = 422 ddb_entry->default_relogin_timeout =
418 le16_to_cpu(fw_ddb_entry->taskMngmntTimeout); 423 le16_to_cpu(fw_ddb_entry->def_timeout);
419 ddb_entry->default_time2wait = le16_to_cpu(fw_ddb_entry->minTime2Wait); 424 ddb_entry->default_time2wait = le16_to_cpu(fw_ddb_entry->iscsi_def_time2wait);
420 425
421 /* Update index in case it changed */ 426 /* Update index in case it changed */
422 ddb_entry->fw_ddb_index = fw_ddb_index; 427 ddb_entry->fw_ddb_index = fw_ddb_index;
423 ha->fw_ddb_index_map[fw_ddb_index] = ddb_entry; 428 ha->fw_ddb_index_map[fw_ddb_index] = ddb_entry;
424 429
425 ddb_entry->port = le16_to_cpu(fw_ddb_entry->portNumber); 430 ddb_entry->port = le16_to_cpu(fw_ddb_entry->port);
426 ddb_entry->tpgt = le32_to_cpu(fw_ddb_entry->TargetPortalGroup); 431 ddb_entry->tpgt = le32_to_cpu(fw_ddb_entry->tgt_portal_grp);
427 memcpy(&ddb_entry->iscsi_name[0], &fw_ddb_entry->iscsiName[0], 432 memcpy(&ddb_entry->iscsi_name[0], &fw_ddb_entry->iscsi_name[0],
428 min(sizeof(ddb_entry->iscsi_name), 433 min(sizeof(ddb_entry->iscsi_name),
429 sizeof(fw_ddb_entry->iscsiName))); 434 sizeof(fw_ddb_entry->iscsi_name)));
430 memcpy(&ddb_entry->ip_addr[0], &fw_ddb_entry->ipAddr[0], 435 memcpy(&ddb_entry->ip_addr[0], &fw_ddb_entry->ip_addr[0],
431 min(sizeof(ddb_entry->ip_addr), sizeof(fw_ddb_entry->ipAddr))); 436 min(sizeof(ddb_entry->ip_addr), sizeof(fw_ddb_entry->ip_addr)));
432 437
433 DEBUG2(printk("scsi%ld: %s: ddb[%d] - State= %x status= %d.\n", 438 DEBUG2(printk("scsi%ld: %s: ddb[%d] - State= %x status= %d.\n",
434 ha->host_no, __func__, fw_ddb_index, 439 ha->host_no, __func__, fw_ddb_index,
@@ -495,6 +500,7 @@ static int qla4xxx_build_ddb_list(struct scsi_qla_host *ha)
495 uint32_t ddb_state; 500 uint32_t ddb_state;
496 uint32_t conn_err, err_code; 501 uint32_t conn_err, err_code;
497 struct ddb_entry *ddb_entry; 502 struct ddb_entry *ddb_entry;
503 uint32_t new_tgt;
498 504
499 dev_info(&ha->pdev->dev, "Initializing DDBs ...\n"); 505 dev_info(&ha->pdev->dev, "Initializing DDBs ...\n");
500 for (fw_ddb_index = 0; fw_ddb_index < MAX_DDB_ENTRIES; 506 for (fw_ddb_index = 0; fw_ddb_index < MAX_DDB_ENTRIES;
@@ -526,8 +532,19 @@ static int qla4xxx_build_ddb_list(struct scsi_qla_host *ha)
526 "completed " 532 "completed "
527 "or access denied failure\n", 533 "or access denied failure\n",
528 ha->host_no, __func__)); 534 ha->host_no, __func__));
529 } else 535 } else {
530 qla4xxx_set_ddb_entry(ha, fw_ddb_index, 0); 536 qla4xxx_set_ddb_entry(ha, fw_ddb_index, 0);
537 if (qla4xxx_get_fwddb_entry(ha, fw_ddb_index,
538 NULL, 0, NULL, &next_fw_ddb_index,
539 &ddb_state, &conn_err, NULL, NULL)
540 == QLA_ERROR) {
541 DEBUG2(printk("scsi%ld: %s:"
542 "get_ddb_entry %d failed\n",
543 ha->host_no,
544 __func__, fw_ddb_index));
545 return QLA_ERROR;
546 }
547 }
531 } 548 }
532 549
533 if (ddb_state != DDB_DS_SESSION_ACTIVE) 550 if (ddb_state != DDB_DS_SESSION_ACTIVE)
@@ -540,7 +557,7 @@ static int qla4xxx_build_ddb_list(struct scsi_qla_host *ha)
540 ha->host_no, __func__, fw_ddb_index)); 557 ha->host_no, __func__, fw_ddb_index));
541 558
542 /* Add DDB to internal our ddb list. */ 559 /* Add DDB to internal our ddb list. */
543 ddb_entry = qla4xxx_get_ddb_entry(ha, fw_ddb_index); 560 ddb_entry = qla4xxx_get_ddb_entry(ha, fw_ddb_index, &new_tgt);
544 if (ddb_entry == NULL) { 561 if (ddb_entry == NULL) {
545 DEBUG2(printk("scsi%ld: %s: Unable to allocate memory " 562 DEBUG2(printk("scsi%ld: %s: Unable to allocate memory "
546 "for device at fw_ddb_index %d\n", 563 "for device at fw_ddb_index %d\n",
@@ -865,21 +882,20 @@ static int qla4xxx_config_nvram(struct scsi_qla_host *ha)
865 882
866static void qla4x00_pci_config(struct scsi_qla_host *ha) 883static void qla4x00_pci_config(struct scsi_qla_host *ha)
867{ 884{
868 uint16_t w, mwi; 885 uint16_t w;
886 int status;
869 887
870 dev_info(&ha->pdev->dev, "Configuring PCI space...\n"); 888 dev_info(&ha->pdev->dev, "Configuring PCI space...\n");
871 889
872 pci_set_master(ha->pdev); 890 pci_set_master(ha->pdev);
873 mwi = 0; 891 status = pci_set_mwi(ha->pdev);
874 if (pci_set_mwi(ha->pdev))
875 mwi = PCI_COMMAND_INVALIDATE;
876 /* 892 /*
877 * We want to respect framework's setting of PCI configuration space 893 * We want to respect framework's setting of PCI configuration space
878 * command register and also want to make sure that all bits of 894 * command register and also want to make sure that all bits of
879 * interest to us are properly set in command register. 895 * interest to us are properly set in command register.
880 */ 896 */
881 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 897 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
882 w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 898 w |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
883 w &= ~PCI_COMMAND_INTX_DISABLE; 899 w &= ~PCI_COMMAND_INTX_DISABLE;
884 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 900 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
885} 901}
@@ -911,6 +927,9 @@ static int qla4xxx_start_firmware_from_flash(struct scsi_qla_host *ha)
911 writel(set_rmask(NVR_WRITE_ENABLE), 927 writel(set_rmask(NVR_WRITE_ENABLE),
912 &ha->reg->u1.isp4022.nvram); 928 &ha->reg->u1.isp4022.nvram);
913 929
930 writel(2, &ha->reg->mailbox[6]);
931 readl(&ha->reg->mailbox[6]);
932
914 writel(set_rmask(CSR_BOOT_ENABLE), &ha->reg->ctrl_status); 933 writel(set_rmask(CSR_BOOT_ENABLE), &ha->reg->ctrl_status);
915 readl(&ha->reg->ctrl_status); 934 readl(&ha->reg->ctrl_status);
916 spin_unlock_irqrestore(&ha->hardware_lock, flags); 935 spin_unlock_irqrestore(&ha->hardware_lock, flags);
@@ -958,25 +977,25 @@ static int qla4xxx_start_firmware_from_flash(struct scsi_qla_host *ha)
958 return status; 977 return status;
959} 978}
960 979
961int ql4xxx_lock_drvr_wait(struct scsi_qla_host *ha) 980int ql4xxx_lock_drvr_wait(struct scsi_qla_host *a)
962{ 981{
963#define QL4_LOCK_DRVR_WAIT 30 982#define QL4_LOCK_DRVR_WAIT 60
964#define QL4_LOCK_DRVR_SLEEP 1 983#define QL4_LOCK_DRVR_SLEEP 1
965 984
966 int drvr_wait = QL4_LOCK_DRVR_WAIT; 985 int drvr_wait = QL4_LOCK_DRVR_WAIT;
967 while (drvr_wait) { 986 while (drvr_wait) {
968 if (ql4xxx_lock_drvr(ha) == 0) { 987 if (ql4xxx_lock_drvr(a) == 0) {
969 ssleep(QL4_LOCK_DRVR_SLEEP); 988 ssleep(QL4_LOCK_DRVR_SLEEP);
970 if (drvr_wait) { 989 if (drvr_wait) {
971 DEBUG2(printk("scsi%ld: %s: Waiting for " 990 DEBUG2(printk("scsi%ld: %s: Waiting for "
972 "Global Init Semaphore(%d)...n", 991 "Global Init Semaphore(%d)...\n",
973 ha->host_no, 992 a->host_no,
974 __func__, drvr_wait)); 993 __func__, drvr_wait));
975 } 994 }
976 drvr_wait -= QL4_LOCK_DRVR_SLEEP; 995 drvr_wait -= QL4_LOCK_DRVR_SLEEP;
977 } else { 996 } else {
978 DEBUG2(printk("scsi%ld: %s: Global Init Semaphore " 997 DEBUG2(printk("scsi%ld: %s: Global Init Semaphore "
979 "acquired.n", ha->host_no, __func__)); 998 "acquired\n", a->host_no, __func__));
980 return QLA_SUCCESS; 999 return QLA_SUCCESS;
981 } 1000 }
982 } 1001 }
@@ -1125,17 +1144,17 @@ int qla4xxx_initialize_adapter(struct scsi_qla_host *ha,
1125 1144
1126 /* Initialize the Host adapter request/response queues and firmware */ 1145 /* Initialize the Host adapter request/response queues and firmware */
1127 if (qla4xxx_start_firmware(ha) == QLA_ERROR) 1146 if (qla4xxx_start_firmware(ha) == QLA_ERROR)
1128 return status; 1147 goto exit_init_hba;
1129 1148
1130 if (qla4xxx_validate_mac_address(ha) == QLA_ERROR) 1149 if (qla4xxx_validate_mac_address(ha) == QLA_ERROR)
1131 return status; 1150 goto exit_init_hba;
1132 1151
1133 if (qla4xxx_init_local_data(ha) == QLA_ERROR) 1152 if (qla4xxx_init_local_data(ha) == QLA_ERROR)
1134 return status; 1153 goto exit_init_hba;
1135 1154
1136 status = qla4xxx_init_firmware(ha); 1155 status = qla4xxx_init_firmware(ha);
1137 if (status == QLA_ERROR) 1156 if (status == QLA_ERROR)
1138 return status; 1157 goto exit_init_hba;
1139 1158
1140 /* 1159 /*
1141 * FW is waiting to get an IP address from DHCP server: Skip building 1160 * FW is waiting to get an IP address from DHCP server: Skip building
@@ -1143,12 +1162,12 @@ int qla4xxx_initialize_adapter(struct scsi_qla_host *ha,
1143 * followed by 0x8014 aen" to trigger the tgt discovery process. 1162 * followed by 0x8014 aen" to trigger the tgt discovery process.
1144 */ 1163 */
1145 if (ha->firmware_state & FW_STATE_DHCP_IN_PROGRESS) 1164 if (ha->firmware_state & FW_STATE_DHCP_IN_PROGRESS)
1146 return status; 1165 goto exit_init_online;
1147 1166
1148 /* Skip device discovery if ip and subnet is zero */ 1167 /* Skip device discovery if ip and subnet is zero */
1149 if (memcmp(ha->ip_address, ip_address, IP_ADDR_LEN) == 0 || 1168 if (memcmp(ha->ip_address, ip_address, IP_ADDR_LEN) == 0 ||
1150 memcmp(ha->subnet_mask, ip_address, IP_ADDR_LEN) == 0) 1169 memcmp(ha->subnet_mask, ip_address, IP_ADDR_LEN) == 0)
1151 return status; 1170 goto exit_init_online;
1152 1171
1153 if (renew_ddb_list == PRESERVE_DDB_LIST) { 1172 if (renew_ddb_list == PRESERVE_DDB_LIST) {
1154 /* 1173 /*
@@ -1177,9 +1196,10 @@ int qla4xxx_initialize_adapter(struct scsi_qla_host *ha,
1177 ha->host_no)); 1196 ha->host_no));
1178 } 1197 }
1179 1198
1180 exit_init_hba: 1199exit_init_online:
1200 set_bit(AF_ONLINE, &ha->flags);
1201exit_init_hba:
1181 return status; 1202 return status;
1182
1183} 1203}
1184 1204
1185/** 1205/**
@@ -1193,9 +1213,10 @@ static void qla4xxx_add_device_dynamically(struct scsi_qla_host *ha,
1193 uint32_t fw_ddb_index) 1213 uint32_t fw_ddb_index)
1194{ 1214{
1195 struct ddb_entry * ddb_entry; 1215 struct ddb_entry * ddb_entry;
1216 uint32_t new_tgt;
1196 1217
1197 /* First allocate a device structure */ 1218 /* First allocate a device structure */
1198 ddb_entry = qla4xxx_get_ddb_entry(ha, fw_ddb_index); 1219 ddb_entry = qla4xxx_get_ddb_entry(ha, fw_ddb_index, &new_tgt);
1199 if (ddb_entry == NULL) { 1220 if (ddb_entry == NULL) {
1200 DEBUG2(printk(KERN_WARNING 1221 DEBUG2(printk(KERN_WARNING
1201 "scsi%ld: Unable to allocate memory to add " 1222 "scsi%ld: Unable to allocate memory to add "
@@ -1203,6 +1224,18 @@ static void qla4xxx_add_device_dynamically(struct scsi_qla_host *ha,
1203 return; 1224 return;
1204 } 1225 }
1205 1226
1227 if (!new_tgt && (ddb_entry->fw_ddb_index != fw_ddb_index)) {
1228 /* Target has been bound to a new fw_ddb_index */
1229 qla4xxx_free_ddb(ha, ddb_entry);
1230 ddb_entry = qla4xxx_alloc_ddb(ha, fw_ddb_index);
1231 if (ddb_entry == NULL) {
1232 DEBUG2(printk(KERN_WARNING
1233 "scsi%ld: Unable to allocate memory"
1234 " to add fw_ddb_index %d\n",
1235 ha->host_no, fw_ddb_index));
1236 return;
1237 }
1238 }
1206 if (qla4xxx_update_ddb_entry(ha, ddb_entry, fw_ddb_index) == 1239 if (qla4xxx_update_ddb_entry(ha, ddb_entry, fw_ddb_index) ==
1207 QLA_ERROR) { 1240 QLA_ERROR) {
1208 ha->fw_ddb_index_map[fw_ddb_index] = 1241 ha->fw_ddb_index_map[fw_ddb_index] =
diff --git a/drivers/scsi/qla4xxx/ql4_iocb.c b/drivers/scsi/qla4xxx/ql4_iocb.c
index a216a1781afb..5006ecb3ef5e 100644
--- a/drivers/scsi/qla4xxx/ql4_iocb.c
+++ b/drivers/scsi/qla4xxx/ql4_iocb.c
@@ -6,6 +6,10 @@
6 */ 6 */
7 7
8#include "ql4_def.h" 8#include "ql4_def.h"
9#include "ql4_glbl.h"
10#include "ql4_dbg.h"
11#include "ql4_inline.h"
12
9 13
10#include <scsi/scsi_tcq.h> 14#include <scsi/scsi_tcq.h>
11 15
@@ -141,11 +145,13 @@ static void qla4xxx_build_scsi_iocbs(struct srb *srb,
141 uint16_t avail_dsds; 145 uint16_t avail_dsds;
142 struct data_seg_a64 *cur_dsd; 146 struct data_seg_a64 *cur_dsd;
143 struct scsi_cmnd *cmd; 147 struct scsi_cmnd *cmd;
148 struct scatterlist *sg;
149 int i;
144 150
145 cmd = srb->cmd; 151 cmd = srb->cmd;
146 ha = srb->ha; 152 ha = srb->ha;
147 153
148 if (cmd->request_bufflen == 0 || cmd->sc_data_direction == DMA_NONE) { 154 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
149 /* No data being transferred */ 155 /* No data being transferred */
150 cmd_entry->ttlByteCnt = __constant_cpu_to_le32(0); 156 cmd_entry->ttlByteCnt = __constant_cpu_to_le32(0);
151 return; 157 return;
@@ -154,40 +160,27 @@ static void qla4xxx_build_scsi_iocbs(struct srb *srb,
154 avail_dsds = COMMAND_SEG; 160 avail_dsds = COMMAND_SEG;
155 cur_dsd = (struct data_seg_a64 *) & (cmd_entry->dataseg[0]); 161 cur_dsd = (struct data_seg_a64 *) & (cmd_entry->dataseg[0]);
156 162
157 /* Load data segments */ 163 scsi_for_each_sg(cmd, sg, tot_dsds, i) {
158 if (cmd->use_sg) { 164 dma_addr_t sle_dma;
159 struct scatterlist *cur_seg; 165
160 struct scatterlist *end_seg; 166 /* Allocate additional continuation packets? */
161 167 if (avail_dsds == 0) {
162 cur_seg = (struct scatterlist *)cmd->request_buffer; 168 struct continuation_t1_entry *cont_entry;
163 end_seg = cur_seg + tot_dsds; 169
164 while (cur_seg < end_seg) { 170 cont_entry = qla4xxx_alloc_cont_entry(ha);
165 dma_addr_t sle_dma; 171 cur_dsd =
166 172 (struct data_seg_a64 *)
167 /* Allocate additional continuation packets? */ 173 &cont_entry->dataseg[0];
168 if (avail_dsds == 0) { 174 avail_dsds = CONTINUE_SEG;
169 struct continuation_t1_entry *cont_entry;
170
171 cont_entry = qla4xxx_alloc_cont_entry(ha);
172 cur_dsd =
173 (struct data_seg_a64 *)
174 &cont_entry->dataseg[0];
175 avail_dsds = CONTINUE_SEG;
176 }
177
178 sle_dma = sg_dma_address(cur_seg);
179 cur_dsd->base.addrLow = cpu_to_le32(LSDW(sle_dma));
180 cur_dsd->base.addrHigh = cpu_to_le32(MSDW(sle_dma));
181 cur_dsd->count = cpu_to_le32(sg_dma_len(cur_seg));
182 avail_dsds--;
183
184 cur_dsd++;
185 cur_seg++;
186 } 175 }
187 } else { 176
188 cur_dsd->base.addrLow = cpu_to_le32(LSDW(srb->dma_handle)); 177 sle_dma = sg_dma_address(sg);
189 cur_dsd->base.addrHigh = cpu_to_le32(MSDW(srb->dma_handle)); 178 cur_dsd->base.addrLow = cpu_to_le32(LSDW(sle_dma));
190 cur_dsd->count = cpu_to_le32(cmd->request_bufflen); 179 cur_dsd->base.addrHigh = cpu_to_le32(MSDW(sle_dma));
180 cur_dsd->count = cpu_to_le32(sg_dma_len(sg));
181 avail_dsds--;
182
183 cur_dsd++;
191 } 184 }
192} 185}
193 186
@@ -204,8 +197,8 @@ int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb)
204 struct scsi_cmnd *cmd = srb->cmd; 197 struct scsi_cmnd *cmd = srb->cmd;
205 struct ddb_entry *ddb_entry; 198 struct ddb_entry *ddb_entry;
206 struct command_t3_entry *cmd_entry; 199 struct command_t3_entry *cmd_entry;
207 struct scatterlist *sg = NULL;
208 200
201 int nseg;
209 uint16_t tot_dsds; 202 uint16_t tot_dsds;
210 uint16_t req_cnt; 203 uint16_t req_cnt;
211 204
@@ -233,24 +226,11 @@ int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb)
233 index = (uint32_t)cmd->request->tag; 226 index = (uint32_t)cmd->request->tag;
234 227
235 /* Calculate the number of request entries needed. */ 228 /* Calculate the number of request entries needed. */
236 if (cmd->use_sg) { 229 nseg = scsi_dma_map(cmd);
237 sg = (struct scatterlist *)cmd->request_buffer; 230 if (nseg < 0)
238 tot_dsds = pci_map_sg(ha->pdev, sg, cmd->use_sg, 231 goto queuing_error;
239 cmd->sc_data_direction); 232 tot_dsds = nseg;
240 if (tot_dsds == 0) 233
241 goto queuing_error;
242 } else if (cmd->request_bufflen) {
243 dma_addr_t req_dma;
244
245 req_dma = pci_map_single(ha->pdev, cmd->request_buffer,
246 cmd->request_bufflen,
247 cmd->sc_data_direction);
248 if (dma_mapping_error(req_dma))
249 goto queuing_error;
250
251 srb->dma_handle = req_dma;
252 tot_dsds = 1;
253 }
254 req_cnt = qla4xxx_calc_request_entries(tot_dsds); 234 req_cnt = qla4xxx_calc_request_entries(tot_dsds);
255 235
256 if (ha->req_q_count < (req_cnt + 2)) { 236 if (ha->req_q_count < (req_cnt + 2)) {
@@ -279,7 +259,7 @@ int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb)
279 259
280 int_to_scsilun(cmd->device->lun, &cmd_entry->lun); 260 int_to_scsilun(cmd->device->lun, &cmd_entry->lun);
281 cmd_entry->cmdSeqNum = cpu_to_le32(ddb_entry->CmdSn); 261 cmd_entry->cmdSeqNum = cpu_to_le32(ddb_entry->CmdSn);
282 cmd_entry->ttlByteCnt = cpu_to_le32(cmd->request_bufflen); 262 cmd_entry->ttlByteCnt = cpu_to_le32(scsi_bufflen(cmd));
283 memcpy(cmd_entry->cdb, cmd->cmnd, cmd->cmd_len); 263 memcpy(cmd_entry->cdb, cmd->cmnd, cmd->cmd_len);
284 cmd_entry->dataSegCnt = cpu_to_le16(tot_dsds); 264 cmd_entry->dataSegCnt = cpu_to_le16(tot_dsds);
285 cmd_entry->hdr.entryCount = req_cnt; 265 cmd_entry->hdr.entryCount = req_cnt;
@@ -289,13 +269,13 @@ int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb)
289 * transferred, as the data direction bit is sometimed filled 269 * transferred, as the data direction bit is sometimed filled
290 * in when there is no data to be transferred */ 270 * in when there is no data to be transferred */
291 cmd_entry->control_flags = CF_NO_DATA; 271 cmd_entry->control_flags = CF_NO_DATA;
292 if (cmd->request_bufflen) { 272 if (scsi_bufflen(cmd)) {
293 if (cmd->sc_data_direction == DMA_TO_DEVICE) 273 if (cmd->sc_data_direction == DMA_TO_DEVICE)
294 cmd_entry->control_flags = CF_WRITE; 274 cmd_entry->control_flags = CF_WRITE;
295 else if (cmd->sc_data_direction == DMA_FROM_DEVICE) 275 else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
296 cmd_entry->control_flags = CF_READ; 276 cmd_entry->control_flags = CF_READ;
297 277
298 ha->bytes_xfered += cmd->request_bufflen; 278 ha->bytes_xfered += scsi_bufflen(cmd);
299 if (ha->bytes_xfered & ~0xFFFFF){ 279 if (ha->bytes_xfered & ~0xFFFFF){
300 ha->total_mbytes_xferred += ha->bytes_xfered >> 20; 280 ha->total_mbytes_xferred += ha->bytes_xfered >> 20;
301 ha->bytes_xfered &= 0xFFFFF; 281 ha->bytes_xfered &= 0xFFFFF;
@@ -359,14 +339,9 @@ int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb)
359 return QLA_SUCCESS; 339 return QLA_SUCCESS;
360 340
361queuing_error: 341queuing_error:
342 if (tot_dsds)
343 scsi_dma_unmap(cmd);
362 344
363 if (cmd->use_sg && tot_dsds) {
364 sg = (struct scatterlist *) cmd->request_buffer;
365 pci_unmap_sg(ha->pdev, sg, cmd->use_sg,
366 cmd->sc_data_direction);
367 } else if (tot_dsds)
368 pci_unmap_single(ha->pdev, srb->dma_handle,
369 cmd->request_bufflen, cmd->sc_data_direction);
370 spin_unlock_irqrestore(&ha->hardware_lock, flags); 345 spin_unlock_irqrestore(&ha->hardware_lock, flags);
371 346
372 return QLA_ERROR; 347 return QLA_ERROR;
diff --git a/drivers/scsi/qla4xxx/ql4_isr.c b/drivers/scsi/qla4xxx/ql4_isr.c
index 35b9e36a0e8d..4a154beb0d39 100644
--- a/drivers/scsi/qla4xxx/ql4_isr.c
+++ b/drivers/scsi/qla4xxx/ql4_isr.c
@@ -6,6 +6,9 @@
6 */ 6 */
7 7
8#include "ql4_def.h" 8#include "ql4_def.h"
9#include "ql4_glbl.h"
10#include "ql4_dbg.h"
11#include "ql4_inline.h"
9 12
10/** 13/**
11 * qla2x00_process_completed_request() - Process a Fast Post response. 14 * qla2x00_process_completed_request() - Process a Fast Post response.
@@ -90,9 +93,29 @@ static void qla4xxx_status_entry(struct scsi_qla_host *ha,
90 break; 93 break;
91 } 94 }
92 95
93 if (sts_entry->iscsiFlags & 96 if (sts_entry->iscsiFlags & ISCSI_FLAG_RESIDUAL_OVER) {
94 (ISCSI_FLAG_RESIDUAL_OVER|ISCSI_FLAG_RESIDUAL_UNDER)) 97 cmd->result = DID_ERROR << 16;
95 cmd->resid = residual; 98 break;
99 }
100
101 if (sts_entry->iscsiFlags &ISCSI_FLAG_RESIDUAL_UNDER) {
102 scsi_set_resid(cmd, residual);
103 if (!scsi_status && ((scsi_bufflen(cmd) - residual) <
104 cmd->underflow)) {
105
106 cmd->result = DID_ERROR << 16;
107
108 DEBUG2(printk("scsi%ld:%d:%d:%d: %s: "
109 "Mid-layer Data underrun0, "
110 "xferlen = 0x%x, "
111 "residual = 0x%x\n", ha->host_no,
112 cmd->device->channel,
113 cmd->device->id,
114 cmd->device->lun, __func__,
115 scsi_bufflen(cmd), residual));
116 break;
117 }
118 }
96 119
97 cmd->result = DID_OK << 16 | scsi_status; 120 cmd->result = DID_OK << 16 | scsi_status;
98 121
@@ -161,7 +184,8 @@ static void qla4xxx_status_entry(struct scsi_qla_host *ha,
161 184
162 case SCS_DATA_UNDERRUN: 185 case SCS_DATA_UNDERRUN:
163 case SCS_DATA_OVERRUN: 186 case SCS_DATA_OVERRUN:
164 if (sts_entry->iscsiFlags & ISCSI_FLAG_RESIDUAL_OVER) { 187 if ((sts_entry->iscsiFlags & ISCSI_FLAG_RESIDUAL_OVER) ||
188 (sts_entry->completionStatus == SCS_DATA_OVERRUN)) {
165 DEBUG2(printk("scsi%ld:%d:%d:%d: %s: " "Data overrun, " 189 DEBUG2(printk("scsi%ld:%d:%d:%d: %s: " "Data overrun, "
166 "residual = 0x%x\n", ha->host_no, 190 "residual = 0x%x\n", ha->host_no,
167 cmd->device->channel, cmd->device->id, 191 cmd->device->channel, cmd->device->id,
@@ -171,21 +195,7 @@ static void qla4xxx_status_entry(struct scsi_qla_host *ha,
171 break; 195 break;
172 } 196 }
173 197
174 if ((sts_entry->iscsiFlags & ISCSI_FLAG_RESIDUAL_UNDER) == 0) { 198 scsi_set_resid(cmd, residual);
175 /*
176 * Firmware detected a SCSI transport underrun
177 * condition
178 */
179 cmd->resid = residual;
180 DEBUG2(printk("scsi%ld:%d:%d:%d: %s: UNDERRUN status "
181 "detected, xferlen = 0x%x, residual = "
182 "0x%x\n",
183 ha->host_no, cmd->device->channel,
184 cmd->device->id,
185 cmd->device->lun, __func__,
186 cmd->request_bufflen,
187 residual));
188 }
189 199
190 /* 200 /*
191 * If there is scsi_status, it takes precedense over 201 * If there is scsi_status, it takes precedense over
@@ -227,7 +237,7 @@ static void qla4xxx_status_entry(struct scsi_qla_host *ha,
227 if ((sts_entry->iscsiFlags & 237 if ((sts_entry->iscsiFlags &
228 ISCSI_FLAG_RESIDUAL_UNDER) == 0) { 238 ISCSI_FLAG_RESIDUAL_UNDER) == 0) {
229 cmd->result = DID_BUS_BUSY << 16; 239 cmd->result = DID_BUS_BUSY << 16;
230 } else if ((cmd->request_bufflen - residual) < 240 } else if ((scsi_bufflen(cmd) - residual) <
231 cmd->underflow) { 241 cmd->underflow) {
232 /* 242 /*
233 * Handle mid-layer underflow??? 243 * Handle mid-layer underflow???
@@ -242,13 +252,13 @@ static void qla4xxx_status_entry(struct scsi_qla_host *ha,
242 * will return DID_ERROR. 252 * will return DID_ERROR.
243 */ 253 */
244 DEBUG2(printk("scsi%ld:%d:%d:%d: %s: " 254 DEBUG2(printk("scsi%ld:%d:%d:%d: %s: "
245 "Mid-layer Data underrun, " 255 "Mid-layer Data underrun1, "
246 "xferlen = 0x%x, " 256 "xferlen = 0x%x, "
247 "residual = 0x%x\n", ha->host_no, 257 "residual = 0x%x\n", ha->host_no,
248 cmd->device->channel, 258 cmd->device->channel,
249 cmd->device->id, 259 cmd->device->id,
250 cmd->device->lun, __func__, 260 cmd->device->lun, __func__,
251 cmd->request_bufflen, residual)); 261 scsi_bufflen(cmd), residual));
252 262
253 cmd->result = DID_ERROR << 16; 263 cmd->result = DID_ERROR << 16;
254 } else { 264 } else {
@@ -417,6 +427,7 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha,
417 uint32_t mbox_status) 427 uint32_t mbox_status)
418{ 428{
419 int i; 429 int i;
430 uint32_t mbox_stat2, mbox_stat3;
420 431
421 if ((mbox_status == MBOX_STS_BUSY) || 432 if ((mbox_status == MBOX_STS_BUSY) ||
422 (mbox_status == MBOX_STS_INTERMEDIATE_COMPLETION) || 433 (mbox_status == MBOX_STS_INTERMEDIATE_COMPLETION) ||
@@ -437,6 +448,12 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha,
437 } else if (mbox_status >> 12 == MBOX_ASYNC_EVENT_STATUS) { 448 } else if (mbox_status >> 12 == MBOX_ASYNC_EVENT_STATUS) {
438 /* Immediately process the AENs that don't require much work. 449 /* Immediately process the AENs that don't require much work.
439 * Only queue the database_changed AENs */ 450 * Only queue the database_changed AENs */
451 if (ha->aen_log.count < MAX_AEN_ENTRIES) {
452 for (i = 0; i < MBOX_AEN_REG_COUNT; i++)
453 ha->aen_log.entry[ha->aen_log.count].mbox_sts[i] =
454 readl(&ha->reg->mailbox[i]);
455 ha->aen_log.count++;
456 }
440 switch (mbox_status) { 457 switch (mbox_status) {
441 case MBOX_ASTS_SYSTEM_ERROR: 458 case MBOX_ASTS_SYSTEM_ERROR:
442 /* Log Mailbox registers */ 459 /* Log Mailbox registers */
@@ -493,6 +510,16 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha,
493 mbox_status)); 510 mbox_status));
494 break; 511 break;
495 512
513 case MBOX_ASTS_IP_ADDR_STATE_CHANGED:
514 mbox_stat2 = readl(&ha->reg->mailbox[2]);
515 mbox_stat3 = readl(&ha->reg->mailbox[3]);
516
517 if ((mbox_stat3 == 5) && (mbox_stat2 == 3))
518 set_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags);
519 else if ((mbox_stat3 == 2) && (mbox_stat2 == 5))
520 set_bit(DPC_RESET_HA, &ha->dpc_flags);
521 break;
522
496 case MBOX_ASTS_MAC_ADDRESS_CHANGED: 523 case MBOX_ASTS_MAC_ADDRESS_CHANGED:
497 case MBOX_ASTS_DNS: 524 case MBOX_ASTS_DNS:
498 /* No action */ 525 /* No action */
@@ -518,11 +545,6 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha,
518 /* Queue AEN information and process it in the DPC 545 /* Queue AEN information and process it in the DPC
519 * routine */ 546 * routine */
520 if (ha->aen_q_count > 0) { 547 if (ha->aen_q_count > 0) {
521 /* advance pointer */
522 if (ha->aen_in == (MAX_AEN_ENTRIES - 1))
523 ha->aen_in = 0;
524 else
525 ha->aen_in++;
526 548
527 /* decrement available counter */ 549 /* decrement available counter */
528 ha->aen_q_count--; 550 ha->aen_q_count--;
@@ -542,6 +564,10 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha,
542 ha->aen_q[ha->aen_in].mbox_sts[2], 564 ha->aen_q[ha->aen_in].mbox_sts[2],
543 ha->aen_q[ha->aen_in].mbox_sts[3], 565 ha->aen_q[ha->aen_in].mbox_sts[3],
544 ha->aen_q[ha->aen_in]. mbox_sts[4])); 566 ha->aen_q[ha->aen_in]. mbox_sts[4]));
567 /* advance pointer */
568 ha->aen_in++;
569 if (ha->aen_in == MAX_AEN_ENTRIES)
570 ha->aen_in = 0;
545 571
546 /* The DPC routine will process the aen */ 572 /* The DPC routine will process the aen */
547 set_bit(DPC_AEN, &ha->dpc_flags); 573 set_bit(DPC_AEN, &ha->dpc_flags);
@@ -724,25 +750,24 @@ void qla4xxx_process_aen(struct scsi_qla_host * ha, uint8_t process_aen)
724 750
725 spin_lock_irqsave(&ha->hardware_lock, flags); 751 spin_lock_irqsave(&ha->hardware_lock, flags);
726 while (ha->aen_out != ha->aen_in) { 752 while (ha->aen_out != ha->aen_in) {
727 /* Advance pointers for next entry */
728 if (ha->aen_out == (MAX_AEN_ENTRIES - 1))
729 ha->aen_out = 0;
730 else
731 ha->aen_out++;
732
733 ha->aen_q_count++;
734 aen = &ha->aen_q[ha->aen_out]; 753 aen = &ha->aen_q[ha->aen_out];
735
736 /* copy aen information to local structure */ 754 /* copy aen information to local structure */
737 for (i = 0; i < MBOX_AEN_REG_COUNT; i++) 755 for (i = 0; i < MBOX_AEN_REG_COUNT; i++)
738 mbox_sts[i] = aen->mbox_sts[i]; 756 mbox_sts[i] = aen->mbox_sts[i];
739 757
758 ha->aen_q_count++;
759 ha->aen_out++;
760
761 if (ha->aen_out == MAX_AEN_ENTRIES)
762 ha->aen_out = 0;
763
740 spin_unlock_irqrestore(&ha->hardware_lock, flags); 764 spin_unlock_irqrestore(&ha->hardware_lock, flags);
741 765
742 DEBUG(printk("scsi%ld: AEN[%d] %04x, index [%d] state=%04x " 766 DEBUG2(printk("qla4xxx(%ld): AEN[%d]=0x%08x, mbx1=0x%08x mbx2=0x%08x"
743 "mod=%x conerr=%08x \n", ha->host_no, ha->aen_out, 767 " mbx3=0x%08x mbx4=0x%08x\n", ha->host_no,
744 mbox_sts[0], mbox_sts[2], mbox_sts[3], 768 (ha->aen_out ? (ha->aen_out-1): (MAX_AEN_ENTRIES-1)),
745 mbox_sts[1], mbox_sts[4])); 769 mbox_sts[0], mbox_sts[1], mbox_sts[2],
770 mbox_sts[3], mbox_sts[4]));
746 771
747 switch (mbox_sts[0]) { 772 switch (mbox_sts[0]) {
748 case MBOX_ASTS_DATABASE_CHANGED: 773 case MBOX_ASTS_DATABASE_CHANGED:
@@ -792,6 +817,5 @@ void qla4xxx_process_aen(struct scsi_qla_host * ha, uint8_t process_aen)
792 spin_lock_irqsave(&ha->hardware_lock, flags); 817 spin_lock_irqsave(&ha->hardware_lock, flags);
793 } 818 }
794 spin_unlock_irqrestore(&ha->hardware_lock, flags); 819 spin_unlock_irqrestore(&ha->hardware_lock, flags);
795
796} 820}
797 821
diff --git a/drivers/scsi/qla4xxx/ql4_mbx.c b/drivers/scsi/qla4xxx/ql4_mbx.c
index f116ff917237..35cd73c72a68 100644
--- a/drivers/scsi/qla4xxx/ql4_mbx.c
+++ b/drivers/scsi/qla4xxx/ql4_mbx.c
@@ -6,6 +6,9 @@
6 */ 6 */
7 7
8#include "ql4_def.h" 8#include "ql4_def.h"
9#include "ql4_glbl.h"
10#include "ql4_dbg.h"
11#include "ql4_inline.h"
9 12
10 13
11/** 14/**
@@ -169,84 +172,6 @@ mbox_exit:
169 return status; 172 return status;
170} 173}
171 174
172
173#if 0
174
175/**
176 * qla4xxx_issue_iocb - issue mailbox iocb command
177 * @ha: adapter state pointer.
178 * @buffer: buffer pointer.
179 * @phys_addr: physical address of buffer.
180 * @size: size of buffer.
181 *
182 * Issues iocbs via mailbox commands.
183 * TARGET_QUEUE_LOCK must be released.
184 * ADAPTER_STATE_LOCK must be released.
185 **/
186int
187qla4xxx_issue_iocb(struct scsi_qla_host * ha, void *buffer,
188 dma_addr_t phys_addr, size_t size)
189{
190 uint32_t mbox_cmd[MBOX_REG_COUNT];
191 uint32_t mbox_sts[MBOX_REG_COUNT];
192 int status;
193
194 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
195 memset(&mbox_sts, 0, sizeof(mbox_sts));
196 mbox_cmd[0] = MBOX_CMD_EXECUTE_IOCB_A64;
197 mbox_cmd[1] = 0;
198 mbox_cmd[2] = LSDW(phys_addr);
199 mbox_cmd[3] = MSDW(phys_addr);
200 status = qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]);
201 return status;
202}
203
204int qla4xxx_conn_close_sess_logout(struct scsi_qla_host * ha,
205 uint16_t fw_ddb_index,
206 uint16_t connection_id,
207 uint16_t option)
208{
209 uint32_t mbox_cmd[MBOX_REG_COUNT];
210 uint32_t mbox_sts[MBOX_REG_COUNT];
211
212 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
213 memset(&mbox_sts, 0, sizeof(mbox_sts));
214 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
215 mbox_cmd[1] = fw_ddb_index;
216 mbox_cmd[2] = connection_id;
217 mbox_cmd[3] = LOGOUT_OPTION_RELOGIN;
218 if (qla4xxx_mailbox_command(ha, 4, 2, &mbox_cmd[0], &mbox_sts[0]) !=
219 QLA_SUCCESS) {
220 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_CONN_CLOSE_SESS_LOGOUT "
221 "option %04x failed sts %04X %04X",
222 ha->host_no, __func__,
223 option, mbox_sts[0], mbox_sts[1]));
224 if (mbox_sts[0] == 0x4005)
225 DEBUG2(printk("%s reason %04X\n", __func__,
226 mbox_sts[1]));
227 }
228 return QLA_SUCCESS;
229}
230
231int qla4xxx_clear_database_entry(struct scsi_qla_host * ha,
232 uint16_t fw_ddb_index)
233{
234 uint32_t mbox_cmd[MBOX_REG_COUNT];
235 uint32_t mbox_sts[MBOX_REG_COUNT];
236
237 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
238 memset(&mbox_sts, 0, sizeof(mbox_sts));
239 mbox_cmd[0] = MBOX_CMD_CLEAR_DATABASE_ENTRY;
240 mbox_cmd[1] = fw_ddb_index;
241 if (qla4xxx_mailbox_command(ha, 2, 5, &mbox_cmd[0], &mbox_sts[0]) !=
242 QLA_SUCCESS)
243 return QLA_ERROR;
244
245 return QLA_SUCCESS;
246}
247
248#endif /* 0 */
249
250/** 175/**
251 * qla4xxx_initialize_fw_cb - initializes firmware control block. 176 * qla4xxx_initialize_fw_cb - initializes firmware control block.
252 * @ha: Pointer to host adapter structure. 177 * @ha: Pointer to host adapter structure.
@@ -272,10 +197,13 @@ int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
272 /* Get Initialize Firmware Control Block. */ 197 /* Get Initialize Firmware Control Block. */
273 memset(&mbox_cmd, 0, sizeof(mbox_cmd)); 198 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
274 memset(&mbox_sts, 0, sizeof(mbox_sts)); 199 memset(&mbox_sts, 0, sizeof(mbox_sts));
200
275 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK; 201 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
276 mbox_cmd[2] = LSDW(init_fw_cb_dma); 202 mbox_cmd[2] = LSDW(init_fw_cb_dma);
277 mbox_cmd[3] = MSDW(init_fw_cb_dma); 203 mbox_cmd[3] = MSDW(init_fw_cb_dma);
278 if (qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]) != 204 mbox_cmd[4] = sizeof(struct init_fw_ctrl_blk);
205
206 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
279 QLA_SUCCESS) { 207 QLA_SUCCESS) {
280 dma_free_coherent(&ha->pdev->dev, 208 dma_free_coherent(&ha->pdev->dev,
281 sizeof(struct init_fw_ctrl_blk), 209 sizeof(struct init_fw_ctrl_blk),
@@ -287,51 +215,56 @@ int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
287 qla4xxx_init_rings(ha); 215 qla4xxx_init_rings(ha);
288 216
289 /* Fill in the request and response queue information. */ 217 /* Fill in the request and response queue information. */
290 init_fw_cb->ReqQConsumerIndex = cpu_to_le16(ha->request_out); 218 init_fw_cb->pri.rqq_consumer_idx = cpu_to_le16(ha->request_out);
291 init_fw_cb->ComplQProducerIndex = cpu_to_le16(ha->response_in); 219 init_fw_cb->pri.compq_producer_idx = cpu_to_le16(ha->response_in);
292 init_fw_cb->ReqQLen = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH); 220 init_fw_cb->pri.rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
293 init_fw_cb->ComplQLen = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH); 221 init_fw_cb->pri.compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
294 init_fw_cb->ReqQAddrLo = cpu_to_le32(LSDW(ha->request_dma)); 222 init_fw_cb->pri.rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
295 init_fw_cb->ReqQAddrHi = cpu_to_le32(MSDW(ha->request_dma)); 223 init_fw_cb->pri.rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
296 init_fw_cb->ComplQAddrLo = cpu_to_le32(LSDW(ha->response_dma)); 224 init_fw_cb->pri.compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
297 init_fw_cb->ComplQAddrHi = cpu_to_le32(MSDW(ha->response_dma)); 225 init_fw_cb->pri.compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
298 init_fw_cb->ShadowRegBufAddrLo = 226 init_fw_cb->pri.shdwreg_addr_lo =
299 cpu_to_le32(LSDW(ha->shadow_regs_dma)); 227 cpu_to_le32(LSDW(ha->shadow_regs_dma));
300 init_fw_cb->ShadowRegBufAddrHi = 228 init_fw_cb->pri.shdwreg_addr_hi =
301 cpu_to_le32(MSDW(ha->shadow_regs_dma)); 229 cpu_to_le32(MSDW(ha->shadow_regs_dma));
302 230
303 /* Set up required options. */ 231 /* Set up required options. */
304 init_fw_cb->FwOptions |= 232 init_fw_cb->pri.fw_options |=
305 __constant_cpu_to_le16(FWOPT_SESSION_MODE | 233 __constant_cpu_to_le16(FWOPT_SESSION_MODE |
306 FWOPT_INITIATOR_MODE); 234 FWOPT_INITIATOR_MODE);
307 init_fw_cb->FwOptions &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE); 235 init_fw_cb->pri.fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
308 236
309 /* Save some info in adapter structure. */ 237 /* Save some info in adapter structure. */
310 ha->firmware_options = le16_to_cpu(init_fw_cb->FwOptions); 238 ha->firmware_options = le16_to_cpu(init_fw_cb->pri.fw_options);
311 ha->tcp_options = le16_to_cpu(init_fw_cb->TCPOptions); 239 ha->tcp_options = le16_to_cpu(init_fw_cb->pri.ipv4_tcp_opts);
312 ha->heartbeat_interval = init_fw_cb->HeartbeatInterval; 240 ha->heartbeat_interval = init_fw_cb->pri.hb_interval;
313 memcpy(ha->ip_address, init_fw_cb->IPAddr, 241 memcpy(ha->ip_address, init_fw_cb->pri.ipv4_addr,
314 min(sizeof(ha->ip_address), sizeof(init_fw_cb->IPAddr))); 242 min(sizeof(ha->ip_address), sizeof(init_fw_cb->pri.ipv4_addr)));
315 memcpy(ha->subnet_mask, init_fw_cb->SubnetMask, 243 memcpy(ha->subnet_mask, init_fw_cb->pri.ipv4_subnet,
316 min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->SubnetMask))); 244 min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->pri.ipv4_subnet)));
317 memcpy(ha->gateway, init_fw_cb->GatewayIPAddr, 245 memcpy(ha->gateway, init_fw_cb->pri.ipv4_gw_addr,
318 min(sizeof(ha->gateway), sizeof(init_fw_cb->GatewayIPAddr))); 246 min(sizeof(ha->gateway), sizeof(init_fw_cb->pri.ipv4_gw_addr)));
319 memcpy(ha->name_string, init_fw_cb->iSCSINameString, 247 memcpy(ha->name_string, init_fw_cb->pri.iscsi_name,
320 min(sizeof(ha->name_string), 248 min(sizeof(ha->name_string),
321 sizeof(init_fw_cb->iSCSINameString))); 249 sizeof(init_fw_cb->pri.iscsi_name)));
322 memcpy(ha->alias, init_fw_cb->Alias, 250 /*memcpy(ha->alias, init_fw_cb->Alias,
323 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias))); 251 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
324 252
325 /* Save Command Line Paramater info */ 253 /* Save Command Line Paramater info */
326 ha->port_down_retry_count = le16_to_cpu(init_fw_cb->KeepAliveTimeout); 254 ha->port_down_retry_count = le16_to_cpu(init_fw_cb->pri.conn_ka_timeout);
327 ha->discovery_wait = ql4xdiscoverywait; 255 ha->discovery_wait = ql4xdiscoverywait;
328 256
329 /* Send Initialize Firmware Control Block. */ 257 /* Send Initialize Firmware Control Block. */
258 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
259 memset(&mbox_sts, 0, sizeof(mbox_sts));
260
330 mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE; 261 mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
331 mbox_cmd[1] = 0; 262 mbox_cmd[1] = 0;
332 mbox_cmd[2] = LSDW(init_fw_cb_dma); 263 mbox_cmd[2] = LSDW(init_fw_cb_dma);
333 mbox_cmd[3] = MSDW(init_fw_cb_dma); 264 mbox_cmd[3] = MSDW(init_fw_cb_dma);
334 if (qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]) == 265 mbox_cmd[4] = sizeof(struct init_fw_ctrl_blk);
266
267 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) ==
335 QLA_SUCCESS) 268 QLA_SUCCESS)
336 status = QLA_SUCCESS; 269 status = QLA_SUCCESS;
337 else { 270 else {
@@ -368,12 +301,14 @@ int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
368 /* Get Initialize Firmware Control Block. */ 301 /* Get Initialize Firmware Control Block. */
369 memset(&mbox_cmd, 0, sizeof(mbox_cmd)); 302 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
370 memset(&mbox_sts, 0, sizeof(mbox_sts)); 303 memset(&mbox_sts, 0, sizeof(mbox_sts));
304
371 memset(init_fw_cb, 0, sizeof(struct init_fw_ctrl_blk)); 305 memset(init_fw_cb, 0, sizeof(struct init_fw_ctrl_blk));
372 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK; 306 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
373 mbox_cmd[2] = LSDW(init_fw_cb_dma); 307 mbox_cmd[2] = LSDW(init_fw_cb_dma);
374 mbox_cmd[3] = MSDW(init_fw_cb_dma); 308 mbox_cmd[3] = MSDW(init_fw_cb_dma);
309 mbox_cmd[4] = sizeof(struct init_fw_ctrl_blk);
375 310
376 if (qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]) != 311 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
377 QLA_SUCCESS) { 312 QLA_SUCCESS) {
378 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n", 313 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
379 ha->host_no, __func__)); 314 ha->host_no, __func__));
@@ -384,12 +319,12 @@ int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
384 } 319 }
385 320
386 /* Save IP Address. */ 321 /* Save IP Address. */
387 memcpy(ha->ip_address, init_fw_cb->IPAddr, 322 memcpy(ha->ip_address, init_fw_cb->pri.ipv4_addr,
388 min(sizeof(ha->ip_address), sizeof(init_fw_cb->IPAddr))); 323 min(sizeof(ha->ip_address), sizeof(init_fw_cb->pri.ipv4_addr)));
389 memcpy(ha->subnet_mask, init_fw_cb->SubnetMask, 324 memcpy(ha->subnet_mask, init_fw_cb->pri.ipv4_subnet,
390 min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->SubnetMask))); 325 min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->pri.ipv4_subnet)));
391 memcpy(ha->gateway, init_fw_cb->GatewayIPAddr, 326 memcpy(ha->gateway, init_fw_cb->pri.ipv4_gw_addr,
392 min(sizeof(ha->gateway), sizeof(init_fw_cb->GatewayIPAddr))); 327 min(sizeof(ha->gateway), sizeof(init_fw_cb->pri.ipv4_gw_addr)));
393 328
394 dma_free_coherent(&ha->pdev->dev, sizeof(struct init_fw_ctrl_blk), 329 dma_free_coherent(&ha->pdev->dev, sizeof(struct init_fw_ctrl_blk),
395 init_fw_cb, init_fw_cb_dma); 330 init_fw_cb, init_fw_cb_dma);
@@ -409,8 +344,10 @@ int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
409 /* Get firmware version */ 344 /* Get firmware version */
410 memset(&mbox_cmd, 0, sizeof(mbox_cmd)); 345 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
411 memset(&mbox_sts, 0, sizeof(mbox_sts)); 346 memset(&mbox_sts, 0, sizeof(mbox_sts));
347
412 mbox_cmd[0] = MBOX_CMD_GET_FW_STATE; 348 mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
413 if (qla4xxx_mailbox_command(ha, 1, 4, &mbox_cmd[0], &mbox_sts[0]) != 349
350 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
414 QLA_SUCCESS) { 351 QLA_SUCCESS) {
415 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ " 352 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
416 "status %04X\n", ha->host_no, __func__, 353 "status %04X\n", ha->host_no, __func__,
@@ -438,8 +375,10 @@ int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
438 /* Get firmware version */ 375 /* Get firmware version */
439 memset(&mbox_cmd, 0, sizeof(mbox_cmd)); 376 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
440 memset(&mbox_sts, 0, sizeof(mbox_sts)); 377 memset(&mbox_sts, 0, sizeof(mbox_sts));
378
441 mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS; 379 mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
442 if (qla4xxx_mailbox_command(ha, 1, 3, &mbox_cmd[0], &mbox_sts[0]) != 380
381 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
443 QLA_SUCCESS) { 382 QLA_SUCCESS) {
444 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ " 383 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
445 "status %04X\n", ha->host_no, __func__, 384 "status %04X\n", ha->host_no, __func__,
@@ -491,11 +430,14 @@ int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
491 } 430 }
492 memset(&mbox_cmd, 0, sizeof(mbox_cmd)); 431 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
493 memset(&mbox_sts, 0, sizeof(mbox_sts)); 432 memset(&mbox_sts, 0, sizeof(mbox_sts));
433
494 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY; 434 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
495 mbox_cmd[1] = (uint32_t) fw_ddb_index; 435 mbox_cmd[1] = (uint32_t) fw_ddb_index;
496 mbox_cmd[2] = LSDW(fw_ddb_entry_dma); 436 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
497 mbox_cmd[3] = MSDW(fw_ddb_entry_dma); 437 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
498 if (qla4xxx_mailbox_command(ha, 4, 7, &mbox_cmd[0], &mbox_sts[0]) == 438 mbox_cmd[4] = sizeof(struct dev_db_entry);
439
440 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
499 QLA_ERROR) { 441 QLA_ERROR) {
500 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed" 442 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
501 " with status 0x%04X\n", ha->host_no, __func__, 443 " with status 0x%04X\n", ha->host_no, __func__,
@@ -512,11 +454,11 @@ int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
512 dev_info(&ha->pdev->dev, "DDB[%d] MB0 %04x Tot %d Next %d " 454 dev_info(&ha->pdev->dev, "DDB[%d] MB0 %04x Tot %d Next %d "
513 "State %04x ConnErr %08x %d.%d.%d.%d:%04d \"%s\"\n", 455 "State %04x ConnErr %08x %d.%d.%d.%d:%04d \"%s\"\n",
514 fw_ddb_index, mbox_sts[0], mbox_sts[2], mbox_sts[3], 456 fw_ddb_index, mbox_sts[0], mbox_sts[2], mbox_sts[3],
515 mbox_sts[4], mbox_sts[5], fw_ddb_entry->ipAddr[0], 457 mbox_sts[4], mbox_sts[5], fw_ddb_entry->ip_addr[0],
516 fw_ddb_entry->ipAddr[1], fw_ddb_entry->ipAddr[2], 458 fw_ddb_entry->ip_addr[1], fw_ddb_entry->ip_addr[2],
517 fw_ddb_entry->ipAddr[3], 459 fw_ddb_entry->ip_addr[3],
518 le16_to_cpu(fw_ddb_entry->portNumber), 460 le16_to_cpu(fw_ddb_entry->port),
519 fw_ddb_entry->iscsiName); 461 fw_ddb_entry->iscsi_name);
520 } 462 }
521 if (num_valid_ddb_entries) 463 if (num_valid_ddb_entries)
522 *num_valid_ddb_entries = mbox_sts[2]; 464 *num_valid_ddb_entries = mbox_sts[2];
@@ -571,35 +513,10 @@ int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
571 mbox_cmd[1] = (uint32_t) fw_ddb_index; 513 mbox_cmd[1] = (uint32_t) fw_ddb_index;
572 mbox_cmd[2] = LSDW(fw_ddb_entry_dma); 514 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
573 mbox_cmd[3] = MSDW(fw_ddb_entry_dma); 515 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
574 return qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]); 516 mbox_cmd[4] = sizeof(struct dev_db_entry);
575}
576 517
577#if 0 518 return qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
578int qla4xxx_conn_open_session_login(struct scsi_qla_host * ha,
579 uint16_t fw_ddb_index)
580{
581 int status = QLA_ERROR;
582 uint32_t mbox_cmd[MBOX_REG_COUNT];
583 uint32_t mbox_sts[MBOX_REG_COUNT];
584
585 /* Do not wait for completion. The firmware will send us an
586 * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
587 */
588 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
589 memset(&mbox_sts, 0, sizeof(mbox_sts));
590 mbox_cmd[0] = MBOX_CMD_CONN_OPEN_SESS_LOGIN;
591 mbox_cmd[1] = (uint32_t) fw_ddb_index;
592 mbox_cmd[2] = 0;
593 mbox_cmd[3] = 0;
594 mbox_cmd[4] = 0;
595 status = qla4xxx_mailbox_command(ha, 4, 0, &mbox_cmd[0], &mbox_sts[0]);
596 DEBUG2(printk("%s fw_ddb_index=%d status=%d mbx0_1=0x%x :0x%x\n",
597 __func__, fw_ddb_index, status, mbox_sts[0],
598 mbox_sts[1]);)
599
600 return status;
601} 519}
602#endif /* 0 */
603 520
604/** 521/**
605 * qla4xxx_get_crash_record - retrieves crash record. 522 * qla4xxx_get_crash_record - retrieves crash record.
@@ -614,12 +531,14 @@ void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
614 struct crash_record *crash_record = NULL; 531 struct crash_record *crash_record = NULL;
615 dma_addr_t crash_record_dma = 0; 532 dma_addr_t crash_record_dma = 0;
616 uint32_t crash_record_size = 0; 533 uint32_t crash_record_size = 0;
534
617 memset(&mbox_cmd, 0, sizeof(mbox_cmd)); 535 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
618 memset(&mbox_sts, 0, sizeof(mbox_cmd)); 536 memset(&mbox_sts, 0, sizeof(mbox_cmd));
619 537
620 /* Get size of crash record. */ 538 /* Get size of crash record. */
621 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD; 539 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
622 if (qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]) != 540
541 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
623 QLA_SUCCESS) { 542 QLA_SUCCESS) {
624 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n", 543 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
625 ha->host_no, __func__)); 544 ha->host_no, __func__));
@@ -639,11 +558,15 @@ void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
639 goto exit_get_crash_record; 558 goto exit_get_crash_record;
640 559
641 /* Get Crash Record. */ 560 /* Get Crash Record. */
561 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
562 memset(&mbox_sts, 0, sizeof(mbox_cmd));
563
642 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD; 564 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
643 mbox_cmd[2] = LSDW(crash_record_dma); 565 mbox_cmd[2] = LSDW(crash_record_dma);
644 mbox_cmd[3] = MSDW(crash_record_dma); 566 mbox_cmd[3] = MSDW(crash_record_dma);
645 mbox_cmd[4] = crash_record_size; 567 mbox_cmd[4] = crash_record_size;
646 if (qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]) != 568
569 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
647 QLA_SUCCESS) 570 QLA_SUCCESS)
648 goto exit_get_crash_record; 571 goto exit_get_crash_record;
649 572
@@ -655,7 +578,6 @@ exit_get_crash_record:
655 crash_record, crash_record_dma); 578 crash_record, crash_record_dma);
656} 579}
657 580
658#if 0
659/** 581/**
660 * qla4xxx_get_conn_event_log - retrieves connection event log 582 * qla4xxx_get_conn_event_log - retrieves connection event log
661 * @ha: Pointer to host adapter structure. 583 * @ha: Pointer to host adapter structure.
@@ -678,7 +600,8 @@ void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
678 600
679 /* Get size of crash record. */ 601 /* Get size of crash record. */
680 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG; 602 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
681 if (qla4xxx_mailbox_command(ha, 4, 5, &mbox_cmd[0], &mbox_sts[0]) != 603
604 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
682 QLA_SUCCESS) 605 QLA_SUCCESS)
683 goto exit_get_event_log; 606 goto exit_get_event_log;
684 607
@@ -693,10 +616,14 @@ void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
693 goto exit_get_event_log; 616 goto exit_get_event_log;
694 617
695 /* Get Crash Record. */ 618 /* Get Crash Record. */
619 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
620 memset(&mbox_sts, 0, sizeof(mbox_cmd));
621
696 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG; 622 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
697 mbox_cmd[2] = LSDW(event_log_dma); 623 mbox_cmd[2] = LSDW(event_log_dma);
698 mbox_cmd[3] = MSDW(event_log_dma); 624 mbox_cmd[3] = MSDW(event_log_dma);
699 if (qla4xxx_mailbox_command(ha, 4, 5, &mbox_cmd[0], &mbox_sts[0]) != 625
626 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
700 QLA_SUCCESS) { 627 QLA_SUCCESS) {
701 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event " 628 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
702 "log!\n", ha->host_no, __func__)); 629 "log!\n", ha->host_no, __func__));
@@ -745,7 +672,6 @@ exit_get_event_log:
745 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log, 672 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
746 event_log_dma); 673 event_log_dma);
747} 674}
748#endif /* 0 */
749 675
750/** 676/**
751 * qla4xxx_reset_lun - issues LUN Reset 677 * qla4xxx_reset_lun - issues LUN Reset
@@ -773,11 +699,13 @@ int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
773 */ 699 */
774 memset(&mbox_cmd, 0, sizeof(mbox_cmd)); 700 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
775 memset(&mbox_sts, 0, sizeof(mbox_sts)); 701 memset(&mbox_sts, 0, sizeof(mbox_sts));
702
776 mbox_cmd[0] = MBOX_CMD_LUN_RESET; 703 mbox_cmd[0] = MBOX_CMD_LUN_RESET;
777 mbox_cmd[1] = ddb_entry->fw_ddb_index; 704 mbox_cmd[1] = ddb_entry->fw_ddb_index;
778 mbox_cmd[2] = lun << 8; 705 mbox_cmd[2] = lun << 8;
779 mbox_cmd[5] = 0x01; /* Immediate Command Enable */ 706 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
780 qla4xxx_mailbox_command(ha, 6, 1, &mbox_cmd[0], &mbox_sts[0]); 707
708 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
781 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE && 709 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
782 mbox_sts[0] != MBOX_STS_COMMAND_ERROR) 710 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
783 status = QLA_ERROR; 711 status = QLA_ERROR;
@@ -794,12 +722,14 @@ int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
794 722
795 memset(&mbox_cmd, 0, sizeof(mbox_cmd)); 723 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
796 memset(&mbox_sts, 0, sizeof(mbox_sts)); 724 memset(&mbox_sts, 0, sizeof(mbox_sts));
725
797 mbox_cmd[0] = MBOX_CMD_READ_FLASH; 726 mbox_cmd[0] = MBOX_CMD_READ_FLASH;
798 mbox_cmd[1] = LSDW(dma_addr); 727 mbox_cmd[1] = LSDW(dma_addr);
799 mbox_cmd[2] = MSDW(dma_addr); 728 mbox_cmd[2] = MSDW(dma_addr);
800 mbox_cmd[3] = offset; 729 mbox_cmd[3] = offset;
801 mbox_cmd[4] = len; 730 mbox_cmd[4] = len;
802 if (qla4xxx_mailbox_command(ha, 5, 2, &mbox_cmd[0], &mbox_sts[0]) != 731
732 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
803 QLA_SUCCESS) { 733 QLA_SUCCESS) {
804 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ " 734 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
805 "status %04X %04X, offset %08x, len %08x\n", ha->host_no, 735 "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
@@ -825,8 +755,10 @@ int qla4xxx_get_fw_version(struct scsi_qla_host * ha)
825 /* Get firmware version. */ 755 /* Get firmware version. */
826 memset(&mbox_cmd, 0, sizeof(mbox_cmd)); 756 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
827 memset(&mbox_sts, 0, sizeof(mbox_sts)); 757 memset(&mbox_sts, 0, sizeof(mbox_sts));
758
828 mbox_cmd[0] = MBOX_CMD_ABOUT_FW; 759 mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
829 if (qla4xxx_mailbox_command(ha, 4, 5, &mbox_cmd[0], &mbox_sts[0]) != 760
761 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
830 QLA_SUCCESS) { 762 QLA_SUCCESS) {
831 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_ABOUT_FW failed w/ " 763 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_ABOUT_FW failed w/ "
832 "status %04X\n", ha->host_no, __func__, mbox_sts[0])); 764 "status %04X\n", ha->host_no, __func__, mbox_sts[0]));
@@ -855,7 +787,7 @@ static int qla4xxx_get_default_ddb(struct scsi_qla_host *ha,
855 mbox_cmd[2] = LSDW(dma_addr); 787 mbox_cmd[2] = LSDW(dma_addr);
856 mbox_cmd[3] = MSDW(dma_addr); 788 mbox_cmd[3] = MSDW(dma_addr);
857 789
858 if (qla4xxx_mailbox_command(ha, 4, 1, &mbox_cmd[0], &mbox_sts[0]) != 790 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
859 QLA_SUCCESS) { 791 QLA_SUCCESS) {
860 DEBUG2(printk("scsi%ld: %s: failed status %04X\n", 792 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
861 ha->host_no, __func__, mbox_sts[0])); 793 ha->host_no, __func__, mbox_sts[0]));
@@ -875,7 +807,7 @@ static int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t *ddb_index)
875 mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY; 807 mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
876 mbox_cmd[1] = MAX_PRST_DEV_DB_ENTRIES; 808 mbox_cmd[1] = MAX_PRST_DEV_DB_ENTRIES;
877 809
878 if (qla4xxx_mailbox_command(ha, 2, 3, &mbox_cmd[0], &mbox_sts[0]) != 810 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
879 QLA_SUCCESS) { 811 QLA_SUCCESS) {
880 if (mbox_sts[0] == MBOX_STS_COMMAND_ERROR) { 812 if (mbox_sts[0] == MBOX_STS_COMMAND_ERROR) {
881 *ddb_index = mbox_sts[2]; 813 *ddb_index = mbox_sts[2];
@@ -918,23 +850,23 @@ int qla4xxx_send_tgts(struct scsi_qla_host *ha, char *ip, uint16_t port)
918 if (ret_val != QLA_SUCCESS) 850 if (ret_val != QLA_SUCCESS)
919 goto qla4xxx_send_tgts_exit; 851 goto qla4xxx_send_tgts_exit;
920 852
921 memset((void *)fw_ddb_entry->iSCSIAlias, 0, 853 memset(fw_ddb_entry->iscsi_alias, 0,
922 sizeof(fw_ddb_entry->iSCSIAlias)); 854 sizeof(fw_ddb_entry->iscsi_alias));
923 855
924 memset((void *)fw_ddb_entry->iscsiName, 0, 856 memset(fw_ddb_entry->iscsi_name, 0,
925 sizeof(fw_ddb_entry->iscsiName)); 857 sizeof(fw_ddb_entry->iscsi_name));
926 858
927 memset((void *)fw_ddb_entry->ipAddr, 0, sizeof(fw_ddb_entry->ipAddr)); 859 memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
928 memset((void *)fw_ddb_entry->targetAddr, 0, 860 memset(fw_ddb_entry->tgt_addr, 0,
929 sizeof(fw_ddb_entry->targetAddr)); 861 sizeof(fw_ddb_entry->tgt_addr));
930 862
931 fw_ddb_entry->options = (DDB_OPT_DISC_SESSION | DDB_OPT_TARGET); 863 fw_ddb_entry->options = (DDB_OPT_DISC_SESSION | DDB_OPT_TARGET);
932 fw_ddb_entry->portNumber = cpu_to_le16(ntohs(port)); 864 fw_ddb_entry->port = cpu_to_le16(ntohs(port));
933 865
934 fw_ddb_entry->ipAddr[0] = *ip; 866 fw_ddb_entry->ip_addr[0] = *ip;
935 fw_ddb_entry->ipAddr[1] = *(ip + 1); 867 fw_ddb_entry->ip_addr[1] = *(ip + 1);
936 fw_ddb_entry->ipAddr[2] = *(ip + 2); 868 fw_ddb_entry->ip_addr[2] = *(ip + 2);
937 fw_ddb_entry->ipAddr[3] = *(ip + 3); 869 fw_ddb_entry->ip_addr[3] = *(ip + 3);
938 870
939 ret_val = qla4xxx_set_ddb_entry(ha, ddb_index, fw_ddb_entry_dma); 871 ret_val = qla4xxx_set_ddb_entry(ha, ddb_index, fw_ddb_entry_dma);
940 872
diff --git a/drivers/scsi/qla4xxx/ql4_nvram.c b/drivers/scsi/qla4xxx/ql4_nvram.c
index 58afd135aa1d..7fe0482ecf03 100644
--- a/drivers/scsi/qla4xxx/ql4_nvram.c
+++ b/drivers/scsi/qla4xxx/ql4_nvram.c
@@ -6,6 +6,9 @@
6 */ 6 */
7 7
8#include "ql4_def.h" 8#include "ql4_def.h"
9#include "ql4_glbl.h"
10#include "ql4_dbg.h"
11#include "ql4_inline.h"
9 12
10static inline void eeprom_cmd(uint32_t cmd, struct scsi_qla_host *ha) 13static inline void eeprom_cmd(uint32_t cmd, struct scsi_qla_host *ha)
11{ 14{
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c
index da21f5fbbf87..e69160a7bc60 100644
--- a/drivers/scsi/qla4xxx/ql4_os.c
+++ b/drivers/scsi/qla4xxx/ql4_os.c
@@ -10,6 +10,10 @@
10#include <scsi/scsicam.h> 10#include <scsi/scsicam.h>
11 11
12#include "ql4_def.h" 12#include "ql4_def.h"
13#include "ql4_version.h"
14#include "ql4_glbl.h"
15#include "ql4_dbg.h"
16#include "ql4_inline.h"
13 17
14/* 18/*
15 * Driver version 19 * Driver version
@@ -50,12 +54,15 @@ static void qla4xxx_config_dma_addressing(struct scsi_qla_host *ha);
50/* 54/*
51 * iSCSI template entry points 55 * iSCSI template entry points
52 */ 56 */
53static int qla4xxx_tgt_dscvr(enum iscsi_tgt_dscvr type, uint32_t host_no, 57static int qla4xxx_tgt_dscvr(struct Scsi_Host *shost,
54 uint32_t enable, struct sockaddr *dst_addr); 58 enum iscsi_tgt_dscvr type, uint32_t enable,
59 struct sockaddr *dst_addr);
55static int qla4xxx_conn_get_param(struct iscsi_cls_conn *conn, 60static int qla4xxx_conn_get_param(struct iscsi_cls_conn *conn,
56 enum iscsi_param param, char *buf); 61 enum iscsi_param param, char *buf);
57static int qla4xxx_sess_get_param(struct iscsi_cls_session *sess, 62static int qla4xxx_sess_get_param(struct iscsi_cls_session *sess,
58 enum iscsi_param param, char *buf); 63 enum iscsi_param param, char *buf);
64static int qla4xxx_host_get_param(struct Scsi_Host *shost,
65 enum iscsi_host_param param, char *buf);
59static void qla4xxx_conn_stop(struct iscsi_cls_conn *conn, int flag); 66static void qla4xxx_conn_stop(struct iscsi_cls_conn *conn, int flag);
60static int qla4xxx_conn_start(struct iscsi_cls_conn *conn); 67static int qla4xxx_conn_start(struct iscsi_cls_conn *conn);
61static void qla4xxx_recovery_timedout(struct iscsi_cls_session *session); 68static void qla4xxx_recovery_timedout(struct iscsi_cls_session *session);
@@ -95,16 +102,20 @@ static struct scsi_host_template qla4xxx_driver_template = {
95static struct iscsi_transport qla4xxx_iscsi_transport = { 102static struct iscsi_transport qla4xxx_iscsi_transport = {
96 .owner = THIS_MODULE, 103 .owner = THIS_MODULE,
97 .name = DRIVER_NAME, 104 .name = DRIVER_NAME,
98 .param_mask = ISCSI_CONN_PORT | 105 .caps = CAP_FW_DB | CAP_SENDTARGETS_OFFLOAD |
99 ISCSI_CONN_ADDRESS | 106 CAP_DATA_PATH_OFFLOAD,
100 ISCSI_TARGET_NAME | 107 .param_mask = ISCSI_CONN_PORT | ISCSI_CONN_ADDRESS |
101 ISCSI_TPGT, 108 ISCSI_TARGET_NAME | ISCSI_TPGT,
109 .host_param_mask = ISCSI_HOST_HWADDRESS |
110 ISCSI_HOST_IPADDRESS |
111 ISCSI_HOST_INITIATOR_NAME,
102 .sessiondata_size = sizeof(struct ddb_entry), 112 .sessiondata_size = sizeof(struct ddb_entry),
103 .host_template = &qla4xxx_driver_template, 113 .host_template = &qla4xxx_driver_template,
104 114
105 .tgt_dscvr = qla4xxx_tgt_dscvr, 115 .tgt_dscvr = qla4xxx_tgt_dscvr,
106 .get_conn_param = qla4xxx_conn_get_param, 116 .get_conn_param = qla4xxx_conn_get_param,
107 .get_session_param = qla4xxx_sess_get_param, 117 .get_session_param = qla4xxx_sess_get_param,
118 .get_host_param = qla4xxx_host_get_param,
108 .start_conn = qla4xxx_conn_start, 119 .start_conn = qla4xxx_conn_start,
109 .stop_conn = qla4xxx_conn_stop, 120 .stop_conn = qla4xxx_conn_stop,
110 .session_recovery_timedout = qla4xxx_recovery_timedout, 121 .session_recovery_timedout = qla4xxx_recovery_timedout,
@@ -161,6 +172,43 @@ static void qla4xxx_conn_stop(struct iscsi_cls_conn *conn, int flag)
161 printk(KERN_ERR "iscsi: invalid stop flag %d\n", flag); 172 printk(KERN_ERR "iscsi: invalid stop flag %d\n", flag);
162} 173}
163 174
175static ssize_t format_addr(char *buf, const unsigned char *addr, int len)
176{
177 int i;
178 char *cp = buf;
179
180 for (i = 0; i < len; i++)
181 cp += sprintf(cp, "%02x%c", addr[i],
182 i == (len - 1) ? '\n' : ':');
183 return cp - buf;
184}
185
186
187static int qla4xxx_host_get_param(struct Scsi_Host *shost,
188 enum iscsi_host_param param, char *buf)
189{
190 struct scsi_qla_host *ha = to_qla_host(shost);
191 int len;
192
193 switch (param) {
194 case ISCSI_HOST_PARAM_HWADDRESS:
195 len = format_addr(buf, ha->my_mac, MAC_ADDR_LEN);
196 break;
197 case ISCSI_HOST_PARAM_IPADDRESS:
198 len = sprintf(buf, "%d.%d.%d.%d\n", ha->ip_address[0],
199 ha->ip_address[1], ha->ip_address[2],
200 ha->ip_address[3]);
201 break;
202 case ISCSI_HOST_PARAM_INITIATOR_NAME:
203 len = sprintf(buf, "%s\n", ha->name_string);
204 break;
205 default:
206 return -ENOSYS;
207 }
208
209 return len;
210}
211
164static int qla4xxx_sess_get_param(struct iscsi_cls_session *sess, 212static int qla4xxx_sess_get_param(struct iscsi_cls_session *sess,
165 enum iscsi_param param, char *buf) 213 enum iscsi_param param, char *buf)
166{ 214{
@@ -208,21 +256,15 @@ static int qla4xxx_conn_get_param(struct iscsi_cls_conn *conn,
208 return len; 256 return len;
209} 257}
210 258
211static int qla4xxx_tgt_dscvr(enum iscsi_tgt_dscvr type, uint32_t host_no, 259static int qla4xxx_tgt_dscvr(struct Scsi_Host *shost,
212 uint32_t enable, struct sockaddr *dst_addr) 260 enum iscsi_tgt_dscvr type, uint32_t enable,
261 struct sockaddr *dst_addr)
213{ 262{
214 struct scsi_qla_host *ha; 263 struct scsi_qla_host *ha;
215 struct Scsi_Host *shost;
216 struct sockaddr_in *addr; 264 struct sockaddr_in *addr;
217 struct sockaddr_in6 *addr6; 265 struct sockaddr_in6 *addr6;
218 int ret = 0; 266 int ret = 0;
219 267
220 shost = scsi_host_lookup(host_no);
221 if (IS_ERR(shost)) {
222 printk(KERN_ERR "Could not find host no %u\n", host_no);
223 return -ENODEV;
224 }
225
226 ha = (struct scsi_qla_host *) shost->hostdata; 268 ha = (struct scsi_qla_host *) shost->hostdata;
227 269
228 switch (type) { 270 switch (type) {
@@ -246,8 +288,6 @@ static int qla4xxx_tgt_dscvr(enum iscsi_tgt_dscvr type, uint32_t host_no,
246 default: 288 default:
247 ret = -ENOSYS; 289 ret = -ENOSYS;
248 } 290 }
249
250 scsi_host_put(shost);
251 return ret; 291 return ret;
252} 292}
253 293
@@ -369,14 +409,7 @@ static void qla4xxx_srb_free_dma(struct scsi_qla_host *ha, struct srb *srb)
369 struct scsi_cmnd *cmd = srb->cmd; 409 struct scsi_cmnd *cmd = srb->cmd;
370 410
371 if (srb->flags & SRB_DMA_VALID) { 411 if (srb->flags & SRB_DMA_VALID) {
372 if (cmd->use_sg) { 412 scsi_dma_unmap(cmd);
373 pci_unmap_sg(ha->pdev, cmd->request_buffer,
374 cmd->use_sg, cmd->sc_data_direction);
375 } else if (cmd->request_bufflen) {
376 pci_unmap_single(ha->pdev, srb->dma_handle,
377 cmd->request_bufflen,
378 cmd->sc_data_direction);
379 }
380 srb->flags &= ~SRB_DMA_VALID; 413 srb->flags &= ~SRB_DMA_VALID;
381 } 414 }
382 cmd->SCp.ptr = NULL; 415 cmd->SCp.ptr = NULL;
@@ -711,7 +744,7 @@ static int qla4xxx_cmd_wait(struct scsi_qla_host *ha)
711 return stat; 744 return stat;
712} 745}
713 746
714static void qla4xxx_hw_reset(struct scsi_qla_host *ha) 747void qla4xxx_hw_reset(struct scsi_qla_host *ha)
715{ 748{
716 uint32_t ctrl_status; 749 uint32_t ctrl_status;
717 unsigned long flags = 0; 750 unsigned long flags = 0;
@@ -1081,13 +1114,13 @@ static void qla4xxx_free_adapter(struct scsi_qla_host *ha)
1081 if (ha->timer_active) 1114 if (ha->timer_active)
1082 qla4xxx_stop_timer(ha); 1115 qla4xxx_stop_timer(ha);
1083 1116
1084 /* free extra memory */
1085 qla4xxx_mem_free(ha);
1086
1087 /* Detach interrupts */ 1117 /* Detach interrupts */
1088 if (test_and_clear_bit(AF_IRQ_ATTACHED, &ha->flags)) 1118 if (test_and_clear_bit(AF_IRQ_ATTACHED, &ha->flags))
1089 free_irq(ha->pdev->irq, ha); 1119 free_irq(ha->pdev->irq, ha);
1090 1120
1121 /* free extra memory */
1122 qla4xxx_mem_free(ha);
1123
1091 pci_disable_device(ha->pdev); 1124 pci_disable_device(ha->pdev);
1092 1125
1093} 1126}
@@ -1332,6 +1365,11 @@ static void __devexit qla4xxx_remove_adapter(struct pci_dev *pdev)
1332 1365
1333 ha = pci_get_drvdata(pdev); 1366 ha = pci_get_drvdata(pdev);
1334 1367
1368 qla4xxx_disable_intrs(ha);
1369
1370 while (test_bit(DPC_RESET_HA_INTR, &ha->dpc_flags))
1371 ssleep(1);
1372
1335 /* remove devs from iscsi_sessions to scsi_devices */ 1373 /* remove devs from iscsi_sessions to scsi_devices */
1336 qla4xxx_free_ddb_list(ha); 1374 qla4xxx_free_ddb_list(ha);
1337 1375
diff --git a/drivers/scsi/qla4xxx/ql4_version.h b/drivers/scsi/qla4xxx/ql4_version.h
index e5183a697d1f..ab984cb89cea 100644
--- a/drivers/scsi/qla4xxx/ql4_version.h
+++ b/drivers/scsi/qla4xxx/ql4_version.h
@@ -5,4 +5,5 @@
5 * See LICENSE.qla4xxx for copyright and licensing details. 5 * See LICENSE.qla4xxx for copyright and licensing details.
6 */ 6 */
7 7
8#define QLA4XXX_DRIVER_VERSION "5.00.07-k1" 8#define QLA4XXX_DRIVER_VERSION "5.01.00-k8"
9
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-15 22:15:13 -0500