diff options
Diffstat (limited to 'drivers/scsi/qla4xxx/ql4_fw.h')
-rw-r--r-- | drivers/scsi/qla4xxx/ql4_fw.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h index 7825c141bc1a..210cd1d64475 100644 --- a/drivers/scsi/qla4xxx/ql4_fw.h +++ b/drivers/scsi/qla4xxx/ql4_fw.h | |||
@@ -331,6 +331,10 @@ struct qla_flt_region { | |||
331 | /* Mailbox command definitions */ | 331 | /* Mailbox command definitions */ |
332 | #define MBOX_CMD_ABOUT_FW 0x0009 | 332 | #define MBOX_CMD_ABOUT_FW 0x0009 |
333 | #define MBOX_CMD_PING 0x000B | 333 | #define MBOX_CMD_PING 0x000B |
334 | #define PING_IPV6_PROTOCOL_ENABLE 0x1 | ||
335 | #define PING_IPV6_LINKLOCAL_ADDR 0x4 | ||
336 | #define PING_IPV6_ADDR0 0x8 | ||
337 | #define PING_IPV6_ADDR1 0xC | ||
334 | #define MBOX_CMD_ENABLE_INTRS 0x0010 | 338 | #define MBOX_CMD_ENABLE_INTRS 0x0010 |
335 | #define INTR_DISABLE 0 | 339 | #define INTR_DISABLE 0 |
336 | #define INTR_ENABLE 1 | 340 | #define INTR_ENABLE 1 |
@@ -396,6 +400,10 @@ struct qla_flt_region { | |||
396 | #define FW_ADDSTATE_DHCPv4_LEASE_EXPIRED 0x0008 | 400 | #define FW_ADDSTATE_DHCPv4_LEASE_EXPIRED 0x0008 |
397 | #define FW_ADDSTATE_LINK_UP 0x0010 | 401 | #define FW_ADDSTATE_LINK_UP 0x0010 |
398 | #define FW_ADDSTATE_ISNS_SVC_ENABLED 0x0020 | 402 | #define FW_ADDSTATE_ISNS_SVC_ENABLED 0x0020 |
403 | #define FW_ADDSTATE_LINK_SPEED_10MBPS 0x0100 | ||
404 | #define FW_ADDSTATE_LINK_SPEED_100MBPS 0x0200 | ||
405 | #define FW_ADDSTATE_LINK_SPEED_1GBPS 0x0400 | ||
406 | #define FW_ADDSTATE_LINK_SPEED_10GBPS 0x0800 | ||
399 | 407 | ||
400 | #define MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS 0x006B | 408 | #define MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS 0x006B |
401 | #define IPV6_DEFAULT_DDB_ENTRY 0x0001 | 409 | #define IPV6_DEFAULT_DDB_ENTRY 0x0001 |
@@ -918,6 +926,8 @@ struct qla4_header { | |||
918 | #define ET_CMND_T3 0x19 | 926 | #define ET_CMND_T3 0x19 |
919 | #define ET_PASSTHRU0 0x3A | 927 | #define ET_PASSTHRU0 0x3A |
920 | #define ET_PASSTHRU_STATUS 0x3C | 928 | #define ET_PASSTHRU_STATUS 0x3C |
929 | #define ET_MBOX_CMD 0x38 | ||
930 | #define ET_MBOX_STATUS 0x39 | ||
921 | 931 | ||
922 | uint8_t entryStatus; | 932 | uint8_t entryStatus; |
923 | uint8_t systemDefined; | 933 | uint8_t systemDefined; |
@@ -1118,6 +1128,20 @@ struct passthru_status { | |||
1118 | uint8_t res4[16]; /* 30-3F */ | 1128 | uint8_t res4[16]; /* 30-3F */ |
1119 | }; | 1129 | }; |
1120 | 1130 | ||
1131 | struct mbox_cmd_iocb { | ||
1132 | struct qla4_header hdr; /* 00-03 */ | ||
1133 | uint32_t handle; /* 04-07 */ | ||
1134 | uint32_t in_mbox[8]; /* 08-25 */ | ||
1135 | uint32_t res1[6]; /* 26-3F */ | ||
1136 | }; | ||
1137 | |||
1138 | struct mbox_status_iocb { | ||
1139 | struct qla4_header hdr; /* 00-03 */ | ||
1140 | uint32_t handle; /* 04-07 */ | ||
1141 | uint32_t out_mbox[8]; /* 08-25 */ | ||
1142 | uint32_t res1[6]; /* 26-3F */ | ||
1143 | }; | ||
1144 | |||
1121 | /* | 1145 | /* |
1122 | * ISP queue - response queue entry definition. | 1146 | * ISP queue - response queue entry definition. |
1123 | */ | 1147 | */ |