diff options
Diffstat (limited to 'drivers/scsi/qla4xxx/ql4_def.h')
-rw-r--r-- | drivers/scsi/qla4xxx/ql4_def.h | 143 |
1 files changed, 131 insertions, 12 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h index 428802616e33..a79da8dd2064 100644 --- a/drivers/scsi/qla4xxx/ql4_def.h +++ b/drivers/scsi/qla4xxx/ql4_def.h | |||
@@ -33,6 +33,8 @@ | |||
33 | #include <scsi/scsi_transport.h> | 33 | #include <scsi/scsi_transport.h> |
34 | #include <scsi/scsi_transport_iscsi.h> | 34 | #include <scsi/scsi_transport_iscsi.h> |
35 | 35 | ||
36 | #include "ql4_dbg.h" | ||
37 | #include "ql4_nx.h" | ||
36 | 38 | ||
37 | #ifndef PCI_DEVICE_ID_QLOGIC_ISP4010 | 39 | #ifndef PCI_DEVICE_ID_QLOGIC_ISP4010 |
38 | #define PCI_DEVICE_ID_QLOGIC_ISP4010 0x4010 | 40 | #define PCI_DEVICE_ID_QLOGIC_ISP4010 0x4010 |
@@ -46,6 +48,10 @@ | |||
46 | #define PCI_DEVICE_ID_QLOGIC_ISP4032 0x4032 | 48 | #define PCI_DEVICE_ID_QLOGIC_ISP4032 0x4032 |
47 | #endif | 49 | #endif |
48 | 50 | ||
51 | #ifndef PCI_DEVICE_ID_QLOGIC_ISP8022 | ||
52 | #define PCI_DEVICE_ID_QLOGIC_ISP8022 0x8022 | ||
53 | #endif | ||
54 | |||
49 | #define QLA_SUCCESS 0 | 55 | #define QLA_SUCCESS 0 |
50 | #define QLA_ERROR 1 | 56 | #define QLA_ERROR 1 |
51 | 57 | ||
@@ -85,15 +91,22 @@ | |||
85 | #define BIT_30 0x40000000 | 91 | #define BIT_30 0x40000000 |
86 | #define BIT_31 0x80000000 | 92 | #define BIT_31 0x80000000 |
87 | 93 | ||
94 | /** | ||
95 | * Macros to help code, maintain, etc. | ||
96 | **/ | ||
97 | #define ql4_printk(level, ha, format, arg...) \ | ||
98 | dev_printk(level , &((ha)->pdev->dev) , format , ## arg) | ||
99 | |||
100 | |||
88 | /* | 101 | /* |
89 | * Host adapter default definitions | 102 | * Host adapter default definitions |
90 | ***********************************/ | 103 | ***********************************/ |
91 | #define MAX_HBAS 16 | 104 | #define MAX_HBAS 16 |
92 | #define MAX_BUSES 1 | 105 | #define MAX_BUSES 1 |
93 | #define MAX_TARGETS (MAX_PRST_DEV_DB_ENTRIES + MAX_DEV_DB_ENTRIES) | 106 | #define MAX_TARGETS MAX_DEV_DB_ENTRIES |
94 | #define MAX_LUNS 0xffff | 107 | #define MAX_LUNS 0xffff |
95 | #define MAX_AEN_ENTRIES 256 /* should be > EXT_DEF_MAX_AEN_QUEUE */ | 108 | #define MAX_AEN_ENTRIES 256 /* should be > EXT_DEF_MAX_AEN_QUEUE */ |
96 | #define MAX_DDB_ENTRIES (MAX_PRST_DEV_DB_ENTRIES + MAX_DEV_DB_ENTRIES) | 109 | #define MAX_DDB_ENTRIES MAX_DEV_DB_ENTRIES |
97 | #define MAX_PDU_ENTRIES 32 | 110 | #define MAX_PDU_ENTRIES 32 |
98 | #define INVALID_ENTRY 0xFFFF | 111 | #define INVALID_ENTRY 0xFFFF |
99 | #define MAX_CMDS_TO_RISC 1024 | 112 | #define MAX_CMDS_TO_RISC 1024 |
@@ -118,7 +131,7 @@ | |||
118 | #define DRIVER_NAME "qla4xxx" | 131 | #define DRIVER_NAME "qla4xxx" |
119 | 132 | ||
120 | #define MAX_LINKED_CMDS_PER_LUN 3 | 133 | #define MAX_LINKED_CMDS_PER_LUN 3 |
121 | #define MAX_REQS_SERVICED_PER_INTR 16 | 134 | #define MAX_REQS_SERVICED_PER_INTR 1 |
122 | 135 | ||
123 | #define ISCSI_IPADDR_SIZE 4 /* IP address size */ | 136 | #define ISCSI_IPADDR_SIZE 4 /* IP address size */ |
124 | #define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */ | 137 | #define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */ |
@@ -134,7 +147,7 @@ | |||
134 | #define SOFT_RESET_TOV 30 | 147 | #define SOFT_RESET_TOV 30 |
135 | #define RESET_INTR_TOV 3 | 148 | #define RESET_INTR_TOV 3 |
136 | #define SEMAPHORE_TOV 10 | 149 | #define SEMAPHORE_TOV 10 |
137 | #define ADAPTER_INIT_TOV 120 | 150 | #define ADAPTER_INIT_TOV 30 |
138 | #define ADAPTER_RESET_TOV 180 | 151 | #define ADAPTER_RESET_TOV 180 |
139 | #define EXTEND_CMD_TOV 60 | 152 | #define EXTEND_CMD_TOV 60 |
140 | #define WAIT_CMD_TOV 30 | 153 | #define WAIT_CMD_TOV 30 |
@@ -184,8 +197,6 @@ struct srb { | |||
184 | uint16_t iocb_tov; | 197 | uint16_t iocb_tov; |
185 | uint16_t iocb_cnt; /* Number of used iocbs */ | 198 | uint16_t iocb_cnt; /* Number of used iocbs */ |
186 | uint16_t cc_stat; | 199 | uint16_t cc_stat; |
187 | u_long r_start; /* Time we recieve a cmd from OS */ | ||
188 | u_long u_start; /* Time when we handed the cmd to F/W */ | ||
189 | 200 | ||
190 | /* Used for extended sense / status continuation */ | 201 | /* Used for extended sense / status continuation */ |
191 | uint8_t *req_sense_ptr; | 202 | uint8_t *req_sense_ptr; |
@@ -221,7 +232,6 @@ struct ddb_entry { | |||
221 | unsigned long dev_scan_wait_to_start_relogin; | 232 | unsigned long dev_scan_wait_to_start_relogin; |
222 | unsigned long dev_scan_wait_to_complete_relogin; | 233 | unsigned long dev_scan_wait_to_complete_relogin; |
223 | 234 | ||
224 | uint16_t os_target_id; /* Target ID */ | ||
225 | uint16_t fw_ddb_index; /* DDB firmware index */ | 235 | uint16_t fw_ddb_index; /* DDB firmware index */ |
226 | uint16_t options; | 236 | uint16_t options; |
227 | uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */ | 237 | uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */ |
@@ -285,6 +295,67 @@ struct ddb_entry { | |||
285 | #include "ql4_fw.h" | 295 | #include "ql4_fw.h" |
286 | #include "ql4_nvram.h" | 296 | #include "ql4_nvram.h" |
287 | 297 | ||
298 | struct ql82xx_hw_data { | ||
299 | /* Offsets for flash/nvram access (set to ~0 if not used). */ | ||
300 | uint32_t flash_conf_off; | ||
301 | uint32_t flash_data_off; | ||
302 | |||
303 | uint32_t fdt_wrt_disable; | ||
304 | uint32_t fdt_erase_cmd; | ||
305 | uint32_t fdt_block_size; | ||
306 | uint32_t fdt_unprotect_sec_cmd; | ||
307 | uint32_t fdt_protect_sec_cmd; | ||
308 | |||
309 | uint32_t flt_region_flt; | ||
310 | uint32_t flt_region_fdt; | ||
311 | uint32_t flt_region_boot; | ||
312 | uint32_t flt_region_bootload; | ||
313 | uint32_t flt_region_fw; | ||
314 | uint32_t reserved; | ||
315 | }; | ||
316 | |||
317 | struct qla4_8xxx_legacy_intr_set { | ||
318 | uint32_t int_vec_bit; | ||
319 | uint32_t tgt_status_reg; | ||
320 | uint32_t tgt_mask_reg; | ||
321 | uint32_t pci_int_reg; | ||
322 | }; | ||
323 | |||
324 | /* MSI-X Support */ | ||
325 | |||
326 | #define QLA_MSIX_DEFAULT 0x00 | ||
327 | #define QLA_MSIX_RSP_Q 0x01 | ||
328 | |||
329 | #define QLA_MSIX_ENTRIES 2 | ||
330 | #define QLA_MIDX_DEFAULT 0 | ||
331 | #define QLA_MIDX_RSP_Q 1 | ||
332 | |||
333 | struct ql4_msix_entry { | ||
334 | int have_irq; | ||
335 | uint16_t msix_vector; | ||
336 | uint16_t msix_entry; | ||
337 | }; | ||
338 | |||
339 | /* | ||
340 | * ISP Operations | ||
341 | */ | ||
342 | struct isp_operations { | ||
343 | int (*iospace_config) (struct scsi_qla_host *ha); | ||
344 | void (*pci_config) (struct scsi_qla_host *); | ||
345 | void (*disable_intrs) (struct scsi_qla_host *); | ||
346 | void (*enable_intrs) (struct scsi_qla_host *); | ||
347 | int (*start_firmware) (struct scsi_qla_host *); | ||
348 | irqreturn_t (*intr_handler) (int , void *); | ||
349 | void (*interrupt_service_routine) (struct scsi_qla_host *, uint32_t); | ||
350 | int (*reset_chip) (struct scsi_qla_host *); | ||
351 | int (*reset_firmware) (struct scsi_qla_host *); | ||
352 | void (*queue_iocb) (struct scsi_qla_host *); | ||
353 | void (*complete_iocb) (struct scsi_qla_host *); | ||
354 | uint16_t (*rd_shdw_req_q_out) (struct scsi_qla_host *); | ||
355 | uint16_t (*rd_shdw_rsp_q_in) (struct scsi_qla_host *); | ||
356 | int (*get_sys_info) (struct scsi_qla_host *); | ||
357 | }; | ||
358 | |||
288 | /* | 359 | /* |
289 | * Linux Host Adapter structure | 360 | * Linux Host Adapter structure |
290 | */ | 361 | */ |
@@ -296,28 +367,39 @@ struct scsi_qla_host { | |||
296 | #define AF_INIT_DONE 1 /* 0x00000002 */ | 367 | #define AF_INIT_DONE 1 /* 0x00000002 */ |
297 | #define AF_MBOX_COMMAND 2 /* 0x00000004 */ | 368 | #define AF_MBOX_COMMAND 2 /* 0x00000004 */ |
298 | #define AF_MBOX_COMMAND_DONE 3 /* 0x00000008 */ | 369 | #define AF_MBOX_COMMAND_DONE 3 /* 0x00000008 */ |
370 | #define AF_DPC_SCHEDULED 5 /* 0x00000020 */ | ||
299 | #define AF_INTERRUPTS_ON 6 /* 0x00000040 */ | 371 | #define AF_INTERRUPTS_ON 6 /* 0x00000040 */ |
300 | #define AF_GET_CRASH_RECORD 7 /* 0x00000080 */ | 372 | #define AF_GET_CRASH_RECORD 7 /* 0x00000080 */ |
301 | #define AF_LINK_UP 8 /* 0x00000100 */ | 373 | #define AF_LINK_UP 8 /* 0x00000100 */ |
302 | #define AF_IRQ_ATTACHED 10 /* 0x00000400 */ | 374 | #define AF_IRQ_ATTACHED 10 /* 0x00000400 */ |
303 | #define AF_DISABLE_ACB_COMPLETE 11 /* 0x00000800 */ | 375 | #define AF_DISABLE_ACB_COMPLETE 11 /* 0x00000800 */ |
376 | #define AF_HBA_GOING_AWAY 12 /* 0x00001000 */ | ||
377 | #define AF_INTx_ENABLED 15 /* 0x00008000 */ | ||
378 | #define AF_MSI_ENABLED 16 /* 0x00010000 */ | ||
379 | #define AF_MSIX_ENABLED 17 /* 0x00020000 */ | ||
380 | #define AF_MBOX_COMMAND_NOPOLL 18 /* 0x00040000 */ | ||
381 | |||
304 | 382 | ||
305 | unsigned long dpc_flags; | 383 | unsigned long dpc_flags; |
306 | 384 | ||
307 | #define DPC_RESET_HA 1 /* 0x00000002 */ | 385 | #define DPC_RESET_HA 1 /* 0x00000002 */ |
308 | #define DPC_RETRY_RESET_HA 2 /* 0x00000004 */ | 386 | #define DPC_RETRY_RESET_HA 2 /* 0x00000004 */ |
309 | #define DPC_RELOGIN_DEVICE 3 /* 0x00000008 */ | 387 | #define DPC_RELOGIN_DEVICE 3 /* 0x00000008 */ |
310 | #define DPC_RESET_HA_DESTROY_DDB_LIST 4 /* 0x00000010 */ | 388 | #define DPC_RESET_HA_FW_CONTEXT 4 /* 0x00000010 */ |
311 | #define DPC_RESET_HA_INTR 5 /* 0x00000020 */ | 389 | #define DPC_RESET_HA_INTR 5 /* 0x00000020 */ |
312 | #define DPC_ISNS_RESTART 7 /* 0x00000080 */ | 390 | #define DPC_ISNS_RESTART 7 /* 0x00000080 */ |
313 | #define DPC_AEN 9 /* 0x00000200 */ | 391 | #define DPC_AEN 9 /* 0x00000200 */ |
314 | #define DPC_GET_DHCP_IP_ADDR 15 /* 0x00008000 */ | 392 | #define DPC_GET_DHCP_IP_ADDR 15 /* 0x00008000 */ |
315 | #define DPC_LINK_CHANGED 18 /* 0x00040000 */ | 393 | #define DPC_LINK_CHANGED 18 /* 0x00040000 */ |
394 | #define DPC_RESET_ACTIVE 20 /* 0x00040000 */ | ||
395 | #define DPC_HA_UNRECOVERABLE 21 /* 0x00080000 ISP-82xx only*/ | ||
396 | #define DPC_HA_NEED_QUIESCENT 22 /* 0x00100000 ISP-82xx only*/ | ||
397 | |||
316 | 398 | ||
317 | struct Scsi_Host *host; /* pointer to host data */ | 399 | struct Scsi_Host *host; /* pointer to host data */ |
318 | uint32_t tot_ddbs; | 400 | uint32_t tot_ddbs; |
319 | 401 | ||
320 | uint16_t iocb_cnt; | 402 | uint16_t iocb_cnt; |
321 | 403 | ||
322 | /* SRB cache. */ | 404 | /* SRB cache. */ |
323 | #define SRB_MIN_REQ 128 | 405 | #define SRB_MIN_REQ 128 |
@@ -332,14 +414,13 @@ struct scsi_qla_host { | |||
332 | #define MIN_IOBASE_LEN 0x100 | 414 | #define MIN_IOBASE_LEN 0x100 |
333 | 415 | ||
334 | uint16_t req_q_count; | 416 | uint16_t req_q_count; |
335 | uint8_t rsvd1[2]; | ||
336 | 417 | ||
337 | unsigned long host_no; | 418 | unsigned long host_no; |
338 | 419 | ||
339 | /* NVRAM registers */ | 420 | /* NVRAM registers */ |
340 | struct eeprom_data *nvram; | 421 | struct eeprom_data *nvram; |
341 | spinlock_t hardware_lock ____cacheline_aligned; | 422 | spinlock_t hardware_lock ____cacheline_aligned; |
342 | uint32_t eeprom_cmd_data; | 423 | uint32_t eeprom_cmd_data; |
343 | 424 | ||
344 | /* Counters for general statistics */ | 425 | /* Counters for general statistics */ |
345 | uint64_t isr_count; | 426 | uint64_t isr_count; |
@@ -375,7 +456,6 @@ struct scsi_qla_host { | |||
375 | uint8_t alias[32]; | 456 | uint8_t alias[32]; |
376 | uint8_t name_string[256]; | 457 | uint8_t name_string[256]; |
377 | uint8_t heartbeat_interval; | 458 | uint8_t heartbeat_interval; |
378 | uint8_t rsvd; | ||
379 | 459 | ||
380 | /* --- From FlashSysInfo --- */ | 460 | /* --- From FlashSysInfo --- */ |
381 | uint8_t my_mac[MAC_ADDR_LEN]; | 461 | uint8_t my_mac[MAC_ADDR_LEN]; |
@@ -469,6 +549,40 @@ struct scsi_qla_host { | |||
469 | struct in6_addr ipv6_addr0; | 549 | struct in6_addr ipv6_addr0; |
470 | struct in6_addr ipv6_addr1; | 550 | struct in6_addr ipv6_addr1; |
471 | struct in6_addr ipv6_default_router_addr; | 551 | struct in6_addr ipv6_default_router_addr; |
552 | |||
553 | /* qla82xx specific fields */ | ||
554 | struct device_reg_82xx __iomem *qla4_8xxx_reg; /* Base I/O address */ | ||
555 | unsigned long nx_pcibase; /* Base I/O address */ | ||
556 | uint8_t *nx_db_rd_ptr; /* Doorbell read pointer */ | ||
557 | unsigned long nx_db_wr_ptr; /* Door bell write pointer */ | ||
558 | unsigned long first_page_group_start; | ||
559 | unsigned long first_page_group_end; | ||
560 | |||
561 | uint32_t crb_win; | ||
562 | uint32_t curr_window; | ||
563 | uint32_t ddr_mn_window; | ||
564 | unsigned long mn_win_crb; | ||
565 | unsigned long ms_win_crb; | ||
566 | int qdr_sn_window; | ||
567 | rwlock_t hw_lock; | ||
568 | uint16_t func_num; | ||
569 | int link_width; | ||
570 | |||
571 | struct qla4_8xxx_legacy_intr_set nx_legacy_intr; | ||
572 | u32 nx_crb_mask; | ||
573 | |||
574 | uint8_t revision_id; | ||
575 | uint32_t fw_heartbeat_counter; | ||
576 | |||
577 | struct isp_operations *isp_ops; | ||
578 | struct ql82xx_hw_data hw; | ||
579 | |||
580 | struct ql4_msix_entry msix_entries[QLA_MSIX_ENTRIES]; | ||
581 | |||
582 | uint32_t nx_dev_init_timeout; | ||
583 | uint32_t nx_reset_timeout; | ||
584 | |||
585 | struct completion mbx_intr_comp; | ||
472 | }; | 586 | }; |
473 | 587 | ||
474 | static inline int is_ipv4_enabled(struct scsi_qla_host *ha) | 588 | static inline int is_ipv4_enabled(struct scsi_qla_host *ha) |
@@ -496,6 +610,11 @@ static inline int is_qla4032(struct scsi_qla_host *ha) | |||
496 | return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4032; | 610 | return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4032; |
497 | } | 611 | } |
498 | 612 | ||
613 | static inline int is_qla8022(struct scsi_qla_host *ha) | ||
614 | { | ||
615 | return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8022; | ||
616 | } | ||
617 | |||
499 | static inline int adapter_up(struct scsi_qla_host *ha) | 618 | static inline int adapter_up(struct scsi_qla_host *ha) |
500 | { | 619 | { |
501 | return (test_bit(AF_ONLINE, &ha->flags) != 0) && | 620 | return (test_bit(AF_ONLINE, &ha->flags) != 0) && |