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-rw-r--r--drivers/scsi/qla2xxx/qla_attr.c276
-rw-r--r--drivers/scsi/qla2xxx/qla_def.h44
-rw-r--r--drivers/scsi/qla2xxx/qla_gbl.h27
-rw-r--r--drivers/scsi/qla2xxx/qla_init.c1
-rw-r--r--drivers/scsi/qla2xxx/qla_iocb.c1
-rw-r--r--drivers/scsi/qla2xxx/qla_isr.c4
-rw-r--r--drivers/scsi/qla2xxx/qla_mbx.c108
-rw-r--r--drivers/scsi/qla2xxx/qla_os.c43
-rw-r--r--drivers/scsi/qla2xxx/qla_rscn.c2
-rw-r--r--drivers/scsi/qla2xxx/qla_sup.c963
10 files changed, 1450 insertions, 19 deletions
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
index b17ee62dd1a9..92b3e13e9061 100644
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -7,7 +7,6 @@
7#include "qla_def.h" 7#include "qla_def.h"
8 8
9#include <linux/vmalloc.h> 9#include <linux/vmalloc.h>
10#include <scsi/scsi_transport_fc.h>
11 10
12/* SYSFS attributes --------------------------------------------------------- */ 11/* SYSFS attributes --------------------------------------------------------- */
13 12
@@ -114,7 +113,7 @@ qla2x00_sysfs_read_nvram(struct kobject *kobj, char *buf, loff_t off,
114 struct device, kobj))); 113 struct device, kobj)));
115 unsigned long flags; 114 unsigned long flags;
116 115
117 if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->nvram_size) 116 if (!capable(CAP_SYS_ADMIN) || off != 0)
118 return 0; 117 return 0;
119 118
120 /* Read NVRAM. */ 119 /* Read NVRAM. */
@@ -123,7 +122,7 @@ qla2x00_sysfs_read_nvram(struct kobject *kobj, char *buf, loff_t off,
123 ha->nvram_size); 122 ha->nvram_size);
124 spin_unlock_irqrestore(&ha->hardware_lock, flags); 123 spin_unlock_irqrestore(&ha->hardware_lock, flags);
125 124
126 return (count); 125 return ha->nvram_size;
127} 126}
128 127
129static ssize_t 128static ssize_t
@@ -175,19 +174,150 @@ static struct bin_attribute sysfs_nvram_attr = {
175 .mode = S_IRUSR | S_IWUSR, 174 .mode = S_IRUSR | S_IWUSR,
176 .owner = THIS_MODULE, 175 .owner = THIS_MODULE,
177 }, 176 },
178 .size = 0, 177 .size = 512,
179 .read = qla2x00_sysfs_read_nvram, 178 .read = qla2x00_sysfs_read_nvram,
180 .write = qla2x00_sysfs_write_nvram, 179 .write = qla2x00_sysfs_write_nvram,
181}; 180};
182 181
182static ssize_t
183qla2x00_sysfs_read_optrom(struct kobject *kobj, char *buf, loff_t off,
184 size_t count)
185{
186 struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj,
187 struct device, kobj)));
188
189 if (ha->optrom_state != QLA_SREADING)
190 return 0;
191 if (off > ha->optrom_size)
192 return 0;
193 if (off + count > ha->optrom_size)
194 count = ha->optrom_size - off;
195
196 memcpy(buf, &ha->optrom_buffer[off], count);
197
198 return count;
199}
200
201static ssize_t
202qla2x00_sysfs_write_optrom(struct kobject *kobj, char *buf, loff_t off,
203 size_t count)
204{
205 struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj,
206 struct device, kobj)));
207
208 if (ha->optrom_state != QLA_SWRITING)
209 return -EINVAL;
210 if (off > ha->optrom_size)
211 return -ERANGE;
212 if (off + count > ha->optrom_size)
213 count = ha->optrom_size - off;
214
215 memcpy(&ha->optrom_buffer[off], buf, count);
216
217 return count;
218}
219
220static struct bin_attribute sysfs_optrom_attr = {
221 .attr = {
222 .name = "optrom",
223 .mode = S_IRUSR | S_IWUSR,
224 .owner = THIS_MODULE,
225 },
226 .size = OPTROM_SIZE_24XX,
227 .read = qla2x00_sysfs_read_optrom,
228 .write = qla2x00_sysfs_write_optrom,
229};
230
231static ssize_t
232qla2x00_sysfs_write_optrom_ctl(struct kobject *kobj, char *buf, loff_t off,
233 size_t count)
234{
235 struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj,
236 struct device, kobj)));
237 int val;
238
239 if (off)
240 return 0;
241
242 if (sscanf(buf, "%d", &val) != 1)
243 return -EINVAL;
244
245 switch (val) {
246 case 0:
247 if (ha->optrom_state != QLA_SREADING &&
248 ha->optrom_state != QLA_SWRITING)
249 break;
250
251 ha->optrom_state = QLA_SWAITING;
252 vfree(ha->optrom_buffer);
253 ha->optrom_buffer = NULL;
254 break;
255 case 1:
256 if (ha->optrom_state != QLA_SWAITING)
257 break;
258
259 ha->optrom_state = QLA_SREADING;
260 ha->optrom_buffer = (uint8_t *)vmalloc(ha->optrom_size);
261 if (ha->optrom_buffer == NULL) {
262 qla_printk(KERN_WARNING, ha,
263 "Unable to allocate memory for optrom retrieval "
264 "(%x).\n", ha->optrom_size);
265
266 ha->optrom_state = QLA_SWAITING;
267 return count;
268 }
269
270 memset(ha->optrom_buffer, 0, ha->optrom_size);
271 ha->isp_ops.read_optrom(ha, ha->optrom_buffer, 0,
272 ha->optrom_size);
273 break;
274 case 2:
275 if (ha->optrom_state != QLA_SWAITING)
276 break;
277
278 ha->optrom_state = QLA_SWRITING;
279 ha->optrom_buffer = (uint8_t *)vmalloc(ha->optrom_size);
280 if (ha->optrom_buffer == NULL) {
281 qla_printk(KERN_WARNING, ha,
282 "Unable to allocate memory for optrom update "
283 "(%x).\n", ha->optrom_size);
284
285 ha->optrom_state = QLA_SWAITING;
286 return count;
287 }
288 memset(ha->optrom_buffer, 0, ha->optrom_size);
289 break;
290 case 3:
291 if (ha->optrom_state != QLA_SWRITING)
292 break;
293
294 ha->isp_ops.write_optrom(ha, ha->optrom_buffer, 0,
295 ha->optrom_size);
296 break;
297 }
298 return count;
299}
300
301static struct bin_attribute sysfs_optrom_ctl_attr = {
302 .attr = {
303 .name = "optrom_ctl",
304 .mode = S_IWUSR,
305 .owner = THIS_MODULE,
306 },
307 .size = 0,
308 .write = qla2x00_sysfs_write_optrom_ctl,
309};
310
183void 311void
184qla2x00_alloc_sysfs_attr(scsi_qla_host_t *ha) 312qla2x00_alloc_sysfs_attr(scsi_qla_host_t *ha)
185{ 313{
186 struct Scsi_Host *host = ha->host; 314 struct Scsi_Host *host = ha->host;
187 315
188 sysfs_create_bin_file(&host->shost_gendev.kobj, &sysfs_fw_dump_attr); 316 sysfs_create_bin_file(&host->shost_gendev.kobj, &sysfs_fw_dump_attr);
189 sysfs_nvram_attr.size = ha->nvram_size;
190 sysfs_create_bin_file(&host->shost_gendev.kobj, &sysfs_nvram_attr); 317 sysfs_create_bin_file(&host->shost_gendev.kobj, &sysfs_nvram_attr);
318 sysfs_create_bin_file(&host->shost_gendev.kobj, &sysfs_optrom_attr);
319 sysfs_create_bin_file(&host->shost_gendev.kobj,
320 &sysfs_optrom_ctl_attr);
191} 321}
192 322
193void 323void
@@ -197,6 +327,12 @@ qla2x00_free_sysfs_attr(scsi_qla_host_t *ha)
197 327
198 sysfs_remove_bin_file(&host->shost_gendev.kobj, &sysfs_fw_dump_attr); 328 sysfs_remove_bin_file(&host->shost_gendev.kobj, &sysfs_fw_dump_attr);
199 sysfs_remove_bin_file(&host->shost_gendev.kobj, &sysfs_nvram_attr); 329 sysfs_remove_bin_file(&host->shost_gendev.kobj, &sysfs_nvram_attr);
330 sysfs_remove_bin_file(&host->shost_gendev.kobj, &sysfs_optrom_attr);
331 sysfs_remove_bin_file(&host->shost_gendev.kobj,
332 &sysfs_optrom_ctl_attr);
333
334 if (ha->beacon_blink_led == 1)
335 ha->isp_ops.beacon_off(ha);
200} 336}
201 337
202/* Scsi_Host attributes. */ 338/* Scsi_Host attributes. */
@@ -384,6 +520,50 @@ qla2x00_zio_timer_store(struct class_device *cdev, const char *buf,
384 return strlen(buf); 520 return strlen(buf);
385} 521}
386 522
523static ssize_t
524qla2x00_beacon_show(struct class_device *cdev, char *buf)
525{
526 scsi_qla_host_t *ha = to_qla_host(class_to_shost(cdev));
527 int len = 0;
528
529 if (ha->beacon_blink_led)
530 len += snprintf(buf + len, PAGE_SIZE-len, "Enabled\n");
531 else
532 len += snprintf(buf + len, PAGE_SIZE-len, "Disabled\n");
533 return len;
534}
535
536static ssize_t
537qla2x00_beacon_store(struct class_device *cdev, const char *buf,
538 size_t count)
539{
540 scsi_qla_host_t *ha = to_qla_host(class_to_shost(cdev));
541 int val = 0;
542 int rval;
543
544 if (IS_QLA2100(ha) || IS_QLA2200(ha))
545 return -EPERM;
546
547 if (test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags)) {
548 qla_printk(KERN_WARNING, ha,
549 "Abort ISP active -- ignoring beacon request.\n");
550 return -EBUSY;
551 }
552
553 if (sscanf(buf, "%d", &val) != 1)
554 return -EINVAL;
555
556 if (val)
557 rval = ha->isp_ops.beacon_on(ha);
558 else
559 rval = ha->isp_ops.beacon_off(ha);
560
561 if (rval != QLA_SUCCESS)
562 count = 0;
563
564 return count;
565}
566
387static CLASS_DEVICE_ATTR(driver_version, S_IRUGO, qla2x00_drvr_version_show, 567static CLASS_DEVICE_ATTR(driver_version, S_IRUGO, qla2x00_drvr_version_show,
388 NULL); 568 NULL);
389static CLASS_DEVICE_ATTR(fw_version, S_IRUGO, qla2x00_fw_version_show, NULL); 569static CLASS_DEVICE_ATTR(fw_version, S_IRUGO, qla2x00_fw_version_show, NULL);
@@ -398,6 +578,8 @@ static CLASS_DEVICE_ATTR(zio, S_IRUGO | S_IWUSR, qla2x00_zio_show,
398 qla2x00_zio_store); 578 qla2x00_zio_store);
399static CLASS_DEVICE_ATTR(zio_timer, S_IRUGO | S_IWUSR, qla2x00_zio_timer_show, 579static CLASS_DEVICE_ATTR(zio_timer, S_IRUGO | S_IWUSR, qla2x00_zio_timer_show,
400 qla2x00_zio_timer_store); 580 qla2x00_zio_timer_store);
581static CLASS_DEVICE_ATTR(beacon, S_IRUGO | S_IWUSR, qla2x00_beacon_show,
582 qla2x00_beacon_store);
401 583
402struct class_device_attribute *qla2x00_host_attrs[] = { 584struct class_device_attribute *qla2x00_host_attrs[] = {
403 &class_device_attr_driver_version, 585 &class_device_attr_driver_version,
@@ -411,6 +593,7 @@ struct class_device_attribute *qla2x00_host_attrs[] = {
411 &class_device_attr_state, 593 &class_device_attr_state,
412 &class_device_attr_zio, 594 &class_device_attr_zio,
413 &class_device_attr_zio_timer, 595 &class_device_attr_zio_timer,
596 &class_device_attr_beacon,
414 NULL, 597 NULL,
415}; 598};
416 599
@@ -426,6 +609,49 @@ qla2x00_get_host_port_id(struct Scsi_Host *shost)
426} 609}
427 610
428static void 611static void
612qla2x00_get_host_speed(struct Scsi_Host *shost)
613{
614 scsi_qla_host_t *ha = to_qla_host(shost);
615 uint32_t speed = 0;
616
617 switch (ha->link_data_rate) {
618 case LDR_1GB:
619 speed = 1;
620 break;
621 case LDR_2GB:
622 speed = 2;
623 break;
624 case LDR_4GB:
625 speed = 4;
626 break;
627 }
628 fc_host_speed(shost) = speed;
629}
630
631static void
632qla2x00_get_host_port_type(struct Scsi_Host *shost)
633{
634 scsi_qla_host_t *ha = to_qla_host(shost);
635 uint32_t port_type = FC_PORTTYPE_UNKNOWN;
636
637 switch (ha->current_topology) {
638 case ISP_CFG_NL:
639 port_type = FC_PORTTYPE_LPORT;
640 break;
641 case ISP_CFG_FL:
642 port_type = FC_PORTTYPE_NLPORT;
643 break;
644 case ISP_CFG_N:
645 port_type = FC_PORTTYPE_PTP;
646 break;
647 case ISP_CFG_F:
648 port_type = FC_PORTTYPE_NPORT;
649 break;
650 }
651 fc_host_port_type(shost) = port_type;
652}
653
654static void
429qla2x00_get_starget_node_name(struct scsi_target *starget) 655qla2x00_get_starget_node_name(struct scsi_target *starget)
430{ 656{
431 struct Scsi_Host *host = dev_to_shost(starget->dev.parent); 657 struct Scsi_Host *host = dev_to_shost(starget->dev.parent);
@@ -512,6 +738,41 @@ qla2x00_issue_lip(struct Scsi_Host *shost)
512 return 0; 738 return 0;
513} 739}
514 740
741static struct fc_host_statistics *
742qla2x00_get_fc_host_stats(struct Scsi_Host *shost)
743{
744 scsi_qla_host_t *ha = to_qla_host(shost);
745 int rval;
746 uint16_t mb_stat[1];
747 link_stat_t stat_buf;
748 struct fc_host_statistics *pfc_host_stat;
749
750 pfc_host_stat = &ha->fc_host_stat;
751 memset(pfc_host_stat, -1, sizeof(struct fc_host_statistics));
752
753 if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
754 rval = qla24xx_get_isp_stats(ha, (uint32_t *)&stat_buf,
755 sizeof(stat_buf) / 4, mb_stat);
756 } else {
757 rval = qla2x00_get_link_status(ha, ha->loop_id, &stat_buf,
758 mb_stat);
759 }
760 if (rval != 0) {
761 qla_printk(KERN_WARNING, ha,
762 "Unable to retrieve host statistics (%d).\n", mb_stat[0]);
763 return pfc_host_stat;
764 }
765
766 pfc_host_stat->link_failure_count = stat_buf.link_fail_cnt;
767 pfc_host_stat->loss_of_sync_count = stat_buf.loss_sync_cnt;
768 pfc_host_stat->loss_of_signal_count = stat_buf.loss_sig_cnt;
769 pfc_host_stat->prim_seq_protocol_err_count = stat_buf.prim_seq_err_cnt;
770 pfc_host_stat->invalid_tx_word_count = stat_buf.inval_xmit_word_cnt;
771 pfc_host_stat->invalid_crc_count = stat_buf.inval_crc_cnt;
772
773 return pfc_host_stat;
774}
775
515struct fc_function_template qla2xxx_transport_functions = { 776struct fc_function_template qla2xxx_transport_functions = {
516 777
517 .show_host_node_name = 1, 778 .show_host_node_name = 1,
@@ -520,6 +781,10 @@ struct fc_function_template qla2xxx_transport_functions = {
520 781
521 .get_host_port_id = qla2x00_get_host_port_id, 782 .get_host_port_id = qla2x00_get_host_port_id,
522 .show_host_port_id = 1, 783 .show_host_port_id = 1,
784 .get_host_speed = qla2x00_get_host_speed,
785 .show_host_speed = 1,
786 .get_host_port_type = qla2x00_get_host_port_type,
787 .show_host_port_type = 1,
523 788
524 .dd_fcrport_size = sizeof(struct fc_port *), 789 .dd_fcrport_size = sizeof(struct fc_port *),
525 .show_rport_supported_classes = 1, 790 .show_rport_supported_classes = 1,
@@ -536,6 +801,7 @@ struct fc_function_template qla2xxx_transport_functions = {
536 .show_rport_dev_loss_tmo = 1, 801 .show_rport_dev_loss_tmo = 1,
537 802
538 .issue_fc_host_lip = qla2x00_issue_lip, 803 .issue_fc_host_lip = qla2x00_issue_lip,
804 .get_fc_host_stats = qla2x00_get_fc_host_stats,
539}; 805};
540 806
541void 807void
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index bad066e5772a..b31a03bbd14f 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -29,6 +29,7 @@
29#include <scsi/scsi_host.h> 29#include <scsi/scsi_host.h>
30#include <scsi/scsi_device.h> 30#include <scsi/scsi_device.h>
31#include <scsi/scsi_cmnd.h> 31#include <scsi/scsi_cmnd.h>
32#include <scsi/scsi_transport_fc.h>
32 33
33#if defined(CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE) 34#if defined(CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE)
34#if defined(CONFIG_SCSI_QLA21XX) || defined(CONFIG_SCSI_QLA21XX_MODULE) 35#if defined(CONFIG_SCSI_QLA21XX) || defined(CONFIG_SCSI_QLA21XX_MODULE)
@@ -181,6 +182,13 @@
181#define WRT_REG_DWORD(addr, data) writel(data,addr) 182#define WRT_REG_DWORD(addr, data) writel(data,addr)
182 183
183/* 184/*
185 * The ISP2312 v2 chip cannot access the FLASH/GPIO registers via MMIO in an
186 * 133Mhz slot.
187 */
188#define RD_REG_WORD_PIO(addr) (inw((unsigned long)addr))
189#define WRT_REG_WORD_PIO(addr, data) (outw(data,(unsigned long)addr))
190
191/*
184 * Fibre Channel device definitions. 192 * Fibre Channel device definitions.
185 */ 193 */
186#define WWN_SIZE 8 /* Size of WWPN, WWN & WWNN */ 194#define WWN_SIZE 8 /* Size of WWPN, WWN & WWNN */
@@ -432,6 +440,9 @@ struct device_reg_2xxx {
432#define GPIO_LED_GREEN_ON_AMBER_OFF 0x0040 440#define GPIO_LED_GREEN_ON_AMBER_OFF 0x0040
433#define GPIO_LED_GREEN_OFF_AMBER_ON 0x0080 441#define GPIO_LED_GREEN_OFF_AMBER_ON 0x0080
434#define GPIO_LED_GREEN_ON_AMBER_ON 0x00C0 442#define GPIO_LED_GREEN_ON_AMBER_ON 0x00C0
443#define GPIO_LED_ALL_OFF 0x0000
444#define GPIO_LED_RED_ON_OTHER_OFF 0x0001 /* isp2322 */
445#define GPIO_LED_RGA_ON 0x00C1 /* isp2322: red green amber */
435 446
436 union { 447 union {
437 struct { 448 struct {
@@ -2199,6 +2210,15 @@ struct isp_operations {
2199 2210
2200 void (*fw_dump) (struct scsi_qla_host *, int); 2211 void (*fw_dump) (struct scsi_qla_host *, int);
2201 void (*ascii_fw_dump) (struct scsi_qla_host *); 2212 void (*ascii_fw_dump) (struct scsi_qla_host *);
2213
2214 int (*beacon_on) (struct scsi_qla_host *);
2215 int (*beacon_off) (struct scsi_qla_host *);
2216 void (*beacon_blink) (struct scsi_qla_host *);
2217
2218 uint8_t * (*read_optrom) (struct scsi_qla_host *, uint8_t *,
2219 uint32_t, uint32_t);
2220 int (*write_optrom) (struct scsi_qla_host *, uint8_t *, uint32_t,
2221 uint32_t);
2202}; 2222};
2203 2223
2204/* 2224/*
@@ -2331,6 +2351,10 @@ typedef struct scsi_qla_host {
2331 uint16_t min_external_loopid; /* First external loop Id */ 2351 uint16_t min_external_loopid; /* First external loop Id */
2332 2352
2333 uint16_t link_data_rate; /* F/W operating speed */ 2353 uint16_t link_data_rate; /* F/W operating speed */
2354#define LDR_1GB 0
2355#define LDR_2GB 1
2356#define LDR_4GB 3
2357#define LDR_UNKNOWN 0xFFFF
2334 2358
2335 uint8_t current_topology; 2359 uint8_t current_topology;
2336 uint8_t prev_topology; 2360 uint8_t prev_topology;
@@ -2486,12 +2510,26 @@ typedef struct scsi_qla_host {
2486 uint8_t *port_name; 2510 uint8_t *port_name;
2487 uint32_t isp_abort_cnt; 2511 uint32_t isp_abort_cnt;
2488 2512
2513 /* Option ROM information. */
2514 char *optrom_buffer;
2515 uint32_t optrom_size;
2516 int optrom_state;
2517#define QLA_SWAITING 0
2518#define QLA_SREADING 1
2519#define QLA_SWRITING 2
2520
2489 /* Needed for BEACON */ 2521 /* Needed for BEACON */
2490 uint16_t beacon_blink_led; 2522 uint16_t beacon_blink_led;
2491 uint16_t beacon_green_on; 2523 uint8_t beacon_color_state;
2524#define QLA_LED_GRN_ON 0x01
2525#define QLA_LED_YLW_ON 0x02
2526#define QLA_LED_ABR_ON 0x04
2527#define QLA_LED_ALL_ON 0x07 /* yellow, green, amber. */
2528 /* ISP2322: red, green, amber. */
2492 2529
2493 uint16_t zio_mode; 2530 uint16_t zio_mode;
2494 uint16_t zio_timer; 2531 uint16_t zio_timer;
2532 struct fc_host_statistics fc_host_stat;
2495} scsi_qla_host_t; 2533} scsi_qla_host_t;
2496 2534
2497 2535
@@ -2557,7 +2595,9 @@ struct _qla2x00stats {
2557/* 2595/*
2558 * Flash support definitions 2596 * Flash support definitions
2559 */ 2597 */
2560#define FLASH_IMAGE_SIZE 131072 2598#define OPTROM_SIZE_2300 0x20000
2599#define OPTROM_SIZE_2322 0x100000
2600#define OPTROM_SIZE_24XX 0x100000
2561 2601
2562#include "qla_gbl.h" 2602#include "qla_gbl.h"
2563#include "qla_dbg.h" 2603#include "qla_dbg.h"
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
index 35266bd5d538..ffdc2680f049 100644
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -75,12 +75,12 @@ extern void qla2x00_cmd_timeout(srb_t *);
75extern void qla2x00_mark_device_lost(scsi_qla_host_t *, fc_port_t *, int, int); 75extern void qla2x00_mark_device_lost(scsi_qla_host_t *, fc_port_t *, int, int);
76extern void qla2x00_mark_all_devices_lost(scsi_qla_host_t *, int); 76extern void qla2x00_mark_all_devices_lost(scsi_qla_host_t *, int);
77 77
78extern void qla2x00_blink_led(scsi_qla_host_t *);
79
80extern int qla2x00_down_timeout(struct semaphore *, unsigned long); 78extern int qla2x00_down_timeout(struct semaphore *, unsigned long);
81 79
82extern struct fw_blob *qla2x00_request_firmware(scsi_qla_host_t *); 80extern struct fw_blob *qla2x00_request_firmware(scsi_qla_host_t *);
83 81
82extern int qla2x00_wait_for_hba_online(scsi_qla_host_t *);
83
84/* 84/*
85 * Global Function Prototypes in qla_iocb.c source file. 85 * Global Function Prototypes in qla_iocb.c source file.
86 */ 86 */
@@ -185,6 +185,13 @@ qla2x00_get_resource_cnts(scsi_qla_host_t *, uint16_t *, uint16_t *, uint16_t *,
185extern int 185extern int
186qla2x00_get_fcal_position_map(scsi_qla_host_t *ha, char *pos_map); 186qla2x00_get_fcal_position_map(scsi_qla_host_t *ha, char *pos_map);
187 187
188extern int
189qla2x00_get_link_status(scsi_qla_host_t *, uint16_t, link_stat_t *,
190 uint16_t *);
191
192extern int
193qla24xx_get_isp_stats(scsi_qla_host_t *, uint32_t *, uint32_t, uint16_t *);
194
188extern int qla24xx_abort_command(scsi_qla_host_t *, srb_t *); 195extern int qla24xx_abort_command(scsi_qla_host_t *, srb_t *);
189extern int qla24xx_abort_target(fc_port_t *); 196extern int qla24xx_abort_target(fc_port_t *);
190 197
@@ -228,6 +235,22 @@ extern int qla2x00_write_nvram_data(scsi_qla_host_t *, uint8_t *, uint32_t,
228extern int qla24xx_write_nvram_data(scsi_qla_host_t *, uint8_t *, uint32_t, 235extern int qla24xx_write_nvram_data(scsi_qla_host_t *, uint8_t *, uint32_t,
229 uint32_t); 236 uint32_t);
230 237
238extern int qla2x00_beacon_on(struct scsi_qla_host *);
239extern int qla2x00_beacon_off(struct scsi_qla_host *);
240extern void qla2x00_beacon_blink(struct scsi_qla_host *);
241extern int qla24xx_beacon_on(struct scsi_qla_host *);
242extern int qla24xx_beacon_off(struct scsi_qla_host *);
243extern void qla24xx_beacon_blink(struct scsi_qla_host *);
244
245extern uint8_t *qla2x00_read_optrom_data(struct scsi_qla_host *, uint8_t *,
246 uint32_t, uint32_t);
247extern int qla2x00_write_optrom_data(struct scsi_qla_host *, uint8_t *,
248 uint32_t, uint32_t);
249extern uint8_t *qla24xx_read_optrom_data(struct scsi_qla_host *, uint8_t *,
250 uint32_t, uint32_t);
251extern int qla24xx_write_optrom_data(struct scsi_qla_host *, uint8_t *,
252 uint32_t, uint32_t);
253
231/* 254/*
232 * Global Function Prototypes in qla_dbg.c source file. 255 * Global Function Prototypes in qla_dbg.c source file.
233 */ 256 */
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index e67bb0997818..634ee174bff2 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -8,7 +8,6 @@
8 8
9#include <linux/delay.h> 9#include <linux/delay.h>
10#include <linux/vmalloc.h> 10#include <linux/vmalloc.h>
11#include <scsi/scsi_transport_fc.h>
12 11
13#include "qla_devtbl.h" 12#include "qla_devtbl.h"
14 13
diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c
index 7ec0b8d6f07b..6544b6d0891d 100644
--- a/drivers/scsi/qla2xxx/qla_iocb.c
+++ b/drivers/scsi/qla2xxx/qla_iocb.c
@@ -814,6 +814,7 @@ qla24xx_start_scsi(srb_t *sp)
814 cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain; 814 cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
815 815
816 int_to_scsilun(sp->cmd->device->lun, &cmd_pkt->lun); 816 int_to_scsilun(sp->cmd->device->lun, &cmd_pkt->lun);
817 host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
817 818
818 /* Load SCSI command packet. */ 819 /* Load SCSI command packet. */
819 memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len); 820 memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index 71a46fcee8cc..42aa7a7c1a73 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -402,9 +402,9 @@ qla2x00_async_event(scsi_qla_host_t *ha, uint16_t *mb)
402 break; 402 break;
403 403
404 case MBA_LOOP_UP: /* Loop Up Event */ 404 case MBA_LOOP_UP: /* Loop Up Event */
405 ha->link_data_rate = 0;
406 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 405 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
407 link_speed = link_speeds[0]; 406 link_speed = link_speeds[0];
407 ha->link_data_rate = LDR_1GB;
408 } else { 408 } else {
409 link_speed = link_speeds[LS_UNKNOWN]; 409 link_speed = link_speeds[LS_UNKNOWN];
410 if (mb[1] < 5) 410 if (mb[1] < 5)
@@ -436,7 +436,7 @@ qla2x00_async_event(scsi_qla_host_t *ha, uint16_t *mb)
436 } 436 }
437 437
438 ha->flags.management_server_logged_in = 0; 438 ha->flags.management_server_logged_in = 0;
439 ha->link_data_rate = 0; 439 ha->link_data_rate = LDR_UNKNOWN;
440 if (ql2xfdmienable) 440 if (ql2xfdmienable)
441 set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags); 441 set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags);
442 442
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 3099b379de9d..363dfdd042b0 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -7,7 +7,6 @@
7#include "qla_def.h" 7#include "qla_def.h"
8 8
9#include <linux/delay.h> 9#include <linux/delay.h>
10#include <scsi/scsi_transport_fc.h>
11 10
12static void 11static void
13qla2x00_mbx_sem_timeout(unsigned long data) 12qla2x00_mbx_sem_timeout(unsigned long data)
@@ -1874,7 +1873,8 @@ qla2x00_get_id_list(scsi_qla_host_t *ha, void *id_list, dma_addr_t id_list_dma,
1874 mcp->mb[3] = LSW(id_list_dma); 1873 mcp->mb[3] = LSW(id_list_dma);
1875 mcp->mb[6] = MSW(MSD(id_list_dma)); 1874 mcp->mb[6] = MSW(MSD(id_list_dma));
1876 mcp->mb[7] = LSW(MSD(id_list_dma)); 1875 mcp->mb[7] = LSW(MSD(id_list_dma));
1877 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2; 1876 mcp->mb[8] = 0;
1877 mcp->out_mb |= MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
1878 } else { 1878 } else {
1879 mcp->mb[1] = MSW(id_list_dma); 1879 mcp->mb[1] = MSW(id_list_dma);
1880 mcp->mb[2] = LSW(id_list_dma); 1880 mcp->mb[2] = LSW(id_list_dma);
@@ -2017,8 +2017,109 @@ qla2x00_get_fcal_position_map(scsi_qla_host_t *ha, char *pos_map)
2017 2017
2018 return rval; 2018 return rval;
2019} 2019}
2020#endif
2021
2022/*
2023 * qla2x00_get_link_status
2024 *
2025 * Input:
2026 * ha = adapter block pointer.
2027 * loop_id = device loop ID.
2028 * ret_buf = pointer to link status return buffer.
2029 *
2030 * Returns:
2031 * 0 = success.
2032 * BIT_0 = mem alloc error.
2033 * BIT_1 = mailbox error.
2034 */
2035int
2036qla2x00_get_link_status(scsi_qla_host_t *ha, uint16_t loop_id,
2037 link_stat_t *ret_buf, uint16_t *status)
2038{
2039 int rval;
2040 mbx_cmd_t mc;
2041 mbx_cmd_t *mcp = &mc;
2042 link_stat_t *stat_buf;
2043 dma_addr_t stat_buf_dma;
2044
2045 DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
2046
2047 stat_buf = dma_pool_alloc(ha->s_dma_pool, GFP_ATOMIC, &stat_buf_dma);
2048 if (stat_buf == NULL) {
2049 DEBUG2_3_11(printk("%s(%ld): Failed to allocate memory.\n",
2050 __func__, ha->host_no));
2051 return BIT_0;
2052 }
2053 memset(stat_buf, 0, sizeof(link_stat_t));
2054
2055 mcp->mb[0] = MBC_GET_LINK_STATUS;
2056 mcp->mb[2] = MSW(stat_buf_dma);
2057 mcp->mb[3] = LSW(stat_buf_dma);
2058 mcp->mb[6] = MSW(MSD(stat_buf_dma));
2059 mcp->mb[7] = LSW(MSD(stat_buf_dma));
2060 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2061 mcp->in_mb = MBX_0;
2062 if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
2063 mcp->mb[1] = loop_id;
2064 mcp->mb[4] = 0;
2065 mcp->mb[10] = 0;
2066 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2067 mcp->in_mb |= MBX_1;
2068 } else if (HAS_EXTENDED_IDS(ha)) {
2069 mcp->mb[1] = loop_id;
2070 mcp->mb[10] = 0;
2071 mcp->out_mb |= MBX_10|MBX_1;
2072 } else {
2073 mcp->mb[1] = loop_id << 8;
2074 mcp->out_mb |= MBX_1;
2075 }
2076 mcp->tov = 30;
2077 mcp->flags = IOCTL_CMD;
2078 rval = qla2x00_mailbox_command(ha, mcp);
2079
2080 if (rval == QLA_SUCCESS) {
2081 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2082 DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
2083 __func__, ha->host_no, mcp->mb[0]);)
2084 status[0] = mcp->mb[0];
2085 rval = BIT_1;
2086 } else {
2087 /* copy over data -- firmware data is LE. */
2088 ret_buf->link_fail_cnt =
2089 le32_to_cpu(stat_buf->link_fail_cnt);
2090 ret_buf->loss_sync_cnt =
2091 le32_to_cpu(stat_buf->loss_sync_cnt);
2092 ret_buf->loss_sig_cnt =
2093 le32_to_cpu(stat_buf->loss_sig_cnt);
2094 ret_buf->prim_seq_err_cnt =
2095 le32_to_cpu(stat_buf->prim_seq_err_cnt);
2096 ret_buf->inval_xmit_word_cnt =
2097 le32_to_cpu(stat_buf->inval_xmit_word_cnt);
2098 ret_buf->inval_crc_cnt =
2099 le32_to_cpu(stat_buf->inval_crc_cnt);
2100
2101 DEBUG11(printk("%s(%ld): stat dump: fail_cnt=%d "
2102 "loss_sync=%d loss_sig=%d seq_err=%d "
2103 "inval_xmt_word=%d inval_crc=%d.\n", __func__,
2104 ha->host_no, stat_buf->link_fail_cnt,
2105 stat_buf->loss_sync_cnt, stat_buf->loss_sig_cnt,
2106 stat_buf->prim_seq_err_cnt,
2107 stat_buf->inval_xmit_word_cnt,
2108 stat_buf->inval_crc_cnt);)
2109 }
2110 } else {
2111 /* Failed. */
2112 DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
2113 ha->host_no, rval);)
2114 rval = BIT_1;
2115 }
2116
2117 dma_pool_free(ha->s_dma_pool, stat_buf, stat_buf_dma);
2020 2118
2021uint8_t 2119 return rval;
2120}
2121
2122int
2022qla24xx_get_isp_stats(scsi_qla_host_t *ha, uint32_t *dwbuf, uint32_t dwords, 2123qla24xx_get_isp_stats(scsi_qla_host_t *ha, uint32_t *dwbuf, uint32_t dwords,
2023 uint16_t *status) 2124 uint16_t *status)
2024{ 2125{
@@ -2080,7 +2181,6 @@ qla24xx_get_isp_stats(scsi_qla_host_t *ha, uint32_t *dwbuf, uint32_t dwords,
2080 2181
2081 return rval; 2182 return rval;
2082} 2183}
2083#endif
2084 2184
2085int 2185int
2086qla24xx_abort_command(scsi_qla_host_t *ha, srb_t *sp) 2186qla24xx_abort_command(scsi_qla_host_t *ha, srb_t *sp)
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 5866a7c706a8..9f91f1a20542 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -366,6 +366,12 @@ qla2x00_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
366 goto qc_fail_command; 366 goto qc_fail_command;
367 } 367 }
368 368
369 /* Close window on fcport/rport state-transitioning. */
370 if (!*(fc_port_t **)rport->dd_data) {
371 cmd->result = DID_IMM_RETRY << 16;
372 goto qc_fail_command;
373 }
374
369 if (atomic_read(&fcport->state) != FCS_ONLINE) { 375 if (atomic_read(&fcport->state) != FCS_ONLINE) {
370 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD || 376 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
371 atomic_read(&ha->loop_state) == LOOP_DEAD) { 377 atomic_read(&ha->loop_state) == LOOP_DEAD) {
@@ -421,6 +427,12 @@ qla24xx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
421 goto qc24_fail_command; 427 goto qc24_fail_command;
422 } 428 }
423 429
430 /* Close window on fcport/rport state-transitioning. */
431 if (!*(fc_port_t **)rport->dd_data) {
432 cmd->result = DID_IMM_RETRY << 16;
433 goto qc24_fail_command;
434 }
435
424 if (atomic_read(&fcport->state) != FCS_ONLINE) { 436 if (atomic_read(&fcport->state) != FCS_ONLINE) {
425 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD || 437 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
426 atomic_read(&ha->loop_state) == LOOP_DEAD) { 438 atomic_read(&ha->loop_state) == LOOP_DEAD) {
@@ -513,7 +525,7 @@ qla2x00_eh_wait_on_command(scsi_qla_host_t *ha, struct scsi_cmnd *cmd)
513 * Success (Adapter is online) : 0 525 * Success (Adapter is online) : 0
514 * Failed (Adapter is offline/disabled) : 1 526 * Failed (Adapter is offline/disabled) : 1
515 */ 527 */
516static int 528int
517qla2x00_wait_for_hba_online(scsi_qla_host_t *ha) 529qla2x00_wait_for_hba_online(scsi_qla_host_t *ha)
518{ 530{
519 int return_status; 531 int return_status;
@@ -1312,6 +1324,8 @@ int qla2x00_probe_one(struct pci_dev *pdev, struct qla_board_info *brd_info)
1312 ha->ports = MAX_BUSES; 1324 ha->ports = MAX_BUSES;
1313 ha->init_cb_size = sizeof(init_cb_t); 1325 ha->init_cb_size = sizeof(init_cb_t);
1314 ha->mgmt_svr_loop_id = MANAGEMENT_SERVER; 1326 ha->mgmt_svr_loop_id = MANAGEMENT_SERVER;
1327 ha->link_data_rate = LDR_UNKNOWN;
1328 ha->optrom_size = OPTROM_SIZE_2300;
1315 1329
1316 /* Assign ISP specific operations. */ 1330 /* Assign ISP specific operations. */
1317 ha->isp_ops.pci_config = qla2100_pci_config; 1331 ha->isp_ops.pci_config = qla2100_pci_config;
@@ -1339,6 +1353,8 @@ int qla2x00_probe_one(struct pci_dev *pdev, struct qla_board_info *brd_info)
1339 ha->isp_ops.write_nvram = qla2x00_write_nvram_data; 1353 ha->isp_ops.write_nvram = qla2x00_write_nvram_data;
1340 ha->isp_ops.fw_dump = qla2100_fw_dump; 1354 ha->isp_ops.fw_dump = qla2100_fw_dump;
1341 ha->isp_ops.ascii_fw_dump = qla2100_ascii_fw_dump; 1355 ha->isp_ops.ascii_fw_dump = qla2100_ascii_fw_dump;
1356 ha->isp_ops.read_optrom = qla2x00_read_optrom_data;
1357 ha->isp_ops.write_optrom = qla2x00_write_optrom_data;
1342 if (IS_QLA2100(ha)) { 1358 if (IS_QLA2100(ha)) {
1343 host->max_id = MAX_TARGETS_2100; 1359 host->max_id = MAX_TARGETS_2100;
1344 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100; 1360 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
@@ -1364,7 +1380,12 @@ int qla2x00_probe_one(struct pci_dev *pdev, struct qla_board_info *brd_info)
1364 ha->isp_ops.intr_handler = qla2300_intr_handler; 1380 ha->isp_ops.intr_handler = qla2300_intr_handler;
1365 ha->isp_ops.fw_dump = qla2300_fw_dump; 1381 ha->isp_ops.fw_dump = qla2300_fw_dump;
1366 ha->isp_ops.ascii_fw_dump = qla2300_ascii_fw_dump; 1382 ha->isp_ops.ascii_fw_dump = qla2300_ascii_fw_dump;
1383 ha->isp_ops.beacon_on = qla2x00_beacon_on;
1384 ha->isp_ops.beacon_off = qla2x00_beacon_off;
1385 ha->isp_ops.beacon_blink = qla2x00_beacon_blink;
1367 ha->gid_list_info_size = 6; 1386 ha->gid_list_info_size = 6;
1387 if (IS_QLA2322(ha) || IS_QLA6322(ha))
1388 ha->optrom_size = OPTROM_SIZE_2322;
1368 } else if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) { 1389 } else if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
1369 host->max_id = MAX_TARGETS_2200; 1390 host->max_id = MAX_TARGETS_2200;
1370 ha->mbx_count = MAILBOX_REGISTER_COUNT; 1391 ha->mbx_count = MAILBOX_REGISTER_COUNT;
@@ -1400,7 +1421,13 @@ int qla2x00_probe_one(struct pci_dev *pdev, struct qla_board_info *brd_info)
1400 ha->isp_ops.write_nvram = qla24xx_write_nvram_data; 1421 ha->isp_ops.write_nvram = qla24xx_write_nvram_data;
1401 ha->isp_ops.fw_dump = qla24xx_fw_dump; 1422 ha->isp_ops.fw_dump = qla24xx_fw_dump;
1402 ha->isp_ops.ascii_fw_dump = qla24xx_ascii_fw_dump; 1423 ha->isp_ops.ascii_fw_dump = qla24xx_ascii_fw_dump;
1424 ha->isp_ops.read_optrom = qla24xx_read_optrom_data;
1425 ha->isp_ops.write_optrom = qla24xx_write_optrom_data;
1426 ha->isp_ops.beacon_on = qla24xx_beacon_on;
1427 ha->isp_ops.beacon_off = qla24xx_beacon_off;
1428 ha->isp_ops.beacon_blink = qla24xx_beacon_blink;
1403 ha->gid_list_info_size = 8; 1429 ha->gid_list_info_size = 8;
1430 ha->optrom_size = OPTROM_SIZE_24XX;
1404 } 1431 }
1405 host->can_queue = ha->request_q_length + 128; 1432 host->can_queue = ha->request_q_length + 128;
1406 1433
@@ -1657,11 +1684,13 @@ qla2x00_schedule_rport_del(struct scsi_qla_host *ha, fc_port_t *fcport,
1657 spin_lock_irqsave(&fcport->rport_lock, flags); 1684 spin_lock_irqsave(&fcport->rport_lock, flags);
1658 fcport->drport = rport; 1685 fcport->drport = rport;
1659 fcport->rport = NULL; 1686 fcport->rport = NULL;
1687 *(fc_port_t **)rport->dd_data = NULL;
1660 spin_unlock_irqrestore(&fcport->rport_lock, flags); 1688 spin_unlock_irqrestore(&fcport->rport_lock, flags);
1661 set_bit(FCPORT_UPDATE_NEEDED, &ha->dpc_flags); 1689 set_bit(FCPORT_UPDATE_NEEDED, &ha->dpc_flags);
1662 } else { 1690 } else {
1663 spin_lock_irqsave(&fcport->rport_lock, flags); 1691 spin_lock_irqsave(&fcport->rport_lock, flags);
1664 fcport->rport = NULL; 1692 fcport->rport = NULL;
1693 *(fc_port_t **)rport->dd_data = NULL;
1665 spin_unlock_irqrestore(&fcport->rport_lock, flags); 1694 spin_unlock_irqrestore(&fcport->rport_lock, flags);
1666 fc_remote_port_delete(rport); 1695 fc_remote_port_delete(rport);
1667 } 1696 }
@@ -2066,6 +2095,8 @@ qla2x00_mem_free(scsi_qla_host_t *ha)
2066 ha->fw_dumped = 0; 2095 ha->fw_dumped = 0;
2067 ha->fw_dump_reading = 0; 2096 ha->fw_dump_reading = 0;
2068 ha->fw_dump_buffer = NULL; 2097 ha->fw_dump_buffer = NULL;
2098
2099 vfree(ha->optrom_buffer);
2069} 2100}
2070 2101
2071/* 2102/*
@@ -2314,6 +2345,9 @@ qla2x00_do_dpc(void *data)
2314 if (!ha->interrupts_on) 2345 if (!ha->interrupts_on)
2315 ha->isp_ops.enable_intrs(ha); 2346 ha->isp_ops.enable_intrs(ha);
2316 2347
2348 if (test_and_clear_bit(BEACON_BLINK_NEEDED, &ha->dpc_flags))
2349 ha->isp_ops.beacon_blink(ha);
2350
2317 ha->dpc_active = 0; 2351 ha->dpc_active = 0;
2318 } /* End of while(1) */ 2352 } /* End of while(1) */
2319 2353
@@ -2491,6 +2525,12 @@ qla2x00_timer(scsi_qla_host_t *ha)
2491 atomic_read(&ha->loop_down_timer))); 2525 atomic_read(&ha->loop_down_timer)));
2492 } 2526 }
2493 2527
2528 /* Check if beacon LED needs to be blinked */
2529 if (ha->beacon_blink_led == 1) {
2530 set_bit(BEACON_BLINK_NEEDED, &ha->dpc_flags);
2531 start_dpc++;
2532 }
2533
2494 /* Schedule the DPC routine if needed */ 2534 /* Schedule the DPC routine if needed */
2495 if ((test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || 2535 if ((test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) ||
2496 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || 2536 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) ||
@@ -2499,6 +2539,7 @@ qla2x00_timer(scsi_qla_host_t *ha)
2499 start_dpc || 2539 start_dpc ||
2500 test_bit(LOGIN_RETRY_NEEDED, &ha->dpc_flags) || 2540 test_bit(LOGIN_RETRY_NEEDED, &ha->dpc_flags) ||
2501 test_bit(RESET_MARKER_NEEDED, &ha->dpc_flags) || 2541 test_bit(RESET_MARKER_NEEDED, &ha->dpc_flags) ||
2542 test_bit(BEACON_BLINK_NEEDED, &ha->dpc_flags) ||
2502 test_bit(RELOGIN_NEEDED, &ha->dpc_flags)) && 2543 test_bit(RELOGIN_NEEDED, &ha->dpc_flags)) &&
2503 ha->dpc_wait && !ha->dpc_active) { 2544 ha->dpc_wait && !ha->dpc_active) {
2504 2545
diff --git a/drivers/scsi/qla2xxx/qla_rscn.c b/drivers/scsi/qla2xxx/qla_rscn.c
index 2c3342108dd8..b70bebe18c01 100644
--- a/drivers/scsi/qla2xxx/qla_rscn.c
+++ b/drivers/scsi/qla2xxx/qla_rscn.c
@@ -6,8 +6,6 @@
6 */ 6 */
7#include "qla_def.h" 7#include "qla_def.h"
8 8
9#include <scsi/scsi_transport_fc.h>
10
11/** 9/**
12 * IO descriptor handle definitions. 10 * IO descriptor handle definitions.
13 * 11 *
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c
index f4d755a643e4..3866a5760f15 100644
--- a/drivers/scsi/qla2xxx/qla_sup.c
+++ b/drivers/scsi/qla2xxx/qla_sup.c
@@ -695,3 +695,966 @@ qla24xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
695 695
696 return ret; 696 return ret;
697} 697}
698
699
700static inline void
701qla2x00_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags)
702{
703 if (IS_QLA2322(ha)) {
704 /* Flip all colors. */
705 if (ha->beacon_color_state == QLA_LED_ALL_ON) {
706 /* Turn off. */
707 ha->beacon_color_state = 0;
708 *pflags = GPIO_LED_ALL_OFF;
709 } else {
710 /* Turn on. */
711 ha->beacon_color_state = QLA_LED_ALL_ON;
712 *pflags = GPIO_LED_RGA_ON;
713 }
714 } else {
715 /* Flip green led only. */
716 if (ha->beacon_color_state == QLA_LED_GRN_ON) {
717 /* Turn off. */
718 ha->beacon_color_state = 0;
719 *pflags = GPIO_LED_GREEN_OFF_AMBER_OFF;
720 } else {
721 /* Turn on. */
722 ha->beacon_color_state = QLA_LED_GRN_ON;
723 *pflags = GPIO_LED_GREEN_ON_AMBER_OFF;
724 }
725 }
726}
727
728void
729qla2x00_beacon_blink(struct scsi_qla_host *ha)
730{
731 uint16_t gpio_enable;
732 uint16_t gpio_data;
733 uint16_t led_color = 0;
734 unsigned long flags;
735 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
736
737 if (ha->pio_address)
738 reg = (struct device_reg_2xxx __iomem *)ha->pio_address;
739
740 spin_lock_irqsave(&ha->hardware_lock, flags);
741
742 /* Save the Original GPIOE. */
743 if (ha->pio_address) {
744 gpio_enable = RD_REG_WORD_PIO(&reg->gpioe);
745 gpio_data = RD_REG_WORD_PIO(&reg->gpiod);
746 } else {
747 gpio_enable = RD_REG_WORD(&reg->gpioe);
748 gpio_data = RD_REG_WORD(&reg->gpiod);
749 }
750
751 /* Set the modified gpio_enable values */
752 gpio_enable |= GPIO_LED_MASK;
753
754 if (ha->pio_address) {
755 WRT_REG_WORD_PIO(&reg->gpioe, gpio_enable);
756 } else {
757 WRT_REG_WORD(&reg->gpioe, gpio_enable);
758 RD_REG_WORD(&reg->gpioe);
759 }
760
761 qla2x00_flip_colors(ha, &led_color);
762
763 /* Clear out any previously set LED color. */
764 gpio_data &= ~GPIO_LED_MASK;
765
766 /* Set the new input LED color to GPIOD. */
767 gpio_data |= led_color;
768
769 /* Set the modified gpio_data values */
770 if (ha->pio_address) {
771 WRT_REG_WORD_PIO(&reg->gpiod, gpio_data);
772 } else {
773 WRT_REG_WORD(&reg->gpiod, gpio_data);
774 RD_REG_WORD(&reg->gpiod);
775 }
776
777 spin_unlock_irqrestore(&ha->hardware_lock, flags);
778}
779
780int
781qla2x00_beacon_on(struct scsi_qla_host *ha)
782{
783 uint16_t gpio_enable;
784 uint16_t gpio_data;
785 unsigned long flags;
786 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
787
788 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
789 ha->fw_options[1] |= FO1_DISABLE_GPIO6_7;
790
791 if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) {
792 qla_printk(KERN_WARNING, ha,
793 "Unable to update fw options (beacon on).\n");
794 return QLA_FUNCTION_FAILED;
795 }
796
797 if (ha->pio_address)
798 reg = (struct device_reg_2xxx __iomem *)ha->pio_address;
799
800 /* Turn off LEDs. */
801 spin_lock_irqsave(&ha->hardware_lock, flags);
802 if (ha->pio_address) {
803 gpio_enable = RD_REG_WORD_PIO(&reg->gpioe);
804 gpio_data = RD_REG_WORD_PIO(&reg->gpiod);
805 } else {
806 gpio_enable = RD_REG_WORD(&reg->gpioe);
807 gpio_data = RD_REG_WORD(&reg->gpiod);
808 }
809 gpio_enable |= GPIO_LED_MASK;
810
811 /* Set the modified gpio_enable values. */
812 if (ha->pio_address) {
813 WRT_REG_WORD_PIO(&reg->gpioe, gpio_enable);
814 } else {
815 WRT_REG_WORD(&reg->gpioe, gpio_enable);
816 RD_REG_WORD(&reg->gpioe);
817 }
818
819 /* Clear out previously set LED colour. */
820 gpio_data &= ~GPIO_LED_MASK;
821 if (ha->pio_address) {
822 WRT_REG_WORD_PIO(&reg->gpiod, gpio_data);
823 } else {
824 WRT_REG_WORD(&reg->gpiod, gpio_data);
825 RD_REG_WORD(&reg->gpiod);
826 }
827 spin_unlock_irqrestore(&ha->hardware_lock, flags);
828
829 /*
830 * Let the per HBA timer kick off the blinking process based on
831 * the following flags. No need to do anything else now.
832 */
833 ha->beacon_blink_led = 1;
834 ha->beacon_color_state = 0;
835
836 return QLA_SUCCESS;
837}
838
839int
840qla2x00_beacon_off(struct scsi_qla_host *ha)
841{
842 int rval = QLA_SUCCESS;
843
844 ha->beacon_blink_led = 0;
845
846 /* Set the on flag so when it gets flipped it will be off. */
847 if (IS_QLA2322(ha))
848 ha->beacon_color_state = QLA_LED_ALL_ON;
849 else
850 ha->beacon_color_state = QLA_LED_GRN_ON;
851
852 ha->isp_ops.beacon_blink(ha); /* This turns green LED off */
853
854 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
855 ha->fw_options[1] &= ~FO1_DISABLE_GPIO6_7;
856
857 rval = qla2x00_set_fw_options(ha, ha->fw_options);
858 if (rval != QLA_SUCCESS)
859 qla_printk(KERN_WARNING, ha,
860 "Unable to update fw options (beacon off).\n");
861 return rval;
862}
863
864
865static inline void
866qla24xx_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags)
867{
868 /* Flip all colors. */
869 if (ha->beacon_color_state == QLA_LED_ALL_ON) {
870 /* Turn off. */
871 ha->beacon_color_state = 0;
872 *pflags = 0;
873 } else {
874 /* Turn on. */
875 ha->beacon_color_state = QLA_LED_ALL_ON;
876 *pflags = GPDX_LED_YELLOW_ON | GPDX_LED_AMBER_ON;
877 }
878}
879
880void
881qla24xx_beacon_blink(struct scsi_qla_host *ha)
882{
883 uint16_t led_color = 0;
884 uint32_t gpio_data;
885 unsigned long flags;
886 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
887
888 /* Save the Original GPIOD. */
889 spin_lock_irqsave(&ha->hardware_lock, flags);
890 gpio_data = RD_REG_DWORD(&reg->gpiod);
891
892 /* Enable the gpio_data reg for update. */
893 gpio_data |= GPDX_LED_UPDATE_MASK;
894
895 WRT_REG_DWORD(&reg->gpiod, gpio_data);
896 gpio_data = RD_REG_DWORD(&reg->gpiod);
897
898 /* Set the color bits. */
899 qla24xx_flip_colors(ha, &led_color);
900
901 /* Clear out any previously set LED color. */
902 gpio_data &= ~GPDX_LED_COLOR_MASK;
903
904 /* Set the new input LED color to GPIOD. */
905 gpio_data |= led_color;
906
907 /* Set the modified gpio_data values. */
908 WRT_REG_DWORD(&reg->gpiod, gpio_data);
909 gpio_data = RD_REG_DWORD(&reg->gpiod);
910 spin_unlock_irqrestore(&ha->hardware_lock, flags);
911}
912
913int
914qla24xx_beacon_on(struct scsi_qla_host *ha)
915{
916 uint32_t gpio_data;
917 unsigned long flags;
918 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
919
920 if (ha->beacon_blink_led == 0) {
921 /* Enable firmware for update */
922 ha->fw_options[1] |= ADD_FO1_DISABLE_GPIO_LED_CTRL;
923
924 if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS)
925 return QLA_FUNCTION_FAILED;
926
927 if (qla2x00_get_fw_options(ha, ha->fw_options) !=
928 QLA_SUCCESS) {
929 qla_printk(KERN_WARNING, ha,
930 "Unable to update fw options (beacon on).\n");
931 return QLA_FUNCTION_FAILED;
932 }
933
934 spin_lock_irqsave(&ha->hardware_lock, flags);
935 gpio_data = RD_REG_DWORD(&reg->gpiod);
936
937 /* Enable the gpio_data reg for update. */
938 gpio_data |= GPDX_LED_UPDATE_MASK;
939 WRT_REG_DWORD(&reg->gpiod, gpio_data);
940 RD_REG_DWORD(&reg->gpiod);
941
942 spin_unlock_irqrestore(&ha->hardware_lock, flags);
943 }
944
945 /* So all colors blink together. */
946 ha->beacon_color_state = 0;
947
948 /* Let the per HBA timer kick off the blinking process. */
949 ha->beacon_blink_led = 1;
950
951 return QLA_SUCCESS;
952}
953
954int
955qla24xx_beacon_off(struct scsi_qla_host *ha)
956{
957 uint32_t gpio_data;
958 unsigned long flags;
959 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
960
961 ha->beacon_blink_led = 0;
962 ha->beacon_color_state = QLA_LED_ALL_ON;
963
964 ha->isp_ops.beacon_blink(ha); /* Will flip to all off. */
965
966 /* Give control back to firmware. */
967 spin_lock_irqsave(&ha->hardware_lock, flags);
968 gpio_data = RD_REG_DWORD(&reg->gpiod);
969
970 /* Disable the gpio_data reg for update. */
971 gpio_data &= ~GPDX_LED_UPDATE_MASK;
972 WRT_REG_DWORD(&reg->gpiod, gpio_data);
973 RD_REG_DWORD(&reg->gpiod);
974 spin_unlock_irqrestore(&ha->hardware_lock, flags);
975
976 ha->fw_options[1] &= ~ADD_FO1_DISABLE_GPIO_LED_CTRL;
977
978 if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) {
979 qla_printk(KERN_WARNING, ha,
980 "Unable to update fw options (beacon off).\n");
981 return QLA_FUNCTION_FAILED;
982 }
983
984 if (qla2x00_get_fw_options(ha, ha->fw_options) != QLA_SUCCESS) {
985 qla_printk(KERN_WARNING, ha,
986 "Unable to get fw options (beacon off).\n");
987 return QLA_FUNCTION_FAILED;
988 }
989
990 return QLA_SUCCESS;
991}
992
993
994/*
995 * Flash support routines
996 */
997
998/**
999 * qla2x00_flash_enable() - Setup flash for reading and writing.
1000 * @ha: HA context
1001 */
1002static void
1003qla2x00_flash_enable(scsi_qla_host_t *ha)
1004{
1005 uint16_t data;
1006 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1007
1008 data = RD_REG_WORD(&reg->ctrl_status);
1009 data |= CSR_FLASH_ENABLE;
1010 WRT_REG_WORD(&reg->ctrl_status, data);
1011 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1012}
1013
1014/**
1015 * qla2x00_flash_disable() - Disable flash and allow RISC to run.
1016 * @ha: HA context
1017 */
1018static void
1019qla2x00_flash_disable(scsi_qla_host_t *ha)
1020{
1021 uint16_t data;
1022 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1023
1024 data = RD_REG_WORD(&reg->ctrl_status);
1025 data &= ~(CSR_FLASH_ENABLE);
1026 WRT_REG_WORD(&reg->ctrl_status, data);
1027 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1028}
1029
1030/**
1031 * qla2x00_read_flash_byte() - Reads a byte from flash
1032 * @ha: HA context
1033 * @addr: Address in flash to read
1034 *
1035 * A word is read from the chip, but, only the lower byte is valid.
1036 *
1037 * Returns the byte read from flash @addr.
1038 */
1039static uint8_t
1040qla2x00_read_flash_byte(scsi_qla_host_t *ha, uint32_t addr)
1041{
1042 uint16_t data;
1043 uint16_t bank_select;
1044 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1045
1046 bank_select = RD_REG_WORD(&reg->ctrl_status);
1047
1048 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
1049 /* Specify 64K address range: */
1050 /* clear out Module Select and Flash Address bits [19:16]. */
1051 bank_select &= ~0xf8;
1052 bank_select |= addr >> 12 & 0xf0;
1053 bank_select |= CSR_FLASH_64K_BANK;
1054 WRT_REG_WORD(&reg->ctrl_status, bank_select);
1055 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1056
1057 WRT_REG_WORD(&reg->flash_address, (uint16_t)addr);
1058 data = RD_REG_WORD(&reg->flash_data);
1059
1060 return (uint8_t)data;
1061 }
1062
1063 /* Setup bit 16 of flash address. */
1064 if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {
1065 bank_select |= CSR_FLASH_64K_BANK;
1066 WRT_REG_WORD(&reg->ctrl_status, bank_select);
1067 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1068 } else if (((addr & BIT_16) == 0) &&
1069 (bank_select & CSR_FLASH_64K_BANK)) {
1070 bank_select &= ~(CSR_FLASH_64K_BANK);
1071 WRT_REG_WORD(&reg->ctrl_status, bank_select);
1072 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1073 }
1074
1075 /* Always perform IO mapped accesses to the FLASH registers. */
1076 if (ha->pio_address) {
1077 uint16_t data2;
1078
1079 reg = (struct device_reg_2xxx __iomem *)ha->pio_address;
1080 WRT_REG_WORD_PIO(&reg->flash_address, (uint16_t)addr);
1081 do {
1082 data = RD_REG_WORD_PIO(&reg->flash_data);
1083 barrier();
1084 cpu_relax();
1085 data2 = RD_REG_WORD_PIO(&reg->flash_data);
1086 } while (data != data2);
1087 } else {
1088 WRT_REG_WORD(&reg->flash_address, (uint16_t)addr);
1089 data = qla2x00_debounce_register(&reg->flash_data);
1090 }
1091
1092 return (uint8_t)data;
1093}
1094
1095/**
1096 * qla2x00_write_flash_byte() - Write a byte to flash
1097 * @ha: HA context
1098 * @addr: Address in flash to write
1099 * @data: Data to write
1100 */
1101static void
1102qla2x00_write_flash_byte(scsi_qla_host_t *ha, uint32_t addr, uint8_t data)
1103{
1104 uint16_t bank_select;
1105 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1106
1107 bank_select = RD_REG_WORD(&reg->ctrl_status);
1108 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
1109 /* Specify 64K address range: */
1110 /* clear out Module Select and Flash Address bits [19:16]. */
1111 bank_select &= ~0xf8;
1112 bank_select |= addr >> 12 & 0xf0;
1113 bank_select |= CSR_FLASH_64K_BANK;
1114 WRT_REG_WORD(&reg->ctrl_status, bank_select);
1115 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1116
1117 WRT_REG_WORD(&reg->flash_address, (uint16_t)addr);
1118 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1119 WRT_REG_WORD(&reg->flash_data, (uint16_t)data);
1120 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1121
1122 return;
1123 }
1124
1125 /* Setup bit 16 of flash address. */
1126 if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {
1127 bank_select |= CSR_FLASH_64K_BANK;
1128 WRT_REG_WORD(&reg->ctrl_status, bank_select);
1129 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1130 } else if (((addr & BIT_16) == 0) &&
1131 (bank_select & CSR_FLASH_64K_BANK)) {
1132 bank_select &= ~(CSR_FLASH_64K_BANK);
1133 WRT_REG_WORD(&reg->ctrl_status, bank_select);
1134 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1135 }
1136
1137 /* Always perform IO mapped accesses to the FLASH registers. */
1138 if (ha->pio_address) {
1139 reg = (struct device_reg_2xxx __iomem *)ha->pio_address;
1140 WRT_REG_WORD_PIO(&reg->flash_address, (uint16_t)addr);
1141 WRT_REG_WORD_PIO(&reg->flash_data, (uint16_t)data);
1142 } else {
1143 WRT_REG_WORD(&reg->flash_address, (uint16_t)addr);
1144 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1145 WRT_REG_WORD(&reg->flash_data, (uint16_t)data);
1146 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1147 }
1148}
1149
1150/**
1151 * qla2x00_poll_flash() - Polls flash for completion.
1152 * @ha: HA context
1153 * @addr: Address in flash to poll
1154 * @poll_data: Data to be polled
1155 * @man_id: Flash manufacturer ID
1156 * @flash_id: Flash ID
1157 *
1158 * This function polls the device until bit 7 of what is read matches data
1159 * bit 7 or until data bit 5 becomes a 1. If that hapens, the flash ROM timed
1160 * out (a fatal error). The flash book recommeds reading bit 7 again after
1161 * reading bit 5 as a 1.
1162 *
1163 * Returns 0 on success, else non-zero.
1164 */
1165static int
1166qla2x00_poll_flash(scsi_qla_host_t *ha, uint32_t addr, uint8_t poll_data,
1167 uint8_t man_id, uint8_t flash_id)
1168{
1169 int status;
1170 uint8_t flash_data;
1171 uint32_t cnt;
1172
1173 status = 1;
1174
1175 /* Wait for 30 seconds for command to finish. */
1176 poll_data &= BIT_7;
1177 for (cnt = 3000000; cnt; cnt--) {
1178 flash_data = qla2x00_read_flash_byte(ha, addr);
1179 if ((flash_data & BIT_7) == poll_data) {
1180 status = 0;
1181 break;
1182 }
1183
1184 if (man_id != 0x40 && man_id != 0xda) {
1185 if ((flash_data & BIT_5) && cnt > 2)
1186 cnt = 2;
1187 }
1188 udelay(10);
1189 barrier();
1190 }
1191 return status;
1192}
1193
1194#define IS_OEM_001(ha) \
1195 ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2322 && \
1196 (ha)->pdev->subsystem_vendor == 0x1028 && \
1197 (ha)->pdev->subsystem_device == 0x0170)
1198
1199/**
1200 * qla2x00_program_flash_address() - Programs a flash address
1201 * @ha: HA context
1202 * @addr: Address in flash to program
1203 * @data: Data to be written in flash
1204 * @man_id: Flash manufacturer ID
1205 * @flash_id: Flash ID
1206 *
1207 * Returns 0 on success, else non-zero.
1208 */
1209static int
1210qla2x00_program_flash_address(scsi_qla_host_t *ha, uint32_t addr, uint8_t data,
1211 uint8_t man_id, uint8_t flash_id)
1212{
1213 /* Write Program Command Sequence. */
1214 if (IS_OEM_001(ha)) {
1215 qla2x00_write_flash_byte(ha, 0xaaa, 0xaa);
1216 qla2x00_write_flash_byte(ha, 0x555, 0x55);
1217 qla2x00_write_flash_byte(ha, 0xaaa, 0xa0);
1218 qla2x00_write_flash_byte(ha, addr, data);
1219 } else {
1220 if (man_id == 0xda && flash_id == 0xc1) {
1221 qla2x00_write_flash_byte(ha, addr, data);
1222 if (addr & 0x7e)
1223 return 0;
1224 } else {
1225 qla2x00_write_flash_byte(ha, 0x5555, 0xaa);
1226 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55);
1227 qla2x00_write_flash_byte(ha, 0x5555, 0xa0);
1228 qla2x00_write_flash_byte(ha, addr, data);
1229 }
1230 }
1231
1232 udelay(150);
1233
1234 /* Wait for write to complete. */
1235 return qla2x00_poll_flash(ha, addr, data, man_id, flash_id);
1236}
1237
1238/**
1239 * qla2x00_erase_flash() - Erase the flash.
1240 * @ha: HA context
1241 * @man_id: Flash manufacturer ID
1242 * @flash_id: Flash ID
1243 *
1244 * Returns 0 on success, else non-zero.
1245 */
1246static int
1247qla2x00_erase_flash(scsi_qla_host_t *ha, uint8_t man_id, uint8_t flash_id)
1248{
1249 /* Individual Sector Erase Command Sequence */
1250 if (IS_OEM_001(ha)) {
1251 qla2x00_write_flash_byte(ha, 0xaaa, 0xaa);
1252 qla2x00_write_flash_byte(ha, 0x555, 0x55);
1253 qla2x00_write_flash_byte(ha, 0xaaa, 0x80);
1254 qla2x00_write_flash_byte(ha, 0xaaa, 0xaa);
1255 qla2x00_write_flash_byte(ha, 0x555, 0x55);
1256 qla2x00_write_flash_byte(ha, 0xaaa, 0x10);
1257 } else {
1258 qla2x00_write_flash_byte(ha, 0x5555, 0xaa);
1259 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55);
1260 qla2x00_write_flash_byte(ha, 0x5555, 0x80);
1261 qla2x00_write_flash_byte(ha, 0x5555, 0xaa);
1262 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55);
1263 qla2x00_write_flash_byte(ha, 0x5555, 0x10);
1264 }
1265
1266 udelay(150);
1267
1268 /* Wait for erase to complete. */
1269 return qla2x00_poll_flash(ha, 0x00, 0x80, man_id, flash_id);
1270}
1271
1272/**
1273 * qla2x00_erase_flash_sector() - Erase a flash sector.
1274 * @ha: HA context
1275 * @addr: Flash sector to erase
1276 * @sec_mask: Sector address mask
1277 * @man_id: Flash manufacturer ID
1278 * @flash_id: Flash ID
1279 *
1280 * Returns 0 on success, else non-zero.
1281 */
1282static int
1283qla2x00_erase_flash_sector(scsi_qla_host_t *ha, uint32_t addr,
1284 uint32_t sec_mask, uint8_t man_id, uint8_t flash_id)
1285{
1286 /* Individual Sector Erase Command Sequence */
1287 qla2x00_write_flash_byte(ha, 0x5555, 0xaa);
1288 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55);
1289 qla2x00_write_flash_byte(ha, 0x5555, 0x80);
1290 qla2x00_write_flash_byte(ha, 0x5555, 0xaa);
1291 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55);
1292 if (man_id == 0x1f && flash_id == 0x13)
1293 qla2x00_write_flash_byte(ha, addr & sec_mask, 0x10);
1294 else
1295 qla2x00_write_flash_byte(ha, addr & sec_mask, 0x30);
1296
1297 udelay(150);
1298
1299 /* Wait for erase to complete. */
1300 return qla2x00_poll_flash(ha, addr, 0x80, man_id, flash_id);
1301}
1302
1303/**
1304 * qla2x00_get_flash_manufacturer() - Read manufacturer ID from flash chip.
1305 * @man_id: Flash manufacturer ID
1306 * @flash_id: Flash ID
1307 */
1308static void
1309qla2x00_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id,
1310 uint8_t *flash_id)
1311{
1312 qla2x00_write_flash_byte(ha, 0x5555, 0xaa);
1313 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55);
1314 qla2x00_write_flash_byte(ha, 0x5555, 0x90);
1315 *man_id = qla2x00_read_flash_byte(ha, 0x0000);
1316 *flash_id = qla2x00_read_flash_byte(ha, 0x0001);
1317 qla2x00_write_flash_byte(ha, 0x5555, 0xaa);
1318 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55);
1319 qla2x00_write_flash_byte(ha, 0x5555, 0xf0);
1320}
1321
1322
1323static inline void
1324qla2x00_suspend_hba(struct scsi_qla_host *ha)
1325{
1326 int cnt;
1327 unsigned long flags;
1328 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1329
1330 /* Suspend HBA. */
1331 scsi_block_requests(ha->host);
1332 ha->isp_ops.disable_intrs(ha);
1333 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
1334
1335 /* Pause RISC. */
1336 spin_lock_irqsave(&ha->hardware_lock, flags);
1337 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
1338 RD_REG_WORD(&reg->hccr);
1339 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1340 for (cnt = 0; cnt < 30000; cnt++) {
1341 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
1342 break;
1343 udelay(100);
1344 }
1345 } else {
1346 udelay(10);
1347 }
1348 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1349}
1350
1351static inline void
1352qla2x00_resume_hba(struct scsi_qla_host *ha)
1353{
1354 /* Resume HBA. */
1355 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
1356 set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
1357 up(ha->dpc_wait);
1358 qla2x00_wait_for_hba_online(ha);
1359 scsi_unblock_requests(ha->host);
1360}
1361
1362uint8_t *
1363qla2x00_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
1364 uint32_t offset, uint32_t length)
1365{
1366 unsigned long flags;
1367 uint32_t addr, midpoint;
1368 uint8_t *data;
1369 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1370
1371 /* Suspend HBA. */
1372 qla2x00_suspend_hba(ha);
1373
1374 /* Go with read. */
1375 spin_lock_irqsave(&ha->hardware_lock, flags);
1376 midpoint = ha->optrom_size / 2;
1377
1378 qla2x00_flash_enable(ha);
1379 WRT_REG_WORD(&reg->nvram, 0);
1380 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
1381 for (addr = offset, data = buf; addr < length; addr++, data++) {
1382 if (addr == midpoint) {
1383 WRT_REG_WORD(&reg->nvram, NVR_SELECT);
1384 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
1385 }
1386
1387 *data = qla2x00_read_flash_byte(ha, addr);
1388 }
1389 qla2x00_flash_disable(ha);
1390 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1391
1392 /* Resume HBA. */
1393 qla2x00_resume_hba(ha);
1394
1395 return buf;
1396}
1397
1398int
1399qla2x00_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
1400 uint32_t offset, uint32_t length)
1401{
1402
1403 int rval;
1404 unsigned long flags;
1405 uint8_t man_id, flash_id, sec_number, data;
1406 uint16_t wd;
1407 uint32_t addr, liter, sec_mask, rest_addr;
1408 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1409
1410 /* Suspend HBA. */
1411 qla2x00_suspend_hba(ha);
1412
1413 rval = QLA_SUCCESS;
1414 sec_number = 0;
1415
1416 /* Reset ISP chip. */
1417 spin_lock_irqsave(&ha->hardware_lock, flags);
1418 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1419 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
1420
1421 /* Go with write. */
1422 qla2x00_flash_enable(ha);
1423 do { /* Loop once to provide quick error exit */
1424 /* Structure of flash memory based on manufacturer */
1425 if (IS_OEM_001(ha)) {
1426 /* OEM variant with special flash part. */
1427 man_id = flash_id = 0;
1428 rest_addr = 0xffff;
1429 sec_mask = 0x10000;
1430 goto update_flash;
1431 }
1432 qla2x00_get_flash_manufacturer(ha, &man_id, &flash_id);
1433 switch (man_id) {
1434 case 0x20: /* ST flash. */
1435 if (flash_id == 0xd2 || flash_id == 0xe3) {
1436 /*
1437 * ST m29w008at part - 64kb sector size with
1438 * 32kb,8kb,8kb,16kb sectors at memory address
1439 * 0xf0000.
1440 */
1441 rest_addr = 0xffff;
1442 sec_mask = 0x10000;
1443 break;
1444 }
1445 /*
1446 * ST m29w010b part - 16kb sector size
1447 * Default to 16kb sectors
1448 */
1449 rest_addr = 0x3fff;
1450 sec_mask = 0x1c000;
1451 break;
1452 case 0x40: /* Mostel flash. */
1453 /* Mostel v29c51001 part - 512 byte sector size. */
1454 rest_addr = 0x1ff;
1455 sec_mask = 0x1fe00;
1456 break;
1457 case 0xbf: /* SST flash. */
1458 /* SST39sf10 part - 4kb sector size. */
1459 rest_addr = 0xfff;
1460 sec_mask = 0x1f000;
1461 break;
1462 case 0xda: /* Winbond flash. */
1463 /* Winbond W29EE011 part - 256 byte sector size. */
1464 rest_addr = 0x7f;
1465 sec_mask = 0x1ff80;
1466 break;
1467 case 0xc2: /* Macronix flash. */
1468 /* 64k sector size. */
1469 if (flash_id == 0x38 || flash_id == 0x4f) {
1470 rest_addr = 0xffff;
1471 sec_mask = 0x10000;
1472 break;
1473 }
1474 /* Fall through... */
1475
1476 case 0x1f: /* Atmel flash. */
1477 /* 512k sector size. */
1478 if (flash_id == 0x13) {
1479 rest_addr = 0x7fffffff;
1480 sec_mask = 0x80000000;
1481 break;
1482 }
1483 /* Fall through... */
1484
1485 case 0x01: /* AMD flash. */
1486 if (flash_id == 0x38 || flash_id == 0x40 ||
1487 flash_id == 0x4f) {
1488 /* Am29LV081 part - 64kb sector size. */
1489 /* Am29LV002BT part - 64kb sector size. */
1490 rest_addr = 0xffff;
1491 sec_mask = 0x10000;
1492 break;
1493 } else if (flash_id == 0x3e) {
1494 /*
1495 * Am29LV008b part - 64kb sector size with
1496 * 32kb,8kb,8kb,16kb sector at memory address
1497 * h0xf0000.
1498 */
1499 rest_addr = 0xffff;
1500 sec_mask = 0x10000;
1501 break;
1502 } else if (flash_id == 0x20 || flash_id == 0x6e) {
1503 /*
1504 * Am29LV010 part or AM29f010 - 16kb sector
1505 * size.
1506 */
1507 rest_addr = 0x3fff;
1508 sec_mask = 0x1c000;
1509 break;
1510 } else if (flash_id == 0x6d) {
1511 /* Am29LV001 part - 8kb sector size. */
1512 rest_addr = 0x1fff;
1513 sec_mask = 0x1e000;
1514 break;
1515 }
1516 default:
1517 /* Default to 16 kb sector size. */
1518 rest_addr = 0x3fff;
1519 sec_mask = 0x1c000;
1520 break;
1521 }
1522
1523update_flash:
1524 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
1525 if (qla2x00_erase_flash(ha, man_id, flash_id)) {
1526 rval = QLA_FUNCTION_FAILED;
1527 break;
1528 }
1529 }
1530
1531 for (addr = offset, liter = 0; liter < length; liter++,
1532 addr++) {
1533 data = buf[liter];
1534 /* Are we at the beginning of a sector? */
1535 if ((addr & rest_addr) == 0) {
1536 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
1537 if (addr >= 0x10000UL) {
1538 if (((addr >> 12) & 0xf0) &&
1539 ((man_id == 0x01 &&
1540 flash_id == 0x3e) ||
1541 (man_id == 0x20 &&
1542 flash_id == 0xd2))) {
1543 sec_number++;
1544 if (sec_number == 1) {
1545 rest_addr =
1546 0x7fff;
1547 sec_mask =
1548 0x18000;
1549 } else if (
1550 sec_number == 2 ||
1551 sec_number == 3) {
1552 rest_addr =
1553 0x1fff;
1554 sec_mask =
1555 0x1e000;
1556 } else if (
1557 sec_number == 4) {
1558 rest_addr =
1559 0x3fff;
1560 sec_mask =
1561 0x1c000;
1562 }
1563 }
1564 }
1565 } else if (addr == ha->optrom_size / 2) {
1566 WRT_REG_WORD(&reg->nvram, NVR_SELECT);
1567 RD_REG_WORD(&reg->nvram);
1568 }
1569
1570 if (flash_id == 0xda && man_id == 0xc1) {
1571 qla2x00_write_flash_byte(ha, 0x5555,
1572 0xaa);
1573 qla2x00_write_flash_byte(ha, 0x2aaa,
1574 0x55);
1575 qla2x00_write_flash_byte(ha, 0x5555,
1576 0xa0);
1577 } else if (!IS_QLA2322(ha) && !IS_QLA6322(ha)) {
1578 /* Then erase it */
1579 if (qla2x00_erase_flash_sector(ha,
1580 addr, sec_mask, man_id,
1581 flash_id)) {
1582 rval = QLA_FUNCTION_FAILED;
1583 break;
1584 }
1585 if (man_id == 0x01 && flash_id == 0x6d)
1586 sec_number++;
1587 }
1588 }
1589
1590 if (man_id == 0x01 && flash_id == 0x6d) {
1591 if (sec_number == 1 &&
1592 addr == (rest_addr - 1)) {
1593 rest_addr = 0x0fff;
1594 sec_mask = 0x1f000;
1595 } else if (sec_number == 3 && (addr & 0x7ffe)) {
1596 rest_addr = 0x3fff;
1597 sec_mask = 0x1c000;
1598 }
1599 }
1600
1601 if (qla2x00_program_flash_address(ha, addr, data,
1602 man_id, flash_id)) {
1603 rval = QLA_FUNCTION_FAILED;
1604 break;
1605 }
1606 }
1607 } while (0);
1608 qla2x00_flash_disable(ha);
1609 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1610
1611 /* Resume HBA. */
1612 qla2x00_resume_hba(ha);
1613
1614 return rval;
1615}
1616
1617uint8_t *
1618qla24xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
1619 uint32_t offset, uint32_t length)
1620{
1621 /* Suspend HBA. */
1622 scsi_block_requests(ha->host);
1623 ha->isp_ops.disable_intrs(ha);
1624 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
1625
1626 /* Go with read. */
1627 qla24xx_read_flash_data(ha, (uint32_t *)buf, offset >> 2, length >> 2);
1628
1629 /* Resume HBA. */
1630 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
1631 ha->isp_ops.enable_intrs(ha);
1632 scsi_unblock_requests(ha->host);
1633
1634 return buf;
1635}
1636
1637int
1638qla24xx_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
1639 uint32_t offset, uint32_t length)
1640{
1641 int rval;
1642
1643 /* Suspend HBA. */
1644 scsi_block_requests(ha->host);
1645 ha->isp_ops.disable_intrs(ha);
1646 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
1647
1648 /* Go with write. */
1649 rval = qla24xx_write_flash_data(ha, (uint32_t *)buf, offset >> 2,
1650 length >> 2);
1651
1652 /* Resume HBA -- RISC reset needed. */
1653 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
1654 set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
1655 up(ha->dpc_wait);
1656 qla2x00_wait_for_hba_online(ha);
1657 scsi_unblock_requests(ha->host);
1658
1659 return rval;
1660}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-17 22:08:35 -0500