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path: root/drivers/scsi/qla2xxx/qla_sup.c
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Diffstat (limited to 'drivers/scsi/qla2xxx/qla_sup.c')
-rw-r--r--drivers/scsi/qla2xxx/qla_sup.c263
1 files changed, 84 insertions, 179 deletions
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c
index c538ee1b1a31..303f8ee11f25 100644
--- a/drivers/scsi/qla2xxx/qla_sup.c
+++ b/drivers/scsi/qla2xxx/qla_sup.c
@@ -425,27 +425,27 @@ qla2x00_set_nvram_protection(struct qla_hw_data *ha, int stat)
425#define OPTROM_BURST_DWORDS (OPTROM_BURST_SIZE / 4) 425#define OPTROM_BURST_DWORDS (OPTROM_BURST_SIZE / 4)
426 426
427static inline uint32_t 427static inline uint32_t
428flash_conf_to_access_addr(uint32_t faddr) 428flash_conf_addr(struct qla_hw_data *ha, uint32_t faddr)
429{ 429{
430 return FARX_ACCESS_FLASH_CONF | faddr; 430 return ha->flash_conf_off | faddr;
431} 431}
432 432
433static inline uint32_t 433static inline uint32_t
434flash_data_to_access_addr(uint32_t faddr) 434flash_data_addr(struct qla_hw_data *ha, uint32_t faddr)
435{ 435{
436 return FARX_ACCESS_FLASH_DATA | faddr; 436 return ha->flash_data_off | faddr;
437} 437}
438 438
439static inline uint32_t 439static inline uint32_t
440nvram_conf_to_access_addr(uint32_t naddr) 440nvram_conf_addr(struct qla_hw_data *ha, uint32_t naddr)
441{ 441{
442 return FARX_ACCESS_NVRAM_CONF | naddr; 442 return ha->nvram_conf_off | naddr;
443} 443}
444 444
445static inline uint32_t 445static inline uint32_t
446nvram_data_to_access_addr(uint32_t naddr) 446nvram_data_addr(struct qla_hw_data *ha, uint32_t naddr)
447{ 447{
448 return FARX_ACCESS_NVRAM_DATA | naddr; 448 return ha->nvram_data_off | naddr;
449} 449}
450 450
451static uint32_t 451static uint32_t
@@ -481,10 +481,12 @@ qla24xx_read_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr,
481 uint32_t dwords) 481 uint32_t dwords)
482{ 482{
483 uint32_t i; 483 uint32_t i;
484 struct qla_hw_data *ha = vha->hw;
485
484 /* Dword reads to flash. */ 486 /* Dword reads to flash. */
485 for (i = 0; i < dwords; i++, faddr++) 487 for (i = 0; i < dwords; i++, faddr++)
486 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw, 488 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha,
487 flash_data_to_access_addr(faddr))); 489 flash_data_addr(ha, faddr)));
488 490
489 return dwptr; 491 return dwptr;
490} 492}
@@ -518,7 +520,7 @@ qla24xx_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id,
518{ 520{
519 uint32_t ids; 521 uint32_t ids;
520 522
521 ids = qla24xx_read_flash_dword(ha, flash_data_to_access_addr(0xd03ab)); 523 ids = qla24xx_read_flash_dword(ha, flash_conf_addr(ha, 0x03ab));
522 *man_id = LSB(ids); 524 *man_id = LSB(ids);
523 *flash_id = MSB(ids); 525 *flash_id = MSB(ids);
524 526
@@ -530,8 +532,7 @@ qla24xx_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id,
530 * Example: ATMEL 0x00 01 45 1F 532 * Example: ATMEL 0x00 01 45 1F
531 * Extract MFG and Dev ID from last two bytes. 533 * Extract MFG and Dev ID from last two bytes.
532 */ 534 */
533 ids = qla24xx_read_flash_dword(ha, 535 ids = qla24xx_read_flash_dword(ha, flash_conf_addr(ha, 0x009f));
534 flash_data_to_access_addr(0xd009f));
535 *man_id = LSB(ids); 536 *man_id = LSB(ids);
536 *flash_id = MSB(ids); 537 *flash_id = MSB(ids);
537 } 538 }
@@ -555,9 +556,13 @@ qla2xxx_find_flt_start(scsi_qla_host_t *vha, uint32_t *start)
555 556
556 /* Begin with sane defaults. */ 557 /* Begin with sane defaults. */
557 loc = locations[0]; 558 loc = locations[0];
558 *start = IS_QLA24XX_TYPE(ha) ? FA_FLASH_LAYOUT_ADDR_24: 559 *start = 0;
559 FA_FLASH_LAYOUT_ADDR; 560 if (IS_QLA24XX_TYPE(ha))
560 561 *start = FA_FLASH_LAYOUT_ADDR_24;
562 else if (IS_QLA25XX(ha))
563 *start = FA_FLASH_LAYOUT_ADDR;
564 else if (IS_QLA81XX(ha))
565 *start = FA_FLASH_LAYOUT_ADDR_81;
561 /* Begin with first PCI expansion ROM header. */ 566 /* Begin with first PCI expansion ROM header. */
562 buf = (uint8_t *)req->ring; 567 buf = (uint8_t *)req->ring;
563 dcode = (uint32_t *)req->ring; 568 dcode = (uint32_t *)req->ring;
@@ -618,6 +623,22 @@ static void
618qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr) 623qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
619{ 624{
620 const char *loc, *locations[] = { "DEF", "FLT" }; 625 const char *loc, *locations[] = { "DEF", "FLT" };
626 const uint32_t def_fw[] =
627 { FA_RISC_CODE_ADDR, FA_RISC_CODE_ADDR, FA_RISC_CODE_ADDR_81 };
628 const uint32_t def_boot[] =
629 { FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR_81 };
630 const uint32_t def_vpd_nvram[] =
631 { FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR_81 };
632 const uint32_t def_fdt[] =
633 { FA_FLASH_DESCR_ADDR_24, FA_FLASH_DESCR_ADDR,
634 FA_FLASH_DESCR_ADDR_81 };
635 const uint32_t def_npiv_conf0[] =
636 { FA_NPIV_CONF0_ADDR_24, FA_NPIV_CONF0_ADDR,
637 FA_NPIV_CONF0_ADDR_81 };
638 const uint32_t def_npiv_conf1[] =
639 { FA_NPIV_CONF1_ADDR_24, FA_NPIV_CONF1_ADDR,
640 FA_NPIV_CONF1_ADDR_81 };
641 uint32_t def;
621 uint16_t *wptr; 642 uint16_t *wptr;
622 uint16_t cnt, chksum; 643 uint16_t cnt, chksum;
623 uint32_t start; 644 uint32_t start;
@@ -676,20 +697,12 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
676 case FLT_REG_FDT: 697 case FLT_REG_FDT:
677 ha->flt_region_fdt = start; 698 ha->flt_region_fdt = start;
678 break; 699 break;
679 case FLT_REG_HW_EVENT_0:
680 if (!PCI_FUNC(ha->pdev->devfn))
681 ha->flt_region_hw_event = start;
682 break;
683 case FLT_REG_HW_EVENT_1:
684 if (PCI_FUNC(ha->pdev->devfn))
685 ha->flt_region_hw_event = start;
686 break;
687 case FLT_REG_NPIV_CONF_0: 700 case FLT_REG_NPIV_CONF_0:
688 if (!PCI_FUNC(ha->pdev->devfn)) 701 if (!(PCI_FUNC(ha->pdev->devfn) & 1))
689 ha->flt_region_npiv_conf = start; 702 ha->flt_region_npiv_conf = start;
690 break; 703 break;
691 case FLT_REG_NPIV_CONF_1: 704 case FLT_REG_NPIV_CONF_1:
692 if (PCI_FUNC(ha->pdev->devfn)) 705 if (PCI_FUNC(ha->pdev->devfn) & 1)
693 ha->flt_region_npiv_conf = start; 706 ha->flt_region_npiv_conf = start;
694 break; 707 break;
695 } 708 }
@@ -699,22 +712,24 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
699no_flash_data: 712no_flash_data:
700 /* Use hardcoded defaults. */ 713 /* Use hardcoded defaults. */
701 loc = locations[0]; 714 loc = locations[0];
702 ha->flt_region_fw = FA_RISC_CODE_ADDR; 715 def = 0;
703 ha->flt_region_boot = FA_BOOT_CODE_ADDR; 716 if (IS_QLA24XX_TYPE(ha))
704 ha->flt_region_vpd_nvram = FA_VPD_NVRAM_ADDR; 717 def = 0;
705 ha->flt_region_fdt = IS_QLA24XX_TYPE(ha) ? FA_FLASH_DESCR_ADDR_24: 718 else if (IS_QLA25XX(ha))
706 FA_FLASH_DESCR_ADDR; 719 def = 1;
707 ha->flt_region_hw_event = !PCI_FUNC(ha->pdev->devfn) ? 720 else if (IS_QLA81XX(ha))
708 FA_HW_EVENT0_ADDR: FA_HW_EVENT1_ADDR; 721 def = 2;
709 ha->flt_region_npiv_conf = !PCI_FUNC(ha->pdev->devfn) ? 722 ha->flt_region_fw = def_fw[def];
710 (IS_QLA24XX_TYPE(ha) ? FA_NPIV_CONF0_ADDR_24: FA_NPIV_CONF0_ADDR): 723 ha->flt_region_boot = def_boot[def];
711 (IS_QLA24XX_TYPE(ha) ? FA_NPIV_CONF1_ADDR_24: FA_NPIV_CONF1_ADDR); 724 ha->flt_region_vpd_nvram = def_vpd_nvram[def];
725 ha->flt_region_fdt = def_fdt[def];
726 ha->flt_region_npiv_conf = !(PCI_FUNC(ha->pdev->devfn) & 1) ?
727 def_npiv_conf0[def]: def_npiv_conf1[def];
712done: 728done:
713 DEBUG2(qla_printk(KERN_DEBUG, ha, "FLT[%s]: boot=0x%x fw=0x%x " 729 DEBUG2(qla_printk(KERN_DEBUG, ha, "FLT[%s]: boot=0x%x fw=0x%x "
714 "vpd_nvram=0x%x fdt=0x%x flt=0x%x hwe=0x%x npiv=0x%x.\n", loc, 730 "vpd_nvram=0x%x fdt=0x%x flt=0x%x npiv=0x%x.\n", loc,
715 ha->flt_region_boot, ha->flt_region_fw, ha->flt_region_vpd_nvram, 731 ha->flt_region_boot, ha->flt_region_fw, ha->flt_region_vpd_nvram,
716 ha->flt_region_fdt, ha->flt_region_flt, ha->flt_region_hw_event, 732 ha->flt_region_fdt, ha->flt_region_flt, ha->flt_region_npiv_conf));
717 ha->flt_region_npiv_conf));
718} 733}
719 734
720static void 735static void
@@ -757,14 +772,14 @@ qla2xxx_get_fdt_info(scsi_qla_host_t *vha)
757 mid = le16_to_cpu(fdt->man_id); 772 mid = le16_to_cpu(fdt->man_id);
758 fid = le16_to_cpu(fdt->id); 773 fid = le16_to_cpu(fdt->id);
759 ha->fdt_wrt_disable = fdt->wrt_disable_bits; 774 ha->fdt_wrt_disable = fdt->wrt_disable_bits;
760 ha->fdt_erase_cmd = flash_conf_to_access_addr(0x0300 | fdt->erase_cmd); 775 ha->fdt_erase_cmd = flash_conf_addr(ha, 0x0300 | fdt->erase_cmd);
761 ha->fdt_block_size = le32_to_cpu(fdt->block_size); 776 ha->fdt_block_size = le32_to_cpu(fdt->block_size);
762 if (fdt->unprotect_sec_cmd) { 777 if (fdt->unprotect_sec_cmd) {
763 ha->fdt_unprotect_sec_cmd = flash_conf_to_access_addr(0x0300 | 778 ha->fdt_unprotect_sec_cmd = flash_conf_addr(ha, 0x0300 |
764 fdt->unprotect_sec_cmd); 779 fdt->unprotect_sec_cmd);
765 ha->fdt_protect_sec_cmd = fdt->protect_sec_cmd ? 780 ha->fdt_protect_sec_cmd = fdt->protect_sec_cmd ?
766 flash_conf_to_access_addr(0x0300 | fdt->protect_sec_cmd): 781 flash_conf_addr(ha, 0x0300 | fdt->protect_sec_cmd):
767 flash_conf_to_access_addr(0x0336); 782 flash_conf_addr(ha, 0x0336);
768 } 783 }
769 goto done; 784 goto done;
770no_flash_data: 785no_flash_data:
@@ -773,7 +788,7 @@ no_flash_data:
773 mid = man_id; 788 mid = man_id;
774 fid = flash_id; 789 fid = flash_id;
775 ha->fdt_wrt_disable = 0x9c; 790 ha->fdt_wrt_disable = 0x9c;
776 ha->fdt_erase_cmd = flash_conf_to_access_addr(0x03d8); 791 ha->fdt_erase_cmd = flash_conf_addr(ha, 0x03d8);
777 switch (man_id) { 792 switch (man_id) {
778 case 0xbf: /* STT flash. */ 793 case 0xbf: /* STT flash. */
779 if (flash_id == 0x8e) 794 if (flash_id == 0x8e)
@@ -782,16 +797,16 @@ no_flash_data:
782 ha->fdt_block_size = FLASH_BLK_SIZE_32K; 797 ha->fdt_block_size = FLASH_BLK_SIZE_32K;
783 798
784 if (flash_id == 0x80) 799 if (flash_id == 0x80)
785 ha->fdt_erase_cmd = flash_conf_to_access_addr(0x0352); 800 ha->fdt_erase_cmd = flash_conf_addr(ha, 0x0352);
786 break; 801 break;
787 case 0x13: /* ST M25P80. */ 802 case 0x13: /* ST M25P80. */
788 ha->fdt_block_size = FLASH_BLK_SIZE_64K; 803 ha->fdt_block_size = FLASH_BLK_SIZE_64K;
789 break; 804 break;
790 case 0x1f: /* Atmel 26DF081A. */ 805 case 0x1f: /* Atmel 26DF081A. */
791 ha->fdt_block_size = FLASH_BLK_SIZE_4K; 806 ha->fdt_block_size = FLASH_BLK_SIZE_4K;
792 ha->fdt_erase_cmd = flash_conf_to_access_addr(0x0320); 807 ha->fdt_erase_cmd = flash_conf_addr(ha, 0x0320);
793 ha->fdt_unprotect_sec_cmd = flash_conf_to_access_addr(0x0339); 808 ha->fdt_unprotect_sec_cmd = flash_conf_addr(ha, 0x0339);
794 ha->fdt_protect_sec_cmd = flash_conf_to_access_addr(0x0336); 809 ha->fdt_protect_sec_cmd = flash_conf_addr(ha, 0x0336);
795 break; 810 break;
796 default: 811 default:
797 /* Default to 64 kb sector size. */ 812 /* Default to 64 kb sector size. */
@@ -813,7 +828,7 @@ qla2xxx_get_flash_info(scsi_qla_host_t *vha)
813 uint32_t flt_addr; 828 uint32_t flt_addr;
814 struct qla_hw_data *ha = vha->hw; 829 struct qla_hw_data *ha = vha->hw;
815 830
816 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) 831 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && !IS_QLA81XX(ha))
817 return QLA_SUCCESS; 832 return QLA_SUCCESS;
818 833
819 ret = qla2xxx_find_flt_start(vha, &flt_addr); 834 ret = qla2xxx_find_flt_start(vha, &flt_addr);
@@ -838,7 +853,7 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *vha)
838 struct qla_npiv_entry *entry; 853 struct qla_npiv_entry *entry;
839 struct qla_hw_data *ha = vha->hw; 854 struct qla_hw_data *ha = vha->hw;
840 855
841 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) 856 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && !IS_QLA81XX(ha))
842 return; 857 return;
843 858
844 ha->isp_ops->read_optrom(vha, (uint8_t *)&hdr, 859 ha->isp_ops->read_optrom(vha, (uint8_t *)&hdr,
@@ -930,9 +945,9 @@ qla24xx_unprotect_flash(struct qla_hw_data *ha)
930 return; 945 return;
931 946
932 /* Disable flash write-protection. */ 947 /* Disable flash write-protection. */
933 qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0); 948 qla24xx_write_flash_dword(ha, flash_conf_addr(ha, 0x101), 0);
934 /* Some flash parts need an additional zero-write to clear bits.*/ 949 /* Some flash parts need an additional zero-write to clear bits.*/
935 qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0); 950 qla24xx_write_flash_dword(ha, flash_conf_addr(ha, 0x101), 0);
936} 951}
937 952
938static void 953static void
@@ -945,11 +960,10 @@ qla24xx_protect_flash(struct qla_hw_data *ha)
945 goto skip_wrt_protect; 960 goto skip_wrt_protect;
946 961
947 /* Enable flash write-protection and wait for completion. */ 962 /* Enable flash write-protection and wait for completion. */
948 qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 963 qla24xx_write_flash_dword(ha, flash_conf_addr(ha, 0x101),
949 ha->fdt_wrt_disable); 964 ha->fdt_wrt_disable);
950 for (cnt = 300; cnt && 965 for (cnt = 300; cnt &&
951 qla24xx_read_flash_dword(ha, 966 qla24xx_read_flash_dword(ha, flash_conf_addr(ha, 0x005)) & BIT_0;
952 flash_conf_to_access_addr(0x005)) & BIT_0;
953 cnt--) { 967 cnt--) {
954 udelay(10); 968 udelay(10);
955 } 969 }
@@ -977,7 +991,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr,
977 ret = QLA_SUCCESS; 991 ret = QLA_SUCCESS;
978 992
979 /* Prepare burst-capable write on supported ISPs. */ 993 /* Prepare burst-capable write on supported ISPs. */
980 if (IS_QLA25XX(ha) && !(faddr & 0xfff) && 994 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && !(faddr & 0xfff) &&
981 dwords > OPTROM_BURST_DWORDS) { 995 dwords > OPTROM_BURST_DWORDS) {
982 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, 996 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE,
983 &optrom_dma, GFP_KERNEL); 997 &optrom_dma, GFP_KERNEL);
@@ -989,7 +1003,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr,
989 } 1003 }
990 1004
991 rest_addr = (ha->fdt_block_size >> 2) - 1; 1005 rest_addr = (ha->fdt_block_size >> 2) - 1;
992 sec_mask = 0x80000 - (ha->fdt_block_size >> 2); 1006 sec_mask = (ha->optrom_size >> 2) - (ha->fdt_block_size >> 2);
993 1007
994 qla24xx_unprotect_flash(ha); 1008 qla24xx_unprotect_flash(ha);
995 1009
@@ -1024,13 +1038,13 @@ qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr,
1024 *s = cpu_to_le32(*d); 1038 *s = cpu_to_le32(*d);
1025 1039
1026 ret = qla2x00_load_ram(vha, optrom_dma, 1040 ret = qla2x00_load_ram(vha, optrom_dma,
1027 flash_data_to_access_addr(faddr), 1041 flash_data_addr(ha, faddr),
1028 OPTROM_BURST_DWORDS); 1042 OPTROM_BURST_DWORDS);
1029 if (ret != QLA_SUCCESS) { 1043 if (ret != QLA_SUCCESS) {
1030 qla_printk(KERN_WARNING, ha, 1044 qla_printk(KERN_WARNING, ha,
1031 "Unable to burst-write optrom segment " 1045 "Unable to burst-write optrom segment "
1032 "(%x/%x/%llx).\n", ret, 1046 "(%x/%x/%llx).\n", ret,
1033 flash_data_to_access_addr(faddr), 1047 flash_data_addr(ha, faddr),
1034 (unsigned long long)optrom_dma); 1048 (unsigned long long)optrom_dma);
1035 qla_printk(KERN_WARNING, ha, 1049 qla_printk(KERN_WARNING, ha,
1036 "Reverting to slow-write.\n"); 1050 "Reverting to slow-write.\n");
@@ -1047,7 +1061,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr,
1047 } 1061 }
1048 1062
1049 ret = qla24xx_write_flash_dword(ha, 1063 ret = qla24xx_write_flash_dword(ha,
1050 flash_data_to_access_addr(faddr), cpu_to_le32(*dwptr)); 1064 flash_data_addr(ha, faddr), cpu_to_le32(*dwptr));
1051 if (ret != QLA_SUCCESS) { 1065 if (ret != QLA_SUCCESS) {
1052 DEBUG9(printk("%s(%ld) Unable to program flash " 1066 DEBUG9(printk("%s(%ld) Unable to program flash "
1053 "address=%x data=%x.\n", __func__, 1067 "address=%x data=%x.\n", __func__,
@@ -1098,12 +1112,13 @@ qla24xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1098{ 1112{
1099 uint32_t i; 1113 uint32_t i;
1100 uint32_t *dwptr; 1114 uint32_t *dwptr;
1115 struct qla_hw_data *ha = vha->hw;
1101 1116
1102 /* Dword reads to flash. */ 1117 /* Dword reads to flash. */
1103 dwptr = (uint32_t *)buf; 1118 dwptr = (uint32_t *)buf;
1104 for (i = 0; i < bytes >> 2; i++, naddr++) 1119 for (i = 0; i < bytes >> 2; i++, naddr++)
1105 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw, 1120 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha,
1106 nvram_data_to_access_addr(naddr))); 1121 nvram_data_addr(ha, naddr)));
1107 1122
1108 return buf; 1123 return buf;
1109} 1124}
@@ -1160,17 +1175,14 @@ qla24xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1160 RD_REG_DWORD(&reg->ctrl_status); /* PCI Posting. */ 1175 RD_REG_DWORD(&reg->ctrl_status); /* PCI Posting. */
1161 1176
1162 /* Disable NVRAM write-protection. */ 1177 /* Disable NVRAM write-protection. */
1163 qla24xx_write_flash_dword(ha, nvram_conf_to_access_addr(0x101), 1178 qla24xx_write_flash_dword(ha, nvram_conf_addr(ha, 0x101), 0);
1164 0); 1179 qla24xx_write_flash_dword(ha, nvram_conf_addr(ha, 0x101), 0);
1165 qla24xx_write_flash_dword(ha, nvram_conf_to_access_addr(0x101),
1166 0);
1167 1180
1168 /* Dword writes to flash. */ 1181 /* Dword writes to flash. */
1169 dwptr = (uint32_t *)buf; 1182 dwptr = (uint32_t *)buf;
1170 for (i = 0; i < bytes >> 2; i++, naddr++, dwptr++) { 1183 for (i = 0; i < bytes >> 2; i++, naddr++, dwptr++) {
1171 ret = qla24xx_write_flash_dword(ha, 1184 ret = qla24xx_write_flash_dword(ha,
1172 nvram_data_to_access_addr(naddr), 1185 nvram_data_addr(ha, naddr), cpu_to_le32(*dwptr));
1173 cpu_to_le32(*dwptr));
1174 if (ret != QLA_SUCCESS) { 1186 if (ret != QLA_SUCCESS) {
1175 DEBUG9(qla_printk("Unable to program nvram address=%x " 1187 DEBUG9(qla_printk("Unable to program nvram address=%x "
1176 "data=%x.\n", naddr, *dwptr)); 1188 "data=%x.\n", naddr, *dwptr));
@@ -1179,8 +1191,7 @@ qla24xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1179 } 1191 }
1180 1192
1181 /* Enable NVRAM write-protection. */ 1193 /* Enable NVRAM write-protection. */
1182 qla24xx_write_flash_dword(ha, nvram_conf_to_access_addr(0x101), 1194 qla24xx_write_flash_dword(ha, nvram_conf_addr(ha, 0x101), 0x8c);
1183 0x8c);
1184 1195
1185 /* Disable flash write. */ 1196 /* Disable flash write. */
1186 WRT_REG_DWORD(&reg->ctrl_status, 1197 WRT_REG_DWORD(&reg->ctrl_status,
@@ -1202,8 +1213,7 @@ qla25xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1202 dwptr = (uint32_t *)buf; 1213 dwptr = (uint32_t *)buf;
1203 for (i = 0; i < bytes >> 2; i++, naddr++) 1214 for (i = 0; i < bytes >> 2; i++, naddr++)
1204 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, 1215 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha,
1205 flash_data_to_access_addr(ha->flt_region_vpd_nvram | 1216 flash_data_addr(ha, ha->flt_region_vpd_nvram | naddr)));
1206 naddr)));
1207 1217
1208 return buf; 1218 return buf;
1209} 1219}
@@ -2246,12 +2256,12 @@ qla25xx_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
2246 burst = left; 2256 burst = left;
2247 2257
2248 rval = qla2x00_dump_ram(vha, optrom_dma, 2258 rval = qla2x00_dump_ram(vha, optrom_dma,
2249 flash_data_to_access_addr(faddr), burst); 2259 flash_data_addr(ha, faddr), burst);
2250 if (rval) { 2260 if (rval) {
2251 qla_printk(KERN_WARNING, ha, 2261 qla_printk(KERN_WARNING, ha,
2252 "Unable to burst-read optrom segment " 2262 "Unable to burst-read optrom segment "
2253 "(%x/%x/%llx).\n", rval, 2263 "(%x/%x/%llx).\n", rval,
2254 flash_data_to_access_addr(faddr), 2264 flash_data_addr(ha, faddr),
2255 (unsigned long long)optrom_dma); 2265 (unsigned long long)optrom_dma);
2256 qla_printk(KERN_WARNING, ha, 2266 qla_printk(KERN_WARNING, ha,
2257 "Reverting to slow-read.\n"); 2267 "Reverting to slow-read.\n");
@@ -2648,108 +2658,3 @@ qla2xxx_get_vpd_field(scsi_qla_host_t *vha, char *key, char *str, size_t size)
2648 2658
2649 return 0; 2659 return 0;
2650} 2660}
2651
2652static int
2653qla2xxx_hw_event_store(scsi_qla_host_t *vha, uint32_t *fdata)
2654{
2655 uint32_t d[2], faddr;
2656 struct qla_hw_data *ha = vha->hw;
2657
2658 /* Locate first empty entry. */
2659 for (;;) {
2660 if (ha->hw_event_ptr >=
2661 ha->flt_region_hw_event + FA_HW_EVENT_SIZE) {
2662 DEBUG2(qla_printk(KERN_WARNING, ha,
2663 "HW event -- Log Full!\n"));
2664 return QLA_MEMORY_ALLOC_FAILED;
2665 }
2666
2667 qla24xx_read_flash_data(vha, d, ha->hw_event_ptr, 2);
2668 faddr = flash_data_to_access_addr(ha->hw_event_ptr);
2669 ha->hw_event_ptr += FA_HW_EVENT_ENTRY_SIZE;
2670 if (d[0] == __constant_cpu_to_le32(0xffffffff) &&
2671 d[1] == __constant_cpu_to_le32(0xffffffff)) {
2672 qla24xx_unprotect_flash(ha);
2673
2674 qla24xx_write_flash_dword(ha, faddr++,
2675 cpu_to_le32(jiffies));
2676 qla24xx_write_flash_dword(ha, faddr++, 0);
2677 qla24xx_write_flash_dword(ha, faddr++, *fdata++);
2678 qla24xx_write_flash_dword(ha, faddr++, *fdata);
2679
2680 qla24xx_protect_flash(ha);
2681 break;
2682 }
2683 }
2684 return QLA_SUCCESS;
2685}
2686
2687int
2688qla2xxx_hw_event_log(scsi_qla_host_t *vha, uint16_t code, uint16_t d1,
2689 uint16_t d2, uint16_t d3)
2690{
2691#define QMARK(a, b, c, d) \
2692 cpu_to_le32(LSB(a) << 24 | LSB(b) << 16 | LSB(c) << 8 | LSB(d))
2693 struct qla_hw_data *ha = vha->hw;
2694 int rval;
2695 uint32_t marker[2], fdata[4];
2696
2697 if (ha->flt_region_hw_event == 0)
2698 return QLA_FUNCTION_FAILED;
2699
2700 DEBUG2(qla_printk(KERN_WARNING, ha,
2701 "HW event -- code=%x, d1=%x, d2=%x, d3=%x.\n", code, d1, d2, d3));
2702
2703 /* If marker not already found, locate or write. */
2704 if (!ha->flags.hw_event_marker_found) {
2705 /* Create marker. */
2706 marker[0] = QMARK('L', ha->fw_major_version,
2707 ha->fw_minor_version, ha->fw_subminor_version);
2708 marker[1] = QMARK(QLA_DRIVER_MAJOR_VER, QLA_DRIVER_MINOR_VER,
2709 QLA_DRIVER_PATCH_VER, QLA_DRIVER_BETA_VER);
2710
2711 /* Locate marker. */
2712 ha->hw_event_ptr = ha->flt_region_hw_event;
2713 for (;;) {
2714 qla24xx_read_flash_data(vha, fdata, ha->hw_event_ptr,
2715 4);
2716 if (fdata[0] == __constant_cpu_to_le32(0xffffffff) &&
2717 fdata[1] == __constant_cpu_to_le32(0xffffffff))
2718 break;
2719 ha->hw_event_ptr += FA_HW_EVENT_ENTRY_SIZE;
2720 if (ha->hw_event_ptr >=
2721 ha->flt_region_hw_event + FA_HW_EVENT_SIZE) {
2722 DEBUG2(qla_printk(KERN_WARNING, ha,
2723 "HW event -- Log Full!\n"));
2724 return QLA_MEMORY_ALLOC_FAILED;
2725 }
2726 if (fdata[2] == marker[0] && fdata[3] == marker[1]) {
2727 ha->flags.hw_event_marker_found = 1;
2728 break;
2729 }
2730 }
2731 /* No marker, write it. */
2732 if (!ha->flags.hw_event_marker_found) {
2733 rval = qla2xxx_hw_event_store(vha, marker);
2734 if (rval != QLA_SUCCESS) {
2735 DEBUG2(qla_printk(KERN_WARNING, ha,
2736 "HW event -- Failed marker write=%x.!\n",
2737 rval));
2738 return rval;
2739 }
2740 ha->flags.hw_event_marker_found = 1;
2741 }
2742 }
2743
2744 /* Store error. */
2745 fdata[0] = cpu_to_le32(code << 16 | d1);
2746 fdata[1] = cpu_to_le32(d2 << 16 | d3);
2747 rval = qla2xxx_hw_event_store(vha, fdata);
2748 if (rval != QLA_SUCCESS) {
2749 DEBUG2(qla_printk(KERN_WARNING, ha,
2750 "HW event -- Failed error write=%x.!\n",
2751 rval));
2752 }
2753
2754 return rval;
2755}