diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_sup.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_sup.c | 143 |
1 files changed, 82 insertions, 61 deletions
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c index 628d79c09733..303f8ee11f25 100644 --- a/drivers/scsi/qla2xxx/qla_sup.c +++ b/drivers/scsi/qla2xxx/qla_sup.c | |||
@@ -425,27 +425,27 @@ qla2x00_set_nvram_protection(struct qla_hw_data *ha, int stat) | |||
425 | #define OPTROM_BURST_DWORDS (OPTROM_BURST_SIZE / 4) | 425 | #define OPTROM_BURST_DWORDS (OPTROM_BURST_SIZE / 4) |
426 | 426 | ||
427 | static inline uint32_t | 427 | static inline uint32_t |
428 | flash_conf_to_access_addr(uint32_t faddr) | 428 | flash_conf_addr(struct qla_hw_data *ha, uint32_t faddr) |
429 | { | 429 | { |
430 | return FARX_ACCESS_FLASH_CONF | faddr; | 430 | return ha->flash_conf_off | faddr; |
431 | } | 431 | } |
432 | 432 | ||
433 | static inline uint32_t | 433 | static inline uint32_t |
434 | flash_data_to_access_addr(uint32_t faddr) | 434 | flash_data_addr(struct qla_hw_data *ha, uint32_t faddr) |
435 | { | 435 | { |
436 | return FARX_ACCESS_FLASH_DATA | faddr; | 436 | return ha->flash_data_off | faddr; |
437 | } | 437 | } |
438 | 438 | ||
439 | static inline uint32_t | 439 | static inline uint32_t |
440 | nvram_conf_to_access_addr(uint32_t naddr) | 440 | nvram_conf_addr(struct qla_hw_data *ha, uint32_t naddr) |
441 | { | 441 | { |
442 | return FARX_ACCESS_NVRAM_CONF | naddr; | 442 | return ha->nvram_conf_off | naddr; |
443 | } | 443 | } |
444 | 444 | ||
445 | static inline uint32_t | 445 | static inline uint32_t |
446 | nvram_data_to_access_addr(uint32_t naddr) | 446 | nvram_data_addr(struct qla_hw_data *ha, uint32_t naddr) |
447 | { | 447 | { |
448 | return FARX_ACCESS_NVRAM_DATA | naddr; | 448 | return ha->nvram_data_off | naddr; |
449 | } | 449 | } |
450 | 450 | ||
451 | static uint32_t | 451 | static uint32_t |
@@ -481,10 +481,12 @@ qla24xx_read_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr, | |||
481 | uint32_t dwords) | 481 | uint32_t dwords) |
482 | { | 482 | { |
483 | uint32_t i; | 483 | uint32_t i; |
484 | struct qla_hw_data *ha = vha->hw; | ||
485 | |||
484 | /* Dword reads to flash. */ | 486 | /* Dword reads to flash. */ |
485 | for (i = 0; i < dwords; i++, faddr++) | 487 | for (i = 0; i < dwords; i++, faddr++) |
486 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw, | 488 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, |
487 | flash_data_to_access_addr(faddr))); | 489 | flash_data_addr(ha, faddr))); |
488 | 490 | ||
489 | return dwptr; | 491 | return dwptr; |
490 | } | 492 | } |
@@ -518,7 +520,7 @@ qla24xx_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id, | |||
518 | { | 520 | { |
519 | uint32_t ids; | 521 | uint32_t ids; |
520 | 522 | ||
521 | ids = qla24xx_read_flash_dword(ha, flash_data_to_access_addr(0xd03ab)); | 523 | ids = qla24xx_read_flash_dword(ha, flash_conf_addr(ha, 0x03ab)); |
522 | *man_id = LSB(ids); | 524 | *man_id = LSB(ids); |
523 | *flash_id = MSB(ids); | 525 | *flash_id = MSB(ids); |
524 | 526 | ||
@@ -530,8 +532,7 @@ qla24xx_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id, | |||
530 | * Example: ATMEL 0x00 01 45 1F | 532 | * Example: ATMEL 0x00 01 45 1F |
531 | * Extract MFG and Dev ID from last two bytes. | 533 | * Extract MFG and Dev ID from last two bytes. |
532 | */ | 534 | */ |
533 | ids = qla24xx_read_flash_dword(ha, | 535 | ids = qla24xx_read_flash_dword(ha, flash_conf_addr(ha, 0x009f)); |
534 | flash_data_to_access_addr(0xd009f)); | ||
535 | *man_id = LSB(ids); | 536 | *man_id = LSB(ids); |
536 | *flash_id = MSB(ids); | 537 | *flash_id = MSB(ids); |
537 | } | 538 | } |
@@ -555,9 +556,13 @@ qla2xxx_find_flt_start(scsi_qla_host_t *vha, uint32_t *start) | |||
555 | 556 | ||
556 | /* Begin with sane defaults. */ | 557 | /* Begin with sane defaults. */ |
557 | loc = locations[0]; | 558 | loc = locations[0]; |
558 | *start = IS_QLA24XX_TYPE(ha) ? FA_FLASH_LAYOUT_ADDR_24: | 559 | *start = 0; |
559 | FA_FLASH_LAYOUT_ADDR; | 560 | if (IS_QLA24XX_TYPE(ha)) |
560 | 561 | *start = FA_FLASH_LAYOUT_ADDR_24; | |
562 | else if (IS_QLA25XX(ha)) | ||
563 | *start = FA_FLASH_LAYOUT_ADDR; | ||
564 | else if (IS_QLA81XX(ha)) | ||
565 | *start = FA_FLASH_LAYOUT_ADDR_81; | ||
561 | /* Begin with first PCI expansion ROM header. */ | 566 | /* Begin with first PCI expansion ROM header. */ |
562 | buf = (uint8_t *)req->ring; | 567 | buf = (uint8_t *)req->ring; |
563 | dcode = (uint32_t *)req->ring; | 568 | dcode = (uint32_t *)req->ring; |
@@ -618,6 +623,22 @@ static void | |||
618 | qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr) | 623 | qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr) |
619 | { | 624 | { |
620 | const char *loc, *locations[] = { "DEF", "FLT" }; | 625 | const char *loc, *locations[] = { "DEF", "FLT" }; |
626 | const uint32_t def_fw[] = | ||
627 | { FA_RISC_CODE_ADDR, FA_RISC_CODE_ADDR, FA_RISC_CODE_ADDR_81 }; | ||
628 | const uint32_t def_boot[] = | ||
629 | { FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR_81 }; | ||
630 | const uint32_t def_vpd_nvram[] = | ||
631 | { FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR_81 }; | ||
632 | const uint32_t def_fdt[] = | ||
633 | { FA_FLASH_DESCR_ADDR_24, FA_FLASH_DESCR_ADDR, | ||
634 | FA_FLASH_DESCR_ADDR_81 }; | ||
635 | const uint32_t def_npiv_conf0[] = | ||
636 | { FA_NPIV_CONF0_ADDR_24, FA_NPIV_CONF0_ADDR, | ||
637 | FA_NPIV_CONF0_ADDR_81 }; | ||
638 | const uint32_t def_npiv_conf1[] = | ||
639 | { FA_NPIV_CONF1_ADDR_24, FA_NPIV_CONF1_ADDR, | ||
640 | FA_NPIV_CONF1_ADDR_81 }; | ||
641 | uint32_t def; | ||
621 | uint16_t *wptr; | 642 | uint16_t *wptr; |
622 | uint16_t cnt, chksum; | 643 | uint16_t cnt, chksum; |
623 | uint32_t start; | 644 | uint32_t start; |
@@ -677,11 +698,11 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr) | |||
677 | ha->flt_region_fdt = start; | 698 | ha->flt_region_fdt = start; |
678 | break; | 699 | break; |
679 | case FLT_REG_NPIV_CONF_0: | 700 | case FLT_REG_NPIV_CONF_0: |
680 | if (!PCI_FUNC(ha->pdev->devfn)) | 701 | if (!(PCI_FUNC(ha->pdev->devfn) & 1)) |
681 | ha->flt_region_npiv_conf = start; | 702 | ha->flt_region_npiv_conf = start; |
682 | break; | 703 | break; |
683 | case FLT_REG_NPIV_CONF_1: | 704 | case FLT_REG_NPIV_CONF_1: |
684 | if (PCI_FUNC(ha->pdev->devfn)) | 705 | if (PCI_FUNC(ha->pdev->devfn) & 1) |
685 | ha->flt_region_npiv_conf = start; | 706 | ha->flt_region_npiv_conf = start; |
686 | break; | 707 | break; |
687 | } | 708 | } |
@@ -691,14 +712,19 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr) | |||
691 | no_flash_data: | 712 | no_flash_data: |
692 | /* Use hardcoded defaults. */ | 713 | /* Use hardcoded defaults. */ |
693 | loc = locations[0]; | 714 | loc = locations[0]; |
694 | ha->flt_region_fw = FA_RISC_CODE_ADDR; | 715 | def = 0; |
695 | ha->flt_region_boot = FA_BOOT_CODE_ADDR; | 716 | if (IS_QLA24XX_TYPE(ha)) |
696 | ha->flt_region_vpd_nvram = FA_VPD_NVRAM_ADDR; | 717 | def = 0; |
697 | ha->flt_region_fdt = IS_QLA24XX_TYPE(ha) ? FA_FLASH_DESCR_ADDR_24: | 718 | else if (IS_QLA25XX(ha)) |
698 | FA_FLASH_DESCR_ADDR; | 719 | def = 1; |
699 | ha->flt_region_npiv_conf = !PCI_FUNC(ha->pdev->devfn) ? | 720 | else if (IS_QLA81XX(ha)) |
700 | (IS_QLA24XX_TYPE(ha) ? FA_NPIV_CONF0_ADDR_24: FA_NPIV_CONF0_ADDR): | 721 | def = 2; |
701 | (IS_QLA24XX_TYPE(ha) ? FA_NPIV_CONF1_ADDR_24: FA_NPIV_CONF1_ADDR); | 722 | ha->flt_region_fw = def_fw[def]; |
723 | ha->flt_region_boot = def_boot[def]; | ||
724 | ha->flt_region_vpd_nvram = def_vpd_nvram[def]; | ||
725 | ha->flt_region_fdt = def_fdt[def]; | ||
726 | ha->flt_region_npiv_conf = !(PCI_FUNC(ha->pdev->devfn) & 1) ? | ||
727 | def_npiv_conf0[def]: def_npiv_conf1[def]; | ||
702 | done: | 728 | done: |
703 | DEBUG2(qla_printk(KERN_DEBUG, ha, "FLT[%s]: boot=0x%x fw=0x%x " | 729 | DEBUG2(qla_printk(KERN_DEBUG, ha, "FLT[%s]: boot=0x%x fw=0x%x " |
704 | "vpd_nvram=0x%x fdt=0x%x flt=0x%x npiv=0x%x.\n", loc, | 730 | "vpd_nvram=0x%x fdt=0x%x flt=0x%x npiv=0x%x.\n", loc, |
@@ -746,14 +772,14 @@ qla2xxx_get_fdt_info(scsi_qla_host_t *vha) | |||
746 | mid = le16_to_cpu(fdt->man_id); | 772 | mid = le16_to_cpu(fdt->man_id); |
747 | fid = le16_to_cpu(fdt->id); | 773 | fid = le16_to_cpu(fdt->id); |
748 | ha->fdt_wrt_disable = fdt->wrt_disable_bits; | 774 | ha->fdt_wrt_disable = fdt->wrt_disable_bits; |
749 | ha->fdt_erase_cmd = flash_conf_to_access_addr(0x0300 | fdt->erase_cmd); | 775 | ha->fdt_erase_cmd = flash_conf_addr(ha, 0x0300 | fdt->erase_cmd); |
750 | ha->fdt_block_size = le32_to_cpu(fdt->block_size); | 776 | ha->fdt_block_size = le32_to_cpu(fdt->block_size); |
751 | if (fdt->unprotect_sec_cmd) { | 777 | if (fdt->unprotect_sec_cmd) { |
752 | ha->fdt_unprotect_sec_cmd = flash_conf_to_access_addr(0x0300 | | 778 | ha->fdt_unprotect_sec_cmd = flash_conf_addr(ha, 0x0300 | |
753 | fdt->unprotect_sec_cmd); | 779 | fdt->unprotect_sec_cmd); |
754 | ha->fdt_protect_sec_cmd = fdt->protect_sec_cmd ? | 780 | ha->fdt_protect_sec_cmd = fdt->protect_sec_cmd ? |
755 | flash_conf_to_access_addr(0x0300 | fdt->protect_sec_cmd): | 781 | flash_conf_addr(ha, 0x0300 | fdt->protect_sec_cmd): |
756 | flash_conf_to_access_addr(0x0336); | 782 | flash_conf_addr(ha, 0x0336); |
757 | } | 783 | } |
758 | goto done; | 784 | goto done; |
759 | no_flash_data: | 785 | no_flash_data: |
@@ -762,7 +788,7 @@ no_flash_data: | |||
762 | mid = man_id; | 788 | mid = man_id; |
763 | fid = flash_id; | 789 | fid = flash_id; |
764 | ha->fdt_wrt_disable = 0x9c; | 790 | ha->fdt_wrt_disable = 0x9c; |
765 | ha->fdt_erase_cmd = flash_conf_to_access_addr(0x03d8); | 791 | ha->fdt_erase_cmd = flash_conf_addr(ha, 0x03d8); |
766 | switch (man_id) { | 792 | switch (man_id) { |
767 | case 0xbf: /* STT flash. */ | 793 | case 0xbf: /* STT flash. */ |
768 | if (flash_id == 0x8e) | 794 | if (flash_id == 0x8e) |
@@ -771,16 +797,16 @@ no_flash_data: | |||
771 | ha->fdt_block_size = FLASH_BLK_SIZE_32K; | 797 | ha->fdt_block_size = FLASH_BLK_SIZE_32K; |
772 | 798 | ||
773 | if (flash_id == 0x80) | 799 | if (flash_id == 0x80) |
774 | ha->fdt_erase_cmd = flash_conf_to_access_addr(0x0352); | 800 | ha->fdt_erase_cmd = flash_conf_addr(ha, 0x0352); |
775 | break; | 801 | break; |
776 | case 0x13: /* ST M25P80. */ | 802 | case 0x13: /* ST M25P80. */ |
777 | ha->fdt_block_size = FLASH_BLK_SIZE_64K; | 803 | ha->fdt_block_size = FLASH_BLK_SIZE_64K; |
778 | break; | 804 | break; |
779 | case 0x1f: /* Atmel 26DF081A. */ | 805 | case 0x1f: /* Atmel 26DF081A. */ |
780 | ha->fdt_block_size = FLASH_BLK_SIZE_4K; | 806 | ha->fdt_block_size = FLASH_BLK_SIZE_4K; |
781 | ha->fdt_erase_cmd = flash_conf_to_access_addr(0x0320); | 807 | ha->fdt_erase_cmd = flash_conf_addr(ha, 0x0320); |
782 | ha->fdt_unprotect_sec_cmd = flash_conf_to_access_addr(0x0339); | 808 | ha->fdt_unprotect_sec_cmd = flash_conf_addr(ha, 0x0339); |
783 | ha->fdt_protect_sec_cmd = flash_conf_to_access_addr(0x0336); | 809 | ha->fdt_protect_sec_cmd = flash_conf_addr(ha, 0x0336); |
784 | break; | 810 | break; |
785 | default: | 811 | default: |
786 | /* Default to 64 kb sector size. */ | 812 | /* Default to 64 kb sector size. */ |
@@ -802,7 +828,7 @@ qla2xxx_get_flash_info(scsi_qla_host_t *vha) | |||
802 | uint32_t flt_addr; | 828 | uint32_t flt_addr; |
803 | struct qla_hw_data *ha = vha->hw; | 829 | struct qla_hw_data *ha = vha->hw; |
804 | 830 | ||
805 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) | 831 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
806 | return QLA_SUCCESS; | 832 | return QLA_SUCCESS; |
807 | 833 | ||
808 | ret = qla2xxx_find_flt_start(vha, &flt_addr); | 834 | ret = qla2xxx_find_flt_start(vha, &flt_addr); |
@@ -827,7 +853,7 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *vha) | |||
827 | struct qla_npiv_entry *entry; | 853 | struct qla_npiv_entry *entry; |
828 | struct qla_hw_data *ha = vha->hw; | 854 | struct qla_hw_data *ha = vha->hw; |
829 | 855 | ||
830 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) | 856 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
831 | return; | 857 | return; |
832 | 858 | ||
833 | ha->isp_ops->read_optrom(vha, (uint8_t *)&hdr, | 859 | ha->isp_ops->read_optrom(vha, (uint8_t *)&hdr, |
@@ -919,9 +945,9 @@ qla24xx_unprotect_flash(struct qla_hw_data *ha) | |||
919 | return; | 945 | return; |
920 | 946 | ||
921 | /* Disable flash write-protection. */ | 947 | /* Disable flash write-protection. */ |
922 | qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0); | 948 | qla24xx_write_flash_dword(ha, flash_conf_addr(ha, 0x101), 0); |
923 | /* Some flash parts need an additional zero-write to clear bits.*/ | 949 | /* Some flash parts need an additional zero-write to clear bits.*/ |
924 | qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0); | 950 | qla24xx_write_flash_dword(ha, flash_conf_addr(ha, 0x101), 0); |
925 | } | 951 | } |
926 | 952 | ||
927 | static void | 953 | static void |
@@ -934,11 +960,10 @@ qla24xx_protect_flash(struct qla_hw_data *ha) | |||
934 | goto skip_wrt_protect; | 960 | goto skip_wrt_protect; |
935 | 961 | ||
936 | /* Enable flash write-protection and wait for completion. */ | 962 | /* Enable flash write-protection and wait for completion. */ |
937 | qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), | 963 | qla24xx_write_flash_dword(ha, flash_conf_addr(ha, 0x101), |
938 | ha->fdt_wrt_disable); | 964 | ha->fdt_wrt_disable); |
939 | for (cnt = 300; cnt && | 965 | for (cnt = 300; cnt && |
940 | qla24xx_read_flash_dword(ha, | 966 | qla24xx_read_flash_dword(ha, flash_conf_addr(ha, 0x005)) & BIT_0; |
941 | flash_conf_to_access_addr(0x005)) & BIT_0; | ||
942 | cnt--) { | 967 | cnt--) { |
943 | udelay(10); | 968 | udelay(10); |
944 | } | 969 | } |
@@ -966,7 +991,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr, | |||
966 | ret = QLA_SUCCESS; | 991 | ret = QLA_SUCCESS; |
967 | 992 | ||
968 | /* Prepare burst-capable write on supported ISPs. */ | 993 | /* Prepare burst-capable write on supported ISPs. */ |
969 | if (IS_QLA25XX(ha) && !(faddr & 0xfff) && | 994 | if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && !(faddr & 0xfff) && |
970 | dwords > OPTROM_BURST_DWORDS) { | 995 | dwords > OPTROM_BURST_DWORDS) { |
971 | optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, | 996 | optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, |
972 | &optrom_dma, GFP_KERNEL); | 997 | &optrom_dma, GFP_KERNEL); |
@@ -978,7 +1003,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr, | |||
978 | } | 1003 | } |
979 | 1004 | ||
980 | rest_addr = (ha->fdt_block_size >> 2) - 1; | 1005 | rest_addr = (ha->fdt_block_size >> 2) - 1; |
981 | sec_mask = 0x80000 - (ha->fdt_block_size >> 2); | 1006 | sec_mask = (ha->optrom_size >> 2) - (ha->fdt_block_size >> 2); |
982 | 1007 | ||
983 | qla24xx_unprotect_flash(ha); | 1008 | qla24xx_unprotect_flash(ha); |
984 | 1009 | ||
@@ -1013,13 +1038,13 @@ qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr, | |||
1013 | *s = cpu_to_le32(*d); | 1038 | *s = cpu_to_le32(*d); |
1014 | 1039 | ||
1015 | ret = qla2x00_load_ram(vha, optrom_dma, | 1040 | ret = qla2x00_load_ram(vha, optrom_dma, |
1016 | flash_data_to_access_addr(faddr), | 1041 | flash_data_addr(ha, faddr), |
1017 | OPTROM_BURST_DWORDS); | 1042 | OPTROM_BURST_DWORDS); |
1018 | if (ret != QLA_SUCCESS) { | 1043 | if (ret != QLA_SUCCESS) { |
1019 | qla_printk(KERN_WARNING, ha, | 1044 | qla_printk(KERN_WARNING, ha, |
1020 | "Unable to burst-write optrom segment " | 1045 | "Unable to burst-write optrom segment " |
1021 | "(%x/%x/%llx).\n", ret, | 1046 | "(%x/%x/%llx).\n", ret, |
1022 | flash_data_to_access_addr(faddr), | 1047 | flash_data_addr(ha, faddr), |
1023 | (unsigned long long)optrom_dma); | 1048 | (unsigned long long)optrom_dma); |
1024 | qla_printk(KERN_WARNING, ha, | 1049 | qla_printk(KERN_WARNING, ha, |
1025 | "Reverting to slow-write.\n"); | 1050 | "Reverting to slow-write.\n"); |
@@ -1036,7 +1061,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr, | |||
1036 | } | 1061 | } |
1037 | 1062 | ||
1038 | ret = qla24xx_write_flash_dword(ha, | 1063 | ret = qla24xx_write_flash_dword(ha, |
1039 | flash_data_to_access_addr(faddr), cpu_to_le32(*dwptr)); | 1064 | flash_data_addr(ha, faddr), cpu_to_le32(*dwptr)); |
1040 | if (ret != QLA_SUCCESS) { | 1065 | if (ret != QLA_SUCCESS) { |
1041 | DEBUG9(printk("%s(%ld) Unable to program flash " | 1066 | DEBUG9(printk("%s(%ld) Unable to program flash " |
1042 | "address=%x data=%x.\n", __func__, | 1067 | "address=%x data=%x.\n", __func__, |
@@ -1087,12 +1112,13 @@ qla24xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, | |||
1087 | { | 1112 | { |
1088 | uint32_t i; | 1113 | uint32_t i; |
1089 | uint32_t *dwptr; | 1114 | uint32_t *dwptr; |
1115 | struct qla_hw_data *ha = vha->hw; | ||
1090 | 1116 | ||
1091 | /* Dword reads to flash. */ | 1117 | /* Dword reads to flash. */ |
1092 | dwptr = (uint32_t *)buf; | 1118 | dwptr = (uint32_t *)buf; |
1093 | for (i = 0; i < bytes >> 2; i++, naddr++) | 1119 | for (i = 0; i < bytes >> 2; i++, naddr++) |
1094 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw, | 1120 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, |
1095 | nvram_data_to_access_addr(naddr))); | 1121 | nvram_data_addr(ha, naddr))); |
1096 | 1122 | ||
1097 | return buf; | 1123 | return buf; |
1098 | } | 1124 | } |
@@ -1149,17 +1175,14 @@ qla24xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, | |||
1149 | RD_REG_DWORD(®->ctrl_status); /* PCI Posting. */ | 1175 | RD_REG_DWORD(®->ctrl_status); /* PCI Posting. */ |
1150 | 1176 | ||
1151 | /* Disable NVRAM write-protection. */ | 1177 | /* Disable NVRAM write-protection. */ |
1152 | qla24xx_write_flash_dword(ha, nvram_conf_to_access_addr(0x101), | 1178 | qla24xx_write_flash_dword(ha, nvram_conf_addr(ha, 0x101), 0); |
1153 | 0); | 1179 | qla24xx_write_flash_dword(ha, nvram_conf_addr(ha, 0x101), 0); |
1154 | qla24xx_write_flash_dword(ha, nvram_conf_to_access_addr(0x101), | ||
1155 | 0); | ||
1156 | 1180 | ||
1157 | /* Dword writes to flash. */ | 1181 | /* Dword writes to flash. */ |
1158 | dwptr = (uint32_t *)buf; | 1182 | dwptr = (uint32_t *)buf; |
1159 | for (i = 0; i < bytes >> 2; i++, naddr++, dwptr++) { | 1183 | for (i = 0; i < bytes >> 2; i++, naddr++, dwptr++) { |
1160 | ret = qla24xx_write_flash_dword(ha, | 1184 | ret = qla24xx_write_flash_dword(ha, |
1161 | nvram_data_to_access_addr(naddr), | 1185 | nvram_data_addr(ha, naddr), cpu_to_le32(*dwptr)); |
1162 | cpu_to_le32(*dwptr)); | ||
1163 | if (ret != QLA_SUCCESS) { | 1186 | if (ret != QLA_SUCCESS) { |
1164 | DEBUG9(qla_printk("Unable to program nvram address=%x " | 1187 | DEBUG9(qla_printk("Unable to program nvram address=%x " |
1165 | "data=%x.\n", naddr, *dwptr)); | 1188 | "data=%x.\n", naddr, *dwptr)); |
@@ -1168,8 +1191,7 @@ qla24xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, | |||
1168 | } | 1191 | } |
1169 | 1192 | ||
1170 | /* Enable NVRAM write-protection. */ | 1193 | /* Enable NVRAM write-protection. */ |
1171 | qla24xx_write_flash_dword(ha, nvram_conf_to_access_addr(0x101), | 1194 | qla24xx_write_flash_dword(ha, nvram_conf_addr(ha, 0x101), 0x8c); |
1172 | 0x8c); | ||
1173 | 1195 | ||
1174 | /* Disable flash write. */ | 1196 | /* Disable flash write. */ |
1175 | WRT_REG_DWORD(®->ctrl_status, | 1197 | WRT_REG_DWORD(®->ctrl_status, |
@@ -1191,8 +1213,7 @@ qla25xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, | |||
1191 | dwptr = (uint32_t *)buf; | 1213 | dwptr = (uint32_t *)buf; |
1192 | for (i = 0; i < bytes >> 2; i++, naddr++) | 1214 | for (i = 0; i < bytes >> 2; i++, naddr++) |
1193 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, | 1215 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, |
1194 | flash_data_to_access_addr(ha->flt_region_vpd_nvram | | 1216 | flash_data_addr(ha, ha->flt_region_vpd_nvram | naddr))); |
1195 | naddr))); | ||
1196 | 1217 | ||
1197 | return buf; | 1218 | return buf; |
1198 | } | 1219 | } |
@@ -2235,12 +2256,12 @@ qla25xx_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf, | |||
2235 | burst = left; | 2256 | burst = left; |
2236 | 2257 | ||
2237 | rval = qla2x00_dump_ram(vha, optrom_dma, | 2258 | rval = qla2x00_dump_ram(vha, optrom_dma, |
2238 | flash_data_to_access_addr(faddr), burst); | 2259 | flash_data_addr(ha, faddr), burst); |
2239 | if (rval) { | 2260 | if (rval) { |
2240 | qla_printk(KERN_WARNING, ha, | 2261 | qla_printk(KERN_WARNING, ha, |
2241 | "Unable to burst-read optrom segment " | 2262 | "Unable to burst-read optrom segment " |
2242 | "(%x/%x/%llx).\n", rval, | 2263 | "(%x/%x/%llx).\n", rval, |
2243 | flash_data_to_access_addr(faddr), | 2264 | flash_data_addr(ha, faddr), |
2244 | (unsigned long long)optrom_dma); | 2265 | (unsigned long long)optrom_dma); |
2245 | qla_printk(KERN_WARNING, ha, | 2266 | qla_printk(KERN_WARNING, ha, |
2246 | "Reverting to slow-read.\n"); | 2267 | "Reverting to slow-read.\n"); |