diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_os.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_os.c | 139 |
1 files changed, 94 insertions, 45 deletions
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index 8ea927788b3f..4a71f522f925 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
@@ -404,26 +404,9 @@ static char * | |||
404 | qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str) | 404 | qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str) |
405 | { | 405 | { |
406 | struct qla_hw_data *ha = vha->hw; | 406 | struct qla_hw_data *ha = vha->hw; |
407 | sprintf(str, "%d.%02d.%02d ", ha->fw_major_version, | ||
408 | ha->fw_minor_version, | ||
409 | ha->fw_subminor_version); | ||
410 | 407 | ||
411 | if (ha->fw_attributes & BIT_0) | 408 | sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version, |
412 | strcat(str, "[Class 2] "); | 409 | ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes); |
413 | if (ha->fw_attributes & BIT_1) | ||
414 | strcat(str, "[IP] "); | ||
415 | if (ha->fw_attributes & BIT_2) | ||
416 | strcat(str, "[Multi-ID] "); | ||
417 | if (ha->fw_attributes & BIT_3) | ||
418 | strcat(str, "[SB-2] "); | ||
419 | if (ha->fw_attributes & BIT_4) | ||
420 | strcat(str, "[T10 CRC] "); | ||
421 | if (ha->fw_attributes & BIT_5) | ||
422 | strcat(str, "[VI] "); | ||
423 | if (ha->fw_attributes & BIT_10) | ||
424 | strcat(str, "[84XX] "); | ||
425 | if (ha->fw_attributes & BIT_13) | ||
426 | strcat(str, "[Experimental]"); | ||
427 | return str; | 410 | return str; |
428 | } | 411 | } |
429 | 412 | ||
@@ -438,7 +421,6 @@ qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport, | |||
438 | if (!sp) | 421 | if (!sp) |
439 | return sp; | 422 | return sp; |
440 | 423 | ||
441 | sp->vha = vha; | ||
442 | sp->fcport = fcport; | 424 | sp->fcport = fcport; |
443 | sp->cmd = cmd; | 425 | sp->cmd = cmd; |
444 | sp->que = ha->req_q_map[0]; | 426 | sp->que = ha->req_q_map[0]; |
@@ -1182,7 +1164,7 @@ qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res) | |||
1182 | continue; | 1164 | continue; |
1183 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) { | 1165 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) { |
1184 | sp = req->outstanding_cmds[cnt]; | 1166 | sp = req->outstanding_cmds[cnt]; |
1185 | if (sp && sp->vha == vha) { | 1167 | if (sp && sp->fcport->vha == vha) { |
1186 | req->outstanding_cmds[cnt] = NULL; | 1168 | req->outstanding_cmds[cnt] = NULL; |
1187 | sp->cmd->result = res; | 1169 | sp->cmd->result = res; |
1188 | qla2x00_sp_compl(ha, sp); | 1170 | qla2x00_sp_compl(ha, sp); |
@@ -1329,6 +1311,8 @@ qla24xx_disable_intrs(struct qla_hw_data *ha) | |||
1329 | unsigned long flags = 0; | 1311 | unsigned long flags = 0; |
1330 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | 1312 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
1331 | 1313 | ||
1314 | if (IS_NOPOLLING_TYPE(ha)) | ||
1315 | return; | ||
1332 | spin_lock_irqsave(&ha->hardware_lock, flags); | 1316 | spin_lock_irqsave(&ha->hardware_lock, flags); |
1333 | ha->interrupts_on = 0; | 1317 | ha->interrupts_on = 0; |
1334 | WRT_REG_DWORD(®->ictrl, 0); | 1318 | WRT_REG_DWORD(®->ictrl, 0); |
@@ -1488,6 +1472,44 @@ static struct isp_operations qla25xx_isp_ops = { | |||
1488 | .rd_req_reg = qla24xx_rd_req_reg, | 1472 | .rd_req_reg = qla24xx_rd_req_reg, |
1489 | }; | 1473 | }; |
1490 | 1474 | ||
1475 | static struct isp_operations qla81xx_isp_ops = { | ||
1476 | .pci_config = qla25xx_pci_config, | ||
1477 | .reset_chip = qla24xx_reset_chip, | ||
1478 | .chip_diag = qla24xx_chip_diag, | ||
1479 | .config_rings = qla24xx_config_rings, | ||
1480 | .reset_adapter = qla24xx_reset_adapter, | ||
1481 | .nvram_config = qla81xx_nvram_config, | ||
1482 | .update_fw_options = qla81xx_update_fw_options, | ||
1483 | .load_risc = qla24xx_load_risc, | ||
1484 | .pci_info_str = qla24xx_pci_info_str, | ||
1485 | .fw_version_str = qla24xx_fw_version_str, | ||
1486 | .intr_handler = qla24xx_intr_handler, | ||
1487 | .enable_intrs = qla24xx_enable_intrs, | ||
1488 | .disable_intrs = qla24xx_disable_intrs, | ||
1489 | .abort_command = qla24xx_abort_command, | ||
1490 | .target_reset = qla24xx_abort_target, | ||
1491 | .lun_reset = qla24xx_lun_reset, | ||
1492 | .fabric_login = qla24xx_login_fabric, | ||
1493 | .fabric_logout = qla24xx_fabric_logout, | ||
1494 | .calc_req_entries = NULL, | ||
1495 | .build_iocbs = NULL, | ||
1496 | .prep_ms_iocb = qla24xx_prep_ms_iocb, | ||
1497 | .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, | ||
1498 | .read_nvram = qla25xx_read_nvram_data, | ||
1499 | .write_nvram = qla25xx_write_nvram_data, | ||
1500 | .fw_dump = qla81xx_fw_dump, | ||
1501 | .beacon_on = qla24xx_beacon_on, | ||
1502 | .beacon_off = qla24xx_beacon_off, | ||
1503 | .beacon_blink = qla24xx_beacon_blink, | ||
1504 | .read_optrom = qla25xx_read_optrom_data, | ||
1505 | .write_optrom = qla24xx_write_optrom_data, | ||
1506 | .get_flash_version = qla24xx_get_flash_version, | ||
1507 | .start_scsi = qla24xx_start_scsi, | ||
1508 | .wrt_req_reg = qla24xx_wrt_req_reg, | ||
1509 | .wrt_rsp_reg = qla24xx_wrt_rsp_reg, | ||
1510 | .rd_req_reg = qla24xx_rd_req_reg, | ||
1511 | }; | ||
1512 | |||
1491 | static inline void | 1513 | static inline void |
1492 | qla2x00_set_isp_flags(struct qla_hw_data *ha) | 1514 | qla2x00_set_isp_flags(struct qla_hw_data *ha) |
1493 | { | 1515 | { |
@@ -1567,6 +1589,13 @@ qla2x00_set_isp_flags(struct qla_hw_data *ha) | |||
1567 | ha->device_type |= DT_IIDMA; | 1589 | ha->device_type |= DT_IIDMA; |
1568 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; | 1590 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; |
1569 | break; | 1591 | break; |
1592 | case PCI_DEVICE_ID_QLOGIC_ISP8001: | ||
1593 | ha->device_type |= DT_ISP8001; | ||
1594 | ha->device_type |= DT_ZIO_SUPPORTED; | ||
1595 | ha->device_type |= DT_FWI2; | ||
1596 | ha->device_type |= DT_IIDMA; | ||
1597 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; | ||
1598 | break; | ||
1570 | } | 1599 | } |
1571 | } | 1600 | } |
1572 | 1601 | ||
@@ -1629,7 +1658,7 @@ skip_pio: | |||
1629 | 1658 | ||
1630 | /* Determine queue resources */ | 1659 | /* Determine queue resources */ |
1631 | ha->max_queues = 1; | 1660 | ha->max_queues = 1; |
1632 | if (ql2xmaxqueues <= 1 || !IS_QLA25XX(ha)) | 1661 | if (ql2xmaxqueues <= 1 || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))) |
1633 | goto mqiobase_exit; | 1662 | goto mqiobase_exit; |
1634 | ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), | 1663 | ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), |
1635 | pci_resource_len(ha->pdev, 3)); | 1664 | pci_resource_len(ha->pdev, 3)); |
@@ -1706,7 +1735,8 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1706 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 || | 1735 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 || |
1707 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 || | 1736 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 || |
1708 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 || | 1737 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 || |
1709 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532) { | 1738 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 || |
1739 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001) { | ||
1710 | bars = pci_select_bars(pdev, IORESOURCE_MEM); | 1740 | bars = pci_select_bars(pdev, IORESOURCE_MEM); |
1711 | sht = &qla24xx_driver_template; | 1741 | sht = &qla24xx_driver_template; |
1712 | mem_only = 1; | 1742 | mem_only = 1; |
@@ -1760,6 +1790,10 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1760 | rsp_length = RESPONSE_ENTRY_CNT_2100; | 1790 | rsp_length = RESPONSE_ENTRY_CNT_2100; |
1761 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; | 1791 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; |
1762 | ha->gid_list_info_size = 4; | 1792 | ha->gid_list_info_size = 4; |
1793 | ha->flash_conf_off = ~0; | ||
1794 | ha->flash_data_off = ~0; | ||
1795 | ha->nvram_conf_off = ~0; | ||
1796 | ha->nvram_data_off = ~0; | ||
1763 | ha->isp_ops = &qla2100_isp_ops; | 1797 | ha->isp_ops = &qla2100_isp_ops; |
1764 | } else if (IS_QLA2200(ha)) { | 1798 | } else if (IS_QLA2200(ha)) { |
1765 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | 1799 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
@@ -1767,6 +1801,10 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1767 | rsp_length = RESPONSE_ENTRY_CNT_2100; | 1801 | rsp_length = RESPONSE_ENTRY_CNT_2100; |
1768 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; | 1802 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; |
1769 | ha->gid_list_info_size = 4; | 1803 | ha->gid_list_info_size = 4; |
1804 | ha->flash_conf_off = ~0; | ||
1805 | ha->flash_data_off = ~0; | ||
1806 | ha->nvram_conf_off = ~0; | ||
1807 | ha->nvram_data_off = ~0; | ||
1770 | ha->isp_ops = &qla2100_isp_ops; | 1808 | ha->isp_ops = &qla2100_isp_ops; |
1771 | } else if (IS_QLA23XX(ha)) { | 1809 | } else if (IS_QLA23XX(ha)) { |
1772 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | 1810 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
@@ -1776,6 +1814,10 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1776 | ha->gid_list_info_size = 6; | 1814 | ha->gid_list_info_size = 6; |
1777 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) | 1815 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
1778 | ha->optrom_size = OPTROM_SIZE_2322; | 1816 | ha->optrom_size = OPTROM_SIZE_2322; |
1817 | ha->flash_conf_off = ~0; | ||
1818 | ha->flash_data_off = ~0; | ||
1819 | ha->nvram_conf_off = ~0; | ||
1820 | ha->nvram_data_off = ~0; | ||
1779 | ha->isp_ops = &qla2300_isp_ops; | 1821 | ha->isp_ops = &qla2300_isp_ops; |
1780 | } else if (IS_QLA24XX_TYPE(ha)) { | 1822 | } else if (IS_QLA24XX_TYPE(ha)) { |
1781 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | 1823 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
@@ -1787,6 +1829,10 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1787 | ha->optrom_size = OPTROM_SIZE_24XX; | 1829 | ha->optrom_size = OPTROM_SIZE_24XX; |
1788 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; | 1830 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; |
1789 | ha->isp_ops = &qla24xx_isp_ops; | 1831 | ha->isp_ops = &qla24xx_isp_ops; |
1832 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; | ||
1833 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA; | ||
1834 | ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; | ||
1835 | ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; | ||
1790 | } else if (IS_QLA25XX(ha)) { | 1836 | } else if (IS_QLA25XX(ha)) { |
1791 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | 1837 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
1792 | req_length = REQUEST_ENTRY_CNT_24XX; | 1838 | req_length = REQUEST_ENTRY_CNT_24XX; |
@@ -1797,6 +1843,23 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1797 | ha->optrom_size = OPTROM_SIZE_25XX; | 1843 | ha->optrom_size = OPTROM_SIZE_25XX; |
1798 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; | 1844 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; |
1799 | ha->isp_ops = &qla25xx_isp_ops; | 1845 | ha->isp_ops = &qla25xx_isp_ops; |
1846 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; | ||
1847 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA; | ||
1848 | ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; | ||
1849 | ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; | ||
1850 | } else if (IS_QLA81XX(ha)) { | ||
1851 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | ||
1852 | req_length = REQUEST_ENTRY_CNT_24XX; | ||
1853 | rsp_length = RESPONSE_ENTRY_CNT_2300; | ||
1854 | ha->max_loop_id = SNS_LAST_LOOP_ID_2300; | ||
1855 | ha->init_cb_size = sizeof(struct mid_init_cb_81xx); | ||
1856 | ha->gid_list_info_size = 8; | ||
1857 | ha->optrom_size = OPTROM_SIZE_81XX; | ||
1858 | ha->isp_ops = &qla81xx_isp_ops; | ||
1859 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; | ||
1860 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; | ||
1861 | ha->nvram_conf_off = ~0; | ||
1862 | ha->nvram_data_off = ~0; | ||
1800 | } | 1863 | } |
1801 | 1864 | ||
1802 | mutex_init(&ha->vport_lock); | 1865 | mutex_init(&ha->vport_lock); |
@@ -2458,23 +2521,6 @@ qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code, | |||
2458 | return qla2x00_post_work(vha, e, 1); | 2521 | return qla2x00_post_work(vha, e, 1); |
2459 | } | 2522 | } |
2460 | 2523 | ||
2461 | int | ||
2462 | qla2x00_post_hwe_work(struct scsi_qla_host *vha, uint16_t code, uint16_t d1, | ||
2463 | uint16_t d2, uint16_t d3) | ||
2464 | { | ||
2465 | struct qla_work_evt *e; | ||
2466 | |||
2467 | e = qla2x00_alloc_work(vha, QLA_EVT_HWE_LOG, 1); | ||
2468 | if (!e) | ||
2469 | return QLA_FUNCTION_FAILED; | ||
2470 | |||
2471 | e->u.hwe.code = code; | ||
2472 | e->u.hwe.d1 = d1; | ||
2473 | e->u.hwe.d2 = d2; | ||
2474 | e->u.hwe.d3 = d3; | ||
2475 | return qla2x00_post_work(vha, e, 1); | ||
2476 | } | ||
2477 | |||
2478 | static void | 2524 | static void |
2479 | qla2x00_do_work(struct scsi_qla_host *vha) | 2525 | qla2x00_do_work(struct scsi_qla_host *vha) |
2480 | { | 2526 | { |
@@ -2492,10 +2538,6 @@ qla2x00_do_work(struct scsi_qla_host *vha) | |||
2492 | fc_host_post_event(vha->host, fc_get_event_number(), | 2538 | fc_host_post_event(vha->host, fc_get_event_number(), |
2493 | e->u.aen.code, e->u.aen.data); | 2539 | e->u.aen.code, e->u.aen.data); |
2494 | break; | 2540 | break; |
2495 | case QLA_EVT_HWE_LOG: | ||
2496 | qla2xxx_hw_event_log(vha, e->u.hwe.code, e->u.hwe.d1, | ||
2497 | e->u.hwe.d2, e->u.hwe.d3); | ||
2498 | break; | ||
2499 | } | 2541 | } |
2500 | if (e->flags & QLA_EVT_FLAG_FREE) | 2542 | if (e->flags & QLA_EVT_FLAG_FREE) |
2501 | kfree(e); | 2543 | kfree(e); |
@@ -2914,13 +2956,14 @@ qla2x00_timer(scsi_qla_host_t *vha) | |||
2914 | 2956 | ||
2915 | /* Firmware interface routines. */ | 2957 | /* Firmware interface routines. */ |
2916 | 2958 | ||
2917 | #define FW_BLOBS 6 | 2959 | #define FW_BLOBS 7 |
2918 | #define FW_ISP21XX 0 | 2960 | #define FW_ISP21XX 0 |
2919 | #define FW_ISP22XX 1 | 2961 | #define FW_ISP22XX 1 |
2920 | #define FW_ISP2300 2 | 2962 | #define FW_ISP2300 2 |
2921 | #define FW_ISP2322 3 | 2963 | #define FW_ISP2322 3 |
2922 | #define FW_ISP24XX 4 | 2964 | #define FW_ISP24XX 4 |
2923 | #define FW_ISP25XX 5 | 2965 | #define FW_ISP25XX 5 |
2966 | #define FW_ISP81XX 6 | ||
2924 | 2967 | ||
2925 | #define FW_FILE_ISP21XX "ql2100_fw.bin" | 2968 | #define FW_FILE_ISP21XX "ql2100_fw.bin" |
2926 | #define FW_FILE_ISP22XX "ql2200_fw.bin" | 2969 | #define FW_FILE_ISP22XX "ql2200_fw.bin" |
@@ -2928,6 +2971,7 @@ qla2x00_timer(scsi_qla_host_t *vha) | |||
2928 | #define FW_FILE_ISP2322 "ql2322_fw.bin" | 2971 | #define FW_FILE_ISP2322 "ql2322_fw.bin" |
2929 | #define FW_FILE_ISP24XX "ql2400_fw.bin" | 2972 | #define FW_FILE_ISP24XX "ql2400_fw.bin" |
2930 | #define FW_FILE_ISP25XX "ql2500_fw.bin" | 2973 | #define FW_FILE_ISP25XX "ql2500_fw.bin" |
2974 | #define FW_FILE_ISP81XX "ql8100_fw.bin" | ||
2931 | 2975 | ||
2932 | static DEFINE_MUTEX(qla_fw_lock); | 2976 | static DEFINE_MUTEX(qla_fw_lock); |
2933 | 2977 | ||
@@ -2938,6 +2982,7 @@ static struct fw_blob qla_fw_blobs[FW_BLOBS] = { | |||
2938 | { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, }, | 2982 | { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, }, |
2939 | { .name = FW_FILE_ISP24XX, }, | 2983 | { .name = FW_FILE_ISP24XX, }, |
2940 | { .name = FW_FILE_ISP25XX, }, | 2984 | { .name = FW_FILE_ISP25XX, }, |
2985 | { .name = FW_FILE_ISP81XX, }, | ||
2941 | }; | 2986 | }; |
2942 | 2987 | ||
2943 | struct fw_blob * | 2988 | struct fw_blob * |
@@ -2959,6 +3004,8 @@ qla2x00_request_firmware(scsi_qla_host_t *vha) | |||
2959 | blob = &qla_fw_blobs[FW_ISP24XX]; | 3004 | blob = &qla_fw_blobs[FW_ISP24XX]; |
2960 | } else if (IS_QLA25XX(ha)) { | 3005 | } else if (IS_QLA25XX(ha)) { |
2961 | blob = &qla_fw_blobs[FW_ISP25XX]; | 3006 | blob = &qla_fw_blobs[FW_ISP25XX]; |
3007 | } else if (IS_QLA81XX(ha)) { | ||
3008 | blob = &qla_fw_blobs[FW_ISP81XX]; | ||
2962 | } | 3009 | } |
2963 | 3010 | ||
2964 | mutex_lock(&qla_fw_lock); | 3011 | mutex_lock(&qla_fw_lock); |
@@ -3112,6 +3159,7 @@ static struct pci_device_id qla2xxx_pci_tbl[] = { | |||
3112 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) }, | 3159 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) }, |
3113 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) }, | 3160 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) }, |
3114 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) }, | 3161 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) }, |
3162 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) }, | ||
3115 | { 0 }, | 3163 | { 0 }, |
3116 | }; | 3164 | }; |
3117 | MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl); | 3165 | MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl); |
@@ -3200,3 +3248,4 @@ MODULE_FIRMWARE(FW_FILE_ISP2300); | |||
3200 | MODULE_FIRMWARE(FW_FILE_ISP2322); | 3248 | MODULE_FIRMWARE(FW_FILE_ISP2322); |
3201 | MODULE_FIRMWARE(FW_FILE_ISP24XX); | 3249 | MODULE_FIRMWARE(FW_FILE_ISP24XX); |
3202 | MODULE_FIRMWARE(FW_FILE_ISP25XX); | 3250 | MODULE_FIRMWARE(FW_FILE_ISP25XX); |
3251 | MODULE_FIRMWARE(FW_FILE_ISP81XX); | ||