aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/scsi/qla2xxx/qla_os.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_os.c')
-rw-r--r--drivers/scsi/qla2xxx/qla_os.c435
1 files changed, 286 insertions, 149 deletions
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 036030c95339..a2f999273a5f 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -304,7 +304,6 @@ static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
304 struct req_que **, struct rsp_que **); 304 struct req_que **, struct rsp_que **);
305static void qla2x00_free_fw_dump(struct qla_hw_data *); 305static void qla2x00_free_fw_dump(struct qla_hw_data *);
306static void qla2x00_mem_free(struct qla_hw_data *); 306static void qla2x00_mem_free(struct qla_hw_data *);
307static void qla2x00_sp_free_dma(srb_t *);
308 307
309/* -------------------------------------------------------------------------- */ 308/* -------------------------------------------------------------------------- */
310static int qla2x00_alloc_queues(struct qla_hw_data *ha) 309static int qla2x00_alloc_queues(struct qla_hw_data *ha)
@@ -559,28 +558,75 @@ qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
559 return str; 558 return str;
560} 559}
561 560
562static inline srb_t * 561void
563qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport, 562qla2x00_sp_free_dma(void *vha, void *ptr)
564 struct scsi_cmnd *cmd)
565{ 563{
566 srb_t *sp; 564 srb_t *sp = (srb_t *)ptr;
567 struct qla_hw_data *ha = vha->hw; 565 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
566 struct qla_hw_data *ha = sp->fcport->vha->hw;
567 void *ctx = GET_CMD_CTX_SP(sp);
568 568
569 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC); 569 if (sp->flags & SRB_DMA_VALID) {
570 if (!sp) { 570 scsi_dma_unmap(cmd);
571 ql_log(ql_log_warn, vha, 0x3006, 571 sp->flags &= ~SRB_DMA_VALID;
572 "Memory allocation failed for sp.\n");
573 return sp;
574 } 572 }
575 573
576 atomic_set(&sp->ref_count, 1); 574 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
577 sp->fcport = fcport; 575 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
578 sp->cmd = cmd; 576 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
579 sp->flags = 0; 577 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
580 CMD_SP(cmd) = (void *)sp; 578 }
581 sp->ctx = NULL;
582 579
583 return sp; 580 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
581 /* List assured to be having elements */
582 qla2x00_clean_dsd_pool(ha, sp);
583 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
584 }
585
586 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
587 dma_pool_free(ha->dl_dma_pool, ctx,
588 ((struct crc_context *)ctx)->crc_ctx_dma);
589 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
590 }
591
592 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
593 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
594
595 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
596 ctx1->fcp_cmnd_dma);
597 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
598 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
599 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
600 mempool_free(ctx1, ha->ctx_mempool);
601 ctx1 = NULL;
602 }
603
604 CMD_SP(cmd) = NULL;
605 mempool_free(sp, ha->srb_mempool);
606}
607
608static void
609qla2x00_sp_compl(void *data, void *ptr, int res)
610{
611 struct qla_hw_data *ha = (struct qla_hw_data *)data;
612 srb_t *sp = (srb_t *)ptr;
613 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
614
615 cmd->result = res;
616
617 if (atomic_read(&sp->ref_count) == 0) {
618 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
619 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
620 sp, GET_CMD_SP(sp));
621 if (ql2xextended_error_logging & ql_dbg_io)
622 BUG();
623 return;
624 }
625 if (!atomic_dec_and_test(&sp->ref_count))
626 return;
627
628 qla2x00_sp_free_dma(ha, sp);
629 cmd->scsi_done(cmd);
584} 630}
585 631
586static int 632static int
@@ -644,10 +690,17 @@ qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
644 goto qc24_target_busy; 690 goto qc24_target_busy;
645 } 691 }
646 692
647 sp = qla2x00_get_new_sp(base_vha, fcport, cmd); 693 sp = qla2x00_get_sp(base_vha, fcport, GFP_ATOMIC);
648 if (!sp) 694 if (!sp)
649 goto qc24_host_busy; 695 goto qc24_host_busy;
650 696
697 sp->u.scmd.cmd = cmd;
698 sp->type = SRB_SCSI_CMD;
699 atomic_set(&sp->ref_count, 1);
700 CMD_SP(cmd) = (void *)sp;
701 sp->free = qla2x00_sp_free_dma;
702 sp->done = qla2x00_sp_compl;
703
651 rval = ha->isp_ops->start_scsi(sp); 704 rval = ha->isp_ops->start_scsi(sp);
652 if (rval != QLA_SUCCESS) { 705 if (rval != QLA_SUCCESS) {
653 ql_dbg(ql_dbg_io, vha, 0x3013, 706 ql_dbg(ql_dbg_io, vha, 0x3013,
@@ -658,8 +711,7 @@ qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
658 return 0; 711 return 0;
659 712
660qc24_host_busy_free_sp: 713qc24_host_busy_free_sp:
661 qla2x00_sp_free_dma(sp); 714 qla2x00_sp_free_dma(ha, sp);
662 mempool_free(sp, ha->srb_mempool);
663 715
664qc24_host_busy: 716qc24_host_busy:
665 return SCSI_MLQUEUE_HOST_BUSY; 717 return SCSI_MLQUEUE_HOST_BUSY;
@@ -893,7 +945,7 @@ qla2xxx_eh_abort(struct scsi_cmnd *cmd)
893 } 945 }
894 946
895 spin_lock_irqsave(&ha->hardware_lock, flags); 947 spin_lock_irqsave(&ha->hardware_lock, flags);
896 qla2x00_sp_compl(ha, sp); 948 sp->done(ha, sp, 0);
897 spin_unlock_irqrestore(&ha->hardware_lock, flags); 949 spin_unlock_irqrestore(&ha->hardware_lock, flags);
898 950
899 /* Did the command return during mailbox execution? */ 951 /* Did the command return during mailbox execution? */
@@ -925,6 +977,7 @@ qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
925 struct qla_hw_data *ha = vha->hw; 977 struct qla_hw_data *ha = vha->hw;
926 struct req_que *req; 978 struct req_que *req;
927 srb_t *sp; 979 srb_t *sp;
980 struct scsi_cmnd *cmd;
928 981
929 status = QLA_SUCCESS; 982 status = QLA_SUCCESS;
930 983
@@ -935,28 +988,29 @@ qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
935 sp = req->outstanding_cmds[cnt]; 988 sp = req->outstanding_cmds[cnt];
936 if (!sp) 989 if (!sp)
937 continue; 990 continue;
938 if ((sp->ctx) && !IS_PROT_IO(sp)) 991 if (sp->type != SRB_SCSI_CMD)
939 continue; 992 continue;
940 if (vha->vp_idx != sp->fcport->vha->vp_idx) 993 if (vha->vp_idx != sp->fcport->vha->vp_idx)
941 continue; 994 continue;
942 match = 0; 995 match = 0;
996 cmd = GET_CMD_SP(sp);
943 switch (type) { 997 switch (type) {
944 case WAIT_HOST: 998 case WAIT_HOST:
945 match = 1; 999 match = 1;
946 break; 1000 break;
947 case WAIT_TARGET: 1001 case WAIT_TARGET:
948 match = sp->cmd->device->id == t; 1002 match = cmd->device->id == t;
949 break; 1003 break;
950 case WAIT_LUN: 1004 case WAIT_LUN:
951 match = (sp->cmd->device->id == t && 1005 match = (cmd->device->id == t &&
952 sp->cmd->device->lun == l); 1006 cmd->device->lun == l);
953 break; 1007 break;
954 } 1008 }
955 if (!match) 1009 if (!match)
956 continue; 1010 continue;
957 1011
958 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1012 spin_unlock_irqrestore(&ha->hardware_lock, flags);
959 status = qla2x00_eh_wait_on_command(sp->cmd); 1013 status = qla2x00_eh_wait_on_command(cmd);
960 spin_lock_irqsave(&ha->hardware_lock, flags); 1014 spin_lock_irqsave(&ha->hardware_lock, flags);
961 } 1015 }
962 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1016 spin_unlock_irqrestore(&ha->hardware_lock, flags);
@@ -1219,7 +1273,7 @@ qla2x00_loop_reset(scsi_qla_host_t *vha)
1219 } 1273 }
1220 } 1274 }
1221 1275
1222 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) { 1276 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1223 ret = qla2x00_full_login_lip(vha); 1277 ret = qla2x00_full_login_lip(vha);
1224 if (ret != QLA_SUCCESS) { 1278 if (ret != QLA_SUCCESS) {
1225 ql_dbg(ql_dbg_taskm, vha, 0x802d, 1279 ql_dbg(ql_dbg_taskm, vha, 0x802d,
@@ -1249,7 +1303,6 @@ qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1249 int que, cnt; 1303 int que, cnt;
1250 unsigned long flags; 1304 unsigned long flags;
1251 srb_t *sp; 1305 srb_t *sp;
1252 struct srb_ctx *ctx;
1253 struct qla_hw_data *ha = vha->hw; 1306 struct qla_hw_data *ha = vha->hw;
1254 struct req_que *req; 1307 struct req_que *req;
1255 1308
@@ -1262,31 +1315,7 @@ qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1262 sp = req->outstanding_cmds[cnt]; 1315 sp = req->outstanding_cmds[cnt];
1263 if (sp) { 1316 if (sp) {
1264 req->outstanding_cmds[cnt] = NULL; 1317 req->outstanding_cmds[cnt] = NULL;
1265 if (!sp->ctx || 1318 sp->done(vha, sp, res);
1266 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1267 IS_PROT_IO(sp)) {
1268 sp->cmd->result = res;
1269 qla2x00_sp_compl(ha, sp);
1270 } else {
1271 ctx = sp->ctx;
1272 if (ctx->type == SRB_ELS_CMD_RPT ||
1273 ctx->type == SRB_ELS_CMD_HST ||
1274 ctx->type == SRB_CT_CMD) {
1275 struct fc_bsg_job *bsg_job =
1276 ctx->u.bsg_job;
1277 if (bsg_job->request->msgcode
1278 == FC_BSG_HST_CT)
1279 kfree(sp->fcport);
1280 bsg_job->req->errors = 0;
1281 bsg_job->reply->result = res;
1282 bsg_job->job_done(bsg_job);
1283 kfree(sp->ctx);
1284 mempool_free(sp,
1285 ha->srb_mempool);
1286 } else {
1287 ctx->u.iocb_cmd->free(sp);
1288 }
1289 }
1290 } 1319 }
1291 } 1320 }
1292 } 1321 }
@@ -1488,9 +1517,6 @@ qla2x00_iospace_config(struct qla_hw_data *ha)
1488 uint16_t msix; 1517 uint16_t msix;
1489 int cpus; 1518 int cpus;
1490 1519
1491 if (IS_QLA82XX(ha))
1492 return qla82xx_iospace_config(ha);
1493
1494 if (pci_request_selected_regions(ha->pdev, ha->bars, 1520 if (pci_request_selected_regions(ha->pdev, ha->bars,
1495 QLA2XXX_DRIVER_NAME)) { 1521 QLA2XXX_DRIVER_NAME)) {
1496 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011, 1522 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
@@ -1593,6 +1619,96 @@ iospace_error_exit:
1593} 1619}
1594 1620
1595 1621
1622static int
1623qla83xx_iospace_config(struct qla_hw_data *ha)
1624{
1625 uint16_t msix;
1626 int cpus;
1627
1628 if (pci_request_selected_regions(ha->pdev, ha->bars,
1629 QLA2XXX_DRIVER_NAME)) {
1630 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1631 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1632 pci_name(ha->pdev));
1633
1634 goto iospace_error_exit;
1635 }
1636
1637 /* Use MMIO operations for all accesses. */
1638 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1639 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1640 "Invalid pci I/O region size (%s).\n",
1641 pci_name(ha->pdev));
1642 goto iospace_error_exit;
1643 }
1644 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1645 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1646 "Invalid PCI mem region size (%s), aborting\n",
1647 pci_name(ha->pdev));
1648 goto iospace_error_exit;
1649 }
1650
1651 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1652 if (!ha->iobase) {
1653 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1654 "Cannot remap MMIO (%s), aborting.\n",
1655 pci_name(ha->pdev));
1656 goto iospace_error_exit;
1657 }
1658
1659 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1660 /* 83XX 26XX always use MQ type access for queues
1661 * - mbar 2, a.k.a region 4 */
1662 ha->max_req_queues = ha->max_rsp_queues = 1;
1663 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1664 pci_resource_len(ha->pdev, 4));
1665
1666 if (!ha->mqiobase) {
1667 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1668 "BAR2/region4 not enabled\n");
1669 goto mqiobase_exit;
1670 }
1671
1672 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1673 pci_resource_len(ha->pdev, 2));
1674 if (ha->msixbase) {
1675 /* Read MSIX vector size of the board */
1676 pci_read_config_word(ha->pdev,
1677 QLA_83XX_PCI_MSIX_CONTROL, &msix);
1678 ha->msix_count = msix;
1679 /* Max queues are bounded by available msix vectors */
1680 /* queue 0 uses two msix vectors */
1681 if (ql2xmultique_tag) {
1682 cpus = num_online_cpus();
1683 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1684 (cpus + 1) : (ha->msix_count - 1);
1685 ha->max_req_queues = 2;
1686 } else if (ql2xmaxqueues > 1) {
1687 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1688 QLA_MQ_SIZE : ql2xmaxqueues;
1689 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1690 "QoS mode set, max no of request queues:%d.\n",
1691 ha->max_req_queues);
1692 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1693 "QoS mode set, max no of request queues:%d.\n",
1694 ha->max_req_queues);
1695 }
1696 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1697 "MSI-X vector count: %d.\n", msix);
1698 } else
1699 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1700 "BAR 1 not enabled.\n");
1701
1702mqiobase_exit:
1703 ha->msix_count = ha->max_rsp_queues + 1;
1704 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1705 "MSIX Count:%d.\n", ha->msix_count);
1706 return 0;
1707
1708iospace_error_exit:
1709 return -ENOMEM;
1710}
1711
1596static struct isp_operations qla2100_isp_ops = { 1712static struct isp_operations qla2100_isp_ops = {
1597 .pci_config = qla2100_pci_config, 1713 .pci_config = qla2100_pci_config,
1598 .reset_chip = qla2x00_reset_chip, 1714 .reset_chip = qla2x00_reset_chip,
@@ -1769,7 +1885,7 @@ static struct isp_operations qla81xx_isp_ops = {
1769 .fw_dump = qla81xx_fw_dump, 1885 .fw_dump = qla81xx_fw_dump,
1770 .beacon_on = qla24xx_beacon_on, 1886 .beacon_on = qla24xx_beacon_on,
1771 .beacon_off = qla24xx_beacon_off, 1887 .beacon_off = qla24xx_beacon_off,
1772 .beacon_blink = qla24xx_beacon_blink, 1888 .beacon_blink = qla83xx_beacon_blink,
1773 .read_optrom = qla25xx_read_optrom_data, 1889 .read_optrom = qla25xx_read_optrom_data,
1774 .write_optrom = qla24xx_write_optrom_data, 1890 .write_optrom = qla24xx_write_optrom_data,
1775 .get_flash_version = qla24xx_get_flash_version, 1891 .get_flash_version = qla24xx_get_flash_version,
@@ -1815,6 +1931,43 @@ static struct isp_operations qla82xx_isp_ops = {
1815 .iospace_config = qla82xx_iospace_config, 1931 .iospace_config = qla82xx_iospace_config,
1816}; 1932};
1817 1933
1934static struct isp_operations qla83xx_isp_ops = {
1935 .pci_config = qla25xx_pci_config,
1936 .reset_chip = qla24xx_reset_chip,
1937 .chip_diag = qla24xx_chip_diag,
1938 .config_rings = qla24xx_config_rings,
1939 .reset_adapter = qla24xx_reset_adapter,
1940 .nvram_config = qla81xx_nvram_config,
1941 .update_fw_options = qla81xx_update_fw_options,
1942 .load_risc = qla81xx_load_risc,
1943 .pci_info_str = qla24xx_pci_info_str,
1944 .fw_version_str = qla24xx_fw_version_str,
1945 .intr_handler = qla24xx_intr_handler,
1946 .enable_intrs = qla24xx_enable_intrs,
1947 .disable_intrs = qla24xx_disable_intrs,
1948 .abort_command = qla24xx_abort_command,
1949 .target_reset = qla24xx_abort_target,
1950 .lun_reset = qla24xx_lun_reset,
1951 .fabric_login = qla24xx_login_fabric,
1952 .fabric_logout = qla24xx_fabric_logout,
1953 .calc_req_entries = NULL,
1954 .build_iocbs = NULL,
1955 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1956 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1957 .read_nvram = NULL,
1958 .write_nvram = NULL,
1959 .fw_dump = qla83xx_fw_dump,
1960 .beacon_on = qla24xx_beacon_on,
1961 .beacon_off = qla24xx_beacon_off,
1962 .beacon_blink = qla83xx_beacon_blink,
1963 .read_optrom = qla25xx_read_optrom_data,
1964 .write_optrom = qla24xx_write_optrom_data,
1965 .get_flash_version = qla24xx_get_flash_version,
1966 .start_scsi = qla24xx_dif_start_scsi,
1967 .abort_isp = qla2x00_abort_isp,
1968 .iospace_config = qla83xx_iospace_config,
1969};
1970
1818static inline void 1971static inline void
1819qla2x00_set_isp_flags(struct qla_hw_data *ha) 1972qla2x00_set_isp_flags(struct qla_hw_data *ha)
1820{ 1973{
@@ -1909,6 +2062,22 @@ qla2x00_set_isp_flags(struct qla_hw_data *ha)
1909 /* Initialize 82XX ISP flags */ 2062 /* Initialize 82XX ISP flags */
1910 qla82xx_init_flags(ha); 2063 qla82xx_init_flags(ha);
1911 break; 2064 break;
2065 case PCI_DEVICE_ID_QLOGIC_ISP2031:
2066 ha->device_type |= DT_ISP2031;
2067 ha->device_type |= DT_ZIO_SUPPORTED;
2068 ha->device_type |= DT_FWI2;
2069 ha->device_type |= DT_IIDMA;
2070 ha->device_type |= DT_T10_PI;
2071 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2072 break;
2073 case PCI_DEVICE_ID_QLOGIC_ISP8031:
2074 ha->device_type |= DT_ISP8031;
2075 ha->device_type |= DT_ZIO_SUPPORTED;
2076 ha->device_type |= DT_FWI2;
2077 ha->device_type |= DT_IIDMA;
2078 ha->device_type |= DT_T10_PI;
2079 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2080 break;
1912 } 2081 }
1913 2082
1914 if (IS_QLA82XX(ha)) 2083 if (IS_QLA82XX(ha))
@@ -1966,7 +2135,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1966 char pci_info[30]; 2135 char pci_info[30];
1967 char fw_str[30]; 2136 char fw_str[30];
1968 struct scsi_host_template *sht; 2137 struct scsi_host_template *sht;
1969 int bars, max_id, mem_only = 0; 2138 int bars, mem_only = 0;
1970 uint16_t req_length = 0, rsp_length = 0; 2139 uint16_t req_length = 0, rsp_length = 0;
1971 struct req_que *req = NULL; 2140 struct req_que *req = NULL;
1972 struct rsp_que *rsp = NULL; 2141 struct rsp_que *rsp = NULL;
@@ -1980,7 +2149,9 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1980 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 || 2149 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
1981 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 || 2150 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
1982 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 || 2151 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1983 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) { 2152 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2153 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2154 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031) {
1984 bars = pci_select_bars(pdev, IORESOURCE_MEM); 2155 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1985 mem_only = 1; 2156 mem_only = 1;
1986 ql_dbg_pci(ql_dbg_init, pdev, 0x0007, 2157 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
@@ -2020,9 +2191,8 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2020 qla2x00_set_isp_flags(ha); 2191 qla2x00_set_isp_flags(ha);
2021 2192
2022 /* Set EEH reset type to fundamental if required by hba */ 2193 /* Set EEH reset type to fundamental if required by hba */
2023 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) { 2194 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha))
2024 pdev->needs_freset = 1; 2195 pdev->needs_freset = 1;
2025 }
2026 2196
2027 ha->prev_topology = 0; 2197 ha->prev_topology = 0;
2028 ha->init_cb_size = sizeof(init_cb_t); 2198 ha->init_cb_size = sizeof(init_cb_t);
@@ -2030,9 +2200,8 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2030 ha->optrom_size = OPTROM_SIZE_2300; 2200 ha->optrom_size = OPTROM_SIZE_2300;
2031 2201
2032 /* Assign ISP specific operations. */ 2202 /* Assign ISP specific operations. */
2033 max_id = MAX_TARGETS_2200;
2034 if (IS_QLA2100(ha)) { 2203 if (IS_QLA2100(ha)) {
2035 max_id = MAX_TARGETS_2100; 2204 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2036 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100; 2205 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2037 req_length = REQUEST_ENTRY_CNT_2100; 2206 req_length = REQUEST_ENTRY_CNT_2100;
2038 rsp_length = RESPONSE_ENTRY_CNT_2100; 2207 rsp_length = RESPONSE_ENTRY_CNT_2100;
@@ -2044,6 +2213,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2044 ha->nvram_data_off = ~0; 2213 ha->nvram_data_off = ~0;
2045 ha->isp_ops = &qla2100_isp_ops; 2214 ha->isp_ops = &qla2100_isp_ops;
2046 } else if (IS_QLA2200(ha)) { 2215 } else if (IS_QLA2200(ha)) {
2216 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2047 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200; 2217 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2048 req_length = REQUEST_ENTRY_CNT_2200; 2218 req_length = REQUEST_ENTRY_CNT_2200;
2049 rsp_length = RESPONSE_ENTRY_CNT_2100; 2219 rsp_length = RESPONSE_ENTRY_CNT_2100;
@@ -2055,6 +2225,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2055 ha->nvram_data_off = ~0; 2225 ha->nvram_data_off = ~0;
2056 ha->isp_ops = &qla2100_isp_ops; 2226 ha->isp_ops = &qla2100_isp_ops;
2057 } else if (IS_QLA23XX(ha)) { 2227 } else if (IS_QLA23XX(ha)) {
2228 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2058 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2229 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2059 req_length = REQUEST_ENTRY_CNT_2200; 2230 req_length = REQUEST_ENTRY_CNT_2200;
2060 rsp_length = RESPONSE_ENTRY_CNT_2300; 2231 rsp_length = RESPONSE_ENTRY_CNT_2300;
@@ -2068,6 +2239,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2068 ha->nvram_data_off = ~0; 2239 ha->nvram_data_off = ~0;
2069 ha->isp_ops = &qla2300_isp_ops; 2240 ha->isp_ops = &qla2300_isp_ops;
2070 } else if (IS_QLA24XX_TYPE(ha)) { 2241 } else if (IS_QLA24XX_TYPE(ha)) {
2242 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2071 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2243 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2072 req_length = REQUEST_ENTRY_CNT_24XX; 2244 req_length = REQUEST_ENTRY_CNT_24XX;
2073 rsp_length = RESPONSE_ENTRY_CNT_2300; 2245 rsp_length = RESPONSE_ENTRY_CNT_2300;
@@ -2082,6 +2254,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2082 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; 2254 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2083 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; 2255 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2084 } else if (IS_QLA25XX(ha)) { 2256 } else if (IS_QLA25XX(ha)) {
2257 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2085 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2258 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2086 req_length = REQUEST_ENTRY_CNT_24XX; 2259 req_length = REQUEST_ENTRY_CNT_24XX;
2087 rsp_length = RESPONSE_ENTRY_CNT_2300; 2260 rsp_length = RESPONSE_ENTRY_CNT_2300;
@@ -2096,6 +2269,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2096 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; 2269 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2097 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; 2270 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2098 } else if (IS_QLA81XX(ha)) { 2271 } else if (IS_QLA81XX(ha)) {
2272 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2099 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2273 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2100 req_length = REQUEST_ENTRY_CNT_24XX; 2274 req_length = REQUEST_ENTRY_CNT_24XX;
2101 rsp_length = RESPONSE_ENTRY_CNT_2300; 2275 rsp_length = RESPONSE_ENTRY_CNT_2300;
@@ -2110,6 +2284,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2110 ha->nvram_conf_off = ~0; 2284 ha->nvram_conf_off = ~0;
2111 ha->nvram_data_off = ~0; 2285 ha->nvram_data_off = ~0;
2112 } else if (IS_QLA82XX(ha)) { 2286 } else if (IS_QLA82XX(ha)) {
2287 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2113 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2288 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2114 req_length = REQUEST_ENTRY_CNT_82XX; 2289 req_length = REQUEST_ENTRY_CNT_82XX;
2115 rsp_length = RESPONSE_ENTRY_CNT_82XX; 2290 rsp_length = RESPONSE_ENTRY_CNT_82XX;
@@ -2123,14 +2298,31 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2123 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; 2298 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2124 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; 2299 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2125 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; 2300 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2301 } else if (IS_QLA83XX(ha)) {
2302 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2303 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2304 req_length = REQUEST_ENTRY_CNT_24XX;
2305 rsp_length = RESPONSE_ENTRY_CNT_2300;
2306 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2307 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2308 ha->gid_list_info_size = 8;
2309 ha->optrom_size = OPTROM_SIZE_83XX;
2310 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2311 ha->isp_ops = &qla83xx_isp_ops;
2312 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2313 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2314 ha->nvram_conf_off = ~0;
2315 ha->nvram_data_off = ~0;
2126 } 2316 }
2317
2127 ql_dbg_pci(ql_dbg_init, pdev, 0x001e, 2318 ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2128 "mbx_count=%d, req_length=%d, " 2319 "mbx_count=%d, req_length=%d, "
2129 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, " 2320 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2130 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, .\n", 2321 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2322 "max_fibre_devices=%d.\n",
2131 ha->mbx_count, req_length, rsp_length, ha->max_loop_id, 2323 ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2132 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size, 2324 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2133 ha->nvram_npiv_size); 2325 ha->nvram_npiv_size, ha->max_fibre_devices);
2134 ql_dbg_pci(ql_dbg_init, pdev, 0x001f, 2326 ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2135 "isp_ops=%p, flash_conf_off=%d, " 2327 "isp_ops=%p, flash_conf_off=%d, "
2136 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n", 2328 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
@@ -2204,7 +2396,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2204 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n", 2396 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2205 host->can_queue, base_vha->req, 2397 host->can_queue, base_vha->req,
2206 base_vha->mgmt_svr_loop_id, host->sg_tablesize); 2398 base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2207 host->max_id = max_id; 2399 host->max_id = ha->max_fibre_devices;
2208 host->this_id = 255; 2400 host->this_id = 255;
2209 host->cmd_per_lun = 3; 2401 host->cmd_per_lun = 3;
2210 host->unique_id = host->host_no; 2402 host->unique_id = host->host_no;
@@ -2251,7 +2443,7 @@ que_init:
2251 req->req_q_out = &ha->iobase->isp24.req_q_out; 2443 req->req_q_out = &ha->iobase->isp24.req_q_out;
2252 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in; 2444 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2253 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out; 2445 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2254 if (ha->mqenable) { 2446 if (ha->mqenable || IS_QLA83XX(ha)) {
2255 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in; 2447 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2256 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out; 2448 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2257 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in; 2449 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
@@ -2552,6 +2744,9 @@ qla2x00_remove_one(struct pci_dev *pdev)
2552 2744
2553 if (ha->mqiobase) 2745 if (ha->mqiobase)
2554 iounmap(ha->mqiobase); 2746 iounmap(ha->mqiobase);
2747
2748 if (IS_QLA83XX(ha) && ha->msixbase)
2749 iounmap(ha->msixbase);
2555 } 2750 }
2556 2751
2557 pci_release_selected_regions(ha->pdev, ha->bars); 2752 pci_release_selected_regions(ha->pdev, ha->bars);
@@ -2751,8 +2946,8 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2751 if (!ha->init_cb) 2946 if (!ha->init_cb)
2752 goto fail; 2947 goto fail;
2753 2948
2754 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE, 2949 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
2755 &ha->gid_list_dma, GFP_KERNEL); 2950 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
2756 if (!ha->gid_list) 2951 if (!ha->gid_list)
2757 goto fail_free_init_cb; 2952 goto fail_free_init_cb;
2758 2953
@@ -2893,7 +3088,7 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2893 ha->npiv_info = NULL; 3088 ha->npiv_info = NULL;
2894 3089
2895 /* Get consistent memory allocated for EX-INIT-CB. */ 3090 /* Get consistent memory allocated for EX-INIT-CB. */
2896 if (IS_QLA8XXX_TYPE(ha)) { 3091 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
2897 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, 3092 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2898 &ha->ex_init_cb_dma); 3093 &ha->ex_init_cb_dma);
2899 if (!ha->ex_init_cb) 3094 if (!ha->ex_init_cb)
@@ -2967,7 +3162,8 @@ fail_free_srb_mempool:
2967 mempool_destroy(ha->srb_mempool); 3162 mempool_destroy(ha->srb_mempool);
2968 ha->srb_mempool = NULL; 3163 ha->srb_mempool = NULL;
2969fail_free_gid_list: 3164fail_free_gid_list:
2970 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list, 3165 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3166 ha->gid_list,
2971 ha->gid_list_dma); 3167 ha->gid_list_dma);
2972 ha->gid_list = NULL; 3168 ha->gid_list = NULL;
2973 ha->gid_list_dma = 0; 3169 ha->gid_list_dma = 0;
@@ -3045,9 +3241,6 @@ qla2x00_mem_free(struct qla_hw_data *ha)
3045 if (ha->sfp_data) 3241 if (ha->sfp_data)
3046 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma); 3242 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3047 3243
3048 if (ha->edc_data)
3049 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
3050
3051 if (ha->ms_iocb) 3244 if (ha->ms_iocb)
3052 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); 3245 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3053 3246
@@ -3062,8 +3255,8 @@ qla2x00_mem_free(struct qla_hw_data *ha)
3062 dma_pool_destroy(ha->s_dma_pool); 3255 dma_pool_destroy(ha->s_dma_pool);
3063 3256
3064 if (ha->gid_list) 3257 if (ha->gid_list)
3065 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list, 3258 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3066 ha->gid_list_dma); 3259 ha->gid_list, ha->gid_list_dma);
3067 3260
3068 if (IS_QLA82XX(ha)) { 3261 if (IS_QLA82XX(ha)) {
3069 if (!list_empty(&ha->gbl_dsd_list)) { 3262 if (!list_empty(&ha->gbl_dsd_list)) {
@@ -3095,6 +3288,7 @@ qla2x00_mem_free(struct qla_hw_data *ha)
3095 vfree(ha->optrom_buffer); 3288 vfree(ha->optrom_buffer);
3096 kfree(ha->nvram); 3289 kfree(ha->nvram);
3097 kfree(ha->npiv_info); 3290 kfree(ha->npiv_info);
3291 kfree(ha->swl);
3098 3292
3099 ha->srb_mempool = NULL; 3293 ha->srb_mempool = NULL;
3100 ha->ctx_mempool = NULL; 3294 ha->ctx_mempool = NULL;
@@ -3661,75 +3855,6 @@ qla2x00_rst_aen(scsi_qla_host_t *vha)
3661 } 3855 }
3662} 3856}
3663 3857
3664static void
3665qla2x00_sp_free_dma(srb_t *sp)
3666{
3667 struct scsi_cmnd *cmd = sp->cmd;
3668 struct qla_hw_data *ha = sp->fcport->vha->hw;
3669
3670 if (sp->flags & SRB_DMA_VALID) {
3671 scsi_dma_unmap(cmd);
3672 sp->flags &= ~SRB_DMA_VALID;
3673 }
3674
3675 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3676 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3677 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3678 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3679 }
3680
3681 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3682 /* List assured to be having elements */
3683 qla2x00_clean_dsd_pool(ha, sp);
3684 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3685 }
3686
3687 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3688 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3689 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3690 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3691 }
3692
3693 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3694 struct ct6_dsd *ctx = sp->ctx;
3695 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3696 ctx->fcp_cmnd_dma);
3697 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3698 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3699 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3700 mempool_free(sp->ctx, ha->ctx_mempool);
3701 sp->ctx = NULL;
3702 }
3703
3704 CMD_SP(cmd) = NULL;
3705}
3706
3707static void
3708qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
3709{
3710 struct scsi_cmnd *cmd = sp->cmd;
3711
3712 qla2x00_sp_free_dma(sp);
3713 mempool_free(sp, ha->srb_mempool);
3714 cmd->scsi_done(cmd);
3715}
3716
3717void
3718qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3719{
3720 if (atomic_read(&sp->ref_count) == 0) {
3721 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
3722 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
3723 sp, sp->cmd);
3724 if (ql2xextended_error_logging & ql_dbg_io)
3725 BUG();
3726 return;
3727 }
3728 if (!atomic_dec_and_test(&sp->ref_count))
3729 return;
3730 qla2x00_sp_final_compl(ha, sp);
3731}
3732
3733/************************************************************************** 3858/**************************************************************************
3734* qla2x00_timer 3859* qla2x00_timer
3735* 3860*
@@ -3800,7 +3925,7 @@ qla2x00_timer(scsi_qla_host_t *vha)
3800 sp = req->outstanding_cmds[index]; 3925 sp = req->outstanding_cmds[index];
3801 if (!sp) 3926 if (!sp)
3802 continue; 3927 continue;
3803 if (sp->ctx && !IS_PROT_IO(sp)) 3928 if (sp->type != SRB_SCSI_CMD)
3804 continue; 3929 continue;
3805 sfcp = sp->fcport; 3930 sfcp = sp->fcport;
3806 if (!(sfcp->flags & FCF_FCP2_DEVICE)) 3931 if (!(sfcp->flags & FCF_FCP2_DEVICE))
@@ -3889,7 +4014,7 @@ qla2x00_timer(scsi_qla_host_t *vha)
3889 4014
3890/* Firmware interface routines. */ 4015/* Firmware interface routines. */
3891 4016
3892#define FW_BLOBS 8 4017#define FW_BLOBS 10
3893#define FW_ISP21XX 0 4018#define FW_ISP21XX 0
3894#define FW_ISP22XX 1 4019#define FW_ISP22XX 1
3895#define FW_ISP2300 2 4020#define FW_ISP2300 2
@@ -3898,6 +4023,8 @@ qla2x00_timer(scsi_qla_host_t *vha)
3898#define FW_ISP25XX 5 4023#define FW_ISP25XX 5
3899#define FW_ISP81XX 6 4024#define FW_ISP81XX 6
3900#define FW_ISP82XX 7 4025#define FW_ISP82XX 7
4026#define FW_ISP2031 8
4027#define FW_ISP8031 9
3901 4028
3902#define FW_FILE_ISP21XX "ql2100_fw.bin" 4029#define FW_FILE_ISP21XX "ql2100_fw.bin"
3903#define FW_FILE_ISP22XX "ql2200_fw.bin" 4030#define FW_FILE_ISP22XX "ql2200_fw.bin"
@@ -3907,6 +4034,8 @@ qla2x00_timer(scsi_qla_host_t *vha)
3907#define FW_FILE_ISP25XX "ql2500_fw.bin" 4034#define FW_FILE_ISP25XX "ql2500_fw.bin"
3908#define FW_FILE_ISP81XX "ql8100_fw.bin" 4035#define FW_FILE_ISP81XX "ql8100_fw.bin"
3909#define FW_FILE_ISP82XX "ql8200_fw.bin" 4036#define FW_FILE_ISP82XX "ql8200_fw.bin"
4037#define FW_FILE_ISP2031 "ql2600_fw.bin"
4038#define FW_FILE_ISP8031 "ql8300_fw.bin"
3910 4039
3911static DEFINE_MUTEX(qla_fw_lock); 4040static DEFINE_MUTEX(qla_fw_lock);
3912 4041
@@ -3919,6 +4048,8 @@ static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
3919 { .name = FW_FILE_ISP25XX, }, 4048 { .name = FW_FILE_ISP25XX, },
3920 { .name = FW_FILE_ISP81XX, }, 4049 { .name = FW_FILE_ISP81XX, },
3921 { .name = FW_FILE_ISP82XX, }, 4050 { .name = FW_FILE_ISP82XX, },
4051 { .name = FW_FILE_ISP2031, },
4052 { .name = FW_FILE_ISP8031, },
3922}; 4053};
3923 4054
3924struct fw_blob * 4055struct fw_blob *
@@ -3927,7 +4058,6 @@ qla2x00_request_firmware(scsi_qla_host_t *vha)
3927 struct qla_hw_data *ha = vha->hw; 4058 struct qla_hw_data *ha = vha->hw;
3928 struct fw_blob *blob; 4059 struct fw_blob *blob;
3929 4060
3930 blob = NULL;
3931 if (IS_QLA2100(ha)) { 4061 if (IS_QLA2100(ha)) {
3932 blob = &qla_fw_blobs[FW_ISP21XX]; 4062 blob = &qla_fw_blobs[FW_ISP21XX];
3933 } else if (IS_QLA2200(ha)) { 4063 } else if (IS_QLA2200(ha)) {
@@ -3944,6 +4074,12 @@ qla2x00_request_firmware(scsi_qla_host_t *vha)
3944 blob = &qla_fw_blobs[FW_ISP81XX]; 4074 blob = &qla_fw_blobs[FW_ISP81XX];
3945 } else if (IS_QLA82XX(ha)) { 4075 } else if (IS_QLA82XX(ha)) {
3946 blob = &qla_fw_blobs[FW_ISP82XX]; 4076 blob = &qla_fw_blobs[FW_ISP82XX];
4077 } else if (IS_QLA2031(ha)) {
4078 blob = &qla_fw_blobs[FW_ISP2031];
4079 } else if (IS_QLA8031(ha)) {
4080 blob = &qla_fw_blobs[FW_ISP8031];
4081 } else {
4082 return NULL;
3947 } 4083 }
3948 4084
3949 mutex_lock(&qla_fw_lock); 4085 mutex_lock(&qla_fw_lock);
@@ -4265,6 +4401,7 @@ static struct pci_device_id qla2xxx_pci_tbl[] = {
4265 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) }, 4401 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4266 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) }, 4402 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
4267 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) }, 4403 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
4404 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
4268 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) }, 4405 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
4269 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) }, 4406 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
4270 { 0 }, 4407 { 0 },
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-10 03:47:28 -0500