diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_nx.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_nx.c | 42 |
1 files changed, 27 insertions, 15 deletions
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c index 94bded5ddce4..03554934b0a5 100644 --- a/drivers/scsi/qla2xxx/qla_nx.c +++ b/drivers/scsi/qla2xxx/qla_nx.c | |||
@@ -3817,6 +3817,20 @@ exit: | |||
3817 | return rval; | 3817 | return rval; |
3818 | } | 3818 | } |
3819 | 3819 | ||
3820 | void qla82xx_clear_pending_mbx(scsi_qla_host_t *vha) | ||
3821 | { | ||
3822 | struct qla_hw_data *ha = vha->hw; | ||
3823 | |||
3824 | if (ha->flags.mbox_busy) { | ||
3825 | ha->flags.mbox_int = 1; | ||
3826 | ha->flags.mbox_busy = 0; | ||
3827 | ql_log(ql_log_warn, vha, 0x6010, | ||
3828 | "Doing premature completion of mbx command.\n"); | ||
3829 | if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) | ||
3830 | complete(&ha->mbx_intr_comp); | ||
3831 | } | ||
3832 | } | ||
3833 | |||
3820 | void qla82xx_watchdog(scsi_qla_host_t *vha) | 3834 | void qla82xx_watchdog(scsi_qla_host_t *vha) |
3821 | { | 3835 | { |
3822 | uint32_t dev_state, halt_status; | 3836 | uint32_t dev_state, halt_status; |
@@ -3839,9 +3853,13 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) | |||
3839 | qla2xxx_wake_dpc(vha); | 3853 | qla2xxx_wake_dpc(vha); |
3840 | } else { | 3854 | } else { |
3841 | if (qla82xx_check_fw_alive(vha)) { | 3855 | if (qla82xx_check_fw_alive(vha)) { |
3856 | ql_dbg(ql_dbg_timer, vha, 0x6011, | ||
3857 | "disabling pause transmit on port 0 & 1.\n"); | ||
3858 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, | ||
3859 | CRB_NIU_XG_PAUSE_CTL_P0|CRB_NIU_XG_PAUSE_CTL_P1); | ||
3842 | halt_status = qla82xx_rd_32(ha, | 3860 | halt_status = qla82xx_rd_32(ha, |
3843 | QLA82XX_PEG_HALT_STATUS1); | 3861 | QLA82XX_PEG_HALT_STATUS1); |
3844 | ql_dbg(ql_dbg_timer, vha, 0x6005, | 3862 | ql_log(ql_log_info, vha, 0x6005, |
3845 | "dumping hw/fw registers:.\n " | 3863 | "dumping hw/fw registers:.\n " |
3846 | " PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,.\n " | 3864 | " PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,.\n " |
3847 | " PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,.\n " | 3865 | " PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,.\n " |
@@ -3858,6 +3876,11 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) | |||
3858 | QLA82XX_CRB_PEG_NET_3 + 0x3c), | 3876 | QLA82XX_CRB_PEG_NET_3 + 0x3c), |
3859 | qla82xx_rd_32(ha, | 3877 | qla82xx_rd_32(ha, |
3860 | QLA82XX_CRB_PEG_NET_4 + 0x3c)); | 3878 | QLA82XX_CRB_PEG_NET_4 + 0x3c)); |
3879 | if (LSW(MSB(halt_status)) == 0x67) | ||
3880 | ql_log(ql_log_warn, vha, 0xb052, | ||
3881 | "Firmware aborted with " | ||
3882 | "error code 0x00006700. Device is " | ||
3883 | "being reset.\n"); | ||
3861 | if (halt_status & HALT_STATUS_UNRECOVERABLE) { | 3884 | if (halt_status & HALT_STATUS_UNRECOVERABLE) { |
3862 | set_bit(ISP_UNRECOVERABLE, | 3885 | set_bit(ISP_UNRECOVERABLE, |
3863 | &vha->dpc_flags); | 3886 | &vha->dpc_flags); |
@@ -3869,16 +3892,8 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) | |||
3869 | } | 3892 | } |
3870 | qla2xxx_wake_dpc(vha); | 3893 | qla2xxx_wake_dpc(vha); |
3871 | ha->flags.isp82xx_fw_hung = 1; | 3894 | ha->flags.isp82xx_fw_hung = 1; |
3872 | if (ha->flags.mbox_busy) { | 3895 | ql_log(ql_log_warn, vha, 0x6007, "Firmware hung.\n"); |
3873 | ha->flags.mbox_int = 1; | 3896 | qla82xx_clear_pending_mbx(vha); |
3874 | ql_log(ql_log_warn, vha, 0x6007, | ||
3875 | "Due to FW hung, doing " | ||
3876 | "premature completion of mbx " | ||
3877 | "command.\n"); | ||
3878 | if (test_bit(MBX_INTR_WAIT, | ||
3879 | &ha->mbx_cmd_flags)) | ||
3880 | complete(&ha->mbx_intr_comp); | ||
3881 | } | ||
3882 | } | 3897 | } |
3883 | } | 3898 | } |
3884 | } | 3899 | } |
@@ -4073,10 +4088,7 @@ qla82xx_chip_reset_cleanup(scsi_qla_host_t *vha) | |||
4073 | msleep(1000); | 4088 | msleep(1000); |
4074 | if (qla82xx_check_fw_alive(vha)) { | 4089 | if (qla82xx_check_fw_alive(vha)) { |
4075 | ha->flags.isp82xx_fw_hung = 1; | 4090 | ha->flags.isp82xx_fw_hung = 1; |
4076 | if (ha->flags.mbox_busy) { | 4091 | qla82xx_clear_pending_mbx(vha); |
4077 | ha->flags.mbox_int = 1; | ||
4078 | complete(&ha->mbx_intr_comp); | ||
4079 | } | ||
4080 | break; | 4092 | break; |
4081 | } | 4093 | } |
4082 | } | 4094 | } |