diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_nx.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_nx.c | 117 |
1 files changed, 78 insertions, 39 deletions
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c index cce0cd0d7ec4..11ce53dcbe7e 100644 --- a/drivers/scsi/qla2xxx/qla_nx.c +++ b/drivers/scsi/qla2xxx/qla_nx.c | |||
@@ -848,7 +848,6 @@ qla82xx_rom_lock(struct qla_hw_data *ha) | |||
848 | { | 848 | { |
849 | int done = 0, timeout = 0; | 849 | int done = 0, timeout = 0; |
850 | uint32_t lock_owner = 0; | 850 | uint32_t lock_owner = 0; |
851 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); | ||
852 | 851 | ||
853 | while (!done) { | 852 | while (!done) { |
854 | /* acquire semaphore2 from PCI HW block */ | 853 | /* acquire semaphore2 from PCI HW block */ |
@@ -857,9 +856,6 @@ qla82xx_rom_lock(struct qla_hw_data *ha) | |||
857 | break; | 856 | break; |
858 | if (timeout >= qla82xx_rom_lock_timeout) { | 857 | if (timeout >= qla82xx_rom_lock_timeout) { |
859 | lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); | 858 | lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); |
860 | ql_dbg(ql_dbg_p3p, vha, 0xb085, | ||
861 | "Failed to acquire rom lock, acquired by %d.\n", | ||
862 | lock_owner); | ||
863 | return -1; | 859 | return -1; |
864 | } | 860 | } |
865 | timeout++; | 861 | timeout++; |
@@ -1666,8 +1662,14 @@ qla82xx_iospace_config(struct qla_hw_data *ha) | |||
1666 | } | 1662 | } |
1667 | 1663 | ||
1668 | /* Mapping of IO base pointer */ | 1664 | /* Mapping of IO base pointer */ |
1669 | ha->iobase = (device_reg_t __iomem *)((uint8_t *)ha->nx_pcibase + | 1665 | if (IS_QLA8044(ha)) { |
1670 | 0xbc000 + (ha->pdev->devfn << 11)); | 1666 | ha->iobase = |
1667 | (device_reg_t __iomem *)((uint8_t *)ha->nx_pcibase); | ||
1668 | } else if (IS_QLA82XX(ha)) { | ||
1669 | ha->iobase = | ||
1670 | (device_reg_t __iomem *)((uint8_t *)ha->nx_pcibase + | ||
1671 | 0xbc000 + (ha->pdev->devfn << 11)); | ||
1672 | } | ||
1671 | 1673 | ||
1672 | if (!ql2xdbwr) { | 1674 | if (!ql2xdbwr) { |
1673 | ha->nxdb_wr_ptr = | 1675 | ha->nxdb_wr_ptr = |
@@ -1967,7 +1969,7 @@ static struct qla82xx_legacy_intr_set legacy_intr[] = \ | |||
1967 | * @ha: SCSI driver HA context | 1969 | * @ha: SCSI driver HA context |
1968 | * @mb0: Mailbox0 register | 1970 | * @mb0: Mailbox0 register |
1969 | */ | 1971 | */ |
1970 | static void | 1972 | void |
1971 | qla82xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) | 1973 | qla82xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
1972 | { | 1974 | { |
1973 | uint16_t cnt; | 1975 | uint16_t cnt; |
@@ -2075,13 +2077,6 @@ qla82xx_intr_handler(int irq, void *dev_id) | |||
2075 | WRT_REG_DWORD(®->host_int, 0); | 2077 | WRT_REG_DWORD(®->host_int, 0); |
2076 | } | 2078 | } |
2077 | 2079 | ||
2078 | #ifdef QL_DEBUG_LEVEL_17 | ||
2079 | if (!irq && ha->flags.eeh_busy) | ||
2080 | ql_log(ql_log_warn, vha, 0x503d, | ||
2081 | "isr:status %x, cmd_flags %lx, mbox_int %x, stat %x.\n", | ||
2082 | status, ha->mbx_cmd_flags, ha->flags.mbox_int, stat); | ||
2083 | #endif | ||
2084 | |||
2085 | qla2x00_handle_mbx_completion(ha, status); | 2080 | qla2x00_handle_mbx_completion(ha, status); |
2086 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 2081 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2087 | 2082 | ||
@@ -2147,13 +2142,6 @@ qla82xx_msix_default(int irq, void *dev_id) | |||
2147 | WRT_REG_DWORD(®->host_int, 0); | 2142 | WRT_REG_DWORD(®->host_int, 0); |
2148 | } while (0); | 2143 | } while (0); |
2149 | 2144 | ||
2150 | #ifdef QL_DEBUG_LEVEL_17 | ||
2151 | if (!irq && ha->flags.eeh_busy) | ||
2152 | ql_log(ql_log_warn, vha, 0x5044, | ||
2153 | "isr:status %x, cmd_flags %lx, mbox_int %x, stat %x.\n", | ||
2154 | status, ha->mbx_cmd_flags, ha->flags.mbox_int, stat); | ||
2155 | #endif | ||
2156 | |||
2157 | qla2x00_handle_mbx_completion(ha, status); | 2145 | qla2x00_handle_mbx_completion(ha, status); |
2158 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 2146 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2159 | 2147 | ||
@@ -2247,7 +2235,10 @@ qla82xx_enable_intrs(struct qla_hw_data *ha) | |||
2247 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); | 2235 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
2248 | qla82xx_mbx_intr_enable(vha); | 2236 | qla82xx_mbx_intr_enable(vha); |
2249 | spin_lock_irq(&ha->hardware_lock); | 2237 | spin_lock_irq(&ha->hardware_lock); |
2250 | qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); | 2238 | if (IS_QLA8044(ha)) |
2239 | qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 0); | ||
2240 | else | ||
2241 | qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); | ||
2251 | spin_unlock_irq(&ha->hardware_lock); | 2242 | spin_unlock_irq(&ha->hardware_lock); |
2252 | ha->interrupts_on = 1; | 2243 | ha->interrupts_on = 1; |
2253 | } | 2244 | } |
@@ -2258,7 +2249,10 @@ qla82xx_disable_intrs(struct qla_hw_data *ha) | |||
2258 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); | 2249 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
2259 | qla82xx_mbx_intr_disable(vha); | 2250 | qla82xx_mbx_intr_disable(vha); |
2260 | spin_lock_irq(&ha->hardware_lock); | 2251 | spin_lock_irq(&ha->hardware_lock); |
2261 | qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); | 2252 | if (IS_QLA8044(ha)) |
2253 | qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 1); | ||
2254 | else | ||
2255 | qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); | ||
2262 | spin_unlock_irq(&ha->hardware_lock); | 2256 | spin_unlock_irq(&ha->hardware_lock); |
2263 | ha->interrupts_on = 0; | 2257 | ha->interrupts_on = 0; |
2264 | } | 2258 | } |
@@ -3008,6 +3002,9 @@ qla8xxx_dev_failed_handler(scsi_qla_host_t *vha) | |||
3008 | if (IS_QLA82XX(ha)) { | 3002 | if (IS_QLA82XX(ha)) { |
3009 | qla82xx_clear_drv_active(ha); | 3003 | qla82xx_clear_drv_active(ha); |
3010 | qla82xx_idc_unlock(ha); | 3004 | qla82xx_idc_unlock(ha); |
3005 | } else if (IS_QLA8044(ha)) { | ||
3006 | qla8044_clear_drv_active(vha); | ||
3007 | qla8044_idc_unlock(ha); | ||
3011 | } | 3008 | } |
3012 | 3009 | ||
3013 | /* Set DEV_FAILED flag to disable timer */ | 3010 | /* Set DEV_FAILED flag to disable timer */ |
@@ -3134,7 +3131,7 @@ qla82xx_check_md_needed(scsi_qla_host_t *vha) | |||
3134 | if (fw_major_version != ha->fw_major_version || | 3131 | if (fw_major_version != ha->fw_major_version || |
3135 | fw_minor_version != ha->fw_minor_version || | 3132 | fw_minor_version != ha->fw_minor_version || |
3136 | fw_subminor_version != ha->fw_subminor_version) { | 3133 | fw_subminor_version != ha->fw_subminor_version) { |
3137 | ql_log(ql_log_info, vha, 0xb02d, | 3134 | ql_dbg(ql_dbg_p3p, vha, 0xb02d, |
3138 | "Firmware version differs " | 3135 | "Firmware version differs " |
3139 | "Previous version: %d:%d:%d - " | 3136 | "Previous version: %d:%d:%d - " |
3140 | "New version: %d:%d:%d\n", | 3137 | "New version: %d:%d:%d\n", |
@@ -3330,6 +3327,14 @@ static int qla82xx_check_temp(scsi_qla_host_t *vha) | |||
3330 | return 0; | 3327 | return 0; |
3331 | } | 3328 | } |
3332 | 3329 | ||
3330 | int qla82xx_read_temperature(scsi_qla_host_t *vha) | ||
3331 | { | ||
3332 | uint32_t temp; | ||
3333 | |||
3334 | temp = qla82xx_rd_32(vha->hw, CRB_TEMP_STATE); | ||
3335 | return qla82xx_get_temp_val(temp); | ||
3336 | } | ||
3337 | |||
3333 | void qla82xx_clear_pending_mbx(scsi_qla_host_t *vha) | 3338 | void qla82xx_clear_pending_mbx(scsi_qla_host_t *vha) |
3334 | { | 3339 | { |
3335 | struct qla_hw_data *ha = vha->hw; | 3340 | struct qla_hw_data *ha = vha->hw; |
@@ -3423,8 +3428,18 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) | |||
3423 | 3428 | ||
3424 | int qla82xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | 3429 | int qla82xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
3425 | { | 3430 | { |
3426 | int rval; | 3431 | int rval = -1; |
3427 | rval = qla82xx_device_state_handler(vha); | 3432 | struct qla_hw_data *ha = vha->hw; |
3433 | |||
3434 | if (IS_QLA82XX(ha)) | ||
3435 | rval = qla82xx_device_state_handler(vha); | ||
3436 | else if (IS_QLA8044(ha)) { | ||
3437 | qla8044_idc_lock(ha); | ||
3438 | /* Decide the reset ownership */ | ||
3439 | qla83xx_reset_ownership(vha); | ||
3440 | qla8044_idc_unlock(ha); | ||
3441 | rval = qla8044_device_state_handler(vha); | ||
3442 | } | ||
3428 | return rval; | 3443 | return rval; |
3429 | } | 3444 | } |
3430 | 3445 | ||
@@ -3432,17 +3447,25 @@ void | |||
3432 | qla82xx_set_reset_owner(scsi_qla_host_t *vha) | 3447 | qla82xx_set_reset_owner(scsi_qla_host_t *vha) |
3433 | { | 3448 | { |
3434 | struct qla_hw_data *ha = vha->hw; | 3449 | struct qla_hw_data *ha = vha->hw; |
3435 | uint32_t dev_state; | 3450 | uint32_t dev_state = 0; |
3451 | |||
3452 | if (IS_QLA82XX(ha)) | ||
3453 | dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); | ||
3454 | else if (IS_QLA8044(ha)) | ||
3455 | dev_state = qla8044_rd_direct(vha, QLA8044_CRB_DEV_STATE_INDEX); | ||
3436 | 3456 | ||
3437 | dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); | ||
3438 | if (dev_state == QLA8XXX_DEV_READY) { | 3457 | if (dev_state == QLA8XXX_DEV_READY) { |
3439 | ql_log(ql_log_info, vha, 0xb02f, | 3458 | ql_log(ql_log_info, vha, 0xb02f, |
3440 | "HW State: NEED RESET\n"); | 3459 | "HW State: NEED RESET\n"); |
3441 | qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, | 3460 | if (IS_QLA82XX(ha)) { |
3442 | QLA8XXX_DEV_NEED_RESET); | 3461 | qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, |
3443 | ha->flags.nic_core_reset_owner = 1; | 3462 | QLA8XXX_DEV_NEED_RESET); |
3444 | ql_dbg(ql_dbg_p3p, vha, 0xb030, | 3463 | ha->flags.nic_core_reset_owner = 1; |
3445 | "reset_owner is 0x%x\n", ha->portnum); | 3464 | ql_dbg(ql_dbg_p3p, vha, 0xb030, |
3465 | "reset_owner is 0x%x\n", ha->portnum); | ||
3466 | } else if (IS_QLA8044(ha)) | ||
3467 | qla8044_wr_direct(vha, QLA8044_CRB_DEV_STATE_INDEX, | ||
3468 | QLA8XXX_DEV_NEED_RESET); | ||
3446 | } else | 3469 | } else |
3447 | ql_log(ql_log_info, vha, 0xb031, | 3470 | ql_log(ql_log_info, vha, 0xb031, |
3448 | "Device state is 0x%x = %s.\n", | 3471 | "Device state is 0x%x = %s.\n", |
@@ -3463,7 +3486,7 @@ qla82xx_set_reset_owner(scsi_qla_host_t *vha) | |||
3463 | int | 3486 | int |
3464 | qla82xx_abort_isp(scsi_qla_host_t *vha) | 3487 | qla82xx_abort_isp(scsi_qla_host_t *vha) |
3465 | { | 3488 | { |
3466 | int rval; | 3489 | int rval = -1; |
3467 | struct qla_hw_data *ha = vha->hw; | 3490 | struct qla_hw_data *ha = vha->hw; |
3468 | 3491 | ||
3469 | if (vha->device_flags & DFLG_DEV_FAILED) { | 3492 | if (vha->device_flags & DFLG_DEV_FAILED) { |
@@ -3477,7 +3500,15 @@ qla82xx_abort_isp(scsi_qla_host_t *vha) | |||
3477 | qla82xx_set_reset_owner(vha); | 3500 | qla82xx_set_reset_owner(vha); |
3478 | qla82xx_idc_unlock(ha); | 3501 | qla82xx_idc_unlock(ha); |
3479 | 3502 | ||
3480 | rval = qla82xx_device_state_handler(vha); | 3503 | if (IS_QLA82XX(ha)) |
3504 | rval = qla82xx_device_state_handler(vha); | ||
3505 | else if (IS_QLA8044(ha)) { | ||
3506 | qla8044_idc_lock(ha); | ||
3507 | /* Decide the reset ownership */ | ||
3508 | qla83xx_reset_ownership(vha); | ||
3509 | qla8044_idc_unlock(ha); | ||
3510 | rval = qla8044_device_state_handler(vha); | ||
3511 | } | ||
3481 | 3512 | ||
3482 | qla82xx_idc_lock(ha); | 3513 | qla82xx_idc_lock(ha); |
3483 | qla82xx_clear_rst_ready(ha); | 3514 | qla82xx_clear_rst_ready(ha); |
@@ -3597,7 +3628,7 @@ int qla2x00_wait_for_fcoe_ctx_reset(scsi_qla_host_t *vha) | |||
3597 | void | 3628 | void |
3598 | qla82xx_chip_reset_cleanup(scsi_qla_host_t *vha) | 3629 | qla82xx_chip_reset_cleanup(scsi_qla_host_t *vha) |
3599 | { | 3630 | { |
3600 | int i; | 3631 | int i, fw_state = 0; |
3601 | unsigned long flags; | 3632 | unsigned long flags; |
3602 | struct qla_hw_data *ha = vha->hw; | 3633 | struct qla_hw_data *ha = vha->hw; |
3603 | 3634 | ||
@@ -3608,7 +3639,11 @@ qla82xx_chip_reset_cleanup(scsi_qla_host_t *vha) | |||
3608 | if (!ha->flags.isp82xx_fw_hung) { | 3639 | if (!ha->flags.isp82xx_fw_hung) { |
3609 | for (i = 0; i < 2; i++) { | 3640 | for (i = 0; i < 2; i++) { |
3610 | msleep(1000); | 3641 | msleep(1000); |
3611 | if (qla82xx_check_fw_alive(vha)) { | 3642 | if (IS_QLA82XX(ha)) |
3643 | fw_state = qla82xx_check_fw_alive(vha); | ||
3644 | else if (IS_QLA8044(ha)) | ||
3645 | fw_state = qla8044_check_fw_alive(vha); | ||
3646 | if (fw_state) { | ||
3612 | ha->flags.isp82xx_fw_hung = 1; | 3647 | ha->flags.isp82xx_fw_hung = 1; |
3613 | qla82xx_clear_pending_mbx(vha); | 3648 | qla82xx_clear_pending_mbx(vha); |
3614 | break; | 3649 | break; |
@@ -4072,7 +4107,7 @@ qla82xx_minidump_process_rdmem(scsi_qla_host_t *vha, | |||
4072 | return QLA_SUCCESS; | 4107 | return QLA_SUCCESS; |
4073 | } | 4108 | } |
4074 | 4109 | ||
4075 | static int | 4110 | int |
4076 | qla82xx_validate_template_chksum(scsi_qla_host_t *vha) | 4111 | qla82xx_validate_template_chksum(scsi_qla_host_t *vha) |
4077 | { | 4112 | { |
4078 | struct qla_hw_data *ha = vha->hw; | 4113 | struct qla_hw_data *ha = vha->hw; |
@@ -4384,7 +4419,11 @@ qla82xx_md_prep(scsi_qla_host_t *vha) | |||
4384 | ha->md_template_size / 1024); | 4419 | ha->md_template_size / 1024); |
4385 | 4420 | ||
4386 | /* Get Minidump template */ | 4421 | /* Get Minidump template */ |
4387 | rval = qla82xx_md_get_template(vha); | 4422 | if (IS_QLA8044(ha)) |
4423 | rval = qla8044_md_get_template(vha); | ||
4424 | else | ||
4425 | rval = qla82xx_md_get_template(vha); | ||
4426 | |||
4388 | if (rval == QLA_SUCCESS) { | 4427 | if (rval == QLA_SUCCESS) { |
4389 | ql_dbg(ql_dbg_p3p, vha, 0xb04b, | 4428 | ql_dbg(ql_dbg_p3p, vha, 0xb04b, |
4390 | "MiniDump Template obtained\n"); | 4429 | "MiniDump Template obtained\n"); |