diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_mbx.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_mbx.c | 66 |
1 files changed, 63 insertions, 3 deletions
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index a595ec8264f8..effd8a1403d9 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c | |||
@@ -3828,8 +3828,6 @@ qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, | |||
3828 | 3828 | ||
3829 | /* Copy mailbox information */ | 3829 | /* Copy mailbox information */ |
3830 | memcpy( mresp, mcp->mb, 64); | 3830 | memcpy( mresp, mcp->mb, 64); |
3831 | mresp[3] = mcp->mb[18]; | ||
3832 | mresp[4] = mcp->mb[19]; | ||
3833 | return rval; | 3831 | return rval; |
3834 | } | 3832 | } |
3835 | 3833 | ||
@@ -3890,9 +3888,10 @@ qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, | |||
3890 | } | 3888 | } |
3891 | 3889 | ||
3892 | /* Copy mailbox information */ | 3890 | /* Copy mailbox information */ |
3893 | memcpy( mresp, mcp->mb, 32); | 3891 | memcpy(mresp, mcp->mb, 64); |
3894 | return rval; | 3892 | return rval; |
3895 | } | 3893 | } |
3894 | |||
3896 | int | 3895 | int |
3897 | qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic) | 3896 | qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic) |
3898 | { | 3897 | { |
@@ -3953,6 +3952,67 @@ qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data) | |||
3953 | } | 3952 | } |
3954 | 3953 | ||
3955 | int | 3954 | int |
3955 | qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb) | ||
3956 | { | ||
3957 | int rval; | ||
3958 | uint32_t stat, timer; | ||
3959 | uint16_t mb0 = 0; | ||
3960 | struct qla_hw_data *ha = vha->hw; | ||
3961 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | ||
3962 | |||
3963 | rval = QLA_SUCCESS; | ||
3964 | |||
3965 | DEBUG11(qla_printk(KERN_INFO, ha, | ||
3966 | "%s(%ld): entered.\n", __func__, vha->host_no)); | ||
3967 | |||
3968 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | ||
3969 | |||
3970 | /* Write the MBC data to the registers */ | ||
3971 | WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER); | ||
3972 | WRT_REG_WORD(®->mailbox1, mb[0]); | ||
3973 | WRT_REG_WORD(®->mailbox2, mb[1]); | ||
3974 | WRT_REG_WORD(®->mailbox3, mb[2]); | ||
3975 | WRT_REG_WORD(®->mailbox4, mb[3]); | ||
3976 | |||
3977 | WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT); | ||
3978 | |||
3979 | /* Poll for MBC interrupt */ | ||
3980 | for (timer = 6000000; timer; timer--) { | ||
3981 | /* Check for pending interrupts. */ | ||
3982 | stat = RD_REG_DWORD(®->host_status); | ||
3983 | if (stat & HSRX_RISC_INT) { | ||
3984 | stat &= 0xff; | ||
3985 | |||
3986 | if (stat == 0x1 || stat == 0x2 || | ||
3987 | stat == 0x10 || stat == 0x11) { | ||
3988 | set_bit(MBX_INTERRUPT, | ||
3989 | &ha->mbx_cmd_flags); | ||
3990 | mb0 = RD_REG_WORD(®->mailbox0); | ||
3991 | WRT_REG_DWORD(®->hccr, | ||
3992 | HCCRX_CLR_RISC_INT); | ||
3993 | RD_REG_DWORD(®->hccr); | ||
3994 | break; | ||
3995 | } | ||
3996 | } | ||
3997 | udelay(5); | ||
3998 | } | ||
3999 | |||
4000 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) | ||
4001 | rval = mb0 & MBS_MASK; | ||
4002 | else | ||
4003 | rval = QLA_FUNCTION_FAILED; | ||
4004 | |||
4005 | if (rval != QLA_SUCCESS) { | ||
4006 | DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n", | ||
4007 | __func__, vha->host_no, rval, mb[0])); | ||
4008 | } else { | ||
4009 | DEBUG11(printk(KERN_INFO | ||
4010 | "%s(%ld): done.\n", __func__, vha->host_no)); | ||
4011 | } | ||
4012 | |||
4013 | return rval; | ||
4014 | } | ||
4015 | int | ||
3956 | qla2x00_get_data_rate(scsi_qla_host_t *vha) | 4016 | qla2x00_get_data_rate(scsi_qla_host_t *vha) |
3957 | { | 4017 | { |
3958 | int rval; | 4018 | int rval; |