diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_iocb.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_iocb.c | 74 |
1 files changed, 51 insertions, 23 deletions
diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c index 8299a9891bfe..d792ae32ed69 100644 --- a/drivers/scsi/qla2xxx/qla_iocb.c +++ b/drivers/scsi/qla2xxx/qla_iocb.c | |||
@@ -506,7 +506,10 @@ qla2x00_req_pkt(struct scsi_qla_host *vha, struct req_que *req, | |||
506 | cnt = (uint16_t) | 506 | cnt = (uint16_t) |
507 | RD_REG_DWORD(®->isp25mq.req_q_out); | 507 | RD_REG_DWORD(®->isp25mq.req_q_out); |
508 | else { | 508 | else { |
509 | if (IS_FWI2_CAPABLE(ha)) | 509 | if (IS_QLA82XX(ha)) |
510 | cnt = (uint16_t)RD_REG_DWORD( | ||
511 | ®->isp82.req_q_out); | ||
512 | else if (IS_FWI2_CAPABLE(ha)) | ||
510 | cnt = (uint16_t)RD_REG_DWORD( | 513 | cnt = (uint16_t)RD_REG_DWORD( |
511 | ®->isp24.req_q_out); | 514 | ®->isp24.req_q_out); |
512 | else | 515 | else |
@@ -579,11 +582,29 @@ qla2x00_isp_cmd(struct scsi_qla_host *vha, struct req_que *req) | |||
579 | req->ring_ptr++; | 582 | req->ring_ptr++; |
580 | 583 | ||
581 | /* Set chip new ring index. */ | 584 | /* Set chip new ring index. */ |
582 | if (ha->mqenable) { | 585 | if (IS_QLA82XX(ha)) { |
586 | uint32_t dbval = 0x04 | (ha->portnum << 5); | ||
587 | |||
588 | /* write, read and verify logic */ | ||
589 | dbval = dbval | (req->id << 8) | (req->ring_index << 16); | ||
590 | if (ql2xdbwr) | ||
591 | qla82xx_wr_32(ha, ha->nxdb_wr_ptr, dbval); | ||
592 | else { | ||
593 | WRT_REG_DWORD( | ||
594 | (unsigned long __iomem *)ha->nxdb_wr_ptr, | ||
595 | dbval); | ||
596 | wmb(); | ||
597 | while (RD_REG_DWORD(ha->nxdb_rd_ptr) != dbval) { | ||
598 | WRT_REG_DWORD((unsigned long __iomem *) | ||
599 | ha->nxdb_wr_ptr, dbval); | ||
600 | wmb(); | ||
601 | } | ||
602 | } | ||
603 | } else if (ha->mqenable) { | ||
604 | /* Set chip new ring index. */ | ||
583 | WRT_REG_DWORD(®->isp25mq.req_q_in, req->ring_index); | 605 | WRT_REG_DWORD(®->isp25mq.req_q_in, req->ring_index); |
584 | RD_REG_DWORD(&ioreg->hccr); | 606 | RD_REG_DWORD(&ioreg->hccr); |
585 | } | 607 | } else { |
586 | else { | ||
587 | if (IS_FWI2_CAPABLE(ha)) { | 608 | if (IS_FWI2_CAPABLE(ha)) { |
588 | WRT_REG_DWORD(®->isp24.req_q_in, req->ring_index); | 609 | WRT_REG_DWORD(®->isp24.req_q_in, req->ring_index); |
589 | RD_REG_DWORD_RELAXED(®->isp24.req_q_in); | 610 | RD_REG_DWORD_RELAXED(®->isp24.req_q_in); |
@@ -604,7 +625,7 @@ qla2x00_isp_cmd(struct scsi_qla_host *vha, struct req_que *req) | |||
604 | * | 625 | * |
605 | * Returns the number of IOCB entries needed to store @dsds. | 626 | * Returns the number of IOCB entries needed to store @dsds. |
606 | */ | 627 | */ |
607 | static inline uint16_t | 628 | inline uint16_t |
608 | qla24xx_calc_iocbs(uint16_t dsds) | 629 | qla24xx_calc_iocbs(uint16_t dsds) |
609 | { | 630 | { |
610 | uint16_t iocbs; | 631 | uint16_t iocbs; |
@@ -626,7 +647,7 @@ qla24xx_calc_iocbs(uint16_t dsds) | |||
626 | * @cmd_pkt: Command type 3 IOCB | 647 | * @cmd_pkt: Command type 3 IOCB |
627 | * @tot_dsds: Total number of segments to transfer | 648 | * @tot_dsds: Total number of segments to transfer |
628 | */ | 649 | */ |
629 | static inline void | 650 | inline void |
630 | qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt, | 651 | qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt, |
631 | uint16_t tot_dsds) | 652 | uint16_t tot_dsds) |
632 | { | 653 | { |
@@ -931,24 +952,31 @@ qla2x00_start_iocbs(srb_t *sp) | |||
931 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id); | 952 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id); |
932 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | 953 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; |
933 | 954 | ||
934 | /* Adjust ring index. */ | 955 | if (IS_QLA82XX(ha)) { |
935 | req->ring_index++; | 956 | qla82xx_start_iocbs(sp); |
936 | if (req->ring_index == req->length) { | ||
937 | req->ring_index = 0; | ||
938 | req->ring_ptr = req->ring; | ||
939 | } else | ||
940 | req->ring_ptr++; | ||
941 | |||
942 | /* Set chip new ring index. */ | ||
943 | if (ha->mqenable) { | ||
944 | WRT_REG_DWORD(®->isp25mq.req_q_in, req->ring_index); | ||
945 | RD_REG_DWORD(&ioreg->hccr); | ||
946 | } else if (IS_FWI2_CAPABLE(ha)) { | ||
947 | WRT_REG_DWORD(®->isp24.req_q_in, req->ring_index); | ||
948 | RD_REG_DWORD_RELAXED(®->isp24.req_q_in); | ||
949 | } else { | 957 | } else { |
950 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, ®->isp), req->ring_index); | 958 | /* Adjust ring index. */ |
951 | RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, ®->isp)); | 959 | req->ring_index++; |
960 | if (req->ring_index == req->length) { | ||
961 | req->ring_index = 0; | ||
962 | req->ring_ptr = req->ring; | ||
963 | } else | ||
964 | req->ring_ptr++; | ||
965 | |||
966 | /* Set chip new ring index. */ | ||
967 | if (ha->mqenable) { | ||
968 | WRT_REG_DWORD(®->isp25mq.req_q_in, req->ring_index); | ||
969 | RD_REG_DWORD(&ioreg->hccr); | ||
970 | } else if (IS_QLA82XX(ha)) { | ||
971 | qla82xx_start_iocbs(sp); | ||
972 | } else if (IS_FWI2_CAPABLE(ha)) { | ||
973 | WRT_REG_DWORD(®->isp24.req_q_in, req->ring_index); | ||
974 | RD_REG_DWORD_RELAXED(®->isp24.req_q_in); | ||
975 | } else { | ||
976 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, ®->isp), | ||
977 | req->ring_index); | ||
978 | RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, ®->isp)); | ||
979 | } | ||
952 | } | 980 | } |
953 | } | 981 | } |
954 | 982 | ||