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Diffstat (limited to 'drivers/scsi/qla2xxx/qla_fw.h')
-rw-r--r--drivers/scsi/qla2xxx/qla_fw.h59
1 files changed, 59 insertions, 0 deletions
diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h
index 42c5587cc50c..a77a2471eaff 100644
--- a/drivers/scsi/qla2xxx/qla_fw.h
+++ b/drivers/scsi/qla2xxx/qla_fw.h
@@ -841,6 +841,8 @@ struct device_reg_24xx {
841#define FA_HW_EVENT_ENTRY_SIZE 4 841#define FA_HW_EVENT_ENTRY_SIZE 4
842#define FA_NPIV_CONF0_ADDR 0x5C000 842#define FA_NPIV_CONF0_ADDR 0x5C000
843#define FA_NPIV_CONF1_ADDR 0x5D000 843#define FA_NPIV_CONF1_ADDR 0x5D000
844#define FA_FCP_PRIO0_ADDR 0x10000
845#define FA_FCP_PRIO1_ADDR 0x12000
844 846
845/* 847/*
846 * Flash Error Log Event Codes. 848 * Flash Error Log Event Codes.
@@ -1274,6 +1276,8 @@ struct qla_flt_header {
1274#define FLT_REG_NPIV_CONF_0 0x29 1276#define FLT_REG_NPIV_CONF_0 0x29
1275#define FLT_REG_NPIV_CONF_1 0x2a 1277#define FLT_REG_NPIV_CONF_1 0x2a
1276#define FLT_REG_GOLD_FW 0x2f 1278#define FLT_REG_GOLD_FW 0x2f
1279#define FLT_REG_FCP_PRIO_0 0x87
1280#define FLT_REG_FCP_PRIO_1 0x88
1277 1281
1278struct qla_flt_region { 1282struct qla_flt_region {
1279 uint32_t code; 1283 uint32_t code;
@@ -1750,6 +1754,61 @@ struct ex_init_cb_81xx {
1750#define FARX_ACCESS_FLASH_CONF_81XX 0x7FFD0000 1754#define FARX_ACCESS_FLASH_CONF_81XX 0x7FFD0000
1751#define FARX_ACCESS_FLASH_DATA_81XX 0x7F800000 1755#define FARX_ACCESS_FLASH_DATA_81XX 0x7F800000
1752 1756
1757/* FCP priority config defines *************************************/
1758/* operations */
1759#define QLFC_FCP_PRIO_DISABLE 0x0
1760#define QLFC_FCP_PRIO_ENABLE 0x1
1761#define QLFC_FCP_PRIO_GET_CONFIG 0x2
1762#define QLFC_FCP_PRIO_SET_CONFIG 0x3
1763
1764struct qla_fcp_prio_entry {
1765 uint16_t flags; /* Describes parameter(s) in FCP */
1766 /* priority entry that are valid */
1767#define FCP_PRIO_ENTRY_VALID 0x1
1768#define FCP_PRIO_ENTRY_TAG_VALID 0x2
1769#define FCP_PRIO_ENTRY_SPID_VALID 0x4
1770#define FCP_PRIO_ENTRY_DPID_VALID 0x8
1771#define FCP_PRIO_ENTRY_LUNB_VALID 0x10
1772#define FCP_PRIO_ENTRY_LUNE_VALID 0x20
1773#define FCP_PRIO_ENTRY_SWWN_VALID 0x40
1774#define FCP_PRIO_ENTRY_DWWN_VALID 0x80
1775 uint8_t tag; /* Priority value */
1776 uint8_t reserved; /* Reserved for future use */
1777 uint32_t src_pid; /* Src port id. high order byte */
1778 /* unused; -1 (wild card) */
1779 uint32_t dst_pid; /* Src port id. high order byte */
1780 /* unused; -1 (wild card) */
1781 uint16_t lun_beg; /* 1st lun num of lun range. */
1782 /* -1 (wild card) */
1783 uint16_t lun_end; /* 2nd lun num of lun range. */
1784 /* -1 (wild card) */
1785 uint8_t src_wwpn[8]; /* Source WWPN: -1 (wild card) */
1786 uint8_t dst_wwpn[8]; /* Destination WWPN: -1 (wild card) */
1787};
1788
1789struct qla_fcp_prio_cfg {
1790 uint8_t signature[4]; /* "HQOS" signature of config data */
1791 uint16_t version; /* 1: Initial version */
1792 uint16_t length; /* config data size in num bytes */
1793 uint16_t checksum; /* config data bytes checksum */
1794 uint16_t num_entries; /* Number of entries */
1795 uint16_t size_of_entry; /* Size of each entry in num bytes */
1796 uint8_t attributes; /* enable/disable, persistence */
1797#define FCP_PRIO_ATTR_DISABLE 0x0
1798#define FCP_PRIO_ATTR_ENABLE 0x1
1799#define FCP_PRIO_ATTR_PERSIST 0x2
1800 uint8_t reserved; /* Reserved for future use */
1801#define FCP_PRIO_CFG_HDR_SIZE 0x10
1802 struct qla_fcp_prio_entry entry[1]; /* fcp priority entries */
1803#define FCP_PRIO_CFG_ENTRY_SIZE 0x20
1804};
1805
1806#define FCP_PRIO_CFG_SIZE (32*1024) /* fcp prio data per port*/
1807
1808/* 25XX Support ****************************************************/
1809#define FA_FCP_PRIO0_ADDR_25 0x3C000
1810#define FA_FCP_PRIO1_ADDR_25 0x3E000
1811
1753/* 81XX Flash locations -- occupies second 2MB region. */ 1812/* 81XX Flash locations -- occupies second 2MB region. */
1754#define FA_BOOT_CODE_ADDR_81 0x80000 1813#define FA_BOOT_CODE_ADDR_81 0x80000
1755#define FA_RISC_CODE_ADDR_81 0xA0000 1814#define FA_RISC_CODE_ADDR_81 0xA0000